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89323f8c GS |
1 | /* |
2 | * Texas Instruments Keystone IRQ controller IP driver | |
3 | * | |
4 | * Copyright (C) 2014 Texas Instruments, Inc. | |
5 | * Author: Sajesh Kumar Saran <sajesh@ti.com> | |
6 | * Grygorii Strashko <grygorii.strashko@ti.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation version 2. | |
11 | * | |
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
13 | * kind, whether express or implied; without even the implied warranty | |
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/irq.h> | |
19 | #include <linux/bitops.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/moduleparam.h> | |
22 | #include <linux/irqdomain.h> | |
41a83e06 | 23 | #include <linux/irqchip.h> |
89323f8c GS |
24 | #include <linux/irqchip/chained_irq.h> |
25 | #include <linux/of.h> | |
26 | #include <linux/of_platform.h> | |
27 | #include <linux/mfd/syscon.h> | |
28 | #include <linux/regmap.h> | |
89323f8c GS |
29 | |
30 | /* The source ID bits start from 4 to 31 (total 28 bits)*/ | |
31 | #define BIT_OFS 4 | |
32 | #define KEYSTONE_N_IRQ (32 - BIT_OFS) | |
33 | ||
34 | struct keystone_irq_device { | |
35 | struct device *dev; | |
36 | struct irq_chip chip; | |
37 | u32 mask; | |
8703ec19 | 38 | int irq; |
89323f8c GS |
39 | struct irq_domain *irqd; |
40 | struct regmap *devctrl_regs; | |
41 | u32 devctrl_offset; | |
42 | }; | |
43 | ||
44 | static inline u32 keystone_irq_readl(struct keystone_irq_device *kirq) | |
45 | { | |
46 | int ret; | |
47 | u32 val = 0; | |
48 | ||
49 | ret = regmap_read(kirq->devctrl_regs, kirq->devctrl_offset, &val); | |
50 | if (ret < 0) | |
51 | dev_dbg(kirq->dev, "irq read failed ret(%d)\n", ret); | |
52 | return val; | |
53 | } | |
54 | ||
55 | static inline void | |
56 | keystone_irq_writel(struct keystone_irq_device *kirq, u32 value) | |
57 | { | |
58 | int ret; | |
59 | ||
60 | ret = regmap_write(kirq->devctrl_regs, kirq->devctrl_offset, value); | |
61 | if (ret < 0) | |
62 | dev_dbg(kirq->dev, "irq write failed ret(%d)\n", ret); | |
63 | } | |
64 | ||
65 | static void keystone_irq_setmask(struct irq_data *d) | |
66 | { | |
67 | struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d); | |
68 | ||
69 | kirq->mask |= BIT(d->hwirq); | |
70 | dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask); | |
71 | } | |
72 | ||
73 | static void keystone_irq_unmask(struct irq_data *d) | |
74 | { | |
75 | struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d); | |
76 | ||
77 | kirq->mask &= ~BIT(d->hwirq); | |
78 | dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask); | |
79 | } | |
80 | ||
81 | static void keystone_irq_ack(struct irq_data *d) | |
82 | { | |
83 | /* nothing to do here */ | |
84 | } | |
85 | ||
86 | static void keystone_irq_handler(unsigned irq, struct irq_desc *desc) | |
87 | { | |
88 | struct keystone_irq_device *kirq = irq_desc_get_handler_data(desc); | |
89 | unsigned long pending; | |
90 | int src, virq; | |
91 | ||
92 | dev_dbg(kirq->dev, "start irq %d\n", irq); | |
93 | ||
94 | chained_irq_enter(irq_desc_get_chip(desc), desc); | |
95 | ||
96 | pending = keystone_irq_readl(kirq); | |
97 | keystone_irq_writel(kirq, pending); | |
98 | ||
99 | dev_dbg(kirq->dev, "pending 0x%lx, mask 0x%x\n", pending, kirq->mask); | |
100 | ||
101 | pending = (pending >> BIT_OFS) & ~kirq->mask; | |
102 | ||
103 | dev_dbg(kirq->dev, "pending after mask 0x%lx\n", pending); | |
104 | ||
105 | for (src = 0; src < KEYSTONE_N_IRQ; src++) { | |
106 | if (BIT(src) & pending) { | |
107 | virq = irq_find_mapping(kirq->irqd, src); | |
108 | dev_dbg(kirq->dev, "dispatch bit %d, virq %d\n", | |
109 | src, virq); | |
110 | if (!virq) | |
111 | dev_warn(kirq->dev, "sporious irq detected hwirq %d, virq %d\n", | |
112 | src, virq); | |
113 | generic_handle_irq(virq); | |
114 | } | |
115 | } | |
116 | ||
117 | chained_irq_exit(irq_desc_get_chip(desc), desc); | |
118 | ||
119 | dev_dbg(kirq->dev, "end irq %d\n", irq); | |
120 | } | |
121 | ||
122 | static int keystone_irq_map(struct irq_domain *h, unsigned int virq, | |
123 | irq_hw_number_t hw) | |
124 | { | |
125 | struct keystone_irq_device *kirq = h->host_data; | |
126 | ||
127 | irq_set_chip_data(virq, kirq); | |
128 | irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq); | |
129 | set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); | |
130 | return 0; | |
131 | } | |
132 | ||
96009736 | 133 | static const struct irq_domain_ops keystone_irq_ops = { |
89323f8c GS |
134 | .map = keystone_irq_map, |
135 | .xlate = irq_domain_xlate_onecell, | |
136 | }; | |
137 | ||
138 | static int keystone_irq_probe(struct platform_device *pdev) | |
139 | { | |
140 | struct device *dev = &pdev->dev; | |
141 | struct device_node *np = dev->of_node; | |
142 | struct keystone_irq_device *kirq; | |
143 | int ret; | |
144 | ||
145 | if (np == NULL) | |
146 | return -EINVAL; | |
147 | ||
148 | kirq = devm_kzalloc(dev, sizeof(*kirq), GFP_KERNEL); | |
149 | if (!kirq) | |
150 | return -ENOMEM; | |
151 | ||
152 | kirq->devctrl_regs = | |
153 | syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev"); | |
154 | if (IS_ERR(kirq->devctrl_regs)) | |
155 | return PTR_ERR(kirq->devctrl_regs); | |
156 | ||
157 | ret = of_property_read_u32_index(np, "ti,syscon-dev", 1, | |
158 | &kirq->devctrl_offset); | |
159 | if (ret) { | |
160 | dev_err(dev, "couldn't read the devctrl_offset offset!\n"); | |
161 | return ret; | |
162 | } | |
163 | ||
164 | kirq->irq = platform_get_irq(pdev, 0); | |
165 | if (kirq->irq < 0) { | |
166 | dev_err(dev, "no irq resource %d\n", kirq->irq); | |
167 | return kirq->irq; | |
168 | } | |
169 | ||
170 | kirq->dev = dev; | |
171 | kirq->mask = ~0x0; | |
172 | kirq->chip.name = "keystone-irq"; | |
173 | kirq->chip.irq_ack = keystone_irq_ack; | |
174 | kirq->chip.irq_mask = keystone_irq_setmask; | |
175 | kirq->chip.irq_unmask = keystone_irq_unmask; | |
176 | ||
177 | kirq->irqd = irq_domain_add_linear(np, KEYSTONE_N_IRQ, | |
178 | &keystone_irq_ops, kirq); | |
179 | if (!kirq->irqd) { | |
180 | dev_err(dev, "IRQ domain registration failed\n"); | |
181 | return -ENODEV; | |
182 | } | |
183 | ||
184 | platform_set_drvdata(pdev, kirq); | |
185 | ||
9414b6e2 | 186 | irq_set_chained_handler_and_data(kirq->irq, keystone_irq_handler, kirq); |
89323f8c GS |
187 | |
188 | /* clear all source bits */ | |
189 | keystone_irq_writel(kirq, ~0x0); | |
190 | ||
191 | dev_info(dev, "irqchip registered, nr_irqs %u\n", KEYSTONE_N_IRQ); | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
196 | static int keystone_irq_remove(struct platform_device *pdev) | |
197 | { | |
198 | struct keystone_irq_device *kirq = platform_get_drvdata(pdev); | |
199 | int hwirq; | |
200 | ||
201 | for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++) | |
202 | irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq)); | |
203 | ||
204 | irq_domain_remove(kirq->irqd); | |
205 | return 0; | |
206 | } | |
207 | ||
208 | static const struct of_device_id keystone_irq_dt_ids[] = { | |
209 | { .compatible = "ti,keystone-irq", }, | |
210 | {}, | |
211 | }; | |
212 | MODULE_DEVICE_TABLE(of, keystone_irq_dt_ids); | |
213 | ||
214 | static struct platform_driver keystone_irq_device_driver = { | |
215 | .probe = keystone_irq_probe, | |
216 | .remove = keystone_irq_remove, | |
217 | .driver = { | |
218 | .name = "keystone_irq", | |
89323f8c GS |
219 | .of_match_table = of_match_ptr(keystone_irq_dt_ids), |
220 | } | |
221 | }; | |
222 | ||
223 | module_platform_driver(keystone_irq_device_driver); | |
224 | ||
225 | MODULE_AUTHOR("Texas Instruments"); | |
226 | MODULE_AUTHOR("Sajesh Kumar Saran"); | |
227 | MODULE_AUTHOR("Grygorii Strashko"); | |
228 | MODULE_DESCRIPTION("Keystone IRQ chip"); | |
229 | MODULE_LICENSE("GPL v2"); |