Commit | Line | Data |
---|---|---|
736baef4 JR |
1 | #include <linux/kernel.h> |
2 | #include <linux/string.h> | |
98f1ad25 | 3 | #include <linux/cpumask.h> |
736baef4 | 4 | #include <linux/errno.h> |
98f1ad25 JR |
5 | #include <linux/msi.h> |
6 | ||
7 | #include <asm/hw_irq.h> | |
8 | #include <asm/irq_remapping.h> | |
736baef4 | 9 | |
8a8f422d | 10 | #include "irq_remapping.h" |
736baef4 | 11 | |
95a02e97 | 12 | int irq_remapping_enabled; |
736baef4 | 13 | |
95a02e97 | 14 | int disable_irq_remap; |
736baef4 JR |
15 | int disable_sourceid_checking; |
16 | int no_x2apic_optout; | |
17 | ||
18 | static struct irq_remap_ops *remap_ops; | |
19 | ||
20 | static __init int setup_nointremap(char *str) | |
21 | { | |
95a02e97 | 22 | disable_irq_remap = 1; |
736baef4 JR |
23 | return 0; |
24 | } | |
25 | early_param("nointremap", setup_nointremap); | |
26 | ||
95a02e97 | 27 | static __init int setup_irqremap(char *str) |
736baef4 JR |
28 | { |
29 | if (!str) | |
30 | return -EINVAL; | |
31 | ||
32 | while (*str) { | |
33 | if (!strncmp(str, "on", 2)) | |
95a02e97 | 34 | disable_irq_remap = 0; |
736baef4 | 35 | else if (!strncmp(str, "off", 3)) |
95a02e97 | 36 | disable_irq_remap = 1; |
736baef4 JR |
37 | else if (!strncmp(str, "nosid", 5)) |
38 | disable_sourceid_checking = 1; | |
39 | else if (!strncmp(str, "no_x2apic_optout", 16)) | |
40 | no_x2apic_optout = 1; | |
41 | ||
42 | str += strcspn(str, ","); | |
43 | while (*str == ',') | |
44 | str++; | |
45 | } | |
46 | ||
47 | return 0; | |
48 | } | |
95a02e97 | 49 | early_param("intremap", setup_irqremap); |
736baef4 | 50 | |
95a02e97 | 51 | void __init setup_irq_remapping_ops(void) |
736baef4 JR |
52 | { |
53 | remap_ops = &intel_irq_remap_ops; | |
c18d2388 JR |
54 | |
55 | #ifdef CONFIG_AMD_IOMMU | |
56 | if (amd_iommu_irq_ops.prepare() == 0) | |
57 | remap_ops = &amd_iommu_irq_ops; | |
58 | #endif | |
736baef4 JR |
59 | } |
60 | ||
95a02e97 | 61 | int irq_remapping_supported(void) |
736baef4 | 62 | { |
95a02e97 | 63 | if (disable_irq_remap) |
736baef4 JR |
64 | return 0; |
65 | ||
66 | if (!remap_ops || !remap_ops->supported) | |
67 | return 0; | |
68 | ||
69 | return remap_ops->supported(); | |
70 | } | |
71 | ||
95a02e97 | 72 | int __init irq_remapping_prepare(void) |
736baef4 | 73 | { |
95a02e97 | 74 | if (!remap_ops || !remap_ops->prepare) |
736baef4 JR |
75 | return -ENODEV; |
76 | ||
95a02e97 | 77 | return remap_ops->prepare(); |
736baef4 JR |
78 | } |
79 | ||
95a02e97 | 80 | int __init irq_remapping_enable(void) |
736baef4 | 81 | { |
95a02e97 | 82 | if (!remap_ops || !remap_ops->enable) |
736baef4 JR |
83 | return -ENODEV; |
84 | ||
95a02e97 | 85 | return remap_ops->enable(); |
736baef4 | 86 | } |
4f3d8b67 | 87 | |
95a02e97 | 88 | void irq_remapping_disable(void) |
4f3d8b67 | 89 | { |
70733e0c JR |
90 | if (!irq_remapping_enabled || |
91 | !remap_ops || | |
92 | !remap_ops->disable) | |
4f3d8b67 JR |
93 | return; |
94 | ||
95a02e97 | 95 | remap_ops->disable(); |
4f3d8b67 JR |
96 | } |
97 | ||
95a02e97 | 98 | int irq_remapping_reenable(int mode) |
4f3d8b67 | 99 | { |
70733e0c JR |
100 | if (!irq_remapping_enabled || |
101 | !remap_ops || | |
102 | !remap_ops->reenable) | |
4f3d8b67 JR |
103 | return 0; |
104 | ||
95a02e97 | 105 | return remap_ops->reenable(mode); |
4f3d8b67 JR |
106 | } |
107 | ||
95a02e97 | 108 | int __init irq_remap_enable_fault_handling(void) |
4f3d8b67 | 109 | { |
70733e0c JR |
110 | if (!irq_remapping_enabled) |
111 | return 0; | |
112 | ||
4f3d8b67 JR |
113 | if (!remap_ops || !remap_ops->enable_faulting) |
114 | return -ENODEV; | |
115 | ||
116 | return remap_ops->enable_faulting(); | |
117 | } | |
0c3f173a | 118 | |
95a02e97 SS |
119 | int setup_ioapic_remapped_entry(int irq, |
120 | struct IO_APIC_route_entry *entry, | |
121 | unsigned int destination, int vector, | |
122 | struct io_apic_irq_attr *attr) | |
0c3f173a JR |
123 | { |
124 | if (!remap_ops || !remap_ops->setup_ioapic_entry) | |
125 | return -ENODEV; | |
126 | ||
127 | return remap_ops->setup_ioapic_entry(irq, entry, destination, | |
128 | vector, attr); | |
129 | } | |
4c1bad6a | 130 | |
95a02e97 SS |
131 | int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask, |
132 | bool force) | |
4c1bad6a | 133 | { |
7eb9ae07 SS |
134 | if (!config_enabled(CONFIG_SMP) || !remap_ops || |
135 | !remap_ops->set_affinity) | |
4c1bad6a JR |
136 | return 0; |
137 | ||
138 | return remap_ops->set_affinity(data, mask, force); | |
139 | } | |
9d619f65 | 140 | |
95a02e97 | 141 | void free_remapped_irq(int irq) |
9d619f65 JR |
142 | { |
143 | if (!remap_ops || !remap_ops->free_irq) | |
144 | return; | |
145 | ||
146 | remap_ops->free_irq(irq); | |
147 | } | |
5e2b930b | 148 | |
95a02e97 SS |
149 | void compose_remapped_msi_msg(struct pci_dev *pdev, |
150 | unsigned int irq, unsigned int dest, | |
151 | struct msi_msg *msg, u8 hpet_id) | |
5e2b930b JR |
152 | { |
153 | if (!remap_ops || !remap_ops->compose_msi_msg) | |
154 | return; | |
155 | ||
156 | remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
157 | } | |
158 | ||
95a02e97 | 159 | int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) |
5e2b930b JR |
160 | { |
161 | if (!remap_ops || !remap_ops->msi_alloc_irq) | |
162 | return -ENODEV; | |
163 | ||
164 | return remap_ops->msi_alloc_irq(pdev, irq, nvec); | |
165 | } | |
166 | ||
95a02e97 SS |
167 | int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, |
168 | int index, int sub_handle) | |
5e2b930b JR |
169 | { |
170 | if (!remap_ops || !remap_ops->msi_setup_irq) | |
171 | return -ENODEV; | |
172 | ||
173 | return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); | |
174 | } | |
175 | ||
95a02e97 | 176 | int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) |
5e2b930b JR |
177 | { |
178 | if (!remap_ops || !remap_ops->setup_hpet_msi) | |
179 | return -ENODEV; | |
180 | ||
181 | return remap_ops->setup_hpet_msi(irq, id); | |
182 | } |