[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / iommu / irq_remapping.c

#include <linux/seq_file.h>
#include <linux/cpumask.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/msi.h>
#include <linux/irq.h>
#include <linux/pci.h>

#include <asm/hw_irq.h>
#include <asm/irq_remapping.h>
#include <asm/processor.h>
#include <asm/x86_init.h>
#include <asm/apic.h>

#include "irq_remapping.h"

int irq_remapping_enabled;

int disable_irq_remap;
int disable_sourceid_checking;
int no_x2apic_optout;

static struct irq_remap_ops *remap_ops;

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle);
static int set_remapped_irq_affinity(struct irq_data *data,
				     const struct cpumask *mask,
				     bool force);

static bool irq_remapped(struct irq_cfg *cfg)
{
	return (cfg->remapped == 1);
}

static void irq_remapping_disable_io_apic(void)
{
	/*
	 * With interrupt-remapping, for now we will use virtual wire A
	 * mode, as virtual wire B is little complex (need to configure
	 * both IOAPIC RTE as well as interrupt-remapping table entry).
	 * As this gets called during crash dump, keep this simple for
	 * now.
	 */
	if (cpu_has_apic || apic_from_smp_config())
		disconnect_bsp_APIC(0);
}

static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
{
	int node, ret, sub_handle, index = 0;
	unsigned int irq;
	struct msi_desc *msidesc;

	nvec = __roundup_pow_of_two(nvec);

	WARN_ON(!list_is_singular(&dev->msi_list));
	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	WARN_ON(msidesc->irq);
	WARN_ON(msidesc->msi_attrib.multiple);

	node = dev_to_node(&dev->dev);
	irq = __create_irqs(get_nr_irqs_gsi(), nvec, node);
	if (irq == 0)
		return -ENOSPC;

	msidesc->msi_attrib.multiple = ilog2(nvec);
	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
		if (!sub_handle) {
			index = msi_alloc_remapped_irq(dev, irq, nvec);
			if (index < 0) {
				ret = index;
				goto error;
			}
		} else {
			ret = msi_setup_remapped_irq(dev, irq + sub_handle,
						     index, sub_handle);
			if (ret < 0)
				goto error;
		}
		ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
		if (ret < 0)
			goto error;
	}
	return 0;

error:
	destroy_irqs(irq, nvec);

	/*
	 * Restore altered MSI descriptor fields and prevent just destroyed
	 * IRQs from tearing down again in default_teardown_msi_irqs()
	 */
	msidesc->irq = 0;
	msidesc->msi_attrib.multiple = 0;

	return ret;
}

static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
{
	int node, ret, sub_handle, index = 0;
	struct msi_desc *msidesc;
	unsigned int irq;

	node		= dev_to_node(&dev->dev);
	irq		= get_nr_irqs_gsi();
	sub_handle	= 0;

	list_for_each_entry(msidesc, &dev->msi_list, list) {

		irq = create_irq_nr(irq, node);
		if (irq == 0)
			return -1;

		if (sub_handle == 0)
			ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
		else
			ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);

		if (ret < 0)
			goto error;

		ret = setup_msi_irq(dev, msidesc, irq, 0);
		if (ret < 0)
			goto error;

		sub_handle += 1;
		irq        += 1;
	}

	return 0;

error:
	destroy_irq(irq);
	return ret;
}

static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
					int nvec, int type)
{
	if (type == PCI_CAP_ID_MSI)
		return do_setup_msi_irqs(dev, nvec);
	else
		return do_setup_msix_irqs(dev, nvec);
}

void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
{
	/*
	 * Intr-remapping uses pin number as the virtual vector
	 * in the RTE. Actual vector is programmed in
	 * intr-remapping table entry. Hence for the io-apic
	 * EOI we use the pin number.
	 */
	io_apic_eoi(apic, pin);
}

static void __init irq_remapping_modify_x86_ops(void)
{
	x86_io_apic_ops.disable		= irq_remapping_disable_io_apic;
	x86_io_apic_ops.set_affinity	= set_remapped_irq_affinity;
	x86_io_apic_ops.setup_entry	= setup_ioapic_remapped_entry;
	x86_io_apic_ops.eoi_ioapic_pin	= eoi_ioapic_pin_remapped;
	x86_msi.setup_msi_irqs		= irq_remapping_setup_msi_irqs;
	x86_msi.setup_hpet_msi		= setup_hpet_msi_remapped;
	x86_msi.compose_msi_msg		= compose_remapped_msi_msg;
}

static __init int setup_nointremap(char *str)
{
	disable_irq_remap = 1;
	return 0;
}
early_param("nointremap", setup_nointremap);

static __init int setup_irqremap(char *str)
{
	if (!str)
		return -EINVAL;

	while (*str) {
		if (!strncmp(str, "on", 2))
			disable_irq_remap = 0;
		else if (!strncmp(str, "off", 3))
			disable_irq_remap = 1;
		else if (!strncmp(str, "nosid", 5))
			disable_sourceid_checking = 1;
		else if (!strncmp(str, "no_x2apic_optout", 16))
			no_x2apic_optout = 1;

		str += strcspn(str, ",");
		while (*str == ',')
			str++;
	}

	return 0;
}
early_param("intremap", setup_irqremap);

void __init setup_irq_remapping_ops(void)
{
	remap_ops = &intel_irq_remap_ops;

#ifdef CONFIG_AMD_IOMMU
	if (amd_iommu_irq_ops.prepare() == 0)
		remap_ops = &amd_iommu_irq_ops;
#endif
}

int irq_remapping_supported(void)
{
	if (disable_irq_remap)
		return 0;

	if (!remap_ops || !remap_ops->supported)
		return 0;

	return remap_ops->supported();
}

int __init irq_remapping_prepare(void)
{
	if (!remap_ops || !remap_ops->prepare)
		return -ENODEV;

	return remap_ops->prepare();
}

int __init irq_remapping_enable(void)
{
	int ret;

	if (!remap_ops || !remap_ops->enable)
		return -ENODEV;

	ret = remap_ops->enable();

	if (irq_remapping_enabled)
		irq_remapping_modify_x86_ops();

	return ret;
}

void irq_remapping_disable(void)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->disable)
		return;

	remap_ops->disable();
}

int irq_remapping_reenable(int mode)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->reenable)
		return 0;

	return remap_ops->reenable(mode);
}

int __init irq_remap_enable_fault_handling(void)
{
	if (!irq_remapping_enabled)
		return 0;

	if (!remap_ops || !remap_ops->enable_faulting)
		return -ENODEV;

	return remap_ops->enable_faulting();
}

int setup_ioapic_remapped_entry(int irq,
				struct IO_APIC_route_entry *entry,
				unsigned int destination, int vector,
				struct io_apic_irq_attr *attr)
{
	if (!remap_ops || !remap_ops->setup_ioapic_entry)
		return -ENODEV;

	return remap_ops->setup_ioapic_entry(irq, entry, destination,
					     vector, attr);
}

int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask,
			      bool force)
{
	if (!config_enabled(CONFIG_SMP) || !remap_ops ||
	    !remap_ops->set_affinity)
		return 0;

	return remap_ops->set_affinity(data, mask, force);
}

void free_remapped_irq(int irq)
{
	struct irq_cfg *cfg = irq_get_chip_data(irq);

	if (!remap_ops || !remap_ops->free_irq)
		return;

	if (irq_remapped(cfg))
		remap_ops->free_irq(irq);
}

void compose_remapped_msi_msg(struct pci_dev *pdev,
			      unsigned int irq, unsigned int dest,
			      struct msi_msg *msg, u8 hpet_id)
{
	struct irq_cfg *cfg = irq_get_chip_data(irq);

	if (!irq_remapped(cfg))
		native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	else if (remap_ops && remap_ops->compose_msi_msg)
		remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
}

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
{
	if (!remap_ops || !remap_ops->msi_alloc_irq)
		return -ENODEV;

	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
}

static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle)
{
	if (!remap_ops || !remap_ops->msi_setup_irq)
		return -ENODEV;

	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
}

int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
{
	if (!remap_ops || !remap_ops->setup_hpet_msi)
		return -ENODEV;

	return remap_ops->setup_hpet_msi(irq, id);
}

void panic_if_irq_remap(const char *msg)
{
	if (irq_remapping_enabled)
		panic(msg);
}

static void ir_ack_apic_edge(struct irq_data *data)
{
	ack_APIC_irq();
}

static void ir_ack_apic_level(struct irq_data *data)
{
	ack_APIC_irq();
	eoi_ioapic_irq(data->irq, data->chip_data);
}

static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
{
	seq_printf(p, " IR-%s", data->chip->name);
}

void irq_remap_modify_chip_defaults(struct irq_chip *chip)
{
	chip->irq_print_chip = ir_print_prefix;
	chip->irq_ack = ir_ack_apic_edge;
	chip->irq_eoi = ir_ack_apic_level;
	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
}

bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
{
	if (!irq_remapped(cfg))
		return false;
	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	irq_remap_modify_chip_defaults(chip);
	return true;
}
Commit	Line	Data
9b1b0e42	1	#include <linux/seq_file.h>
1c4248ca	2	#include <linux/cpumask.h>
736baef4 JR	3	#include <linux/kernel.h>
	4	#include <linux/string.h>
	5	#include <linux/errno.h>
98f1ad25	6	#include <linux/msi.h>
5afba62c JR	7	#include <linux/irq.h>
5afba62c JR	8	#include <linux/pci.h>
98f1ad25 JR	9
	10	#include <asm/hw_irq.h>
	11	#include <asm/irq_remapping.h>
1c4248ca JR	12	#include <asm/processor.h>
	13	#include <asm/x86_init.h>
	14	#include <asm/apic.h>
736baef4	15
8a8f422d	16	#include "irq_remapping.h"
736baef4	17
95a02e97	18	int irq_remapping_enabled;
736baef4	19
95a02e97	20	int disable_irq_remap;
736baef4 JR	21	int disable_sourceid_checking;
	22	int no_x2apic_optout;
	23
	24	static struct irq_remap_ops *remap_ops;
	25
5afba62c JR	26	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
	27	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
	28	int index, int sub_handle);
373dd7a2 JR	29	static int set_remapped_irq_affinity(struct irq_data *data,
	30	const struct cpumask *mask,
	31	bool force);
5afba62c	32
a1bb20c2 JR	33	static bool irq_remapped(struct irq_cfg *cfg)
	34	{
	35	return (cfg->remapped == 1);
	36	}
	37
1c4248ca JR	38	static void irq_remapping_disable_io_apic(void)
	39	{
	40	/*
	41	* With interrupt-remapping, for now we will use virtual wire A
	42	* mode, as virtual wire B is little complex (need to configure
	43	* both IOAPIC RTE as well as interrupt-remapping table entry).
	44	* As this gets called during crash dump, keep this simple for
	45	* now.
	46	*/
	47	if (cpu_has_apic \|\| apic_from_smp_config())
	48	disconnect_bsp_APIC(0);
	49	}
	50
5afba62c JR	51	static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
	52	{
	53	int node, ret, sub_handle, index = 0;
	54	unsigned int irq;
	55	struct msi_desc *msidesc;
	56
	57	nvec = __roundup_pow_of_two(nvec);
	58
	59	WARN_ON(!list_is_singular(&dev->msi_list));
	60	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	61	WARN_ON(msidesc->irq);
	62	WARN_ON(msidesc->msi_attrib.multiple);
	63
	64	node = dev_to_node(&dev->dev);
	65	irq = __create_irqs(get_nr_irqs_gsi(), nvec, node);
	66	if (irq == 0)
	67	return -ENOSPC;
	68
	69	msidesc->msi_attrib.multiple = ilog2(nvec);
	70	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
	71	if (!sub_handle) {
	72	index = msi_alloc_remapped_irq(dev, irq, nvec);
	73	if (index < 0) {
	74	ret = index;
	75	goto error;
	76	}
	77	} else {
	78	ret = msi_setup_remapped_irq(dev, irq + sub_handle,
	79	index, sub_handle);
	80	if (ret < 0)
	81	goto error;
	82	}
	83	ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
	84	if (ret < 0)
	85	goto error;
	86	}
	87	return 0;
	88
	89	error:
	90	destroy_irqs(irq, nvec);
	91
	92	/*
	93	* Restore altered MSI descriptor fields and prevent just destroyed
	94	* IRQs from tearing down again in default_teardown_msi_irqs()
	95	*/
	96	msidesc->irq = 0;
	97	msidesc->msi_attrib.multiple = 0;
	98
	99	return ret;
	100	}
	101
	102	static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
	103	{
	104	int node, ret, sub_handle, index = 0;
	105	struct msi_desc *msidesc;
	106	unsigned int irq;
	107
	108	node = dev_to_node(&dev->dev);
	109	irq = get_nr_irqs_gsi();
	110	sub_handle = 0;
	111
	112	list_for_each_entry(msidesc, &dev->msi_list, list) {
	113
	114	irq = create_irq_nr(irq, node);
115	if (irq == 0)
116	return -1;
117
118	if (sub_handle == 0)
119	ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
120	else
121	ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);
122
123	if (ret < 0)
124	goto error;
125
126	ret = setup_msi_irq(dev, msidesc, irq, 0);
127	if (ret < 0)
128	goto error;
129
130	sub_handle += 1;
131	irq += 1;
132	}
133
134	return 0;
135
136	error:
137	destroy_irq(irq);
138	return ret;
139	}
140
141	static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
142	int nvec, int type)
143	{
144	if (type == PCI_CAP_ID_MSI)
145	return do_setup_msi_irqs(dev, nvec);
146	else
147	return do_setup_msix_irqs(dev, nvec);
148	}
149
da165322 JR	150	void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
	151	{
	152	/*
	153	* Intr-remapping uses pin number as the virtual vector
	154	* in the RTE. Actual vector is programmed in
	155	* intr-remapping table entry. Hence for the io-apic
	156	* EOI we use the pin number.
	157	*/
	158	io_apic_eoi(apic, pin);
	159	}
	160
1c4248ca JR	161	static void __init irq_remapping_modify_x86_ops(void)
1c4248ca JR	162	{
71054d88	163	x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
373dd7a2	164	x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
a6a25dd3	165	x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
da165322	166	x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
5afba62c	167	x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
71054d88	168	x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
7601384f	169	x86_msi.compose_msi_msg = compose_remapped_msi_msg;
1c4248ca JR	170	}
1c4248ca JR	171
736baef4 JR	172	static __init int setup_nointremap(char *str)
736baef4 JR	173	{
95a02e97	174	disable_irq_remap = 1;
736baef4 JR	175	return 0;
	176	}
	177	early_param("nointremap", setup_nointremap);
	178
95a02e97	179	static __init int setup_irqremap(char *str)
736baef4 JR	180	{
	181	if (!str)
	182	return -EINVAL;
	183
	184	while (*str) {
	185	if (!strncmp(str, "on", 2))
95a02e97	186	disable_irq_remap = 0;
736baef4	187	else if (!strncmp(str, "off", 3))
95a02e97	188	disable_irq_remap = 1;
736baef4 JR	189	else if (!strncmp(str, "nosid", 5))
	190	disable_sourceid_checking = 1;
	191	else if (!strncmp(str, "no_x2apic_optout", 16))
	192	no_x2apic_optout = 1;
	193
	194	str += strcspn(str, ",");
	195	while (*str == ',')
	196	str++;
	197	}
	198
	199	return 0;
	200	}
95a02e97	201	early_param("intremap", setup_irqremap);
736baef4	202
95a02e97	203	void __init setup_irq_remapping_ops(void)
736baef4 JR	204	{
736baef4 JR	205	remap_ops = &intel_irq_remap_ops;
c18d2388 JR	206
	207	#ifdef CONFIG_AMD_IOMMU
	208	if (amd_iommu_irq_ops.prepare() == 0)
	209	remap_ops = &amd_iommu_irq_ops;
	210	#endif
736baef4 JR	211	}
736baef4 JR	212
95a02e97	213	int irq_remapping_supported(void)
736baef4	214	{
95a02e97	215	if (disable_irq_remap)
736baef4 JR	216	return 0;
	217
	218	if (!remap_ops \|\| !remap_ops->supported)
	219	return 0;
	220
	221	return remap_ops->supported();
	222	}
	223
95a02e97	224	int __init irq_remapping_prepare(void)
736baef4	225	{
95a02e97	226	if (!remap_ops \|\| !remap_ops->prepare)
736baef4 JR	227	return -ENODEV;
736baef4 JR	228
95a02e97	229	return remap_ops->prepare();
736baef4 JR	230	}
736baef4 JR	231
95a02e97	232	int __init irq_remapping_enable(void)
736baef4	233	{
1c4248ca JR	234	int ret;
1c4248ca JR	235
95a02e97	236	if (!remap_ops \|\| !remap_ops->enable)
736baef4 JR	237	return -ENODEV;
736baef4 JR	238
1c4248ca JR	239	ret = remap_ops->enable();
	240
	241	if (irq_remapping_enabled)
	242	irq_remapping_modify_x86_ops();
	243
	244	return ret;
736baef4	245	}
4f3d8b67	246
95a02e97	247	void irq_remapping_disable(void)
4f3d8b67	248	{
70733e0c JR	249	if (!irq_remapping_enabled \|\|
	250	!remap_ops \|\|
	251	!remap_ops->disable)
4f3d8b67 JR	252	return;
4f3d8b67 JR	253
95a02e97	254	remap_ops->disable();
4f3d8b67 JR	255	}
4f3d8b67 JR	256
95a02e97	257	int irq_remapping_reenable(int mode)
4f3d8b67	258	{
70733e0c JR	259	if (!irq_remapping_enabled \|\|
	260	!remap_ops \|\|
	261	!remap_ops->reenable)
4f3d8b67 JR	262	return 0;
4f3d8b67 JR	263
95a02e97	264	return remap_ops->reenable(mode);
4f3d8b67 JR	265	}
4f3d8b67 JR	266
95a02e97	267	int __init irq_remap_enable_fault_handling(void)
4f3d8b67	268	{
70733e0c JR	269	if (!irq_remapping_enabled)
	270	return 0;
	271
4f3d8b67 JR	272	if (!remap_ops \|\| !remap_ops->enable_faulting)
	273	return -ENODEV;
	274
	275	return remap_ops->enable_faulting();
	276	}
0c3f173a	277
95a02e97 SS	278	int setup_ioapic_remapped_entry(int irq,
	279	struct IO_APIC_route_entry *entry,
	280	unsigned int destination, int vector,
	281	struct io_apic_irq_attr *attr)
0c3f173a JR	282	{
	283	if (!remap_ops \|\| !remap_ops->setup_ioapic_entry)
	284	return -ENODEV;
	285
	286	return remap_ops->setup_ioapic_entry(irq, entry, destination,
	287	vector, attr);
	288	}
4c1bad6a	289
95a02e97 SS	290	int set_remapped_irq_affinity(struct irq_data data, const struct cpumask mask,
95a02e97 SS	291	bool force)
4c1bad6a	292	{
7eb9ae07 SS	293	if (!config_enabled(CONFIG_SMP) \|\| !remap_ops \|\|
7eb9ae07 SS	294	!remap_ops->set_affinity)
4c1bad6a JR	295	return 0;
	296
	297	return remap_ops->set_affinity(data, mask, force);
	298	}
9d619f65	299
95a02e97	300	void free_remapped_irq(int irq)
9d619f65	301	{
11b4a1cc JR	302	struct irq_cfg *cfg = irq_get_chip_data(irq);
11b4a1cc JR	303
9d619f65 JR	304	if (!remap_ops \|\| !remap_ops->free_irq)
	305	return;
	306
11b4a1cc JR	307	if (irq_remapped(cfg))
11b4a1cc JR	308	remap_ops->free_irq(irq);
9d619f65	309	}
5e2b930b	310
95a02e97 SS	311	void compose_remapped_msi_msg(struct pci_dev *pdev,
	312	unsigned int irq, unsigned int dest,
	313	struct msi_msg *msg, u8 hpet_id)
5e2b930b	314	{
7601384f	315	struct irq_cfg *cfg = irq_get_chip_data(irq);
5e2b930b	316
7601384f JR	317	if (!irq_remapped(cfg))
	318	native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	319	else if (remap_ops && remap_ops->compose_msi_msg)
	320	remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
5e2b930b JR	321	}
5e2b930b JR	322
5afba62c	323	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
5e2b930b JR	324	{
	325	if (!remap_ops \|\| !remap_ops->msi_alloc_irq)
	326	return -ENODEV;
	327
	328	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
	329	}
	330
5afba62c JR	331	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
5afba62c JR	332	int index, int sub_handle)
5e2b930b JR	333	{
	334	if (!remap_ops \|\| !remap_ops->msi_setup_irq)
	335	return -ENODEV;
	336
	337	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
	338	}
	339
95a02e97	340	int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
5e2b930b JR	341	{
	342	if (!remap_ops \|\| !remap_ops->setup_hpet_msi)
	343	return -ENODEV;
	344
	345	return remap_ops->setup_hpet_msi(irq, id);
	346	}
6a9f5de2 JR	347
	348	void panic_if_irq_remap(const char *msg)
	349	{
	350	if (irq_remapping_enabled)
	351	panic(msg);
	352	}
9b1b0e42 JR	353
	354	static void ir_ack_apic_edge(struct irq_data *data)
	355	{
	356	ack_APIC_irq();
	357	}
	358
	359	static void ir_ack_apic_level(struct irq_data *data)
	360	{
	361	ack_APIC_irq();
	362	eoi_ioapic_irq(data->irq, data->chip_data);
	363	}
	364
	365	static void ir_print_prefix(struct irq_data data, struct seq_file p)
	366	{
	367	seq_printf(p, " IR-%s", data->chip->name);
	368	}
	369
	370	void irq_remap_modify_chip_defaults(struct irq_chip *chip)
	371	{
	372	chip->irq_print_chip = ir_print_prefix;
	373	chip->irq_ack = ir_ack_apic_edge;
	374	chip->irq_eoi = ir_ack_apic_level;
	375	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
	376	}
2976fd84 JR	377
	378	bool setup_remapped_irq(int irq, struct irq_cfg cfg, struct irq_chip chip)
	379	{
	380	if (!irq_remapped(cfg))
	381	return false;
	382	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	383	irq_remap_modify_chip_defaults(chip);
	384	return true;
	385	}