[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / input / misc / hp_sdc_rtc.c

/*
 * HP i8042 SDC + MSM-58321 BBRTC driver.
 *
 * Copyright (c) 2001 Brian S. Julin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions, and the following disclaimer,
 *    without modification.
 * 2. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * Alternatively, this software may be distributed under the terms of the
 * GNU General Public License ("GPL").
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *
 * References:
 * System Device Controller Microprocessor Firmware Theory of Operation
 *      for Part Number 1820-4784 Revision B.  Dwg No. A-1820-4784-2
 * efirtc.c by Stephane Eranian/Hewlett Packard
 *
 */

#include <linux/hp_sdc.h>
#include <linux/errno.h>
#include <linux/smp_lock.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/time.h>
#include <linux/miscdevice.h>
#include <linux/proc_fs.h>
#include <linux/poll.h>
#include <linux/rtc.h>
#include <linux/semaphore.h>

MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
MODULE_LICENSE("Dual BSD/GPL");

#define RTC_VERSION "1.10d"

static unsigned long epoch = 2000;

static struct semaphore i8042tregs;

static hp_sdc_irqhook hp_sdc_rtc_isr;

static struct fasync_struct *hp_sdc_rtc_async_queue;

static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);

static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
			       size_t count, loff_t *ppos);

static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file,
			    unsigned int cmd, unsigned long arg);

static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait);

static int hp_sdc_rtc_open(struct inode *inode, struct file *file);
static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);

static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
				int count, int *eof, void *data);

static void hp_sdc_rtc_isr (int irq, void *dev_id, 
			    uint8_t status, uint8_t data) 
{
	return;
}

static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
{
	struct semaphore tsem;
	hp_sdc_transaction t;
	uint8_t tseq[91];
	int i;
	
	i = 0;
	while (i < 91) {
		tseq[i++] = HP_SDC_ACT_DATAREG |
			HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
		tseq[i++] = 0x01;			/* write i8042[0x70] */
	  	tseq[i]   = i / 7;			/* BBRTC reg address */
		i++;
		tseq[i++] = HP_SDC_CMD_DO_RTCR;		/* Trigger command   */
		tseq[i++] = 2;		/* expect 1 stat/dat pair back.   */
		i++; i++;               /* buffer for stat/dat pair       */
	}
	tseq[84] |= HP_SDC_ACT_SEMAPHORE;
	t.endidx =		91;
	t.seq =			tseq;
	t.act.semaphore =	&tsem;
	init_MUTEX_LOCKED(&tsem);
	
	if (hp_sdc_enqueue_transaction(&t)) return -1;
	
	down_interruptible(&tsem);  /* Put ourselves to sleep for results. */
	
	/* Check for nonpresence of BBRTC */
	if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
	       tseq[55] | tseq[62] | tseq[34] | tseq[41] |
	       tseq[20] | tseq[27] | tseq[6]  | tseq[13]) & 0x0f))
		return -1;

	memset(rtctm, 0, sizeof(struct rtc_time));
	rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
	rtctm->tm_mon  = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
	rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
	rtctm->tm_wday = (tseq[48] & 0x0f);
	rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
	rtctm->tm_min  = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
	rtctm->tm_sec  = (tseq[6]  & 0x0f) + (tseq[13] & 0x0f) * 10;
	
	return 0;
}

static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
{
	struct rtc_time tm, tm_last;
	int i = 0;

	/* MSM-58321 has no read latch, so must read twice and compare. */

	if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
	if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;

	while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
		if (i++ > 4) return -1;
		memcpy(&tm_last, &tm, sizeof(struct rtc_time));
		if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
	}

	memcpy(rtctm, &tm, sizeof(struct rtc_time));

	return 0;
}


static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
{
	hp_sdc_transaction t;
	uint8_t tseq[26] = {
		HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
		0,
		HP_SDC_CMD_READ_T1, 2, 0, 0,
		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 
		HP_SDC_CMD_READ_T2, 2, 0, 0,
		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 
		HP_SDC_CMD_READ_T3, 2, 0, 0,
		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 
		HP_SDC_CMD_READ_T4, 2, 0, 0,
		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 
		HP_SDC_CMD_READ_T5, 2, 0, 0
	};

	t.endidx = numreg * 5;

	tseq[1] = loadcmd;
	tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */

	t.seq =			tseq;
	t.act.semaphore =	&i8042tregs;

	down_interruptible(&i8042tregs);  /* Sleep if output regs in use. */

	if (hp_sdc_enqueue_transaction(&t)) return -1;
	
	down_interruptible(&i8042tregs);  /* Sleep until results come back. */
	up(&i8042tregs);

	return (tseq[5] | 
		((uint64_t)(tseq[10]) << 8)  | ((uint64_t)(tseq[15]) << 16) |
		((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
}


/* Read the i8042 real-time clock */
static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
	int64_t raw;
	uint32_t tenms; 
	unsigned int days;

	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
	if (raw < 0) return -1;

	tenms = (uint32_t)raw & 0xffffff;
	days  = (unsigned int)(raw >> 24) & 0xffff;

	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
	res->tv_sec =  (time_t)(tenms / 100) + days * 86400;

	return 0;
}


/* Read the i8042 fast handshake timer */
static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
	uint64_t raw;
	unsigned int tenms;

	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
	if (raw < 0) return -1;

	tenms = (unsigned int)raw & 0xffff;

	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
	res->tv_sec  = (time_t)(tenms / 100);

	return 0;
}


/* Read the i8042 match timer (a.k.a. alarm) */
static inline int hp_sdc_rtc_read_mt(struct timeval *res) {
	int64_t raw;	
	uint32_t tenms; 

	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
	if (raw < 0) return -1;

	tenms = (uint32_t)raw & 0xffffff;

	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
	res->tv_sec  = (time_t)(tenms / 100);

	return 0;
}


/* Read the i8042 delay timer */
static inline int hp_sdc_rtc_read_dt(struct timeval *res) {
	int64_t raw;
	uint32_t tenms;

	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
	if (raw < 0) return -1;

	tenms = (uint32_t)raw & 0xffffff;

	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
	res->tv_sec  = (time_t)(tenms / 100);

	return 0;
}


/* Read the i8042 cycle timer (a.k.a. periodic) */
static inline int hp_sdc_rtc_read_ct(struct timeval *res) {
	int64_t raw;
	uint32_t tenms;

	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
	if (raw < 0) return -1;

	tenms = (uint32_t)raw & 0xffffff;

	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
	res->tv_sec  = (time_t)(tenms / 100);

	return 0;
}


/* Set the i8042 real-time clock */
static int hp_sdc_rtc_set_rt (struct timeval *setto)
{
	uint32_t tenms;
	unsigned int days;
	hp_sdc_transaction t;
	uint8_t tseq[11] = {
		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
		HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
		HP_SDC_CMD_SET_RTD, 2, 0, 0 
	};

	t.endidx = 10;

	if (0xffff < setto->tv_sec / 86400) return -1;
	days = setto->tv_sec / 86400;
	if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
	days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
	if (days > 0xffff) return -1;

	if (0xffffff < setto->tv_sec) return -1;
	tenms  = setto->tv_sec * 100;
	if (0xffffff < setto->tv_usec / 10000) return -1;
	tenms += setto->tv_usec / 10000;
	if (tenms > 0xffffff) return -1;

	tseq[3] = (uint8_t)(tenms & 0xff);
	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
	tseq[5] = (uint8_t)((tenms >> 16) & 0xff);

	tseq[9] = (uint8_t)(days & 0xff);
	tseq[10] = (uint8_t)((days >> 8) & 0xff);

	t.seq =	tseq;

	if (hp_sdc_enqueue_transaction(&t)) return -1;
	return 0;
}

/* Set the i8042 fast handshake timer */
static int hp_sdc_rtc_set_fhs (struct timeval *setto)
{
	uint32_t tenms;
	hp_sdc_transaction t;
	uint8_t tseq[5] = {
		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
		HP_SDC_CMD_SET_FHS, 2, 0, 0
	};

	t.endidx = 4;

	if (0xffff < setto->tv_sec) return -1;
	tenms  = setto->tv_sec * 100;
	if (0xffff < setto->tv_usec / 10000) return -1;
	tenms += setto->tv_usec / 10000;
	if (tenms > 0xffff) return -1;

	tseq[3] = (uint8_t)(tenms & 0xff);
	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);

	t.seq =	tseq;

	if (hp_sdc_enqueue_transaction(&t)) return -1;
	return 0;
}


/* Set the i8042 match timer (a.k.a. alarm) */
#define hp_sdc_rtc_set_mt (setto) \
	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)

/* Set the i8042 delay timer */
#define hp_sdc_rtc_set_dt (setto) \
	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)

/* Set the i8042 cycle timer (a.k.a. periodic) */
#define hp_sdc_rtc_set_ct (setto) \
	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)

/* Set one of the i8042 3-byte wide timers */
static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
{
	uint32_t tenms;
	hp_sdc_transaction t;
	uint8_t tseq[6] = {
		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
		0, 3, 0, 0, 0
	};

	t.endidx = 6;

	if (0xffffff < setto->tv_sec) return -1;
	tenms  = setto->tv_sec * 100;
	if (0xffffff < setto->tv_usec / 10000) return -1;
	tenms += setto->tv_usec / 10000;
	if (tenms > 0xffffff) return -1;

	tseq[1] = setcmd;
	tseq[3] = (uint8_t)(tenms & 0xff);
	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
	tseq[5] = (uint8_t)((tenms >> 16)  & 0xff);

	t.seq =			tseq;

	if (hp_sdc_enqueue_transaction(&t)) { 
		return -1;
	}
	return 0;
}

static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
			       size_t count, loff_t *ppos) {
	ssize_t retval;

        if (count < sizeof(unsigned long))
                return -EINVAL;

	retval = put_user(68, (unsigned long __user *)buf);
	return retval;
}

static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait)
{
        unsigned long l;

	l = 0;
        if (l != 0)
                return POLLIN | POLLRDNORM;
        return 0;
}

static int hp_sdc_rtc_open(struct inode *inode, struct file *file)
{
	cycle_kernel_lock();
        return 0;
}

static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
{
        return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
}

static int hp_sdc_rtc_proc_output (char *buf)
{
#define YN(bit) ("no")
#define NY(bit) ("yes")
        char *p;
        struct rtc_time tm;
	struct timeval tv;

	memset(&tm, 0, sizeof(struct rtc_time));

	p = buf;

	if (hp_sdc_rtc_read_bbrtc(&tm)) {
		p += sprintf(p, "BBRTC\t\t: READ FAILED!\n");
	} else {
		p += sprintf(p,
			     "rtc_time\t: %02d:%02d:%02d\n"
			     "rtc_date\t: %04d-%02d-%02d\n"
			     "rtc_epoch\t: %04lu\n",
			     tm.tm_hour, tm.tm_min, tm.tm_sec,
			     tm.tm_year + 1900, tm.tm_mon + 1, 
			     tm.tm_mday, epoch);
	}

	if (hp_sdc_rtc_read_rt(&tv)) {
		p += sprintf(p, "i8042 rtc\t: READ FAILED!\n");
	} else {
		p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n", 
			     tv.tv_sec, (int)tv.tv_usec/1000);
	}

	if (hp_sdc_rtc_read_fhs(&tv)) {
		p += sprintf(p, "handshake\t: READ FAILED!\n");
	} else {
        	p += sprintf(p, "handshake\t: %ld.%02d seconds\n", 
			     tv.tv_sec, (int)tv.tv_usec/1000);
	}

	if (hp_sdc_rtc_read_mt(&tv)) {
		p += sprintf(p, "alarm\t\t: READ FAILED!\n");
	} else {
		p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n", 
			     tv.tv_sec, (int)tv.tv_usec/1000);
	}

	if (hp_sdc_rtc_read_dt(&tv)) {
		p += sprintf(p, "delay\t\t: READ FAILED!\n");
	} else {
		p += sprintf(p, "delay\t\t: %ld.%02d seconds\n", 
			     tv.tv_sec, (int)tv.tv_usec/1000);
	}

	if (hp_sdc_rtc_read_ct(&tv)) {
		p += sprintf(p, "periodic\t: READ FAILED!\n");
	} else {
		p += sprintf(p, "periodic\t: %ld.%02d seconds\n", 
			     tv.tv_sec, (int)tv.tv_usec/1000);
	}

        p += sprintf(p,
                     "DST_enable\t: %s\n"
                     "BCD\t\t: %s\n"
                     "24hr\t\t: %s\n"
                     "square_wave\t: %s\n"
                     "alarm_IRQ\t: %s\n"
                     "update_IRQ\t: %s\n"
                     "periodic_IRQ\t: %s\n"
		     "periodic_freq\t: %ld\n"
                     "batt_status\t: %s\n",
                     YN(RTC_DST_EN),
                     NY(RTC_DM_BINARY),
                     YN(RTC_24H),
                     YN(RTC_SQWE),
                     YN(RTC_AIE),
                     YN(RTC_UIE),
                     YN(RTC_PIE),
                     1UL,
                     1 ? "okay" : "dead");

        return  p - buf;
#undef YN
#undef NY
}

static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
                         int count, int *eof, void *data)
{
	int len = hp_sdc_rtc_proc_output (page);
        if (len <= off+count) *eof = 1;
        *start = page + off;
        len -= off;
        if (len>count) len = count;
        if (len<0) len = 0;
        return len;
}

static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 
			    unsigned int cmd, unsigned long arg)
{
#if 1
	return -EINVAL;
#else
	
        struct rtc_time wtime; 
	struct timeval ttime;
	int use_wtime = 0;

	/* This needs major work. */

        switch (cmd) {

        case RTC_AIE_OFF:       /* Mask alarm int. enab. bit    */
        case RTC_AIE_ON:        /* Allow alarm interrupts.      */
	case RTC_PIE_OFF:       /* Mask periodic int. enab. bit */
        case RTC_PIE_ON:        /* Allow periodic ints          */
        case RTC_UIE_ON:        /* Allow ints for RTC updates.  */
        case RTC_UIE_OFF:       /* Allow ints for RTC updates.  */
        {
		/* We cannot mask individual user timers and we
		   cannot tell them apart when they occur, so it 
		   would be disingenuous to succeed these IOCTLs */
		return -EINVAL;
        }
        case RTC_ALM_READ:      /* Read the present alarm time */
        {
		if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
		if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;

		wtime.tm_hour = ttime.tv_sec / 3600;  ttime.tv_sec %= 3600;
		wtime.tm_min  = ttime.tv_sec / 60;    ttime.tv_sec %= 60;
		wtime.tm_sec  = ttime.tv_sec;
                
		break;
        }
        case RTC_IRQP_READ:     /* Read the periodic IRQ rate.  */
        {
                return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
        }
        case RTC_IRQP_SET:      /* Set periodic IRQ rate.       */
        {
                /* 
                 * The max we can do is 100Hz.
		 */

                if ((arg < 1) || (arg > 100)) return -EINVAL;
		ttime.tv_sec = 0;
		ttime.tv_usec = 1000000 / arg;
		if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
		hp_sdc_rtc_freq = arg;
                return 0;
        }
        case RTC_ALM_SET:       /* Store a time into the alarm */
        {
                /*
                 * This expects a struct hp_sdc_rtc_time. Writing 0xff means
                 * "don't care" or "match all" for PC timers.  The HP SDC
		 * does not support that perk, but it could be emulated fairly
		 * easily.  Only the tm_hour, tm_min and tm_sec are used.
		 * We could do it with 10ms accuracy with the HP SDC, if the 
		 * rtc interface left us a way to do that.
                 */
                struct hp_sdc_rtc_time alm_tm;

                if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
                                   sizeof(struct hp_sdc_rtc_time)))
                       return -EFAULT;

                if (alm_tm.tm_hour > 23) return -EINVAL;
		if (alm_tm.tm_min  > 59) return -EINVAL;
		if (alm_tm.tm_sec  > 59) return -EINVAL;  

		ttime.sec = alm_tm.tm_hour * 3600 + 
		  alm_tm.tm_min * 60 + alm_tm.tm_sec;
		ttime.usec = 0;
		if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
                return 0;
        }
        case RTC_RD_TIME:       /* Read the time/date from RTC  */
        {
		if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
                break;
        }
        case RTC_SET_TIME:      /* Set the RTC */
        {
                struct rtc_time hp_sdc_rtc_tm;
                unsigned char mon, day, hrs, min, sec, leap_yr;
                unsigned int yrs;

                if (!capable(CAP_SYS_TIME))
                        return -EACCES;
		if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
                                   sizeof(struct rtc_time)))
                        return -EFAULT;

                yrs = hp_sdc_rtc_tm.tm_year + 1900;
                mon = hp_sdc_rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */
                day = hp_sdc_rtc_tm.tm_mday;
                hrs = hp_sdc_rtc_tm.tm_hour;
                min = hp_sdc_rtc_tm.tm_min;
                sec = hp_sdc_rtc_tm.tm_sec;

                if (yrs < 1970)
                        return -EINVAL;

                leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));

                if ((mon > 12) || (day == 0))
                        return -EINVAL;
                if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
                        return -EINVAL;
		if ((hrs >= 24) || (min >= 60) || (sec >= 60))
                        return -EINVAL;

                if ((yrs -= eH) > 255)    /* They are unsigned */
                        return -EINVAL;


                return 0;
        }
        case RTC_EPOCH_READ:    /* Read the epoch.      */
        {
                return put_user (epoch, (unsigned long *)arg);
        }
        case RTC_EPOCH_SET:     /* Set the epoch.       */
        {
                /* 
                 * There were no RTC clocks before 1900.
                 */
                if (arg < 1900)
		  return -EINVAL;
		if (!capable(CAP_SYS_TIME))
		  return -EACCES;
		
                epoch = arg;
                return 0;
        }
        default:
                return -EINVAL;
        }
        return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
#endif
}

static const struct file_operations hp_sdc_rtc_fops = {
        .owner =	THIS_MODULE,
        .llseek =	no_llseek,
        .read =		hp_sdc_rtc_read,
        .poll =		hp_sdc_rtc_poll,
        .ioctl =	hp_sdc_rtc_ioctl,
        .open =		hp_sdc_rtc_open,
        .fasync =	hp_sdc_rtc_fasync,
};

static struct miscdevice hp_sdc_rtc_dev = {
        .minor =	RTC_MINOR,
        .name =		"rtc_HIL",
        .fops =		&hp_sdc_rtc_fops
};

static int __init hp_sdc_rtc_init(void)
{
	int ret;

#ifdef __mc68000__
	if (!MACH_IS_HP300)
		return -ENODEV;
#endif

	init_MUTEX(&i8042tregs);

	if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
		return ret;
	if (misc_register(&hp_sdc_rtc_dev) != 0)
		printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n");

        create_proc_read_entry ("driver/rtc", 0, NULL,
				hp_sdc_rtc_read_proc, NULL);

	printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
			 "(RTC v " RTC_VERSION ")\n");

	return 0;
}

static void __exit hp_sdc_rtc_exit(void)
{
	remove_proc_entry ("driver/rtc", NULL);
        misc_deregister(&hp_sdc_rtc_dev);
	hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
        printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
}

module_init(hp_sdc_rtc_init);
module_exit(hp_sdc_rtc_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* HP i8042 SDC + MSM-58321 BBRTC driver.
	3	*
	4	* Copyright (c) 2001 Brian S. Julin
	5	* All rights reserved.
	6	*
	7	* Redistribution and use in source and binary forms, with or without
	8	* modification, are permitted provided that the following conditions
	9	* are met:
	10	* 1. Redistributions of source code must retain the above copyright
	11	* notice, this list of conditions, and the following disclaimer,
	12	* without modification.
	13	* 2. The name of the author may not be used to endorse or promote products
	14	* derived from this software without specific prior written permission.
	15	*
	16	* Alternatively, this software may be distributed under the terms of the
	17	* GNU General Public License ("GPL").
	18	*
	19	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
	20	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	21	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	22	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
	23	* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	24	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	25	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	26	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	27	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	28	*
	29	* References:
	30	* System Device Controller Microprocessor Firmware Theory of Operation
	31	* for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
	32	* efirtc.c by Stephane Eranian/Hewlett Packard
	33	*
	34	*/
	35
	36	#include <linux/hp_sdc.h>
	37	#include <linux/errno.h>
986f8b8c	38	#include <linux/smp_lock.h>
1da177e4 LT	39	#include <linux/types.h>
	40	#include <linux/init.h>
	41	#include <linux/module.h>
	42	#include <linux/time.h>
	43	#include <linux/miscdevice.h>
	44	#include <linux/proc_fs.h>
	45	#include <linux/poll.h>
	46	#include <linux/rtc.h>
0f17e4c7	47	#include <linux/semaphore.h>
1da177e4 LT	48
	49	MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
	50	MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
	51	MODULE_LICENSE("Dual BSD/GPL");
	52
	53	#define RTC_VERSION "1.10d"
	54
	55	static unsigned long epoch = 2000;
	56
	57	static struct semaphore i8042tregs;
	58
	59	static hp_sdc_irqhook hp_sdc_rtc_isr;
	60
	61	static struct fasync_struct *hp_sdc_rtc_async_queue;
	62
	63	static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);
	64
6ce6b3ae	65	static ssize_t hp_sdc_rtc_read(struct file file, char __user buf,
1da177e4 LT	66	size_t count, loff_t *ppos);
	67
	68	static int hp_sdc_rtc_ioctl(struct inode inode, struct file file,
	69	unsigned int cmd, unsigned long arg);
	70
	71	static unsigned int hp_sdc_rtc_poll(struct file file, poll_table wait);
	72
	73	static int hp_sdc_rtc_open(struct inode inode, struct file file);
1da177e4 LT	74	static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);
	75
	76	static int hp_sdc_rtc_read_proc(char page, char *start, off_t off,
	77	int count, int eof, void data);
	78
	79	static void hp_sdc_rtc_isr (int irq, void *dev_id,
	80	uint8_t status, uint8_t data)
	81	{
	82	return;
	83	}
	84
	85	static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
	86	{
	87	struct semaphore tsem;
	88	hp_sdc_transaction t;
	89	uint8_t tseq[91];
	90	int i;
	91
	92	i = 0;
	93	while (i < 91) {
	94	tseq[i++] = HP_SDC_ACT_DATAREG \|
	95	HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN;
	96	tseq[i++] = 0x01; /* write i8042[0x70] */
	97	tseq[i] = i / 7; /* BBRTC reg address */
	98	i++;
	99	tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */
	100	tseq[i++] = 2; /* expect 1 stat/dat pair back. */
	101	i++; i++; /* buffer for stat/dat pair */
	102	}
	103	tseq[84] \|= HP_SDC_ACT_SEMAPHORE;
	104	t.endidx = 91;
	105	t.seq = tseq;
	106	t.act.semaphore = &tsem;
	107	init_MUTEX_LOCKED(&tsem);
	108
	109	if (hp_sdc_enqueue_transaction(&t)) return -1;
	110
	111	down_interruptible(&tsem); /* Put ourselves to sleep for results. */
	112
	113	/* Check for nonpresence of BBRTC */
	114	if (!((tseq[83] \| tseq[90] \| tseq[69] \| tseq[76] \|
	115	tseq[55] \| tseq[62] \| tseq[34] \| tseq[41] \|
	116	tseq[20] \| tseq[27] \| tseq[6] \| tseq[13]) & 0x0f))
	117	return -1;
	118
	119	memset(rtctm, 0, sizeof(struct rtc_time));
	120	rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
	121	rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
	122	rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
	123	rtctm->tm_wday = (tseq[48] & 0x0f);
	124	rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
	125	rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
	126	rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10;
	127
	128	return 0;
	129	}
	130
	131	static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
	132	{
	133	struct rtc_time tm, tm_last;
	134	int i = 0;
	135
	136	/* MSM-58321 has no read latch, so must read twice and compare. */
	137
138	if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
139	if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
140
141	while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
142	if (i++ > 4) return -1;
143	memcpy(&tm_last, &tm, sizeof(struct rtc_time));
144	if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
145	}
146
147	memcpy(rtctm, &tm, sizeof(struct rtc_time));
148
149	return 0;
150	}
151
152
153	static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
154	{
155	hp_sdc_transaction t;
156	uint8_t tseq[26] = {
157	HP_SDC_ACT_PRECMD \| HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN,
158	0,
159	HP_SDC_CMD_READ_T1, 2, 0, 0,
160	HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN,
161	HP_SDC_CMD_READ_T2, 2, 0, 0,
162	HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN,
163	HP_SDC_CMD_READ_T3, 2, 0, 0,
164	HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN,
165	HP_SDC_CMD_READ_T4, 2, 0, 0,
166	HP_SDC_ACT_POSTCMD \| HP_SDC_ACT_DATAIN,
167	HP_SDC_CMD_READ_T5, 2, 0, 0
168	};
169
170	t.endidx = numreg * 5;
171
172	tseq[1] = loadcmd;
173	tseq[t.endidx - 4] \|= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
174
175	t.seq = tseq;
176	t.act.semaphore = &i8042tregs;
177
178	down_interruptible(&i8042tregs); /* Sleep if output regs in use. */
179
180	if (hp_sdc_enqueue_transaction(&t)) return -1;
181
182	down_interruptible(&i8042tregs); /* Sleep until results come back. */
183	up(&i8042tregs);
184
185	return (tseq[5] \|
186	((uint64_t)(tseq[10]) << 8) \| ((uint64_t)(tseq[15]) << 16) \|
187	((uint64_t)(tseq[20]) << 24) \| ((uint64_t)(tseq[25]) << 32));
188	}
189
190
191	/* Read the i8042 real-time clock */
192	static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
193	int64_t raw;
194	uint32_t tenms;
195	unsigned int days;
196
197	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
198	if (raw < 0) return -1;
199
200	tenms = (uint32_t)raw & 0xffffff;
201	days = (unsigned int)(raw >> 24) & 0xffff;
202
203	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
204	res->tv_sec = (time_t)(tenms / 100) + days * 86400;
205
206	return 0;
207	}
208
209
210	/* Read the i8042 fast handshake timer */
211	static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
212	uint64_t raw;
213	unsigned int tenms;
214
215	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
216	if (raw < 0) return -1;
217
218	tenms = (unsigned int)raw & 0xffff;
219
220	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
221	res->tv_sec = (time_t)(tenms / 100);
222
223	return 0;
224	}
225
226
227	/* Read the i8042 match timer (a.k.a. alarm) */
228	static inline int hp_sdc_rtc_read_mt(struct timeval *res) {
229	int64_t raw;
230	uint32_t tenms;
231
232	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
233	if (raw < 0) return -1;
234
235	tenms = (uint32_t)raw & 0xffffff;
236
237	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
238	res->tv_sec = (time_t)(tenms / 100);
239
240	return 0;
241	}
242
243
244	/* Read the i8042 delay timer */
245	static inline int hp_sdc_rtc_read_dt(struct timeval *res) {
246	int64_t raw;
247	uint32_t tenms;
248
249	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
250	if (raw < 0) return -1;
251
252	tenms = (uint32_t)raw & 0xffffff;
253
254	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
255	res->tv_sec = (time_t)(tenms / 100);
256
257	return 0;
258	}
259
260
261	/* Read the i8042 cycle timer (a.k.a. periodic) */
262	static inline int hp_sdc_rtc_read_ct(struct timeval *res) {
263	int64_t raw;
264	uint32_t tenms;
265
266	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
267	if (raw < 0) return -1;
268
269	tenms = (uint32_t)raw & 0xffffff;
270
271	res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
272	res->tv_sec = (time_t)(tenms / 100);
273
274	return 0;
275	}
276
277
278	/* Set the i8042 real-time clock */
279	static int hp_sdc_rtc_set_rt (struct timeval *setto)
280	{
281	uint32_t tenms;
282	unsigned int days;
283	hp_sdc_transaction t;
284	uint8_t tseq[11] = {
285	HP_SDC_ACT_PRECMD \| HP_SDC_ACT_DATAOUT,
286	HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
287	HP_SDC_ACT_PRECMD \| HP_SDC_ACT_DATAOUT,
288	HP_SDC_CMD_SET_RTD, 2, 0, 0
289	};
290
291	t.endidx = 10;
292
293	if (0xffff < setto->tv_sec / 86400) return -1;
294	days = setto->tv_sec / 86400;
295	if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
296	days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
297	if (days > 0xffff) return -1;
298
299	if (0xffffff < setto->tv_sec) return -1;
300	tenms = setto->tv_sec * 100;
301	if (0xffffff < setto->tv_usec / 10000) return -1;
302	tenms += setto->tv_usec / 10000;
303	if (tenms > 0xffffff) return -1;
304
305	tseq[3] = (uint8_t)(tenms & 0xff);
306	tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
307	tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
308
309	tseq[9] = (uint8_t)(days & 0xff);
310	tseq[10] = (uint8_t)((days >> 8) & 0xff);
311
312	t.seq = tseq;
313
314	if (hp_sdc_enqueue_transaction(&t)) return -1;
315	return 0;
316	}
317
318	/* Set the i8042 fast handshake timer */
319	static int hp_sdc_rtc_set_fhs (struct timeval *setto)
320	{
321	uint32_t tenms;
322	hp_sdc_transaction t;
323	uint8_t tseq[5] = {
324	HP_SDC_ACT_PRECMD \| HP_SDC_ACT_DATAOUT,
325	HP_SDC_CMD_SET_FHS, 2, 0, 0
326	};
327
328	t.endidx = 4;
329
330	if (0xffff < setto->tv_sec) return -1;
331	tenms = setto->tv_sec * 100;
332	if (0xffff < setto->tv_usec / 10000) return -1;
333	tenms += setto->tv_usec / 10000;
334	if (tenms > 0xffff) return -1;
335
336	tseq[3] = (uint8_t)(tenms & 0xff);
337	tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
338
339	t.seq = tseq;
340
341	if (hp_sdc_enqueue_transaction(&t)) return -1;
342	return 0;
343	}
344
345
346	/* Set the i8042 match timer (a.k.a. alarm) */
347	#define hp_sdc_rtc_set_mt (setto) \
348	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)
349
350	/* Set the i8042 delay timer */
351	#define hp_sdc_rtc_set_dt (setto) \
352	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)
353
354	/* Set the i8042 cycle timer (a.k.a. periodic) */
355	#define hp_sdc_rtc_set_ct (setto) \
356	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)
357
358	/* Set one of the i8042 3-byte wide timers */
359	static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
360	{
361	uint32_t tenms;
362	hp_sdc_transaction t;
363	uint8_t tseq[6] = {
364	HP_SDC_ACT_PRECMD \| HP_SDC_ACT_DATAOUT,
365	0, 3, 0, 0, 0
366	};
367
368	t.endidx = 6;
369
370	if (0xffffff < setto->tv_sec) return -1;
371	tenms = setto->tv_sec * 100;
372	if (0xffffff < setto->tv_usec / 10000) return -1;
373	tenms += setto->tv_usec / 10000;
374	if (tenms > 0xffffff) return -1;
375
376	tseq[1] = setcmd;
377	tseq[3] = (uint8_t)(tenms & 0xff);
378	tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
379	tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
380
381	t.seq = tseq;
382
383	if (hp_sdc_enqueue_transaction(&t)) {
384	return -1;
385	}
386	return 0;
387	}
388
6ce6b3ae	389	static ssize_t hp_sdc_rtc_read(struct file file, char __user buf,
1da177e4 LT	390	size_t count, loff_t *ppos) {
	391	ssize_t retval;
	392
	393	if (count < sizeof(unsigned long))
	394	return -EINVAL;
	395
6ce6b3ae	396	retval = put_user(68, (unsigned long __user *)buf);
1da177e4 LT	397	return retval;
	398	}
	399
	400	static unsigned int hp_sdc_rtc_poll(struct file file, poll_table wait)
	401	{
	402	unsigned long l;
	403
	404	l = 0;
	405	if (l != 0)
	406	return POLLIN \| POLLRDNORM;
	407	return 0;
	408	}
	409
	410	static int hp_sdc_rtc_open(struct inode inode, struct file file)
	411	{
986f8b8c	412	cycle_kernel_lock();
1da177e4 LT	413	return 0;
	414	}
	415
1da177e4 LT	416	static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
	417	{
	418	return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
	419	}
	420
	421	static int hp_sdc_rtc_proc_output (char *buf)
	422	{
	423	#define YN(bit) ("no")
	424	#define NY(bit) ("yes")
	425	char *p;
	426	struct rtc_time tm;
	427	struct timeval tv;
	428
	429	memset(&tm, 0, sizeof(struct rtc_time));
	430
	431	p = buf;
	432
	433	if (hp_sdc_rtc_read_bbrtc(&tm)) {
	434	p += sprintf(p, "BBRTC\t\t: READ FAILED!\n");
	435	} else {
	436	p += sprintf(p,
	437	"rtc_time\t: %02d:%02d:%02d\n"
	438	"rtc_date\t: %04d-%02d-%02d\n"
	439	"rtc_epoch\t: %04lu\n",
	440	tm.tm_hour, tm.tm_min, tm.tm_sec,
	441	tm.tm_year + 1900, tm.tm_mon + 1,
	442	tm.tm_mday, epoch);
	443	}
	444
	445	if (hp_sdc_rtc_read_rt(&tv)) {
	446	p += sprintf(p, "i8042 rtc\t: READ FAILED!\n");
	447	} else {
	448	p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n",
7477fb6f	449	tv.tv_sec, (int)tv.tv_usec/1000);
1da177e4 LT	450	}
	451
	452	if (hp_sdc_rtc_read_fhs(&tv)) {
	453	p += sprintf(p, "handshake\t: READ FAILED!\n");
	454	} else {
	455	p += sprintf(p, "handshake\t: %ld.%02d seconds\n",
7477fb6f	456	tv.tv_sec, (int)tv.tv_usec/1000);
1da177e4 LT	457	}
	458
	459	if (hp_sdc_rtc_read_mt(&tv)) {
	460	p += sprintf(p, "alarm\t\t: READ FAILED!\n");
	461	} else {
	462	p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n",
7477fb6f	463	tv.tv_sec, (int)tv.tv_usec/1000);
1da177e4 LT	464	}
	465
	466	if (hp_sdc_rtc_read_dt(&tv)) {
	467	p += sprintf(p, "delay\t\t: READ FAILED!\n");
	468	} else {
	469	p += sprintf(p, "delay\t\t: %ld.%02d seconds\n",
7477fb6f	470	tv.tv_sec, (int)tv.tv_usec/1000);
1da177e4 LT	471	}
	472
	473	if (hp_sdc_rtc_read_ct(&tv)) {
	474	p += sprintf(p, "periodic\t: READ FAILED!\n");
	475	} else {
	476	p += sprintf(p, "periodic\t: %ld.%02d seconds\n",
7477fb6f	477	tv.tv_sec, (int)tv.tv_usec/1000);
1da177e4 LT	478	}
	479
	480	p += sprintf(p,
	481	"DST_enable\t: %s\n"
	482	"BCD\t\t: %s\n"
	483	"24hr\t\t: %s\n"
	484	"square_wave\t: %s\n"
	485	"alarm_IRQ\t: %s\n"
	486	"update_IRQ\t: %s\n"
	487	"periodic_IRQ\t: %s\n"
	488	"periodic_freq\t: %ld\n"
	489	"batt_status\t: %s\n",
	490	YN(RTC_DST_EN),
	491	NY(RTC_DM_BINARY),
	492	YN(RTC_24H),
	493	YN(RTC_SQWE),
	494	YN(RTC_AIE),
	495	YN(RTC_UIE),
	496	YN(RTC_PIE),
	497	1UL,
	498	1 ? "okay" : "dead");
	499
	500	return p - buf;
	501	#undef YN
	502	#undef NY
	503	}
	504
	505	static int hp_sdc_rtc_read_proc(char page, char *start, off_t off,
	506	int count, int eof, void data)
	507	{
	508	int len = hp_sdc_rtc_proc_output (page);
	509	if (len <= off+count) *eof = 1;
	510	*start = page + off;
	511	len -= off;
	512	if (len>count) len = count;
	513	if (len<0) len = 0;
	514	return len;
	515	}
	516
	517	static int hp_sdc_rtc_ioctl(struct inode inode, struct file file,
	518	unsigned int cmd, unsigned long arg)
	519	{
	520	#if 1
	521	return -EINVAL;
	522	#else
	523
	524	struct rtc_time wtime;
	525	struct timeval ttime;
	526	int use_wtime = 0;
	527
	528	/* This needs major work. */
	529
	530	switch (cmd) {
	531
	532	case RTC_AIE_OFF: /* Mask alarm int. enab. bit */
	533	case RTC_AIE_ON: /* Allow alarm interrupts. */
	534	case RTC_PIE_OFF: /* Mask periodic int. enab. bit */
	535	case RTC_PIE_ON: /* Allow periodic ints */
	536	case RTC_UIE_ON: /* Allow ints for RTC updates. */
	537	case RTC_UIE_OFF: /* Allow ints for RTC updates. */
	538	{
	539	/* We cannot mask individual user timers and we
	540	cannot tell them apart when they occur, so it
	541	would be disingenuous to succeed these IOCTLs */
542	return -EINVAL;
543	}
544	case RTC_ALM_READ: /* Read the present alarm time */
545	{
546	if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
547	if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
548
549	wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600;
550	wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60;
551	wtime.tm_sec = ttime.tv_sec;
552
553	break;
554	}
555	case RTC_IRQP_READ: /* Read the periodic IRQ rate. */
556	{
557	return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
558	}
559	case RTC_IRQP_SET: /* Set periodic IRQ rate. */
560	{
561	/*
562	* The max we can do is 100Hz.
563	*/
564
565	if ((arg < 1) \|\| (arg > 100)) return -EINVAL;
566	ttime.tv_sec = 0;
567	ttime.tv_usec = 1000000 / arg;
568	if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
569	hp_sdc_rtc_freq = arg;
570	return 0;
571	}
572	case RTC_ALM_SET: /* Store a time into the alarm */
573	{
574	/*
575	* This expects a struct hp_sdc_rtc_time. Writing 0xff means
576	* "don't care" or "match all" for PC timers. The HP SDC
577	* does not support that perk, but it could be emulated fairly
578	* easily. Only the tm_hour, tm_min and tm_sec are used.
579	* We could do it with 10ms accuracy with the HP SDC, if the
580	* rtc interface left us a way to do that.
581	*/
582	struct hp_sdc_rtc_time alm_tm;
583
584	if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
585	sizeof(struct hp_sdc_rtc_time)))
586	return -EFAULT;
587
588	if (alm_tm.tm_hour > 23) return -EINVAL;
589	if (alm_tm.tm_min > 59) return -EINVAL;
590	if (alm_tm.tm_sec > 59) return -EINVAL;
591
592	ttime.sec = alm_tm.tm_hour * 3600 +
593	alm_tm.tm_min * 60 + alm_tm.tm_sec;
594	ttime.usec = 0;
595	if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
596	return 0;
597	}
598	case RTC_RD_TIME: /* Read the time/date from RTC */
599	{
600	if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
601	break;
602	}
603	case RTC_SET_TIME: /* Set the RTC */
604	{
605	struct rtc_time hp_sdc_rtc_tm;
606	unsigned char mon, day, hrs, min, sec, leap_yr;
607	unsigned int yrs;
608
609	if (!capable(CAP_SYS_TIME))
610	return -EACCES;
611	if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
612	sizeof(struct rtc_time)))
613	return -EFAULT;
614
615	yrs = hp_sdc_rtc_tm.tm_year + 1900;
616	mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
617	day = hp_sdc_rtc_tm.tm_mday;
618	hrs = hp_sdc_rtc_tm.tm_hour;
619	min = hp_sdc_rtc_tm.tm_min;
620	sec = hp_sdc_rtc_tm.tm_sec;
621
622	if (yrs < 1970)
623	return -EINVAL;
624
625	leap_yr = ((!(yrs % 4) && (yrs % 100)) \|\| !(yrs % 400));
626
627	if ((mon > 12) \|\| (day == 0))
628	return -EINVAL;
629	if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
630	return -EINVAL;
631	if ((hrs >= 24) \|\| (min >= 60) \|\| (sec >= 60))
632	return -EINVAL;
633
634	if ((yrs -= eH) > 255) /* They are unsigned */
635	return -EINVAL;
636
637
638	return 0;
639	}
640	case RTC_EPOCH_READ: /* Read the epoch. */
641	{
642	return put_user (epoch, (unsigned long *)arg);
643	}
644	case RTC_EPOCH_SET: /* Set the epoch. */
645	{
646	/*
647	* There were no RTC clocks before 1900.
648	*/
649	if (arg < 1900)
650	return -EINVAL;
651	if (!capable(CAP_SYS_TIME))
652	return -EACCES;
653
654	epoch = arg;
655	return 0;
656	}
657	default:
658	return -EINVAL;
659	}
660	return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
661	#endif
662	}
663
2b8693c0	664	static const struct file_operations hp_sdc_rtc_fops = {
1da177e4	665	.owner = THIS_MODULE,
70c00ba0	666	.llseek = no_llseek,
1da177e4 LT	667	.read = hp_sdc_rtc_read,
	668	.poll = hp_sdc_rtc_poll,
	669	.ioctl = hp_sdc_rtc_ioctl,
	670	.open = hp_sdc_rtc_open,
1da177e4 LT	671	.fasync = hp_sdc_rtc_fasync,
	672	};
	673
	674	static struct miscdevice hp_sdc_rtc_dev = {
	675	.minor = RTC_MINOR,
	676	.name = "rtc_HIL",
	677	.fops = &hp_sdc_rtc_fops
	678	};
	679
	680	static int __init hp_sdc_rtc_init(void)
	681	{
	682	int ret;
	683
eb98630b GU	684	#ifdef __mc68000__
	685	if (!MACH_IS_HP300)
	686	return -ENODEV;
	687	#endif
	688
1da177e4 LT	689	init_MUTEX(&i8042tregs);
	690
	691	if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
	692	return ret;
5d469ec0 NH	693	if (misc_register(&hp_sdc_rtc_dev) != 0)
	694	printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n");
	695
6ce6b3ae	696	create_proc_read_entry ("driver/rtc", 0, NULL,
1da177e4 LT	697	hp_sdc_rtc_read_proc, NULL);
	698
	699	printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
	700	"(RTC v " RTC_VERSION ")\n");
	701
	702	return 0;
	703	}
	704
	705	static void __exit hp_sdc_rtc_exit(void)
	706	{
	707	remove_proc_entry ("driver/rtc", NULL);
	708	misc_deregister(&hp_sdc_rtc_dev);
	709	hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
	710	printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
	711	}
	712
	713	module_init(hp_sdc_rtc_init);
	714	module_exit(hp_sdc_rtc_exit);