[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / infiniband / hw / mthca / mthca_av.c

/*
 * Copyright (c) 2004 Topspin Communications.  All rights reserved.
 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $
 */

#include <linux/init.h>

#include <rdma/ib_verbs.h>
#include <rdma/ib_cache.h>

#include "mthca_dev.h"

struct mthca_av {
	__be32 port_pd;
	u8     reserved1;
	u8     g_slid;
	__be16 dlid;
	u8     reserved2;
	u8     gid_index;
	u8     msg_sr;
	u8     hop_limit;
	__be32 sl_tclass_flowlabel;
	__be32 dgid[4];
};

int mthca_create_ah(struct mthca_dev *dev,
		    struct mthca_pd *pd,
		    struct ib_ah_attr *ah_attr,
		    struct mthca_ah *ah)
{
	u32 index = -1;
	struct mthca_av *av = NULL;

	ah->type = MTHCA_AH_PCI_POOL;

	if (mthca_is_memfree(dev)) {
		ah->av   = kmalloc(sizeof *ah->av, GFP_ATOMIC);
		if (!ah->av)
			return -ENOMEM;

		ah->type = MTHCA_AH_KMALLOC;
		av       = ah->av;
	} else if (!atomic_read(&pd->sqp_count) &&
		 !(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
		index = mthca_alloc(&dev->av_table.alloc);

		/* fall back to allocate in host memory */
		if (index == -1)
			goto on_hca_fail;

		av = kmalloc(sizeof *av, GFP_ATOMIC);
		if (!av)
			goto on_hca_fail;

		ah->type = MTHCA_AH_ON_HCA;
		ah->avdma  = dev->av_table.ddr_av_base +
			index * MTHCA_AV_SIZE;
	}

on_hca_fail:
	if (ah->type == MTHCA_AH_PCI_POOL) {
		ah->av = pci_pool_alloc(dev->av_table.pool,
					SLAB_ATOMIC, &ah->avdma);
		if (!ah->av)
			return -ENOMEM;

		av = ah->av;
	}

	ah->key = pd->ntmr.ibmr.lkey;

	memset(av, 0, MTHCA_AV_SIZE);

	av->port_pd = cpu_to_be32(pd->pd_num | (ah_attr->port_num << 24));
	av->g_slid  = ah_attr->src_path_bits;
	av->dlid    = cpu_to_be16(ah_attr->dlid);
	av->msg_sr  = (3 << 4) | /* 2K message */
		ah_attr->static_rate;
	av->sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28);
	if (ah_attr->ah_flags & IB_AH_GRH) {
		av->g_slid |= 0x80;
		av->gid_index = (ah_attr->port_num - 1) * dev->limits.gid_table_len +
			ah_attr->grh.sgid_index;
		av->hop_limit = ah_attr->grh.hop_limit;
		av->sl_tclass_flowlabel |=
			cpu_to_be32((ah_attr->grh.traffic_class << 20) |
				    ah_attr->grh.flow_label);
		memcpy(av->dgid, ah_attr->grh.dgid.raw, 16);
	} else {
		/* Arbel workaround -- low byte of GID must be 2 */
		av->dgid[3] = cpu_to_be32(2);
	}

	if (0) {
		int j;

		mthca_dbg(dev, "Created UDAV at %p/%08lx:\n",
			  av, (unsigned long) ah->avdma);
		for (j = 0; j < 8; ++j)
			printk(KERN_DEBUG "  [%2x] %08x\n",
			       j * 4, be32_to_cpu(((__be32 *) av)[j]));
	}

	if (ah->type == MTHCA_AH_ON_HCA) {
		memcpy_toio(dev->av_table.av_map + index * MTHCA_AV_SIZE,
			    av, MTHCA_AV_SIZE);
		kfree(av);
	}

	return 0;
}

int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah)
{
	switch (ah->type) {
	case MTHCA_AH_ON_HCA:
		mthca_free(&dev->av_table.alloc,
 			   (ah->avdma - dev->av_table.ddr_av_base) /
			   MTHCA_AV_SIZE);
		break;

	case MTHCA_AH_PCI_POOL:
		pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
		break;

	case MTHCA_AH_KMALLOC:
		kfree(ah->av);
		break;
	}

	return 0;
}

int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
		  struct ib_ud_header *header)
{
	if (ah->type == MTHCA_AH_ON_HCA)
		return -EINVAL;

	header->lrh.service_level   = be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 28;
	header->lrh.destination_lid = ah->av->dlid;
	header->lrh.source_lid      = cpu_to_be16(ah->av->g_slid & 0x7f);
	if (ah->av->g_slid & 0x80) {
		header->grh_present = 1;
		header->grh.traffic_class =
			(be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 20) & 0xff;
		header->grh.flow_label    =
			ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
		ib_get_cached_gid(&dev->ib_dev,
				  be32_to_cpu(ah->av->port_pd) >> 24,
				  ah->av->gid_index,
				  &header->grh.source_gid);
		memcpy(header->grh.destination_gid.raw,
		       ah->av->dgid, 16);
	} else {
		header->grh_present = 0;
	}

	return 0;
}

int __devinit mthca_init_av_table(struct mthca_dev *dev)
{
	int err;

	if (mthca_is_memfree(dev))
		return 0;

	err = mthca_alloc_init(&dev->av_table.alloc,
			       dev->av_table.num_ddr_avs,
			       dev->av_table.num_ddr_avs - 1,
			       0);
	if (err)
		return err;

	dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
					     MTHCA_AV_SIZE,
					     MTHCA_AV_SIZE, 0);
	if (!dev->av_table.pool)
		goto out_free_alloc;

	if (!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
		dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
					       dev->av_table.ddr_av_base -
					       dev->ddr_start,
					       dev->av_table.num_ddr_avs *
					       MTHCA_AV_SIZE);
		if (!dev->av_table.av_map)
			goto out_free_pool;
	} else
		dev->av_table.av_map = NULL;

	return 0;

 out_free_pool:
	pci_pool_destroy(dev->av_table.pool);

 out_free_alloc:
	mthca_alloc_cleanup(&dev->av_table.alloc);
	return -ENOMEM;
}

void __devexit mthca_cleanup_av_table(struct mthca_dev *dev)
{
	if (mthca_is_memfree(dev))
		return;

	if (dev->av_table.av_map)
		iounmap(dev->av_table.av_map);
	pci_pool_destroy(dev->av_table.pool);
	mthca_alloc_cleanup(&dev->av_table.alloc);
}
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	* Copyright (c) 2004 Topspin Communications. All rights reserved.
cd4e8fb4	3	* Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
1da177e4 LT	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*
	33	* $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $
	34	*/
	35
	36	#include <linux/init.h>
	37
a4d61e84 RD	38	#include <rdma/ib_verbs.h>
a4d61e84 RD	39	#include <rdma/ib_cache.h>
1da177e4 LT	40
	41	#include "mthca_dev.h"
	42
	43	struct mthca_av {
97f52eb4 SH	44	__be32 port_pd;
	45	u8 reserved1;
	46	u8 g_slid;
	47	__be16 dlid;
	48	u8 reserved2;
	49	u8 gid_index;
	50	u8 msg_sr;
	51	u8 hop_limit;
	52	__be32 sl_tclass_flowlabel;
	53	__be32 dgid[4];
1da177e4 LT	54	};
	55
	56	int mthca_create_ah(struct mthca_dev *dev,
	57	struct mthca_pd *pd,
	58	struct ib_ah_attr *ah_attr,
	59	struct mthca_ah *ah)
	60	{
	61	u32 index = -1;
	62	struct mthca_av *av = NULL;
	63
	64	ah->type = MTHCA_AH_PCI_POOL;
	65
d10ddbf6	66	if (mthca_is_memfree(dev)) {
8df8a34d	67	ah->av = kmalloc(sizeof *ah->av, GFP_ATOMIC);
1da177e4 LT	68	if (!ah->av)
	69	return -ENOMEM;
	70
	71	ah->type = MTHCA_AH_KMALLOC;
	72	av = ah->av;
	73	} else if (!atomic_read(&pd->sqp_count) &&
	74	!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
	75	index = mthca_alloc(&dev->av_table.alloc);
	76
	77	/* fall back to allocate in host memory */
	78	if (index == -1)
	79	goto on_hca_fail;
	80
8df8a34d	81	av = kmalloc(sizeof *av, GFP_ATOMIC);
1da177e4 LT	82	if (!av)
	83	goto on_hca_fail;
	84
	85	ah->type = MTHCA_AH_ON_HCA;
	86	ah->avdma = dev->av_table.ddr_av_base +
	87	index * MTHCA_AV_SIZE;
	88	}
	89
	90	on_hca_fail:
	91	if (ah->type == MTHCA_AH_PCI_POOL) {
	92	ah->av = pci_pool_alloc(dev->av_table.pool,
8df8a34d	93	SLAB_ATOMIC, &ah->avdma);
1da177e4 LT	94	if (!ah->av)
	95	return -ENOMEM;
	96
	97	av = ah->av;
	98	}
	99
	100	ah->key = pd->ntmr.ibmr.lkey;
	101
	102	memset(av, 0, MTHCA_AV_SIZE);
	103
	104	av->port_pd = cpu_to_be32(pd->pd_num \| (ah_attr->port_num << 24));
	105	av->g_slid = ah_attr->src_path_bits;
	106	av->dlid = cpu_to_be16(ah_attr->dlid);
	107	av->msg_sr = (3 << 4) \| /* 2K message */
	108	ah_attr->static_rate;
	109	av->sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28);
	110	if (ah_attr->ah_flags & IB_AH_GRH) {
	111	av->g_slid \|= 0x80;
	112	av->gid_index = (ah_attr->port_num - 1) * dev->limits.gid_table_len +
	113	ah_attr->grh.sgid_index;
	114	av->hop_limit = ah_attr->grh.hop_limit;
	115	av->sl_tclass_flowlabel \|=
	116	cpu_to_be32((ah_attr->grh.traffic_class << 20) \|
	117	ah_attr->grh.flow_label);
	118	memcpy(av->dgid, ah_attr->grh.dgid.raw, 16);
	119	} else {
	120	/* Arbel workaround -- low byte of GID must be 2 */
	121	av->dgid[3] = cpu_to_be32(2);
	122	}
	123
	124	if (0) {
	125	int j;
	126
	127	mthca_dbg(dev, "Created UDAV at %p/%08lx:\n",
	128	av, (unsigned long) ah->avdma);
	129	for (j = 0; j < 8; ++j)
	130	printk(KERN_DEBUG " [%2x] %08x\n",
97f52eb4	131	j * 4, be32_to_cpu(((__be32 *) av)[j]));
1da177e4 LT	132	}
	133
	134	if (ah->type == MTHCA_AH_ON_HCA) {
	135	memcpy_toio(dev->av_table.av_map + index * MTHCA_AV_SIZE,
	136	av, MTHCA_AV_SIZE);
	137	kfree(av);
	138	}
	139
	140	return 0;
	141	}
	142
	143	int mthca_destroy_ah(struct mthca_dev dev, struct mthca_ah ah)
	144	{
	145	switch (ah->type) {
	146	case MTHCA_AH_ON_HCA:
	147	mthca_free(&dev->av_table.alloc,
	148	(ah->avdma - dev->av_table.ddr_av_base) /
	149	MTHCA_AV_SIZE);
	150	break;
	151
	152	case MTHCA_AH_PCI_POOL:
	153	pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
	154	break;
	155
	156	case MTHCA_AH_KMALLOC:
	157	kfree(ah->av);
	158	break;
	159	}
	160
	161	return 0;
	162	}
	163
	164	int mthca_read_ah(struct mthca_dev dev, struct mthca_ah ah,
	165	struct ib_ud_header *header)
	166	{
	167	if (ah->type == MTHCA_AH_ON_HCA)
	168	return -EINVAL;
	169
	170	header->lrh.service_level = be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 28;
	171	header->lrh.destination_lid = ah->av->dlid;
97f52eb4	172	header->lrh.source_lid = cpu_to_be16(ah->av->g_slid & 0x7f);
1da177e4 LT	173	if (ah->av->g_slid & 0x80) {
	174	header->grh_present = 1;
	175	header->grh.traffic_class =
	176	(be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 20) & 0xff;
	177	header->grh.flow_label =
	178	ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
	179	ib_get_cached_gid(&dev->ib_dev,
	180	be32_to_cpu(ah->av->port_pd) >> 24,
	181	ah->av->gid_index,
	182	&header->grh.source_gid);
	183	memcpy(header->grh.destination_gid.raw,
	184	ah->av->dgid, 16);
	185	} else {
	186	header->grh_present = 0;
	187	}
	188
	189	return 0;
	190	}
	191
	192	int __devinit mthca_init_av_table(struct mthca_dev *dev)
	193	{
	194	int err;
	195
d10ddbf6	196	if (mthca_is_memfree(dev))
1da177e4 LT	197	return 0;
	198
	199	err = mthca_alloc_init(&dev->av_table.alloc,
	200	dev->av_table.num_ddr_avs,
	201	dev->av_table.num_ddr_avs - 1,
	202	0);
	203	if (err)
	204	return err;
	205
	206	dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
	207	MTHCA_AV_SIZE,
	208	MTHCA_AV_SIZE, 0);
	209	if (!dev->av_table.pool)
	210	goto out_free_alloc;
	211
	212	if (!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
	213	dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
	214	dev->av_table.ddr_av_base -
	215	dev->ddr_start,
	216	dev->av_table.num_ddr_avs *
	217	MTHCA_AV_SIZE);
	218	if (!dev->av_table.av_map)
	219	goto out_free_pool;
	220	} else
	221	dev->av_table.av_map = NULL;
	222
	223	return 0;
	224
	225	out_free_pool:
	226	pci_pool_destroy(dev->av_table.pool);
	227
	228	out_free_alloc:
	229	mthca_alloc_cleanup(&dev->av_table.alloc);
	230	return -ENOMEM;
	231	}
	232
	233	void __devexit mthca_cleanup_av_table(struct mthca_dev *dev)
	234	{
d10ddbf6	235	if (mthca_is_memfree(dev))
1da177e4 LT	236	return;
	237
	238	if (dev->av_table.av_map)
	239	iounmap(dev->av_table.av_map);
	240	pci_pool_destroy(dev->av_table.pool);
	241	mthca_alloc_cleanup(&dev->av_table.alloc);
	242	}