Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
59bca8cc BZ |
2 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 1995-1998 Mark Lord | |
4 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz | |
58f189fc | 5 | * |
1da177e4 | 6 | * May be copied or modified under the terms of the GNU General Public License |
1da177e4 LT |
7 | */ |
8 | ||
1da177e4 LT |
9 | #include <linux/module.h> |
10 | #include <linux/types.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/timer.h> | |
15 | #include <linux/mm.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/ide.h> | |
18 | #include <linux/dma-mapping.h> | |
19 | ||
20 | #include <asm/io.h> | |
21 | #include <asm/irq.h> | |
22 | ||
23 | ||
24 | /** | |
bad7c825 BZ |
25 | * ide_match_hwif - find free ide_hwifs[] slot |
26 | * @bootable: bootable flag | |
1da177e4 | 27 | * |
bad7c825 | 28 | * Return the new hwif. If we are out of free slots return NULL. |
1da177e4 LT |
29 | */ |
30 | ||
bad7c825 | 31 | static ide_hwif_t *ide_match_hwif(u8 bootable) |
1da177e4 | 32 | { |
1da177e4 | 33 | ide_hwif_t *hwif; |
bad7c825 | 34 | int h; |
1da177e4 | 35 | |
1da177e4 | 36 | /* |
bad7c825 BZ |
37 | * Claim an unassigned slot. |
38 | * | |
1da177e4 LT |
39 | * Give preference to claiming other slots before claiming ide0/ide1, |
40 | * just in case there's another interface yet-to-be-scanned | |
41 | * which uses ports 1f0/170 (the ide0/ide1 defaults). | |
42 | * | |
43 | * Unless there is a bootable card that does not use the standard | |
44 | * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag. | |
45 | */ | |
46 | if (bootable) { | |
47 | for (h = 0; h < MAX_HWIFS; ++h) { | |
48 | hwif = &ide_hwifs[h]; | |
49 | if (hwif->chipset == ide_unknown) | |
50 | return hwif; /* pick an unused entry */ | |
51 | } | |
52 | } else { | |
53 | for (h = 2; h < MAX_HWIFS; ++h) { | |
54 | hwif = ide_hwifs + h; | |
55 | if (hwif->chipset == ide_unknown) | |
56 | return hwif; /* pick an unused entry */ | |
57 | } | |
58 | } | |
83d7dbc4 | 59 | for (h = 0; h < 2 && h < MAX_HWIFS; ++h) { |
1da177e4 LT |
60 | hwif = ide_hwifs + h; |
61 | if (hwif->chipset == ide_unknown) | |
62 | return hwif; /* pick an unused entry */ | |
63 | } | |
bad7c825 | 64 | |
1da177e4 LT |
65 | return NULL; |
66 | } | |
67 | ||
68 | /** | |
69 | * ide_setup_pci_baseregs - place a PCI IDE controller native | |
70 | * @dev: PCI device of interface to switch native | |
71 | * @name: Name of interface | |
72 | * | |
73 | * We attempt to place the PCI interface into PCI native mode. If | |
74 | * we succeed the BARs are ok and the controller is in PCI mode. | |
75 | * Returns 0 on success or an errno code. | |
76 | * | |
77 | * FIXME: if we program the interface and then fail to set the BARS | |
78 | * we don't switch it back to legacy mode. Do we actually care ?? | |
79 | */ | |
80 | ||
81 | static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) | |
82 | { | |
83 | u8 progif = 0; | |
84 | ||
85 | /* | |
86 | * Place both IDE interfaces into PCI "native" mode: | |
87 | */ | |
88 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
89 | (progif & 5) != 5) { | |
90 | if ((progif & 0xa) != 0xa) { | |
91 | printk(KERN_INFO "%s: device not capable of full " | |
92 | "native PCI mode\n", name); | |
93 | return -EOPNOTSUPP; | |
94 | } | |
95 | printk("%s: placing both ports into native PCI mode\n", name); | |
96 | (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); | |
97 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
98 | (progif & 5) != 5) { | |
99 | printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " | |
100 | "0x%04x, got 0x%04x\n", | |
101 | name, progif|5, progif); | |
102 | return -EOPNOTSUPP; | |
103 | } | |
104 | } | |
105 | return 0; | |
106 | } | |
107 | ||
108 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
8ac2b42a BZ |
109 | static void ide_pci_clear_simplex(unsigned long dma_base, const char *name) |
110 | { | |
111 | u8 dma_stat = inb(dma_base + 2); | |
112 | ||
113 | outb(dma_stat & 0x60, dma_base + 2); | |
114 | dma_stat = inb(dma_base + 2); | |
115 | if (dma_stat & 0x80) | |
116 | printk(KERN_INFO "%s: simplex device: DMA forced\n", name); | |
117 | } | |
118 | ||
1da177e4 LT |
119 | /** |
120 | * ide_get_or_set_dma_base - setup BMIBA | |
039788e1 BZ |
121 | * @d: IDE port info |
122 | * @hwif: IDE interface | |
1da177e4 | 123 | * |
c58e79dd BZ |
124 | * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. |
125 | * Where a device has a partner that is already in DMA mode we check | |
126 | * and enforce IDE simplex rules. | |
1da177e4 LT |
127 | */ |
128 | ||
85620436 | 129 | static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif) |
1da177e4 | 130 | { |
36501650 BZ |
131 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
132 | unsigned long dma_base = 0; | |
8ac2b42a | 133 | u8 dma_stat = 0; |
1da177e4 | 134 | |
1da177e4 LT |
135 | if (hwif->mmio) |
136 | return hwif->dma_base; | |
137 | ||
138 | if (hwif->mate && hwif->mate->dma_base) { | |
139 | dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); | |
140 | } else { | |
9ffcf364 BZ |
141 | u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; |
142 | ||
143 | dma_base = pci_resource_start(dev, baridx); | |
144 | ||
aea5d375 | 145 | if (dma_base == 0) { |
9ffcf364 | 146 | printk(KERN_ERR "%s: DMA base is invalid\n", d->name); |
aea5d375 BZ |
147 | return 0; |
148 | } | |
1da177e4 LT |
149 | } |
150 | ||
aea5d375 BZ |
151 | if (hwif->channel) |
152 | dma_base += 8; | |
153 | ||
8ac2b42a BZ |
154 | if (d->host_flags & IDE_HFLAG_CS5520) |
155 | goto out; | |
156 | ||
157 | if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { | |
158 | ide_pci_clear_simplex(dma_base, d->name); | |
159 | goto out; | |
160 | } | |
161 | ||
162 | /* | |
163 | * If the device claims "simplex" DMA, this means that only one of | |
164 | * the two interfaces can be trusted with DMA at any point in time | |
165 | * (so we should enable DMA only on one of the two interfaces). | |
166 | * | |
167 | * FIXME: At this point we haven't probed the drives so we can't make | |
168 | * the appropriate decision. Really we should defer this problem until | |
169 | * we tune the drive then try to grab DMA ownership if we want to be | |
170 | * the DMA end. This has to be become dynamic to handle hot-plug. | |
171 | */ | |
172 | dma_stat = hwif->INB(dma_base + 2); | |
173 | if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { | |
174 | printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name); | |
175 | dma_base = 0; | |
1da177e4 | 176 | } |
8ac2b42a | 177 | out: |
1da177e4 LT |
178 | return dma_base; |
179 | } | |
180 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ | |
181 | ||
85620436 | 182 | void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 | 183 | { |
bde07e5e BZ |
184 | printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at " |
185 | " PCI slot %s\n", d->name, dev->vendor, dev->device, | |
186 | dev->revision, pci_name(dev)); | |
1da177e4 LT |
187 | } |
188 | ||
189 | EXPORT_SYMBOL_GPL(ide_setup_pci_noise); | |
190 | ||
191 | ||
192 | /** | |
193 | * ide_pci_enable - do PCI enables | |
194 | * @dev: PCI device | |
039788e1 | 195 | * @d: IDE port info |
1da177e4 LT |
196 | * |
197 | * Enable the IDE PCI device. We attempt to enable the device in full | |
09483916 BH |
198 | * but if that fails then we only need IO space. The PCI code should |
199 | * have setup the proper resources for us already for controllers in | |
200 | * legacy mode. | |
1da177e4 LT |
201 | * |
202 | * Returns zero on success or an error code | |
203 | */ | |
039788e1 | 204 | |
85620436 | 205 | static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 LT |
206 | { |
207 | int ret; | |
208 | ||
209 | if (pci_enable_device(dev)) { | |
09483916 | 210 | ret = pci_enable_device_io(dev); |
1da177e4 LT |
211 | if (ret < 0) { |
212 | printk(KERN_WARNING "%s: (ide_setup_pci_device:) " | |
213 | "Could not enable device.\n", d->name); | |
214 | goto out; | |
215 | } | |
216 | printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); | |
217 | } | |
218 | ||
219 | /* | |
039788e1 BZ |
220 | * assume all devices can do 32-bit DMA for now, we can add |
221 | * a DMA mask field to the struct ide_port_info if we need it | |
222 | * (or let lower level driver set the DMA mask) | |
1da177e4 LT |
223 | */ |
224 | ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); | |
225 | if (ret < 0) { | |
226 | printk(KERN_ERR "%s: can't set dma mask\n", d->name); | |
227 | goto out; | |
228 | } | |
229 | ||
230 | /* FIXME: Temporary - until we put in the hotplug interface logic | |
231 | Check that the bits we want are not in use by someone else. */ | |
232 | ret = pci_request_region(dev, 4, "ide_tmp"); | |
233 | if (ret < 0) | |
234 | goto out; | |
235 | ||
236 | pci_release_region(dev, 4); | |
237 | out: | |
238 | return ret; | |
239 | } | |
240 | ||
241 | /** | |
242 | * ide_pci_configure - configure an unconfigured device | |
243 | * @dev: PCI device | |
039788e1 | 244 | * @d: IDE port info |
1da177e4 LT |
245 | * |
246 | * Enable and configure the PCI device we have been passed. | |
247 | * Returns zero on success or an error code. | |
248 | */ | |
039788e1 | 249 | |
85620436 | 250 | static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 LT |
251 | { |
252 | u16 pcicmd = 0; | |
253 | /* | |
254 | * PnP BIOS was *supposed* to have setup this device, but we | |
255 | * can do it ourselves, so long as the BIOS has assigned an IRQ | |
256 | * (or possibly the device is using a "legacy header" for IRQs). | |
257 | * Maybe the user deliberately *disabled* the device, | |
258 | * but we'll eventually ignore it again if no drives respond. | |
259 | */ | |
260 | if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO)) | |
261 | { | |
262 | printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); | |
263 | return -ENODEV; | |
264 | } | |
265 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { | |
266 | printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); | |
267 | return -EIO; | |
268 | } | |
269 | if (!(pcicmd & PCI_COMMAND_IO)) { | |
270 | printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); | |
271 | return -ENXIO; | |
272 | } | |
273 | return 0; | |
274 | } | |
275 | ||
276 | /** | |
277 | * ide_pci_check_iomem - check a register is I/O | |
039788e1 BZ |
278 | * @dev: PCI device |
279 | * @d: IDE port info | |
280 | * @bar: BAR number | |
1da177e4 | 281 | * |
1baccff8 SS |
282 | * Checks if a BAR is configured and points to MMIO space. If so, |
283 | * return an error code. Otherwise return 0 | |
1da177e4 | 284 | */ |
039788e1 | 285 | |
1baccff8 SS |
286 | static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, |
287 | int bar) | |
1da177e4 LT |
288 | { |
289 | ulong flags = pci_resource_flags(dev, bar); | |
290 | ||
291 | /* Unconfigured ? */ | |
292 | if (!flags || pci_resource_len(dev, bar) == 0) | |
293 | return 0; | |
294 | ||
1baccff8 SS |
295 | /* I/O space */ |
296 | if (flags & IORESOURCE_IO) | |
1da177e4 LT |
297 | return 0; |
298 | ||
299 | /* Bad */ | |
1da177e4 LT |
300 | return -EINVAL; |
301 | } | |
302 | ||
303 | /** | |
304 | * ide_hwif_configure - configure an IDE interface | |
305 | * @dev: PCI device holding interface | |
039788e1 | 306 | * @d: IDE port info |
1ebf7493 BZ |
307 | * @port: port number |
308 | * @irq: PCI IRQ | |
1da177e4 LT |
309 | * |
310 | * Perform the initial set up for the hardware interface structure. This | |
311 | * is done per interface port rather than per PCI device. There may be | |
312 | * more than one port per device. | |
313 | * | |
314 | * Returns the new hardware interface structure, or NULL on a failure | |
315 | */ | |
039788e1 | 316 | |
1ebf7493 BZ |
317 | static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, |
318 | const struct ide_port_info *d, | |
319 | unsigned int port, int irq) | |
1da177e4 LT |
320 | { |
321 | unsigned long ctl = 0, base = 0; | |
322 | ide_hwif_t *hwif; | |
5e71d9c5 | 323 | u8 bootable = (d->host_flags & IDE_HFLAG_NON_BOOTABLE) ? 0 : 1; |
79127c37 | 324 | struct hw_regs_s hw; |
1da177e4 | 325 | |
a5d8c5c8 | 326 | if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { |
1baccff8 SS |
327 | if (ide_pci_check_iomem(dev, d, 2 * port) || |
328 | ide_pci_check_iomem(dev, d, 2 * port + 1)) { | |
329 | printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported " | |
330 | "as MEM for port %d!\n", d->name, port); | |
331 | return NULL; | |
332 | } | |
1da177e4 LT |
333 | |
334 | ctl = pci_resource_start(dev, 2*port+1); | |
335 | base = pci_resource_start(dev, 2*port); | |
336 | if ((ctl && !base) || (base && !ctl)) { | |
337 | printk(KERN_ERR "%s: inconsistent baseregs (BIOS) " | |
338 | "for port %d, skipping\n", d->name, port); | |
339 | return NULL; | |
340 | } | |
341 | } | |
342 | if (!ctl) | |
343 | { | |
344 | /* Use default values */ | |
345 | ctl = port ? 0x374 : 0x3f4; | |
346 | base = port ? 0x170 : 0x1f0; | |
347 | } | |
bad7c825 BZ |
348 | |
349 | hwif = ide_match_hwif(bootable); | |
350 | if (hwif == NULL) { | |
351 | printk(KERN_ERR "%s: too many IDE interfaces, no room in " | |
352 | "table\n", d->name); | |
353 | return NULL; | |
354 | } | |
79127c37 BZ |
355 | |
356 | memset(&hw, 0, sizeof(hw)); | |
aab8ad9e | 357 | hw.irq = irq; |
79127c37 BZ |
358 | hw.dev = &dev->dev; |
359 | hw.chipset = d->chipset ? d->chipset : ide_pci; | |
360 | ide_std_init_ports(&hw, base, ctl | 2); | |
361 | ||
79127c37 BZ |
362 | ide_init_port_hw(hwif, &hw); |
363 | ||
36501650 | 364 | hwif->dev = &dev->dev; |
039788e1 | 365 | hwif->cds = d; |
1da177e4 | 366 | |
1da177e4 LT |
367 | return hwif; |
368 | } | |
369 | ||
c413b9b9 | 370 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
1da177e4 LT |
371 | /** |
372 | * ide_hwif_setup_dma - configure DMA interface | |
039788e1 | 373 | * @hwif: IDE interface |
c413b9b9 | 374 | * @d: IDE port info |
1da177e4 LT |
375 | * |
376 | * Set up the DMA base for the interface. Enable the master bits as | |
377 | * necessary and attempt to bring the device DMA into a ready to use | |
378 | * state | |
379 | */ | |
039788e1 | 380 | |
c413b9b9 | 381 | void ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) |
1da177e4 | 382 | { |
c413b9b9 | 383 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 384 | u16 pcicmd; |
47b68788 | 385 | |
1da177e4 LT |
386 | pci_read_config_word(dev, PCI_COMMAND, &pcicmd); |
387 | ||
47b68788 | 388 | if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || |
1da177e4 LT |
389 | ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && |
390 | (dev->class & 0x80))) { | |
9ffcf364 | 391 | unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); |
1da177e4 LT |
392 | if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { |
393 | /* | |
394 | * Set up BM-DMA capability | |
395 | * (PnP BIOS should have done this) | |
396 | */ | |
1da177e4 LT |
397 | pci_set_master(dev); |
398 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { | |
399 | printk(KERN_ERR "%s: %s error updating PCICMD\n", | |
400 | hwif->name, d->name); | |
401 | dma_base = 0; | |
402 | } | |
403 | } | |
404 | if (dma_base) { | |
405 | if (d->init_dma) { | |
406 | d->init_dma(hwif, dma_base); | |
407 | } else { | |
ecf32796 | 408 | ide_setup_dma(hwif, dma_base); |
1da177e4 LT |
409 | } |
410 | } else { | |
411 | printk(KERN_INFO "%s: %s Bus-Master DMA disabled " | |
412 | "(BIOS)\n", hwif->name, d->name); | |
413 | } | |
414 | } | |
039788e1 | 415 | } |
c413b9b9 | 416 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
1da177e4 LT |
417 | |
418 | /** | |
419 | * ide_setup_pci_controller - set up IDE PCI | |
420 | * @dev: PCI device | |
039788e1 | 421 | * @d: IDE port info |
1da177e4 LT |
422 | * @noisy: verbose flag |
423 | * @config: returned as 1 if we configured the hardware | |
424 | * | |
425 | * Set up the PCI and controller side of the IDE interface. This brings | |
426 | * up the PCI side of the device, checks that the device is enabled | |
427 | * and enables it if need be | |
428 | */ | |
039788e1 | 429 | |
85620436 | 430 | static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config) |
1da177e4 LT |
431 | { |
432 | int ret; | |
1da177e4 LT |
433 | u16 pcicmd; |
434 | ||
435 | if (noisy) | |
436 | ide_setup_pci_noise(dev, d); | |
437 | ||
438 | ret = ide_pci_enable(dev, d); | |
439 | if (ret < 0) | |
440 | goto out; | |
441 | ||
442 | ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); | |
443 | if (ret < 0) { | |
444 | printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); | |
445 | goto out; | |
446 | } | |
447 | if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ | |
448 | ret = ide_pci_configure(dev, d); | |
449 | if (ret < 0) | |
450 | goto out; | |
451 | *config = 1; | |
452 | printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); | |
453 | } | |
454 | ||
1da177e4 LT |
455 | out: |
456 | return ret; | |
457 | } | |
458 | ||
459 | /** | |
460 | * ide_pci_setup_ports - configure ports/devices on PCI IDE | |
461 | * @dev: PCI device | |
039788e1 | 462 | * @d: IDE port info |
1da177e4 | 463 | * @pciirq: IRQ line |
8447d9d5 | 464 | * @idx: ATA index table to update |
1da177e4 LT |
465 | * |
466 | * Scan the interfaces attached to this device and do any | |
467 | * necessary per port setup. Attach the devices and ask the | |
468 | * generic DMA layer to do its work for us. | |
469 | * | |
470 | * Normally called automaticall from do_ide_pci_setup_device, | |
471 | * but is also used directly as a helper function by some controllers | |
472 | * where the chipset setup is not the default PCI IDE one. | |
473 | */ | |
8447d9d5 | 474 | |
85620436 | 475 | void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx) |
1da177e4 | 476 | { |
a5d8c5c8 | 477 | int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; |
c413b9b9 | 478 | ide_hwif_t *hwif; |
1da177e4 LT |
479 | u8 tmp; |
480 | ||
1da177e4 LT |
481 | /* |
482 | * Set up the IDE ports | |
483 | */ | |
cf6e854e | 484 | |
a5d8c5c8 | 485 | for (port = 0; port < channels; ++port) { |
85620436 BZ |
486 | const ide_pci_enablebit_t *e = &(d->enablebits[port]); |
487 | ||
1da177e4 | 488 | if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || |
cf6e854e BZ |
489 | (tmp & e->mask) != e->val)) { |
490 | printk(KERN_INFO "%s: IDE port disabled\n", d->name); | |
1da177e4 | 491 | continue; /* port not enabled */ |
cf6e854e | 492 | } |
1da177e4 | 493 | |
1ebf7493 BZ |
494 | hwif = ide_hwif_configure(dev, d, port, pciirq); |
495 | if (hwif == NULL) | |
1da177e4 LT |
496 | continue; |
497 | ||
8447d9d5 | 498 | *(idx + port) = hwif->index; |
1ebf7493 | 499 | } |
1da177e4 LT |
500 | } |
501 | ||
502 | EXPORT_SYMBOL_GPL(ide_pci_setup_ports); | |
503 | ||
504 | /* | |
505 | * ide_setup_pci_device() looks at the primary/secondary interfaces | |
506 | * on a PCI IDE device and, if they are enabled, prepares the IDE driver | |
507 | * for use with them. This generic code works for most PCI chipsets. | |
508 | * | |
509 | * One thing that is not standardized is the location of the | |
510 | * primary/secondary interface "enable/disable" bits. For chipsets that | |
039788e1 | 511 | * we "know" about, this information is in the struct ide_port_info; |
1da177e4 LT |
512 | * for all other chipsets, we just assume both interfaces are enabled. |
513 | */ | |
039788e1 | 514 | static int do_ide_setup_pci_device(struct pci_dev *dev, |
85620436 | 515 | const struct ide_port_info *d, |
8447d9d5 | 516 | u8 *idx, u8 noisy) |
1da177e4 | 517 | { |
1da177e4 LT |
518 | int tried_config = 0; |
519 | int pciirq, ret; | |
520 | ||
521 | ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); | |
522 | if (ret < 0) | |
523 | goto out; | |
524 | ||
525 | /* | |
526 | * Can we trust the reported IRQ? | |
527 | */ | |
528 | pciirq = dev->irq; | |
529 | ||
530 | /* Is it an "IDE storage" device in non-PCI mode? */ | |
531 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { | |
532 | if (noisy) | |
533 | printk(KERN_INFO "%s: not 100%% native mode: " | |
534 | "will probe irqs later\n", d->name); | |
535 | /* | |
536 | * This allows offboard ide-pci cards the enable a BIOS, | |
537 | * verify interrupt settings of split-mirror pci-config | |
538 | * space, place chipset into init-mode, and/or preserve | |
539 | * an interrupt if the card is not native ide support. | |
540 | */ | |
541 | ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; | |
542 | if (ret < 0) | |
543 | goto out; | |
544 | pciirq = ret; | |
545 | } else if (tried_config) { | |
546 | if (noisy) | |
547 | printk(KERN_INFO "%s: will probe irqs later\n", d->name); | |
548 | pciirq = 0; | |
549 | } else if (!pciirq) { | |
550 | if (noisy) | |
551 | printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", | |
552 | d->name, pciirq); | |
553 | pciirq = 0; | |
554 | } else { | |
555 | if (d->init_chipset) { | |
556 | ret = d->init_chipset(dev, d->name); | |
557 | if (ret < 0) | |
558 | goto out; | |
559 | } | |
560 | if (noisy) | |
1da177e4 LT |
561 | printk(KERN_INFO "%s: 100%% native mode on irq %d\n", |
562 | d->name, pciirq); | |
1da177e4 LT |
563 | } |
564 | ||
565 | /* FIXME: silent failure can happen */ | |
566 | ||
8447d9d5 | 567 | ide_pci_setup_ports(dev, d, pciirq, idx); |
1da177e4 LT |
568 | out: |
569 | return ret; | |
570 | } | |
571 | ||
85620436 | 572 | int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 | 573 | { |
8447d9d5 | 574 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
1da177e4 LT |
575 | int ret; |
576 | ||
8447d9d5 | 577 | ret = do_ide_setup_pci_device(dev, d, &idx[0], 1); |
1da177e4 | 578 | |
8447d9d5 | 579 | if (ret >= 0) |
c413b9b9 | 580 | ide_device_add(idx, d); |
1da177e4 | 581 | |
1da177e4 LT |
582 | return ret; |
583 | } | |
584 | ||
585 | EXPORT_SYMBOL_GPL(ide_setup_pci_device); | |
586 | ||
587 | int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, | |
85620436 | 588 | const struct ide_port_info *d) |
1da177e4 LT |
589 | { |
590 | struct pci_dev *pdev[] = { dev1, dev2 }; | |
1da177e4 | 591 | int ret, i; |
8447d9d5 | 592 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
1da177e4 LT |
593 | |
594 | for (i = 0; i < 2; i++) { | |
8447d9d5 | 595 | ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i); |
1da177e4 LT |
596 | /* |
597 | * FIXME: Mom, mom, they stole me the helper function to undo | |
598 | * do_ide_setup_pci_device() on the first device! | |
599 | */ | |
600 | if (ret < 0) | |
601 | goto out; | |
602 | } | |
603 | ||
c413b9b9 | 604 | ide_device_add(idx, d); |
1da177e4 LT |
605 | out: |
606 | return ret; | |
607 | } | |
608 | ||
609 | EXPORT_SYMBOL_GPL(ide_setup_pci_devices); |