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1da177e4 LT |
1 | /* |
2 | * IDE tuning and bus mastering support for the CS5510/CS5520 | |
3 | * chipsets | |
4 | * | |
5 | * The CS5510/CS5520 are slightly unusual devices. Unlike the | |
6 | * typical IDE controllers they do bus mastering with the drive in | |
7 | * PIO mode and smarter silicon. | |
8 | * | |
9 | * The practical upshot of this is that we must always tune the | |
10 | * drive for the right PIO mode. We must also ignore all the blacklists | |
11 | * and the drive bus mastering DMA information. | |
12 | * | |
13 | * *** This driver is strictly experimental *** | |
14 | * | |
15 | * (c) Copyright Red Hat Inc 2002 | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify it | |
18 | * under the terms of the GNU General Public License as published by the | |
19 | * Free Software Foundation; either version 2, or (at your option) any | |
20 | * later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, but | |
23 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
25 | * General Public License for more details. | |
26 | * | |
27 | * For the avoidance of doubt the "preferred form" of this code is one which | |
28 | * is in an open non patent encumbered format. Where cryptographic key signing | |
29 | * forms part of the process of creating an executable the information | |
30 | * including keys needed to generate an equivalently functional executable | |
31 | * are deemed to be part of the source code. | |
32 | * | |
33 | */ | |
34 | ||
1da177e4 LT |
35 | #include <linux/module.h> |
36 | #include <linux/types.h> | |
37 | #include <linux/kernel.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/timer.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/blkdev.h> | |
43 | #include <linux/hdreg.h> | |
44 | ||
45 | #include <linux/interrupt.h> | |
46 | #include <linux/init.h> | |
47 | #include <linux/pci.h> | |
48 | #include <linux/ide.h> | |
49 | #include <linux/dma-mapping.h> | |
50 | ||
51 | #include <asm/io.h> | |
52 | #include <asm/irq.h> | |
53 | ||
54 | struct pio_clocks | |
55 | { | |
56 | int address; | |
57 | int assert; | |
58 | int recovery; | |
59 | }; | |
60 | ||
61 | static struct pio_clocks cs5520_pio_clocks[]={ | |
62 | {3, 6, 11}, | |
63 | {2, 5, 6}, | |
64 | {1, 4, 3}, | |
65 | {1, 3, 2}, | |
66 | {1, 2, 1} | |
67 | }; | |
68 | ||
8f4dd2e4 | 69 | static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 LT |
70 | { |
71 | ide_hwif_t *hwif = HWIF(drive); | |
72 | struct pci_dev *pdev = hwif->pci_dev; | |
1da177e4 | 73 | int controller = drive->dn > 1 ? 1 : 0; |
f212ff28 | 74 | |
1da177e4 LT |
75 | /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ |
76 | ||
77 | /* 8bit CAT/CRT - 8bit command timing for channel */ | |
78 | pci_write_config_byte(pdev, 0x62 + controller, | |
79 | (cs5520_pio_clocks[pio].recovery << 4) | | |
80 | (cs5520_pio_clocks[pio].assert)); | |
81 | ||
82 | /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */ | |
83 | ||
84 | /* FIXME: should these use address ? */ | |
85 | /* Data read timing */ | |
86 | pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1), | |
87 | (cs5520_pio_clocks[pio].recovery << 4) | | |
88 | (cs5520_pio_clocks[pio].assert)); | |
89 | /* Write command timing */ | |
90 | pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1), | |
91 | (cs5520_pio_clocks[pio].recovery << 4) | | |
92 | (cs5520_pio_clocks[pio].assert)); | |
326d72f4 | 93 | } |
26bcb879 | 94 | |
88b2b32b | 95 | static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed) |
1da177e4 | 96 | { |
8f4dd2e4 BZ |
97 | printk(KERN_ERR "cs55x0: bad ide timing.\n"); |
98 | ||
99 | cs5520_set_pio_mode(drive, 0); | |
1da177e4 LT |
100 | } |
101 | ||
1da177e4 LT |
102 | /* |
103 | * We wrap the DMA activate to set the vdma flag. This is needed | |
104 | * so that the IDE DMA layer issues PIO not DMA commands over the | |
105 | * DMA channel | |
aea5d375 BZ |
106 | * |
107 | * ATAPI is harder so disable it for now using IDE_HFLAG_NO_ATAPI_DMA | |
1da177e4 | 108 | */ |
aea5d375 BZ |
109 | |
110 | static void cs5520_dma_host_on(ide_drive_t *drive) | |
111 | { | |
112 | if (drive->using_dma) | |
113 | drive->vdma = 1; | |
114 | ||
115 | ide_dma_host_on(drive); | |
116 | } | |
117 | ||
118 | static void cs5520_dma_host_off(ide_drive_t *drive) | |
1da177e4 | 119 | { |
aea5d375 BZ |
120 | drive->vdma = 0; |
121 | ||
122 | ide_dma_host_off(drive); | |
1da177e4 LT |
123 | } |
124 | ||
125 | static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) | |
126 | { | |
26bcb879 | 127 | hwif->set_pio_mode = &cs5520_set_pio_mode; |
88b2b32b | 128 | hwif->set_dma_mode = &cs5520_set_dma_mode; |
1da177e4 | 129 | |
f0bb945c | 130 | if (hwif->dma_base == 0) |
1da177e4 | 131 | return; |
326d72f4 | 132 | |
aea5d375 BZ |
133 | hwif->dma_host_on = &cs5520_dma_host_on; |
134 | hwif->dma_host_off = &cs5520_dma_host_off; | |
1da177e4 LT |
135 | } |
136 | ||
137 | #define DECLARE_CS_DEV(name_str) \ | |
138 | { \ | |
139 | .name = name_str, \ | |
1da177e4 | 140 | .init_hwif = init_hwif_cs5520, \ |
0ae2e178 | 141 | .host_flags = IDE_HFLAG_ISA_PORTS | \ |
9ffcf364 | 142 | IDE_HFLAG_CS5520 | \ |
33c1002e | 143 | IDE_HFLAG_VDMA | \ |
7cab14a7 | 144 | IDE_HFLAG_NO_ATAPI_DMA | \ |
4db90a14 | 145 | IDE_HFLAG_ABUSE_SET_DMA_MODE |\ |
7cab14a7 | 146 | IDE_HFLAG_BOOTABLE, \ |
4099d143 | 147 | .pio_mask = ATA_PIO4, \ |
1da177e4 LT |
148 | } |
149 | ||
85620436 | 150 | static const struct ide_port_info cyrix_chipsets[] __devinitdata = { |
1da177e4 LT |
151 | /* 0 */ DECLARE_CS_DEV("Cyrix 5510"), |
152 | /* 1 */ DECLARE_CS_DEV("Cyrix 5520") | |
153 | }; | |
154 | ||
155 | /* | |
156 | * The 5510/5520 are a bit weird. They don't quite set up the way | |
157 | * the PCI helper layer expects so we must do much of the set up | |
158 | * work longhand. | |
159 | */ | |
160 | ||
161 | static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
162 | { | |
85620436 | 163 | const struct ide_port_info *d = &cyrix_chipsets[id->driver_data]; |
8447d9d5 | 164 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
1da177e4 LT |
165 | |
166 | ide_setup_pci_noise(dev, d); | |
167 | ||
168 | /* We must not grab the entire device, it has 'ISA' space in its | |
169 | BARS too and we will freak out other bits of the kernel */ | |
1e39dead | 170 | if (pci_enable_device_bars(dev, 1<<2)) { |
1da177e4 | 171 | printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name); |
1e39dead | 172 | return -ENODEV; |
1da177e4 LT |
173 | } |
174 | pci_set_master(dev); | |
175 | if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) { | |
176 | printk(KERN_WARNING "cs5520: No suitable DMA available.\n"); | |
177 | return -ENODEV; | |
178 | } | |
179 | ||
1da177e4 LT |
180 | /* |
181 | * Now the chipset is configured we can let the core | |
182 | * do all the device setup for us | |
183 | */ | |
184 | ||
8447d9d5 | 185 | ide_pci_setup_ports(dev, d, 14, &idx[0]); |
5cbf79cd | 186 | |
8447d9d5 | 187 | ide_device_add(idx); |
5cbf79cd | 188 | |
1da177e4 LT |
189 | return 0; |
190 | } | |
191 | ||
9cbcc5e3 BZ |
192 | static const struct pci_device_id cs5520_pci_tbl[] = { |
193 | { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 }, | |
194 | { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 }, | |
1da177e4 LT |
195 | { 0, }, |
196 | }; | |
197 | MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl); | |
198 | ||
199 | static struct pci_driver driver = { | |
200 | .name = "Cyrix_IDE", | |
201 | .id_table = cs5520_pci_tbl, | |
202 | .probe = cs5520_init_one, | |
203 | }; | |
204 | ||
82ab1eec | 205 | static int __init cs5520_ide_init(void) |
1da177e4 LT |
206 | { |
207 | return ide_pci_register_driver(&driver); | |
208 | } | |
209 | ||
210 | module_init(cs5520_ide_init); | |
211 | ||
212 | MODULE_AUTHOR("Alan Cox"); | |
213 | MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE"); | |
214 | MODULE_LICENSE("GPL"); |