ide: separate PCI specific init from generic init in ide_pci_setup_ports()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ide / legacy / ali14xx.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1996 Linus Torvalds & author (see below)
3 */
4
5/*
6 * ALI M14xx chipset EIDE controller
7 *
8 * Works for ALI M1439/1443/1445/1487/1489 chipsets.
9 *
10 * Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
11 * Derek's notes follow:
12 *
13 * I think the code should be pretty understandable,
14 * but I'll be happy to (try to) answer questions.
15 *
16 * The critical part is in the setupDrive function. The initRegisters
17 * function doesn't seem to be necessary, but the DOS driver does it, so
18 * I threw it in.
19 *
20 * I've only tested this on my system, which only has one disk. I posted
21 * it to comp.sys.linux.hardware, so maybe some other people will try it
22 * out.
23 *
24 * Derek Noonburg (derekn@ece.cmu.edu)
25 * 95-sep-26
26 *
27 * Update 96-jul-13:
28 *
29 * I've since upgraded to two disks and a CD-ROM, with no trouble, and
30 * I've also heard from several others who have used it successfully.
31 * This driver appears to work with both the 1443/1445 and the 1487/1489
32 * chipsets. I've added support for PIO mode 4 for the 1487. This
33 * seems to work just fine on the 1443 also, although I'm not sure it's
34 * advertised as supporting mode 4. (I've been running a WDC AC21200 in
35 * mode 4 for a while now with no trouble.) -Derek
36 */
37
1da177e4 38#include <linux/module.h>
1da177e4
LT
39#include <linux/types.h>
40#include <linux/kernel.h>
41#include <linux/delay.h>
42#include <linux/timer.h>
43#include <linux/mm.h>
44#include <linux/ioport.h>
45#include <linux/blkdev.h>
46#include <linux/hdreg.h>
47#include <linux/ide.h>
48#include <linux/init.h>
49
50#include <asm/io.h>
51
52/* port addresses for auto-detection */
53#define ALI_NUM_PORTS 4
498f26b4
BZ
54static const int ports[ALI_NUM_PORTS] __initdata =
55 { 0x074, 0x0f4, 0x034, 0x0e4 };
1da177e4
LT
56
57/* register initialization data */
58typedef struct { u8 reg, data; } RegInitializer;
59
498f26b4 60static const RegInitializer initData[] __initdata = {
1da177e4
LT
61 {0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
62 {0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
63 {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
64 {0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
65 {0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
66 {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
67 {0x35, 0x03}, {0x00, 0x00}
68};
69
1da177e4
LT
70/* timing parameter registers for each drive */
71static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
72 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
73 {0x05, 0x28, 0x06, 0x29}, /* drive 1 */
74 {0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
75 {0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
76};
77
78static int basePort; /* base port address */
79static int regPort; /* port for register number */
80static int dataPort; /* port for register data */
81static u8 regOn; /* output to base port to access registers */
82static u8 regOff; /* output to base port to close registers */
83
84/*------------------------------------------------------------------------*/
85
86/*
87 * Read a controller register.
88 */
89static inline u8 inReg (u8 reg)
90{
91 outb_p(reg, regPort);
92 return inb(dataPort);
93}
94
95/*
96 * Write a controller register.
97 */
98static void outReg (u8 data, u8 reg)
99{
100 outb_p(reg, regPort);
101 outb_p(data, dataPort);
102}
103
2047e15b
BZ
104static DEFINE_SPINLOCK(ali14xx_lock);
105
1da177e4
LT
106/*
107 * Set PIO mode for the specified drive.
108 * This function computes timing parameters
109 * and sets controller registers accordingly.
110 */
26bcb879 111static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4
LT
112{
113 int driveNum;
114 int time1, time2;
115 u8 param1, param2, param3, param4;
116 unsigned long flags;
1da177e4
LT
117 int bus_speed = system_bus_clock();
118
1da177e4 119 /* calculate timing, according to PIO mode */
7dd00083 120 time1 = ide_pio_cycle_time(drive, pio);
1da177e4
LT
121 time2 = ide_pio_timings[pio].active_time;
122 param3 = param1 = (time2 * bus_speed + 999) / 1000;
123 param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
124 if (pio < 3) {
125 param3 += 8;
126 param4 += 8;
127 }
128 printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
129 drive->name, pio, time1, time2, param1, param2, param3, param4);
130
131 /* stuff timing parameters into controller registers */
132 driveNum = (HWIF(drive)->index << 1) + drive->select.b.unit;
2047e15b 133 spin_lock_irqsave(&ali14xx_lock, flags);
1da177e4
LT
134 outb_p(regOn, basePort);
135 outReg(param1, regTab[driveNum].reg1);
136 outReg(param2, regTab[driveNum].reg2);
137 outReg(param3, regTab[driveNum].reg3);
138 outReg(param4, regTab[driveNum].reg4);
139 outb_p(regOff, basePort);
2047e15b 140 spin_unlock_irqrestore(&ali14xx_lock, flags);
1da177e4
LT
141}
142
143/*
144 * Auto-detect the IDE controller port.
145 */
146static int __init findPort (void)
147{
148 int i;
149 u8 t;
150 unsigned long flags;
151
152 local_irq_save(flags);
153 for (i = 0; i < ALI_NUM_PORTS; ++i) {
154 basePort = ports[i];
155 regOff = inb(basePort);
156 for (regOn = 0x30; regOn <= 0x33; ++regOn) {
157 outb_p(regOn, basePort);
158 if (inb(basePort) == regOn) {
159 regPort = basePort + 4;
160 dataPort = basePort + 8;
161 t = inReg(0) & 0xf0;
162 outb_p(regOff, basePort);
163 local_irq_restore(flags);
164 if (t != 0x50)
165 return 0;
166 return 1; /* success */
167 }
168 }
169 outb_p(regOff, basePort);
170 }
171 local_irq_restore(flags);
172 return 0;
173}
174
175/*
176 * Initialize controller registers with default values.
177 */
178static int __init initRegisters (void) {
498f26b4 179 const RegInitializer *p;
1da177e4
LT
180 u8 t;
181 unsigned long flags;
182
183 local_irq_save(flags);
184 outb_p(regOn, basePort);
185 for (p = initData; p->reg != 0; ++p)
186 outReg(p->data, p->reg);
187 outb_p(0x01, regPort);
188 t = inb(regPort) & 0x01;
189 outb_p(regOff, basePort);
190 local_irq_restore(flags);
191 return t;
192}
193
194static int __init ali14xx_probe(void)
195{
196 ide_hwif_t *hwif, *mate;
8447d9d5 197 static u8 idx[4] = { 0, 1, 0xff, 0xff };
1da177e4
LT
198
199 printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
200 basePort, regOn);
201
202 /* initialize controller registers */
203 if (!initRegisters()) {
204 printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
205 return 1;
206 }
207
208 hwif = &ide_hwifs[0];
209 mate = &ide_hwifs[1];
210
211 hwif->chipset = ide_ali14xx;
4099d143 212 hwif->pio_mask = ATA_PIO4;
26bcb879 213 hwif->set_pio_mode = &ali14xx_set_pio_mode;
1da177e4
LT
214 hwif->mate = mate;
215
216 mate->chipset = ide_ali14xx;
4099d143 217 mate->pio_mask = ATA_PIO4;
26bcb879 218 mate->set_pio_mode = &ali14xx_set_pio_mode;
1da177e4
LT
219 mate->mate = hwif;
220 mate->channel = 1;
221
8447d9d5 222 ide_device_add(idx);
1da177e4
LT
223
224 return 0;
225}
226
84913882
BZ
227int probe_ali14xx = 0;
228
229module_param_named(probe, probe_ali14xx, bool, 0);
230MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
231
ade2daf9 232static int __init ali14xx_init(void)
1da177e4 233{
84913882
BZ
234 if (probe_ali14xx == 0)
235 goto out;
236
1da177e4
LT
237 /* auto-detect IDE controller port */
238 if (findPort()) {
239 if (ali14xx_probe())
240 return -ENODEV;
241 return 0;
242 }
243 printk(KERN_ERR "ali14xx: not found.\n");
84913882 244out:
1da177e4
LT
245 return -ENODEV;
246}
247
1da177e4 248module_init(ali14xx_init);
1da177e4
LT
249
250MODULE_AUTHOR("see local file");
251MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
252MODULE_LICENSE("GPL");