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Merge branch 'for-2.6.21' of master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ide / ide-iops.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003
3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
6 *
7 */
8
1da177e4
LT		 9#include <linux/module.h>
10#include <linux/types.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/timer.h>
14#include <linux/mm.h>
15#include <linux/interrupt.h>
16#include <linux/major.h>
17#include <linux/errno.h>
18#include <linux/genhd.h>
19#include <linux/blkpg.h>
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <linux/delay.h>
23#include <linux/hdreg.h>
24#include <linux/ide.h>
25#include <linux/bitops.h>
1e86240f 26#include <linux/nmi.h>
1da177e4
LT		 27
28#include <asm/byteorder.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/io.h>
32
33/*
34 * Conventional PIO operations for ATA devices
35 */
36
37static u8 ide_inb (unsigned long port)
38{
39 return (u8) inb(port);
40}
41
42static u16 ide_inw (unsigned long port)
43{
44 return (u16) inw(port);
45}
46
47static void ide_insw (unsigned long port, void *addr, u32 count)
48{
49 insw(port, addr, count);
50}
51
1da177e4
LT		 52static void ide_insl (unsigned long port, void *addr, u32 count)
53{
54 insl(port, addr, count);
55}
56
57static void ide_outb (u8 val, unsigned long port)
58{
59 outb(val, port);
60}
61
62static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
63{
64 outb(addr, port);
65}
66
67static void ide_outw (u16 val, unsigned long port)
68{
69 outw(val, port);
70}
71
72static void ide_outsw (unsigned long port, void *addr, u32 count)
73{
74 outsw(port, addr, count);
75}
76
1da177e4
LT		 77static void ide_outsl (unsigned long port, void *addr, u32 count)
78{
79 outsl(port, addr, count);
80}
81
82void default_hwif_iops (ide_hwif_t *hwif)
83{
84 hwif->OUTB = ide_outb;
85 hwif->OUTBSYNC = ide_outbsync;
86 hwif->OUTW = ide_outw;
1da177e4
LT		 87 hwif->OUTSW = ide_outsw;
88 hwif->OUTSL = ide_outsl;
89 hwif->INB = ide_inb;
90 hwif->INW = ide_inw;
1da177e4
LT		 91 hwif->INSW = ide_insw;
92 hwif->INSL = ide_insl;
93}
94
1da177e4
LT		 95/*
96 * MMIO operations, typically used for SATA controllers
97 */
98
99static u8 ide_mm_inb (unsigned long port)
100{
101 return (u8) readb((void __iomem *) port);
102}
103
104static u16 ide_mm_inw (unsigned long port)
105{
106 return (u16) readw((void __iomem *) port);
107}
108
109static void ide_mm_insw (unsigned long port, void *addr, u32 count)
110{
111 __ide_mm_insw((void __iomem *) port, addr, count);
112}
113
1da177e4
LT		 114static void ide_mm_insl (unsigned long port, void *addr, u32 count)
115{
116 __ide_mm_insl((void __iomem *) port, addr, count);
117}
118
119static void ide_mm_outb (u8 value, unsigned long port)
120{
121 writeb(value, (void __iomem *) port);
122}
123
124static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
125{
126 writeb(value, (void __iomem *) port);
127}
128
129static void ide_mm_outw (u16 value, unsigned long port)
130{
131 writew(value, (void __iomem *) port);
132}
133
134static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
135{
136 __ide_mm_outsw((void __iomem *) port, addr, count);
137}
138
1da177e4
LT		 139static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
140{
141 __ide_mm_outsl((void __iomem *) port, addr, count);
142}
143
144void default_hwif_mmiops (ide_hwif_t *hwif)
145{
146 hwif->OUTB = ide_mm_outb;
147 /* Most systems will need to override OUTBSYNC, alas however
148 this one is controller specific! */
149 hwif->OUTBSYNC = ide_mm_outbsync;
150 hwif->OUTW = ide_mm_outw;
1da177e4
LT		 151 hwif->OUTSW = ide_mm_outsw;
152 hwif->OUTSL = ide_mm_outsl;
153 hwif->INB = ide_mm_inb;
154 hwif->INW = ide_mm_inw;
1da177e4
LT		 155 hwif->INSW = ide_mm_insw;
156 hwif->INSL = ide_mm_insl;
157}
158
159EXPORT_SYMBOL(default_hwif_mmiops);
160
161u32 ide_read_24 (ide_drive_t *drive)
162{
163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
166 return (hcyl<<16)|(lcyl<<8)|sect;
167}
168
169void SELECT_DRIVE (ide_drive_t *drive)
170{
171 if (HWIF(drive)->selectproc)
172 HWIF(drive)->selectproc(drive);
173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
174}
175
176EXPORT_SYMBOL(SELECT_DRIVE);
177
178void SELECT_INTERRUPT (ide_drive_t *drive)
179{
180 if (HWIF(drive)->intrproc)
181 HWIF(drive)->intrproc(drive);
182 else
183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
184}
185
186void SELECT_MASK (ide_drive_t *drive, int mask)
187{
188 if (HWIF(drive)->maskproc)
189 HWIF(drive)->maskproc(drive, mask);
190}
191
192void QUIRK_LIST (ide_drive_t *drive)
193{
194 if (HWIF(drive)->quirkproc)
195 drive->quirk_list = HWIF(drive)->quirkproc(drive);
196}
197
198/*
199 * Some localbus EIDE interfaces require a special access sequence
200 * when using 32-bit I/O instructions to transfer data. We call this
201 * the "vlb_sync" sequence, which consists of three successive reads
202 * of the sector count register location, with interrupts disabled
203 * to ensure that the reads all happen together.
204 */
205static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
206{
207 (void) HWIF(drive)->INB(port);
208 (void) HWIF(drive)->INB(port);
209 (void) HWIF(drive)->INB(port);
210}
211
212/*
213 * This is used for most PIO data transfers *from* the IDE interface
214 */
215static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
216{
217 ide_hwif_t *hwif = HWIF(drive);
218 u8 io_32bit = drive->io_32bit;
219
220 if (io_32bit) {
221 if (io_32bit & 2) {
222 unsigned long flags;
223 local_irq_save(flags);
224 ata_vlb_sync(drive, IDE_NSECTOR_REG);
225 hwif->INSL(IDE_DATA_REG, buffer, wcount);
226 local_irq_restore(flags);
227 } else
228 hwif->INSL(IDE_DATA_REG, buffer, wcount);
229 } else {
230 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
231 }
232}
233
234/*
235 * This is used for most PIO data transfers *to* the IDE interface
236 */
237static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
238{
239 ide_hwif_t *hwif = HWIF(drive);
240 u8 io_32bit = drive->io_32bit;
241
242 if (io_32bit) {
243 if (io_32bit & 2) {
244 unsigned long flags;
245 local_irq_save(flags);
246 ata_vlb_sync(drive, IDE_NSECTOR_REG);
247 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
248 local_irq_restore(flags);
249 } else
250 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
251 } else {
252 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
253 }
254}
255
256/*
257 * The following routines are mainly used by the ATAPI drivers.
258 *
259 * These routines will round up any request for an odd number of bytes,
260 * so if an odd bytecount is specified, be sure that there's at least one
261 * extra byte allocated for the buffer.
262 */
263
264static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
265{
266 ide_hwif_t *hwif = HWIF(drive);
267
268 ++bytecount;
269#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
270 if (MACH_IS_ATARI || MACH_IS_Q40) {
271 /* Atari has a byte-swapped IDE interface */
272 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
273 return;
274 }
275#endif /* CONFIG_ATARI || CONFIG_Q40 */
276 hwif->ata_input_data(drive, buffer, bytecount / 4);
277 if ((bytecount & 0x03) >= 2)
278 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
279}
280
281static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
282{
283 ide_hwif_t *hwif = HWIF(drive);
284
285 ++bytecount;
286#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
287 if (MACH_IS_ATARI || MACH_IS_Q40) {
288 /* Atari has a byte-swapped IDE interface */
289 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
290 return;
291 }
292#endif /* CONFIG_ATARI || CONFIG_Q40 */
293 hwif->ata_output_data(drive, buffer, bytecount / 4);
294 if ((bytecount & 0x03) >= 2)
295 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
296}
297
298void default_hwif_transport(ide_hwif_t *hwif)
299{
300 hwif->ata_input_data = ata_input_data;
301 hwif->ata_output_data = ata_output_data;
302 hwif->atapi_input_bytes = atapi_input_bytes;
303 hwif->atapi_output_bytes = atapi_output_bytes;
304}
305
1da177e4
LT		 306/*
307 * Beginning of Taskfile OPCODE Library and feature sets.
308 */
309void ide_fix_driveid (struct hd_driveid *id)
310{
311#ifndef __LITTLE_ENDIAN
312# ifdef __BIG_ENDIAN
313 int i;
314 u16 *stringcast;
315
316 id->config = __le16_to_cpu(id->config);
317 id->cyls = __le16_to_cpu(id->cyls);
318 id->reserved2 = __le16_to_cpu(id->reserved2);
319 id->heads = __le16_to_cpu(id->heads);
320 id->track_bytes = __le16_to_cpu(id->track_bytes);
321 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
322 id->sectors = __le16_to_cpu(id->sectors);
323 id->vendor0 = __le16_to_cpu(id->vendor0);
324 id->vendor1 = __le16_to_cpu(id->vendor1);
325 id->vendor2 = __le16_to_cpu(id->vendor2);
326 stringcast = (u16 *)&id->serial_no[0];
327 for (i = 0; i < (20/2); i++)
328 stringcast[i] = __le16_to_cpu(stringcast[i]);
329 id->buf_type = __le16_to_cpu(id->buf_type);
330 id->buf_size = __le16_to_cpu(id->buf_size);
331 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
332 stringcast = (u16 *)&id->fw_rev[0];
333 for (i = 0; i < (8/2); i++)
334 stringcast[i] = __le16_to_cpu(stringcast[i]);
335 stringcast = (u16 *)&id->model[0];
336 for (i = 0; i < (40/2); i++)
337 stringcast[i] = __le16_to_cpu(stringcast[i]);
338 id->dword_io = __le16_to_cpu(id->dword_io);
339 id->reserved50 = __le16_to_cpu(id->reserved50);
340 id->field_valid = __le16_to_cpu(id->field_valid);
341 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
342 id->cur_heads = __le16_to_cpu(id->cur_heads);
343 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
344 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
345 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
346 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
347 id->dma_1word = __le16_to_cpu(id->dma_1word);
348 id->dma_mword = __le16_to_cpu(id->dma_mword);
349 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
350 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
351 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
352 id->eide_pio = __le16_to_cpu(id->eide_pio);
353 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
354 for (i = 0; i < 2; ++i)
355 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
356 for (i = 0; i < 4; ++i)
357 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
358 id->queue_depth = __le16_to_cpu(id->queue_depth);
359 for (i = 0; i < 4; ++i)
360 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
361 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
362 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
363 id->command_set_1 = __le16_to_cpu(id->command_set_1);
364 id->command_set_2 = __le16_to_cpu(id->command_set_2);
365 id->cfsse = __le16_to_cpu(id->cfsse);
366 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
367 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
368 id->csf_default = __le16_to_cpu(id->csf_default);
369 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
370 id->trseuc = __le16_to_cpu(id->trseuc);
371 id->trsEuc = __le16_to_cpu(id->trsEuc);
372 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
373 id->mprc = __le16_to_cpu(id->mprc);
374 id->hw_config = __le16_to_cpu(id->hw_config);
375 id->acoustic = __le16_to_cpu(id->acoustic);
376 id->msrqs = __le16_to_cpu(id->msrqs);
377 id->sxfert = __le16_to_cpu(id->sxfert);
378 id->sal = __le16_to_cpu(id->sal);
379 id->spg = __le32_to_cpu(id->spg);
380 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
381 for (i = 0; i < 22; i++)
382 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
383 id->last_lun = __le16_to_cpu(id->last_lun);
384 id->word127 = __le16_to_cpu(id->word127);
385 id->dlf = __le16_to_cpu(id->dlf);
386 id->csfo = __le16_to_cpu(id->csfo);
387 for (i = 0; i < 26; i++)
388 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
389 id->word156 = __le16_to_cpu(id->word156);
390 for (i = 0; i < 3; i++)
391 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
392 id->cfa_power = __le16_to_cpu(id->cfa_power);
393 for (i = 0; i < 14; i++)
394 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
395 for (i = 0; i < 31; i++)
396 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
397 for (i = 0; i < 48; i++)
398 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
399 id->integrity_word = __le16_to_cpu(id->integrity_word);
400# else
401# error "Please fix <asm/byteorder.h>"
402# endif
403#endif
404}
405
406/* FIXME: exported for use by the USB storage (isd200.c) code only */
407EXPORT_SYMBOL(ide_fix_driveid);
408
409void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
410{
411 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
412
413 if (byteswap) {
414 /* convert from big-endian to host byte order */
415 for (p = end ; p != s;) {
416 unsigned short *pp = (unsigned short *) (p -= 2);
417 *pp = ntohs(*pp);
418 }
419 }
420 /* strip leading blanks */
421 while (s != end && *s == ' ')
422 ++s;
423 /* compress internal blanks and strip trailing blanks */
424 while (s != end && *s) {
425 if (*s++ != ' ' || (s != end && *s && *s != ' '))
426 *p++ = *(s-1);
427 }
428 /* wipe out trailing garbage */
429 while (p != end)
430 *p++ = '\0';
431}
432
433EXPORT_SYMBOL(ide_fixstring);
434
435/*
436 * Needed for PCI irq sharing
437 */
438int drive_is_ready (ide_drive_t *drive)
439{
440 ide_hwif_t *hwif = HWIF(drive);
441 u8 stat = 0;
442
443 if (drive->waiting_for_dma)
444 return hwif->ide_dma_test_irq(drive);
445
446#if 0
447 /* need to guarantee 400ns since last command was issued */
448 udelay(1);
449#endif
450
451#ifdef CONFIG_IDEPCI_SHARE_IRQ
452 /*
453 * We do a passive status test under shared PCI interrupts on
454 * cards that truly share the ATA side interrupt, but may also share
455 * an interrupt with another pci card/device. We make no assumptions
456 * about possible isa-pnp and pci-pnp issues yet.
457 */
458 if (IDE_CONTROL_REG)
459 stat = hwif->INB(IDE_ALTSTATUS_REG);
460 else
461#endif /* CONFIG_IDEPCI_SHARE_IRQ */
462 /* Note: this may clear a pending IRQ!! */
463 stat = hwif->INB(IDE_STATUS_REG);
464
465 if (stat & BUSY_STAT)
466 /* drive busy: definitely not interrupting */
467 return 0;
468
469 /* drive ready: *might* be interrupting */
470 return 1;
471}
472
473EXPORT_SYMBOL(drive_is_ready);
474
475/*
476 * Global for All, and taken from ide-pmac.c. Can be called
477 * with spinlock held & IRQs disabled, so don't schedule !
478 */
479int wait_for_ready (ide_drive_t *drive, int timeout)
480{
481 ide_hwif_t *hwif = HWIF(drive);
482 u8 stat = 0;
483
484 while(--timeout) {
485 stat = hwif->INB(IDE_STATUS_REG);
486 if (!(stat & BUSY_STAT)) {
487 if (drive->ready_stat == 0)
488 break;
489 else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
490 break;
491 }
492 mdelay(1);
493 }
494 if ((stat & ERR_STAT) || timeout <= 0) {
495 if (stat & ERR_STAT) {
496 printk(KERN_ERR "%s: wait_for_ready, "
497 "error status: %x\n", drive->name, stat);
498 }
499 return 1;
500 }
501 return 0;
502}
503
1da177e4
LT		 504/*
505 * This routine busy-waits for the drive status to be not "busy".
506 * It then checks the status for all of the "good" bits and none
507 * of the "bad" bits, and if all is okay it returns 0. All other
508 * cases return 1 after invoking ide_error() -- caller should just return.
509 *
510 * This routine should get fixed to not hog the cpu during extra long waits..
511 * That could be done by busy-waiting for the first jiffy or two, and then
512 * setting a timer to wake up at half second intervals thereafter,
513 * until timeout is achieved, before timing out.
514 */
515int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
516{
517 ide_hwif_t *hwif = HWIF(drive);
518 u8 stat;
519 int i;
520 unsigned long flags;
521
522 /* bail early if we've exceeded max_failures */
523 if (drive->max_failures && (drive->failures > drive->max_failures)) {
524 *startstop = ide_stopped;
525 return 1;
526 }
527
528 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
529 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
530 local_irq_set(flags);
531 timeout += jiffies;
532 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
533 if (time_after(jiffies, timeout)) {
534 /*
535 * One last read after the timeout in case
536 * heavy interrupt load made us not make any
537 * progress during the timeout..
538 */
539 stat = hwif->INB(IDE_STATUS_REG);
540 if (!(stat & BUSY_STAT))
541 break;
542
543 local_irq_restore(flags);
544 *startstop = ide_error(drive, "status timeout", stat);
545 return 1;
546 }
547 }
548 local_irq_restore(flags);
549 }
550 /*
551 * Allow status to settle, then read it again.
552 * A few rare drives vastly violate the 400ns spec here,
553 * so we'll wait up to 10usec for a "good" status
554 * rather than expensively fail things immediately.
555 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
556 */
557 for (i = 0; i < 10; i++) {
558 udelay(1);
559 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
560 return 0;
561 }
562 *startstop = ide_error(drive, "status error", stat);
563 return 1;
564}
565
566EXPORT_SYMBOL(ide_wait_stat);
567
568/*
569 * All hosts that use the 80c ribbon must use!
570 * The name is derived from upper byte of word 93 and the 80c ribbon.
571 */
572u8 eighty_ninty_three (ide_drive_t *drive)
573{
d7d7634c
AC		 574 if(HWIF(drive)->udma_four == 0)
575 return 0;
1a1276e7
AC		 576
577 /* Check for SATA but only if we are ATA5 or higher */
578 if (drive->id->hw_config == 0 && (drive->id->major_rev_num & 0x7FE0))
579 return 1;
d7d7634c 580 if (!(drive->id->hw_config & 0x6000))
1da177e4 581 return 0;
1da177e4 582#ifndef CONFIG_IDEDMA_IVB
d7d7634c
AC		 583 if(!(drive->id->hw_config & 0x4000))
584 return 0;
1da177e4 585#endif /* CONFIG_IDEDMA_IVB */
f68d9320
BZ		 586 /*
587 * FIXME:
588 * - change master/slave IDENTIFY order
589 * - force bit13 (80c cable present) check
590 * (unless the slave device is pre-ATA3)
591 */
d7d7634c 592 return 1;
1da177e4
LT		 593}
594
595EXPORT_SYMBOL(eighty_ninty_three);
596
597int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
598{
599 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
600 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
601 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
602#ifndef CONFIG_IDEDMA_IVB
603 if ((drive->id->hw_config & 0x6000) == 0) {
604#else /* !CONFIG_IDEDMA_IVB */
605 if (((drive->id->hw_config & 0x2000) == 0) ||
606 ((drive->id->hw_config & 0x4000) == 0)) {
607#endif /* CONFIG_IDEDMA_IVB */
608 printk("%s: Speed warnings UDMA 3/4/5 is not "
609 "functional.\n", drive->name);
610 return 1;
611 }
612 if (!HWIF(drive)->udma_four) {
613 printk("%s: Speed warnings UDMA 3/4/5 is not "
614 "functional.\n",
615 HWIF(drive)->name);
616 return 1;
617 }
618 }
619 return 0;
620}
621
622/*
623 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
624 * 1 : Safe to update drive->id DMA registers.
625 * 0 : OOPs not allowed.
626 */
627int set_transfer (ide_drive_t *drive, ide_task_t *args)
628{
629 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
630 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
631 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
632 (drive->id->dma_ultra ||
633 drive->id->dma_mword ||
634 drive->id->dma_1word))
635 return 1;
636
637 return 0;
638}
639
640#ifdef CONFIG_BLK_DEV_IDEDMA
641static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
642{
643 if (!drive->crc_count)
644 return drive->current_speed;
645 drive->crc_count = 0;
646
647 switch(drive->current_speed) {
648 case XFER_UDMA_7: return XFER_UDMA_6;
649 case XFER_UDMA_6: return XFER_UDMA_5;
650 case XFER_UDMA_5: return XFER_UDMA_4;
651 case XFER_UDMA_4: return XFER_UDMA_3;
652 case XFER_UDMA_3: return XFER_UDMA_2;
653 case XFER_UDMA_2: return XFER_UDMA_1;
654 case XFER_UDMA_1: return XFER_UDMA_0;
655 /*
656 * OOPS we do not goto non Ultra DMA modes
657 * without iCRC's available we force
658 * the system to PIO and make the user
659 * invoke the ATA-1 ATA-2 DMA modes.
660 */
661 case XFER_UDMA_0:
662 default: return XFER_PIO_4;
663 }
664}
665#endif /* CONFIG_BLK_DEV_IDEDMA */
666
667/*
668 * Update the
669 */
670int ide_driveid_update (ide_drive_t *drive)
671{
672 ide_hwif_t *hwif = HWIF(drive);
673 struct hd_driveid *id;
674#if 0
675 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
676 if (!id)
677 return 0;
678
679 taskfile_lib_get_identify(drive, (char *)&id);
680
681 ide_fix_driveid(id);
682 if (id) {
683 drive->id->dma_ultra = id->dma_ultra;
684 drive->id->dma_mword = id->dma_mword;
685 drive->id->dma_1word = id->dma_1word;
686 /* anything more ? */
687 kfree(id);
688 }
689 return 1;
690#else
691 /*
692 * Re-read drive->id for possible DMA mode
693 * change (copied from ide-probe.c)
694 */
695 unsigned long timeout, flags;
696
697 SELECT_MASK(drive, 1);
698 if (IDE_CONTROL_REG)
699 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
700 msleep(50);
701 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
702 timeout = jiffies + WAIT_WORSTCASE;
703 do {
704 if (time_after(jiffies, timeout)) {
705 SELECT_MASK(drive, 0);
706 return 0; /* drive timed-out */
707 }
708 msleep(50); /* give drive a breather */
709 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
710 msleep(50); /* wait for IRQ and DRQ_STAT */
711 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
712 SELECT_MASK(drive, 0);
713 printk("%s: CHECK for good STATUS\n", drive->name);
714 return 0;
715 }
716 local_irq_save(flags);
717 SELECT_MASK(drive, 0);
718 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
719 if (!id) {
720 local_irq_restore(flags);
721 return 0;
722 }
723 ata_input_data(drive, id, SECTOR_WORDS);
724 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
725 local_irq_enable();
726 local_irq_restore(flags);
727 ide_fix_driveid(id);
728 if (id) {
729 drive->id->dma_ultra = id->dma_ultra;
730 drive->id->dma_mword = id->dma_mword;
731 drive->id->dma_1word = id->dma_1word;
732 /* anything more ? */
733 kfree(id);
734 }
735
736 return 1;
737#endif
738}
739
740/*
741 * Similar to ide_wait_stat(), except it never calls ide_error internally.
742 * This is a kludge to handle the new ide_config_drive_speed() function,
743 * and should not otherwise be used anywhere. Eventually, the tuneproc's
744 * should be updated to return ide_startstop_t, in which case we can get
745 * rid of this abomination again. :) -ml
746 *
747 * It is gone..........
748 *
749 * const char *msg == consider adding for verbose errors.
750 */
751int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
752{
753 ide_hwif_t *hwif = HWIF(drive);
754 int i, error = 1;
755 u8 stat;
756
757// while (HWGROUP(drive)->busy)
758// msleep(50);
759
760#ifdef CONFIG_BLK_DEV_IDEDMA
761 if (hwif->ide_dma_check) /* check if host supports DMA */
7469aaf6 762 hwif->dma_host_off(drive);
1da177e4
LT		 763#endif
764
765 /*
766 * Don't use ide_wait_cmd here - it will
767 * attempt to set_geometry and recalibrate,
768 * but for some reason these don't work at
769 * this point (lost interrupt).
770 */
771 /*
772 * Select the drive, and issue the SETFEATURES command
773 */
774 disable_irq_nosync(hwif->irq);
775
776 /*
777 * FIXME: we race against the running IRQ here if
778 * this is called from non IRQ context. If we use
779 * disable_irq() we hang on the error path. Work
780 * is needed.
781 */
782
783 udelay(1);
784 SELECT_DRIVE(drive);
785 SELECT_MASK(drive, 0);
786 udelay(1);
787 if (IDE_CONTROL_REG)
788 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
789 hwif->OUTB(speed, IDE_NSECTOR_REG);
790 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
791 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
792 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
793 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
794 udelay(1);
795 /*
796 * Wait for drive to become non-BUSY
797 */
798 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
799 unsigned long flags, timeout;
800 local_irq_set(flags);
801 timeout = jiffies + WAIT_CMD;
802 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
803 if (time_after(jiffies, timeout))
804 break;
805 }
806 local_irq_restore(flags);
807 }
808
809 /*
810 * Allow status to settle, then read it again.
811 * A few rare drives vastly violate the 400ns spec here,
812 * so we'll wait up to 10usec for a "good" status
813 * rather than expensively fail things immediately.
814 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
815 */
816 for (i = 0; i < 10; i++) {
817 udelay(1);
818 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
819 error = 0;
820 break;
821 }
822 }
823
824 SELECT_MASK(drive, 0);
825
826 enable_irq(hwif->irq);
827
828 if (error) {
829 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
830 return error;
831 }
832
833 drive->id->dma_ultra &= ~0xFF00;
834 drive->id->dma_mword &= ~0x0F00;
835 drive->id->dma_1word &= ~0x0F00;
836
837#ifdef CONFIG_BLK_DEV_IDEDMA
838 if (speed >= XFER_SW_DMA_0)
ccf35289 839 hwif->dma_host_on(drive);
1da177e4 840 else if (hwif->ide_dma_check) /* check if host supports DMA */
7469aaf6 841 hwif->dma_off_quietly(drive);
1da177e4
LT		 842#endif
843
844 switch(speed) {
845 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
846 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
847 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
848 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
849 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
850 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
851 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
852 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
853 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
854 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
855 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
856 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
857 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
858 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
859 default: break;
860 }
861 if (!drive->init_speed)
862 drive->init_speed = speed;
863 drive->current_speed = speed;
864 return error;
865}
866
867EXPORT_SYMBOL(ide_config_drive_speed);
868
869
870/*
871 * This should get invoked any time we exit the driver to
872 * wait for an interrupt response from a drive. handler() points
873 * at the appropriate code to handle the next interrupt, and a
874 * timer is started to prevent us from waiting forever in case
875 * something goes wrong (see the ide_timer_expiry() handler later on).
876 *
877 * See also ide_execute_command
878 */
879static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
880 unsigned int timeout, ide_expiry_t *expiry)
881{
882 ide_hwgroup_t *hwgroup = HWGROUP(drive);
883
884 if (hwgroup->handler != NULL) {
885 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
886 "old=%p, new=%p\n",
887 drive->name, hwgroup->handler, handler);
888 }
889 hwgroup->handler = handler;
890 hwgroup->expiry = expiry;
891 hwgroup->timer.expires = jiffies + timeout;
892 add_timer(&hwgroup->timer);
893}
894
895void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
896 unsigned int timeout, ide_expiry_t *expiry)
897{
898 unsigned long flags;
899 spin_lock_irqsave(&ide_lock, flags);
900 __ide_set_handler(drive, handler, timeout, expiry);
901 spin_unlock_irqrestore(&ide_lock, flags);
902}
903
904EXPORT_SYMBOL(ide_set_handler);
905
906/**
907 * ide_execute_command - execute an IDE command
908 * @drive: IDE drive to issue the command against
909 * @command: command byte to write
910 * @handler: handler for next phase
911 * @timeout: timeout for command
912 * @expiry: handler to run on timeout
913 *
914 * Helper function to issue an IDE command. This handles the
915 * atomicity requirements, command timing and ensures that the
916 * handler and IRQ setup do not race. All IDE command kick off
917 * should go via this function or do equivalent locking.
918 */
919
920void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
921{
922 unsigned long flags;
923 ide_hwgroup_t *hwgroup = HWGROUP(drive);
924 ide_hwif_t *hwif = HWIF(drive);
925
926 spin_lock_irqsave(&ide_lock, flags);
927
125e1874 928 BUG_ON(hwgroup->handler);
1da177e4
LT		 929 hwgroup->handler = handler;
930 hwgroup->expiry = expiry;
931 hwgroup->timer.expires = jiffies + timeout;
932 add_timer(&hwgroup->timer);
933 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
934 /* Drive takes 400nS to respond, we must avoid the IRQ being
935 serviced before that.
936
937 FIXME: we could skip this delay with care on non shared
938 devices
939 */
940 ndelay(400);
941 spin_unlock_irqrestore(&ide_lock, flags);
942}
943
944EXPORT_SYMBOL(ide_execute_command);
945
946
947/* needed below */
948static ide_startstop_t do_reset1 (ide_drive_t *, int);
949
950/*
951 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
952 * during an atapi drive reset operation. If the drive has not yet responded,
953 * and we have not yet hit our maximum waiting time, then the timer is restarted
954 * for another 50ms.
955 */
956static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
957{
958 ide_hwgroup_t *hwgroup = HWGROUP(drive);
959 ide_hwif_t *hwif = HWIF(drive);
960 u8 stat;
961
962 SELECT_DRIVE(drive);
963 udelay (10);
964
965 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
966 printk("%s: ATAPI reset complete\n", drive->name);
967 } else {
968 if (time_before(jiffies, hwgroup->poll_timeout)) {
125e1874 969 BUG_ON(HWGROUP(drive)->handler != NULL);
1da177e4
LT		 970 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
971 /* continue polling */
972 return ide_started;
973 }
974 /* end of polling */
975 hwgroup->polling = 0;
976 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
977 drive->name, stat);
978 /* do it the old fashioned way */
979 return do_reset1(drive, 1);
980 }
981 /* done polling */
982 hwgroup->polling = 0;
913759ac 983 hwgroup->resetting = 0;
1da177e4
LT		 984 return ide_stopped;
985}
986
987/*
988 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
989 * during an ide reset operation. If the drives have not yet responded,
990 * and we have not yet hit our maximum waiting time, then the timer is restarted
991 * for another 50ms.
992 */
993static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
994{
995 ide_hwgroup_t *hwgroup = HWGROUP(drive);
996 ide_hwif_t *hwif = HWIF(drive);
997 u8 tmp;
998
999 if (hwif->reset_poll != NULL) {
1000 if (hwif->reset_poll(drive)) {
1001 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1002 hwif->name, drive->name);
1003 return ide_stopped;
1004 }
1005 }
1006
1007 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1008 if (time_before(jiffies, hwgroup->poll_timeout)) {
125e1874 1009 BUG_ON(HWGROUP(drive)->handler != NULL);
1da177e4
LT		 1010 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1011 /* continue polling */
1012 return ide_started;
1013 }
1014 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1015 drive->failures++;
1016 } else {
1017 printk("%s: reset: ", hwif->name);
1018 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1019 printk("success\n");
1020 drive->failures = 0;
1021 } else {
1022 drive->failures++;
1023 printk("master: ");
1024 switch (tmp & 0x7f) {
1025 case 1: printk("passed");
1026 break;
1027 case 2: printk("formatter device error");
1028 break;
1029 case 3: printk("sector buffer error");
1030 break;
1031 case 4: printk("ECC circuitry error");
1032 break;
1033 case 5: printk("controlling MPU error");
1034 break;
1035 default:printk("error (0x%02x?)", tmp);
1036 }
1037 if (tmp & 0x80)
1038 printk("; slave: failed");
1039 printk("\n");
1040 }
1041 }
1042 hwgroup->polling = 0; /* done polling */
913759ac 1043 hwgroup->resetting = 0; /* done reset attempt */
1da177e4
LT		 1044 return ide_stopped;
1045}
1046
1047static void check_dma_crc(ide_drive_t *drive)
1048{
1049#ifdef CONFIG_BLK_DEV_IDEDMA
1050 if (drive->crc_count) {
7469aaf6 1051 drive->hwif->dma_off_quietly(drive);
1da177e4
LT		 1052 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1053 if (drive->current_speed >= XFER_SW_DMA_0)
1054 (void) HWIF(drive)->ide_dma_on(drive);
1055 } else
7469aaf6 1056 ide_dma_off(drive);
1da177e4
LT		 1057#endif
1058}
1059
1060static void ide_disk_pre_reset(ide_drive_t *drive)
1061{
1062 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1063
1064 drive->special.all = 0;
1065 drive->special.b.set_geometry = legacy;
1066 drive->special.b.recalibrate = legacy;
1067 if (OK_TO_RESET_CONTROLLER)
1068 drive->mult_count = 0;
1069 if (!drive->keep_settings && !drive->using_dma)
1070 drive->mult_req = 0;
1071 if (drive->mult_req != drive->mult_count)
1072 drive->special.b.set_multmode = 1;
1073}
1074
1075static void pre_reset(ide_drive_t *drive)
1076{
1077 if (drive->media == ide_disk)
1078 ide_disk_pre_reset(drive);
1079 else
1080 drive->post_reset = 1;
1081
1082 if (!drive->keep_settings) {
1083 if (drive->using_dma) {
1084 check_dma_crc(drive);
1085 } else {
1086 drive->unmask = 0;
1087 drive->io_32bit = 0;
1088 }
1089 return;
1090 }
1091 if (drive->using_dma)
1092 check_dma_crc(drive);
1093
1094 if (HWIF(drive)->pre_reset != NULL)
1095 HWIF(drive)->pre_reset(drive);
1096
513daadd
SS		 1097 if (drive->current_speed != 0xff)
1098 drive->desired_speed = drive->current_speed;
1099 drive->current_speed = 0xff;
1da177e4
LT		 1100}
1101
1102/*
1103 * do_reset1() attempts to recover a confused drive by resetting it.
1104 * Unfortunately, resetting a disk drive actually resets all devices on
1105 * the same interface, so it can really be thought of as resetting the
1106 * interface rather than resetting the drive.
1107 *
1108 * ATAPI devices have their own reset mechanism which allows them to be
1109 * individually reset without clobbering other devices on the same interface.
1110 *
1111 * Unfortunately, the IDE interface does not generate an interrupt to let
1112 * us know when the reset operation has finished, so we must poll for this.
1113 * Equally poor, though, is the fact that this may a very long time to complete,
1114 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1115 * we set a timer to poll at 50ms intervals.
1116 */
1117static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1118{
1119 unsigned int unit;
1120 unsigned long flags;
1121 ide_hwif_t *hwif;
1122 ide_hwgroup_t *hwgroup;
1123
1124 spin_lock_irqsave(&ide_lock, flags);
1125 hwif = HWIF(drive);
1126 hwgroup = HWGROUP(drive);
1127
1128 /* We must not reset with running handlers */
125e1874 1129 BUG_ON(hwgroup->handler != NULL);
1da177e4
LT		 1130
1131 /* For an ATAPI device, first try an ATAPI SRST. */
1132 if (drive->media != ide_disk && !do_not_try_atapi) {
913759ac 1133 hwgroup->resetting = 1;
1da177e4
LT		 1134 pre_reset(drive);
1135 SELECT_DRIVE(drive);
1136 udelay (20);
68ad9910
AC		 1137 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1138 ndelay(400);
1da177e4
LT		 1139 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1140 hwgroup->polling = 1;
1141 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1142 spin_unlock_irqrestore(&ide_lock, flags);
1143 return ide_started;
1144 }
1145
1146 /*
1147 * First, reset any device state data we were maintaining
1148 * for any of the drives on this interface.
1149 */
1150 for (unit = 0; unit < MAX_DRIVES; ++unit)
1151 pre_reset(&hwif->drives[unit]);
1152
1153#if OK_TO_RESET_CONTROLLER
1154 if (!IDE_CONTROL_REG) {
1155 spin_unlock_irqrestore(&ide_lock, flags);
1156 return ide_stopped;
1157 }
1158
913759ac 1159 hwgroup->resetting = 1;
1da177e4
LT		 1160 /*
1161 * Note that we also set nIEN while resetting the device,
1162 * to mask unwanted interrupts from the interface during the reset.
1163 * However, due to the design of PC hardware, this will cause an
1164 * immediate interrupt due to the edge transition it produces.
1165 * This single interrupt gives us a "fast poll" for drives that
1166 * recover from reset very quickly, saving us the first 50ms wait time.
1167 */
1168 /* set SRST and nIEN */
1169 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1170 /* more than enough time */
1171 udelay(10);
1172 if (drive->quirk_list == 2) {
1173 /* clear SRST and nIEN */
1174 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1175 } else {
1176 /* clear SRST, leave nIEN */
1177 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1178 }
1179 /* more than enough time */
1180 udelay(10);
1181 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1182 hwgroup->polling = 1;
1183 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1184
1185 /*
1186 * Some weird controller like resetting themselves to a strange
1187 * state when the disks are reset this way. At least, the Winbond
1188 * 553 documentation says that
1189 */
1190 if (hwif->resetproc != NULL) {
1191 hwif->resetproc(drive);
1192 }
1193
1194#endif /* OK_TO_RESET_CONTROLLER */
1195
1196 spin_unlock_irqrestore(&ide_lock, flags);
1197 return ide_started;
1198}
1199
1200/*
1201 * ide_do_reset() is the entry point to the drive/interface reset code.
1202 */
1203
1204ide_startstop_t ide_do_reset (ide_drive_t *drive)
1205{
1206 return do_reset1(drive, 0);
1207}
1208
1209EXPORT_SYMBOL(ide_do_reset);
1210
1211/*
1212 * ide_wait_not_busy() waits for the currently selected device on the hwif
1213 * to report a non-busy status, see comments in probe_hwif().
1214 */
1215int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1216{
1217 u8 stat = 0;
1218
1219 while(timeout--) {
1220 /*
1221 * Turn this into a schedule() sleep once I'm sure
1222 * about locking issues (2.5 work ?).
1223 */
1224 mdelay(1);
1225 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1226 if ((stat & BUSY_STAT) == 0)
1227 return 0;
1228 /*
1229 * Assume a value of 0xff means nothing is connected to
1230 * the interface and it doesn't implement the pull-down
1231 * resistor on D7.
1232 */
1233 if (stat == 0xff)
1234 return -ENODEV;
6842f8c8 1235 touch_softlockup_watchdog();
1e86240f 1236 touch_nmi_watchdog();
1da177e4
LT		 1237 }
1238 return -EBUSY;
1239}
1240
1241EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1242
kernel source for telekom puls (alcatel/mediatek)