ide: add ->dma_timer_expiry method and remove ->dma_exec_cmd one (v2)
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / ide / ide-dma.c
CommitLineData
1da177e4 1/*
204f47c5
BZ
2 * IDE DMA support (including IDE PCI BM-DMA).
3 *
59bca8cc
BZ
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
58f189fc 7 *
1da177e4 8 * May be copied or modified under the terms of the GNU General Public License
204f47c5
BZ
9 *
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
1da177e4
LT
11 */
12
13/*
14 * Special Thanks to Mark for his Six years of work.
1da177e4
LT
15 */
16
17/*
1da177e4
LT
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
20 *
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
23 *
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
26 *
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
1da177e4
LT
29 */
30
1da177e4
LT
31#include <linux/types.h>
32#include <linux/kernel.h>
1da177e4 33#include <linux/ide.h>
1da177e4 34#include <linux/scatterlist.h>
5c05ff68 35#include <linux/dma-mapping.h>
1da177e4 36
db3f99ef 37static const struct drive_list_entry drive_whitelist[] = {
c2d3ce8c
JH
38 { "Micropolis 2112A" , NULL },
39 { "CONNER CTMA 4000" , NULL },
40 { "CONNER CTT8000-A" , NULL },
41 { "ST34342A" , NULL },
1da177e4
LT
42 { NULL , NULL }
43};
44
db3f99ef 45static const struct drive_list_entry drive_blacklist[] = {
c2d3ce8c
JH
46 { "WDC AC11000H" , NULL },
47 { "WDC AC22100H" , NULL },
48 { "WDC AC32500H" , NULL },
49 { "WDC AC33100H" , NULL },
50 { "WDC AC31600H" , NULL },
1da177e4
LT
51 { "WDC AC32100H" , "24.09P07" },
52 { "WDC AC23200L" , "21.10N21" },
c2d3ce8c
JH
53 { "Compaq CRD-8241B" , NULL },
54 { "CRD-8400B" , NULL },
55 { "CRD-8480B", NULL },
56 { "CRD-8482B", NULL },
57 { "CRD-84" , NULL },
58 { "SanDisk SDP3B" , NULL },
59 { "SanDisk SDP3B-64" , NULL },
60 { "SANYO CD-ROM CRD" , NULL },
61 { "HITACHI CDR-8" , NULL },
62 { "HITACHI CDR-8335" , NULL },
63 { "HITACHI CDR-8435" , NULL },
64 { "Toshiba CD-ROM XM-6202B" , NULL },
65 { "TOSHIBA CD-ROM XM-1702BC", NULL },
66 { "CD-532E-A" , NULL },
67 { "E-IDE CD-ROM CR-840", NULL },
68 { "CD-ROM Drive/F5A", NULL },
69 { "WPI CDD-820", NULL },
70 { "SAMSUNG CD-ROM SC-148C", NULL },
71 { "SAMSUNG CD-ROM SC", NULL },
72 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
73 { "_NEC DV5800A", NULL },
5a6248ca 74 { "SAMSUNG CD-ROM SN-124", "N001" },
c2d3ce8c 75 { "Seagate STT20000A", NULL },
b0bc65b9 76 { "CD-ROM CDR_U200", "1.09" },
1da177e4
LT
77 { NULL , NULL }
78
79};
80
1da177e4
LT
81/**
82 * ide_dma_intr - IDE DMA interrupt handler
83 * @drive: the drive the interrupt is for
84 *
db3f99ef 85 * Handle an interrupt completing a read/write DMA transfer on an
1da177e4
LT
86 * IDE device
87 */
db3f99ef
BZ
88
89ide_startstop_t ide_dma_intr(ide_drive_t *drive)
1da177e4 90{
b73c7ee2 91 ide_hwif_t *hwif = drive->hwif;
1da177e4
LT
92 u8 stat = 0, dma_stat = 0;
93
b73c7ee2 94 dma_stat = hwif->dma_ops->dma_end(drive);
374e042c 95 stat = hwif->tp_ops->read_status(hwif);
c47137a9 96
3a7d2484 97 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
1da177e4 98 if (!dma_stat) {
adb1af98 99 struct ide_cmd *cmd = &hwif->cmd;
1da177e4 100
2230d90d
BZ
101 if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
102 ide_finish_cmd(drive, cmd, stat);
103 else
130e8867
BZ
104 ide_complete_rq(drive, 0,
105 cmd->rq->nr_sectors << 9);
1da177e4
LT
106 return ide_stopped;
107 }
db3f99ef
BZ
108 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
109 drive->name, __func__, dma_stat);
1da177e4
LT
110 }
111 return ide_error(drive, "dma_intr", stat);
112}
1da177e4 113
2dbe7e91 114int ide_dma_good_drive(ide_drive_t *drive)
75d7d963
BZ
115{
116 return ide_in_drive_list(drive->id, drive_whitelist);
117}
118
1da177e4
LT
119/**
120 * ide_build_sglist - map IDE scatter gather for DMA I/O
121 * @drive: the drive to build the DMA table for
22981694 122 * @cmd: command
1da177e4 123 *
5c05ff68
BZ
124 * Perform the DMA mapping magic necessary to access the source or
125 * target buffers of a request via DMA. The lower layers of the
1da177e4 126 * kernel provide the necessary cache management so that we can
5c05ff68 127 * operate in a portable fashion.
1da177e4
LT
128 */
129
22981694 130int ide_build_sglist(ide_drive_t *drive, struct ide_cmd *cmd)
1da177e4 131{
db3f99ef 132 ide_hwif_t *hwif = drive->hwif;
1da177e4 133 struct scatterlist *sg = hwif->sg_table;
5d82720a 134 int i;
1da177e4 135
22981694 136 ide_map_sg(drive, cmd);
1da177e4 137
22981694 138 if (cmd->tf_flags & IDE_TFLAG_WRITE)
b6308ee0 139 cmd->sg_dma_direction = DMA_TO_DEVICE;
22981694
BZ
140 else
141 cmd->sg_dma_direction = DMA_FROM_DEVICE;
1da177e4 142
b6308ee0 143 i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
e6830a86 144 if (i == 0)
22981694 145 ide_map_sg(drive, cmd);
e6830a86 146 else {
b6308ee0
BZ
147 cmd->orig_sg_nents = cmd->sg_nents;
148 cmd->sg_nents = i;
5d82720a
FT
149 }
150
151 return i;
1da177e4 152}
1da177e4 153
1da177e4
LT
154/**
155 * ide_destroy_dmatable - clean up DMA mapping
156 * @drive: The drive to unmap
157 *
158 * Teardown mappings after DMA has completed. This must be called
159 * after the completion of each use of ide_build_dmatable and before
160 * the next use of ide_build_dmatable. Failure to do so will cause
161 * an oops as only one mapping can be live for each target at a given
162 * time.
163 */
db3f99ef
BZ
164
165void ide_destroy_dmatable(ide_drive_t *drive)
1da177e4 166{
36501650 167 ide_hwif_t *hwif = drive->hwif;
b6308ee0 168 struct ide_cmd *cmd = &hwif->cmd;
1da177e4 169
b6308ee0
BZ
170 dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
171 cmd->sg_dma_direction);
1da177e4 172}
1da177e4
LT
173EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
174
1da177e4 175/**
7469aaf6 176 * ide_dma_off_quietly - Generic DMA kill
1da177e4
LT
177 * @drive: drive to control
178 *
db3f99ef 179 * Turn off the current DMA on this IDE controller.
1da177e4
LT
180 */
181
7469aaf6 182void ide_dma_off_quietly(ide_drive_t *drive)
1da177e4 183{
97100fc8 184 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
1da177e4
LT
185 ide_toggle_bounce(drive, 0);
186
5e37bdc0 187 drive->hwif->dma_ops->dma_host_set(drive, 0);
1da177e4 188}
7469aaf6 189EXPORT_SYMBOL(ide_dma_off_quietly);
1da177e4
LT
190
191/**
7469aaf6 192 * ide_dma_off - disable DMA on a device
1da177e4
LT
193 * @drive: drive to disable DMA on
194 *
195 * Disable IDE DMA for a device on this IDE controller.
196 * Inform the user that DMA has been disabled.
197 */
198
7469aaf6 199void ide_dma_off(ide_drive_t *drive)
1da177e4
LT
200{
201 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
4a546e04 202 ide_dma_off_quietly(drive);
1da177e4 203}
7469aaf6 204EXPORT_SYMBOL(ide_dma_off);
1da177e4 205
1da177e4 206/**
4a546e04 207 * ide_dma_on - Enable DMA on a device
1da177e4
LT
208 * @drive: drive to enable DMA on
209 *
210 * Enable IDE DMA for a device on this IDE controller.
211 */
4a546e04
BZ
212
213void ide_dma_on(ide_drive_t *drive)
1da177e4 214{
97100fc8 215 drive->dev_flags |= IDE_DFLAG_USING_DMA;
1da177e4
LT
216 ide_toggle_bounce(drive, 1);
217
5e37bdc0 218 drive->hwif->dma_ops->dma_host_set(drive, 1);
1da177e4
LT
219}
220
db3f99ef 221int __ide_dma_bad_drive(ide_drive_t *drive)
1da177e4 222{
4dde4492 223 u16 *id = drive->id;
1da177e4 224
65e5f2e3 225 int blacklist = ide_in_drive_list(id, drive_blacklist);
1da177e4
LT
226 if (blacklist) {
227 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
4dde4492 228 drive->name, (char *)&id[ATA_ID_PROD]);
1da177e4
LT
229 return blacklist;
230 }
231 return 0;
232}
1da177e4
LT
233EXPORT_SYMBOL(__ide_dma_bad_drive);
234
2d5eaa6d
BZ
235static const u8 xfer_mode_bases[] = {
236 XFER_UDMA_0,
237 XFER_MW_DMA_0,
238 XFER_SW_DMA_0,
239};
240
7670df73 241static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
2d5eaa6d 242{
4dde4492 243 u16 *id = drive->id;
2d5eaa6d 244 ide_hwif_t *hwif = drive->hwif;
ac95beed 245 const struct ide_port_ops *port_ops = hwif->port_ops;
2d5eaa6d
BZ
246 unsigned int mask = 0;
247
db3f99ef 248 switch (base) {
2d5eaa6d 249 case XFER_UDMA_0:
4dde4492 250 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
2d5eaa6d
BZ
251 break;
252
ac95beed
BZ
253 if (port_ops && port_ops->udma_filter)
254 mask = port_ops->udma_filter(drive);
851dd33b
SS
255 else
256 mask = hwif->ultra_mask;
4dde4492 257 mask &= id[ATA_ID_UDMA_MODES];
2d5eaa6d 258
7670df73
BZ
259 /*
260 * avoid false cable warning from eighty_ninty_three()
261 */
262 if (req_mode > XFER_UDMA_2) {
263 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
264 mask &= 0x07;
265 }
2d5eaa6d
BZ
266 break;
267 case XFER_MW_DMA_0:
4dde4492 268 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
b4e44369 269 break;
ac95beed
BZ
270 if (port_ops && port_ops->mdma_filter)
271 mask = port_ops->mdma_filter(drive);
b4e44369
SS
272 else
273 mask = hwif->mwdma_mask;
4dde4492 274 mask &= id[ATA_ID_MWDMA_MODES];
2d5eaa6d
BZ
275 break;
276 case XFER_SW_DMA_0:
4dde4492
BZ
277 if (id[ATA_ID_FIELD_VALID] & 2) {
278 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
48fb2688
BZ
279 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
280 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
15a4f943
BZ
281
282 /*
283 * if the mode is valid convert it to the mask
284 * (the maximum allowed mode is XFER_SW_DMA_2)
285 */
286 if (mode <= 2)
287 mask = ((2 << mode) - 1) & hwif->swdma_mask;
288 }
2d5eaa6d
BZ
289 break;
290 default:
291 BUG();
292 break;
293 }
294
295 return mask;
296}
297
298/**
7670df73 299 * ide_find_dma_mode - compute DMA speed
2d5eaa6d 300 * @drive: IDE device
7670df73
BZ
301 * @req_mode: requested mode
302 *
303 * Checks the drive/host capabilities and finds the speed to use for
304 * the DMA transfer. The speed is then limited by the requested mode.
2d5eaa6d 305 *
7670df73
BZ
306 * Returns 0 if the drive/host combination is incapable of DMA transfers
307 * or if the requested mode is not a DMA mode.
2d5eaa6d
BZ
308 */
309
7670df73 310u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
2d5eaa6d
BZ
311{
312 ide_hwif_t *hwif = drive->hwif;
313 unsigned int mask;
314 int x, i;
315 u8 mode = 0;
316
33c1002e
BZ
317 if (drive->media != ide_disk) {
318 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
319 return 0;
320 }
2d5eaa6d
BZ
321
322 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
7670df73
BZ
323 if (req_mode < xfer_mode_bases[i])
324 continue;
325 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
2d5eaa6d
BZ
326 x = fls(mask) - 1;
327 if (x >= 0) {
328 mode = xfer_mode_bases[i] + x;
329 break;
330 }
331 }
332
75d7d963
BZ
333 if (hwif->chipset == ide_acorn && mode == 0) {
334 /*
335 * is this correct?
336 */
4dde4492
BZ
337 if (ide_dma_good_drive(drive) &&
338 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
75d7d963
BZ
339 mode = XFER_MW_DMA_1;
340 }
341
3ab7efe8
BZ
342 mode = min(mode, req_mode);
343
344 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
d34887da 345 mode ? ide_xfer_verbose(mode) : "no DMA");
2d5eaa6d 346
3ab7efe8 347 return mode;
2d5eaa6d 348}
7670df73 349EXPORT_SYMBOL_GPL(ide_find_dma_mode);
2d5eaa6d 350
0ae2e178 351static int ide_tune_dma(ide_drive_t *drive)
29e744d0 352{
8704de8f 353 ide_hwif_t *hwif = drive->hwif;
29e744d0
BZ
354 u8 speed;
355
97100fc8
BZ
356 if (ata_id_has_dma(drive->id) == 0 ||
357 (drive->dev_flags & IDE_DFLAG_NODMA))
122ab088
BZ
358 return 0;
359
360 /* consult the list of known "bad" drives */
361 if (__ide_dma_bad_drive(drive))
29e744d0
BZ
362 return 0;
363
3ab7efe8
BZ
364 if (ide_id_dma_bug(drive))
365 return 0;
366
8704de8f 367 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
0ae2e178
BZ
368 return config_drive_for_dma(drive);
369
29e744d0
BZ
370 speed = ide_max_dma_mode(drive);
371
951784b6
BZ
372 if (!speed)
373 return 0;
29e744d0 374
88b2b32b 375 if (ide_set_dma_mode(drive, speed))
4728d546 376 return 0;
29e744d0 377
4728d546 378 return 1;
29e744d0
BZ
379}
380
0ae2e178
BZ
381static int ide_dma_check(ide_drive_t *drive)
382{
383 ide_hwif_t *hwif = drive->hwif;
0ae2e178 384
ba4b2e60 385 if (ide_tune_dma(drive))
0ae2e178
BZ
386 return 0;
387
388 /* TODO: always do PIO fallback */
389 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
390 return -1;
391
392 ide_set_max_pio(drive);
393
ba4b2e60 394 return -1;
0ae2e178
BZ
395}
396
3ab7efe8 397int ide_id_dma_bug(ide_drive_t *drive)
1da177e4 398{
4dde4492 399 u16 *id = drive->id;
1da177e4 400
4dde4492
BZ
401 if (id[ATA_ID_FIELD_VALID] & 4) {
402 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
403 (id[ATA_ID_MWDMA_MODES] >> 8))
3ab7efe8 404 goto err_out;
4dde4492
BZ
405 } else if (id[ATA_ID_FIELD_VALID] & 2) {
406 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
407 (id[ATA_ID_SWDMA_MODES] >> 8))
3ab7efe8 408 goto err_out;
1da177e4 409 }
3ab7efe8
BZ
410 return 0;
411err_out:
412 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
413 return 1;
1da177e4
LT
414}
415
3608b5d7
BZ
416int ide_set_dma(ide_drive_t *drive)
417{
3608b5d7
BZ
418 int rc;
419
7b905994
BZ
420 /*
421 * Force DMAing for the beginning of the check.
422 * Some chipsets appear to do interesting
423 * things, if not checked and cleared.
424 * PARANOIA!!!
425 */
4a546e04 426 ide_dma_off_quietly(drive);
3608b5d7 427
7b905994
BZ
428 rc = ide_dma_check(drive);
429 if (rc)
430 return rc;
3608b5d7 431
4a546e04
BZ
432 ide_dma_on(drive);
433
434 return 0;
3608b5d7
BZ
435}
436
578cfa0d
BZ
437void ide_check_dma_crc(ide_drive_t *drive)
438{
439 u8 mode;
440
441 ide_dma_off_quietly(drive);
442 drive->crc_count = 0;
443 mode = drive->current_speed;
444 /*
445 * Don't try non Ultra-DMA modes without iCRC's. Force the
446 * device to PIO and make the user enable SWDMA/MWDMA modes.
447 */
448 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
449 mode--;
450 else
451 mode = XFER_PIO_4;
452 ide_set_xfer_rate(drive, mode);
453 if (drive->current_speed >= XFER_SW_DMA_0)
454 ide_dma_on(drive);
455}
456
de23ec9c 457void ide_dma_lost_irq(ide_drive_t *drive)
1da177e4 458{
de23ec9c 459 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
1da177e4 460}
de23ec9c 461EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
1da177e4 462
ffa15a69 463void ide_dma_timeout(ide_drive_t *drive)
1da177e4 464{
db3f99ef 465 ide_hwif_t *hwif = drive->hwif;
c283f5db 466
1da177e4 467 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
1da177e4 468
5e37bdc0 469 if (hwif->dma_ops->dma_test_irq(drive))
c283f5db
SS
470 return;
471
ffa15a69
BZ
472 ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
473
5e37bdc0 474 hwif->dma_ops->dma_end(drive);
1da177e4 475}
ffa15a69 476EXPORT_SYMBOL_GPL(ide_dma_timeout);
1da177e4 477
65ca5377
BZ
478/*
479 * un-busy the port etc, and clear any pending DMA status. we want to
480 * retry the current request in pio mode instead of risking tossing it
481 * all away
482 */
483ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
484{
485 ide_hwif_t *hwif = drive->hwif;
486 struct request *rq;
487 ide_startstop_t ret = ide_stopped;
488
489 /*
490 * end current dma transaction
491 */
492
493 if (error < 0) {
494 printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
495 (void)hwif->dma_ops->dma_end(drive);
496 ret = ide_error(drive, "dma timeout error",
497 hwif->tp_ops->read_status(hwif));
498 } else {
499 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
500 hwif->dma_ops->dma_timeout(drive);
501 }
502
503 /*
504 * disable dma for now, but remember that we did so because of
505 * a timeout -- we'll reenable after we finish this next request
506 * (or rather the first chunk of it) in pio.
507 */
508 drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
509 drive->retry_pio++;
510 ide_dma_off_quietly(drive);
511
512 /*
513 * un-busy drive etc and make sure request is sane
514 */
515
516 rq = hwif->rq;
517 if (!rq)
518 goto out;
519
520 hwif->rq = NULL;
521
522 rq->errors = 0;
523
524 if (!rq->bio)
525 goto out;
526
527 rq->sector = rq->bio->bi_sector;
528 rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9;
529 rq->hard_cur_sectors = rq->current_nr_sectors;
530 rq->buffer = bio_data(rq->bio);
531out:
532 return ret;
533}
534
0d1bad21 535void ide_release_dma_engine(ide_hwif_t *hwif)
1da177e4
LT
536{
537 if (hwif->dmatable_cpu) {
2bbd57ca 538 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
36501650 539
2bbd57ca
BZ
540 dma_free_coherent(hwif->dev, prd_size,
541 hwif->dmatable_cpu, hwif->dmatable_dma);
1da177e4
LT
542 hwif->dmatable_cpu = NULL;
543 }
1da177e4 544}
2bbd57ca 545EXPORT_SYMBOL_GPL(ide_release_dma_engine);
1da177e4 546
b8e73fba 547int ide_allocate_dma_engine(ide_hwif_t *hwif)
1da177e4 548{
2bbd57ca 549 int prd_size;
36501650 550
2bbd57ca
BZ
551 if (hwif->prd_max_nents == 0)
552 hwif->prd_max_nents = PRD_ENTRIES;
553 if (hwif->prd_ent_size == 0)
554 hwif->prd_ent_size = PRD_BYTES;
1da177e4 555
2bbd57ca 556 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
1da177e4 557
2bbd57ca
BZ
558 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
559 &hwif->dmatable_dma,
560 GFP_ATOMIC);
561 if (hwif->dmatable_cpu == NULL) {
562 printk(KERN_ERR "%s: unable to allocate PRD table\n",
5e59c236 563 hwif->name);
2bbd57ca
BZ
564 return -ENOMEM;
565 }
1da177e4 566
2bbd57ca 567 return 0;
1da177e4 568}
b8e73fba 569EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);