[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / i2c / busses / i2c-nuc900.c

/*
 * linux/drivers/i2c/busses/i2c-nuc900.c
 *
 * Copyright (c) 2010 Nuvoton technology corporation.
 *
 * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
 * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation;version 2 of the License.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>

#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/slab.h>
#include <linux/io.h>

#include <mach/mfp.h>
#include <mach/i2c.h>

/* nuc900 i2c registers offset */

#define CSR		0x00
#define DIVIDER		0x04
#define CMDR		0x08
#define SWR		0x0C
#define RXR		0x10
#define TXR		0x14

/* nuc900 i2c CSR register bits */

#define IRQEN		0x003
#define I2CBUSY		0x400
#define I2CSTART	0x018
#define IRQFLAG		0x004
#define ARBIT_LOST	0x200
#define SLAVE_ACK	0x800

/* nuc900 i2c CMDR register bits */

#define I2C_CMD_START	0x10
#define I2C_CMD_STOP	0x08
#define I2C_CMD_READ	0x04
#define I2C_CMD_WRITE	0x02
#define I2C_CMD_NACK	0x01

/* i2c controller state */

enum nuc900_i2c_state {
	STATE_IDLE,
	STATE_START,
	STATE_READ,
	STATE_WRITE,
	STATE_STOP
};

/* i2c controller private data */

struct nuc900_i2c {
	spinlock_t		lock;
	wait_queue_head_t	wait;

	struct i2c_msg		*msg;
	unsigned int		msg_num;
	unsigned int		msg_idx;
	unsigned int		msg_ptr;
	unsigned int		irq;

	enum nuc900_i2c_state	state;

	void __iomem		*regs;
	struct clk		*clk;
	struct device		*dev;
	struct resource		*ioarea;
	struct i2c_adapter	adap;
};

/* nuc900_i2c_master_complete
 *
 * complete the message and wake up the caller, using the given return code,
 * or zero to mean ok.
*/

static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
{
	dev_dbg(i2c->dev, "master_complete %d\n", ret);

	i2c->msg_ptr = 0;
	i2c->msg = NULL;
	i2c->msg_idx++;
	i2c->msg_num = 0;
	if (ret)
		i2c->msg_idx = ret;

	wake_up(&i2c->wait);
}

/* irq enable/disable functions */

static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
{
	unsigned long tmp;

	tmp = readl(i2c->regs + CSR);
	writel(tmp & ~IRQEN, i2c->regs + CSR);
}

static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
{
	unsigned long tmp;

	tmp = readl(i2c->regs + CSR);
	writel(tmp | IRQEN, i2c->regs + CSR);
}


/* nuc900_i2c_message_start
 *
 * put the start of a message onto the bus
*/

static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
				      struct i2c_msg *msg)
{
	unsigned int addr = (msg->addr & 0x7f) << 1;

	if (msg->flags & I2C_M_RD)
		addr |= 0x1;
	writel(addr & 0xff, i2c->regs + TXR);
	writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
}

static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
{

	dev_dbg(i2c->dev, "STOP\n");

	/* stop the transfer */
	i2c->state = STATE_STOP;
	writel(I2C_CMD_STOP, i2c->regs + CMDR);

	nuc900_i2c_master_complete(i2c, ret);
	nuc900_i2c_disable_irq(i2c);
}

/* helper functions to determine the current state in the set of
 * messages we are sending
*/

/* is_lastmsg()
 *
 * returns TRUE if the current message is the last in the set
*/

static inline int is_lastmsg(struct nuc900_i2c *i2c)
{
	return i2c->msg_idx >= (i2c->msg_num - 1);
}

/* is_msglast
 *
 * returns TRUE if we this is the last byte in the current message
*/

static inline int is_msglast(struct nuc900_i2c *i2c)
{
	return i2c->msg_ptr == i2c->msg->len-1;
}

/* is_msgend
 *
 * returns TRUE if we reached the end of the current message
*/

static inline int is_msgend(struct nuc900_i2c *i2c)
{
	return i2c->msg_ptr >= i2c->msg->len;
}

/* i2c_nuc900_irq_nextbyte
 *
 * process an interrupt and work out what to do
 */

static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
							unsigned long iicstat)
{
	unsigned char byte;

	switch (i2c->state) {

	case STATE_IDLE:
		dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
		break;

	case STATE_STOP:
		dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
		nuc900_i2c_disable_irq(i2c);
		break;

	case STATE_START:
		/* last thing we did was send a start condition on the
		 * bus, or started a new i2c message
		 */

		if (iicstat & SLAVE_ACK &&
		    !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
			/* ack was not received... */

			dev_dbg(i2c->dev, "ack was not received\n");
			nuc900_i2c_stop(i2c, -ENXIO);
			break;
		}

		if (i2c->msg->flags & I2C_M_RD)
			i2c->state = STATE_READ;
		else
			i2c->state = STATE_WRITE;

		/* terminate the transfer if there is nothing to do
		 * as this is used by the i2c probe to find devices.
		*/

		if (is_lastmsg(i2c) && i2c->msg->len == 0) {
			nuc900_i2c_stop(i2c, 0);
			break;
		}

		if (i2c->state == STATE_READ)
			goto prepare_read;

		/* fall through to the write state, as we will need to
		 * send a byte as well
		*/

	case STATE_WRITE:
		/* we are writing data to the device... check for the
		 * end of the message, and if so, work out what to do
		 */

		if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
			if (iicstat & SLAVE_ACK) {
				dev_dbg(i2c->dev, "WRITE: No Ack\n");

				nuc900_i2c_stop(i2c, -ECONNREFUSED);
				break;
			}
		}

retry_write:

		if (!is_msgend(i2c)) {
			byte = i2c->msg->buf[i2c->msg_ptr++];
			writeb(byte, i2c->regs + TXR);
			writel(I2C_CMD_WRITE, i2c->regs + CMDR);

		} else if (!is_lastmsg(i2c)) {
			/* we need to go to the next i2c message */

			dev_dbg(i2c->dev, "WRITE: Next Message\n");

			i2c->msg_ptr = 0;
			i2c->msg_idx++;
			i2c->msg++;

			/* check to see if we need to do another message */
			if (i2c->msg->flags & I2C_M_NOSTART) {

				if (i2c->msg->flags & I2C_M_RD) {
					/* cannot do this, the controller
					 * forces us to send a new START
					 * when we change direction
					*/

					nuc900_i2c_stop(i2c, -EINVAL);
				}

				goto retry_write;
			} else {
				/* send the new start */
				nuc900_i2c_message_start(i2c, i2c->msg);
				i2c->state = STATE_START;
			}

		} else {
			/* send stop */

			nuc900_i2c_stop(i2c, 0);
		}
		break;

	case STATE_READ:
		/* we have a byte of data in the data register, do
		 * something with it, and then work out wether we are
		 * going to do any more read/write
		 */

		byte = readb(i2c->regs + RXR);
		i2c->msg->buf[i2c->msg_ptr++] = byte;

prepare_read:
		if (is_msglast(i2c)) {
			/* last byte of buffer */

			if (is_lastmsg(i2c))
				writel(I2C_CMD_READ | I2C_CMD_NACK,
							i2c->regs + CMDR);

		} else if (is_msgend(i2c)) {
			/* ok, we've read the entire buffer, see if there
			 * is anything else we need to do
			*/

			if (is_lastmsg(i2c)) {
				/* last message, send stop and complete */
				dev_dbg(i2c->dev, "READ: Send Stop\n");

				nuc900_i2c_stop(i2c, 0);
			} else {
				/* go to the next transfer */
				dev_dbg(i2c->dev, "READ: Next Transfer\n");

				i2c->msg_ptr = 0;
				i2c->msg_idx++;
				i2c->msg++;

				writel(I2C_CMD_READ, i2c->regs + CMDR);
			}

		} else {
			writel(I2C_CMD_READ, i2c->regs + CMDR);
		}

		break;
	}
}

/* nuc900_i2c_irq
 *
 * top level IRQ servicing routine
*/

static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
{
	struct nuc900_i2c *i2c = dev_id;
	unsigned long status;

	status = readl(i2c->regs + CSR);
	writel(status | IRQFLAG, i2c->regs + CSR);

	if (status & ARBIT_LOST) {
		/* deal with arbitration loss */
		dev_err(i2c->dev, "deal with arbitration loss\n");
		goto out;
	}

	if (i2c->state == STATE_IDLE) {
		dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
		goto out;
	}

	/* pretty much this leaves us with the fact that we've
	 * transmitted or received whatever byte we last sent
	*/

	i2c_nuc900_irq_nextbyte(i2c, status);

 out:
	return IRQ_HANDLED;
}


/* nuc900_i2c_set_master
 *
 * get the i2c bus for a master transaction
*/

static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
{
	int timeout = 400;

	while (timeout-- > 0) {
		if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
				((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
			return 0;
		}

		msleep(1);
	}

	return -ETIMEDOUT;
}

/* nuc900_i2c_doxfer
 *
 * this starts an i2c transfer
*/

static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
			      struct i2c_msg *msgs, int num)
{
	unsigned long iicstat, timeout;
	int spins = 20;
	int ret;

	ret = nuc900_i2c_set_master(i2c);
	if (ret != 0) {
		dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
		ret = -EAGAIN;
		goto out;
	}

	spin_lock_irq(&i2c->lock);

	i2c->msg     = msgs;
	i2c->msg_num = num;
	i2c->msg_ptr = 0;
	i2c->msg_idx = 0;
	i2c->state   = STATE_START;

	nuc900_i2c_message_start(i2c, msgs);
	spin_unlock_irq(&i2c->lock);

	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);

	ret = i2c->msg_idx;

	/* having these next two as dev_err() makes life very
	 * noisy when doing an i2cdetect
	*/

	if (timeout == 0)
		dev_dbg(i2c->dev, "timeout\n");
	else if (ret != num)
		dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);

	/* ensure the stop has been through the bus */

	dev_dbg(i2c->dev, "waiting for bus idle\n");

	/* first, try busy waiting briefly */
	do {
		iicstat = readl(i2c->regs + CSR);
	} while ((iicstat & I2CBUSY) && --spins);

	/* if that timed out sleep */
	if (!spins) {
		msleep(1);
		iicstat = readl(i2c->regs + CSR);
	}

	if (iicstat & I2CBUSY)
		dev_warn(i2c->dev, "timeout waiting for bus idle\n");

 out:
	return ret;
}

/* nuc900_i2c_xfer
 *
 * first port of call from the i2c bus code when an message needs
 * transferring across the i2c bus.
*/

static int nuc900_i2c_xfer(struct i2c_adapter *adap,
			struct i2c_msg *msgs, int num)
{
	struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
	int retry;
	int ret;

	nuc900_i2c_enable_irq(i2c);

	for (retry = 0; retry < adap->retries; retry++) {

		ret = nuc900_i2c_doxfer(i2c, msgs, num);

		if (ret != -EAGAIN)
			return ret;

		dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);

		udelay(100);
	}

	return -EREMOTEIO;
}

/* declare our i2c functionality */
static u32 nuc900_i2c_func(struct i2c_adapter *adap)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
}

/* i2c bus registration info */

static const struct i2c_algorithm nuc900_i2c_algorithm = {
	.master_xfer		= nuc900_i2c_xfer,
	.functionality		= nuc900_i2c_func,
};

/* nuc900_i2c_probe
 *
 * called by the bus driver when a suitable device is found
*/

static int __devinit nuc900_i2c_probe(struct platform_device *pdev)
{
	struct nuc900_i2c *i2c;
	struct nuc900_platform_i2c *pdata;
	struct resource *res;
	int ret;

	pdata = pdev->dev.platform_data;
	if (!pdata) {
		dev_err(&pdev->dev, "no platform data\n");
		return -EINVAL;
	}

	i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
	if (!i2c) {
		dev_err(&pdev->dev, "no memory for state\n");
		return -ENOMEM;
	}

	strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
	i2c->adap.owner   = THIS_MODULE;
	i2c->adap.algo    = &nuc900_i2c_algorithm;
	i2c->adap.retries = 2;
	i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;

	spin_lock_init(&i2c->lock);
	init_waitqueue_head(&i2c->wait);

	/* find the clock and enable it */

	i2c->dev = &pdev->dev;
	i2c->clk = clk_get(&pdev->dev, NULL);
	if (IS_ERR(i2c->clk)) {
		dev_err(&pdev->dev, "cannot get clock\n");
		ret = -ENOENT;
		goto err_noclk;
	}

	dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);

	clk_enable(i2c->clk);

	/* map the registers */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "cannot find IO resource\n");
		ret = -ENOENT;
		goto err_clk;
	}

	i2c->ioarea = request_mem_region(res->start, resource_size(res),
					 pdev->name);

	if (i2c->ioarea == NULL) {
		dev_err(&pdev->dev, "cannot request IO\n");
		ret = -ENXIO;
		goto err_clk;
	}

	i2c->regs = ioremap(res->start, resource_size(res));

	if (i2c->regs == NULL) {
		dev_err(&pdev->dev, "cannot map IO\n");
		ret = -ENXIO;
		goto err_ioarea;
	}

	dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
		i2c->regs, i2c->ioarea, res);

	/* setup info block for the i2c core */

	i2c->adap.algo_data = i2c;
	i2c->adap.dev.parent = &pdev->dev;

	mfp_set_groupg(&pdev->dev, NULL);

	clk_get_rate(i2c->clk);

	ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
	writel(ret & 0xffff, i2c->regs + DIVIDER);

	/* find the IRQ for this unit (note, this relies on the init call to
	 * ensure no current IRQs pending
	 */

	i2c->irq = ret = platform_get_irq(pdev, 0);
	if (ret <= 0) {
		dev_err(&pdev->dev, "cannot find IRQ\n");
		goto err_iomap;
	}

	ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED,
			  dev_name(&pdev->dev), i2c);

	if (ret != 0) {
		dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
		goto err_iomap;
	}

	/* Note, previous versions of the driver used i2c_add_adapter()
	 * to add the bus at any number. We now pass the bus number via
	 * the platform data, so if unset it will now default to always
	 * being bus 0.
	 */

	i2c->adap.nr = pdata->bus_num;

	ret = i2c_add_numbered_adapter(&i2c->adap);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to add bus to i2c core\n");
		goto err_irq;
	}

	platform_set_drvdata(pdev, i2c);

	dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
						dev_name(&i2c->adap.dev));
	return 0;

 err_irq:
	free_irq(i2c->irq, i2c);

 err_iomap:
	iounmap(i2c->regs);

 err_ioarea:
	release_resource(i2c->ioarea);
	kfree(i2c->ioarea);

 err_clk:
	clk_disable(i2c->clk);
	clk_put(i2c->clk);

 err_noclk:
	kfree(i2c);
	return ret;
}

/* nuc900_i2c_remove
 *
 * called when device is removed from the bus
*/

static int __devexit nuc900_i2c_remove(struct platform_device *pdev)
{
	struct nuc900_i2c *i2c = platform_get_drvdata(pdev);

	i2c_del_adapter(&i2c->adap);
	free_irq(i2c->irq, i2c);

	clk_disable(i2c->clk);
	clk_put(i2c->clk);

	iounmap(i2c->regs);

	release_resource(i2c->ioarea);
	kfree(i2c->ioarea);
	kfree(i2c);

	return 0;
}

static struct platform_driver nuc900_i2c_driver = {
	.probe		= nuc900_i2c_probe,
	.remove		= __devexit_p(nuc900_i2c_remove),
	.driver		= {
		.owner	= THIS_MODULE,
		.name	= "nuc900-i2c0",
	},
};

static int __init i2c_adap_nuc900_init(void)
{
	return platform_driver_register(&nuc900_i2c_driver);
}

static void __exit i2c_adap_nuc900_exit(void)
{
	platform_driver_unregister(&nuc900_i2c_driver);
}
subsys_initcall(i2c_adap_nuc900_init);
module_exit(i2c_adap_nuc900_exit);

MODULE_DESCRIPTION("NUC900 I2C Bus driver");
MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:nuc900-i2c0");
Commit	Line	Data
ededad3e WZ	1	/*
	2	* linux/drivers/i2c/busses/i2c-nuc900.c
	3	*
	4	* Copyright (c) 2010 Nuvoton technology corporation.
	5	*
	6	* This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
	7	* Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation;version 2 of the License.
	12	*
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17
	18	#include <linux/i2c.h>
ededad3e WZ	19	#include <linux/init.h>
	20	#include <linux/time.h>
	21	#include <linux/interrupt.h>
	22	#include <linux/delay.h>
	23	#include <linux/errno.h>
	24	#include <linux/err.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/clk.h>
	27	#include <linux/cpufreq.h>
	28	#include <linux/slab.h>
	29	#include <linux/io.h>
	30
	31	#include <mach/mfp.h>
	32	#include <mach/i2c.h>
	33
	34	/* nuc900 i2c registers offset */
	35
	36	#define CSR 0x00
	37	#define DIVIDER 0x04
	38	#define CMDR 0x08
	39	#define SWR 0x0C
	40	#define RXR 0x10
	41	#define TXR 0x14
	42
	43	/* nuc900 i2c CSR register bits */
	44
	45	#define IRQEN 0x003
	46	#define I2CBUSY 0x400
	47	#define I2CSTART 0x018
	48	#define IRQFLAG 0x004
	49	#define ARBIT_LOST 0x200
	50	#define SLAVE_ACK 0x800
	51
	52	/* nuc900 i2c CMDR register bits */
	53
	54	#define I2C_CMD_START 0x10
	55	#define I2C_CMD_STOP 0x08
	56	#define I2C_CMD_READ 0x04
	57	#define I2C_CMD_WRITE 0x02
	58	#define I2C_CMD_NACK 0x01
	59
	60	/* i2c controller state */
	61
	62	enum nuc900_i2c_state {
	63	STATE_IDLE,
	64	STATE_START,
	65	STATE_READ,
	66	STATE_WRITE,
	67	STATE_STOP
	68	};
	69
	70	/* i2c controller private data */
	71
	72	struct nuc900_i2c {
	73	spinlock_t lock;
	74	wait_queue_head_t wait;
	75
	76	struct i2c_msg *msg;
	77	unsigned int msg_num;
	78	unsigned int msg_idx;
	79	unsigned int msg_ptr;
	80	unsigned int irq;
	81
	82	enum nuc900_i2c_state state;
83
84	void __iomem *regs;
85	struct clk *clk;
86	struct device *dev;
87	struct resource *ioarea;
88	struct i2c_adapter adap;
89	};
90
91	/* nuc900_i2c_master_complete
92	*
93	* complete the message and wake up the caller, using the given return code,
94	* or zero to mean ok.
95	*/
96
97	static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
98	{
99	dev_dbg(i2c->dev, "master_complete %d\n", ret);
100
101	i2c->msg_ptr = 0;
102	i2c->msg = NULL;
103	i2c->msg_idx++;
104	i2c->msg_num = 0;
105	if (ret)
106	i2c->msg_idx = ret;
107
108	wake_up(&i2c->wait);
109	}
110
111	/* irq enable/disable functions */
112
113	static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
114	{
115	unsigned long tmp;
116
117	tmp = readl(i2c->regs + CSR);
118	writel(tmp & ~IRQEN, i2c->regs + CSR);
119	}
120
121	static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
122	{
123	unsigned long tmp;
124
125	tmp = readl(i2c->regs + CSR);
126	writel(tmp \| IRQEN, i2c->regs + CSR);
127	}
128
129
130	/* nuc900_i2c_message_start
131	*
132	* put the start of a message onto the bus
133	*/
134
135	static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
136	struct i2c_msg *msg)
137	{
138	unsigned int addr = (msg->addr & 0x7f) << 1;
139
140	if (msg->flags & I2C_M_RD)
141	addr \|= 0x1;
142	writel(addr & 0xff, i2c->regs + TXR);
143	writel(I2C_CMD_START \| I2C_CMD_WRITE, i2c->regs + CMDR);
144	}
145
146	static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
147	{
148
149	dev_dbg(i2c->dev, "STOP\n");
150
151	/* stop the transfer */
152	i2c->state = STATE_STOP;
153	writel(I2C_CMD_STOP, i2c->regs + CMDR);
154
155	nuc900_i2c_master_complete(i2c, ret);
156	nuc900_i2c_disable_irq(i2c);
157	}
158
159	/* helper functions to determine the current state in the set of
160	* messages we are sending
161	*/
162
163	/* is_lastmsg()
164	*
165	* returns TRUE if the current message is the last in the set
166	*/
167
168	static inline int is_lastmsg(struct nuc900_i2c *i2c)
169	{
170	return i2c->msg_idx >= (i2c->msg_num - 1);
171	}
172
173	/* is_msglast
174	*
175	* returns TRUE if we this is the last byte in the current message
176	*/
177
178	static inline int is_msglast(struct nuc900_i2c *i2c)
179	{
180	return i2c->msg_ptr == i2c->msg->len-1;
181	}
182
183	/* is_msgend
184	*
185	* returns TRUE if we reached the end of the current message
186	*/
187
188	static inline int is_msgend(struct nuc900_i2c *i2c)
189	{
190	return i2c->msg_ptr >= i2c->msg->len;
191	}
192
193	/* i2c_nuc900_irq_nextbyte
194	*
195	* process an interrupt and work out what to do
196	*/
197
198	static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
199	unsigned long iicstat)
200	{
201	unsigned char byte;
202
203	switch (i2c->state) {
204
205	case STATE_IDLE:
206	dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
207	break;
208
209	case STATE_STOP:
210	dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
211	nuc900_i2c_disable_irq(i2c);
212	break;
213
214	case STATE_START:
215	/* last thing we did was send a start condition on the
216	* bus, or started a new i2c message
217	*/
218
219	if (iicstat & SLAVE_ACK &&
220	!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
221	/* ack was not received... */
222
223	dev_dbg(i2c->dev, "ack was not received\n");
224	nuc900_i2c_stop(i2c, -ENXIO);
225	break;
226	}
227
228	if (i2c->msg->flags & I2C_M_RD)
229	i2c->state = STATE_READ;
230	else
231	i2c->state = STATE_WRITE;
232
233	/* terminate the transfer if there is nothing to do
234	* as this is used by the i2c probe to find devices.
235	*/
236
237	if (is_lastmsg(i2c) && i2c->msg->len == 0) {
238	nuc900_i2c_stop(i2c, 0);
239	break;
240	}
241
242	if (i2c->state == STATE_READ)
243	goto prepare_read;
244
245	/* fall through to the write state, as we will need to
246	* send a byte as well
247	*/
248
249	case STATE_WRITE:
250	/* we are writing data to the device... check for the
251	* end of the message, and if so, work out what to do
252	*/
253
254	if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
255	if (iicstat & SLAVE_ACK) {
256	dev_dbg(i2c->dev, "WRITE: No Ack\n");
257
258	nuc900_i2c_stop(i2c, -ECONNREFUSED);
259	break;
260	}
261	}
262
263	retry_write:
264
265	if (!is_msgend(i2c)) {
266	byte = i2c->msg->buf[i2c->msg_ptr++];
267	writeb(byte, i2c->regs + TXR);
268	writel(I2C_CMD_WRITE, i2c->regs + CMDR);
269
270	} else if (!is_lastmsg(i2c)) {
271	/* we need to go to the next i2c message */
272
273	dev_dbg(i2c->dev, "WRITE: Next Message\n");
274
275	i2c->msg_ptr = 0;
276	i2c->msg_idx++;
277	i2c->msg++;
278
279	/* check to see if we need to do another message */
280	if (i2c->msg->flags & I2C_M_NOSTART) {
281
282	if (i2c->msg->flags & I2C_M_RD) {
283	/* cannot do this, the controller
284	* forces us to send a new START
285	* when we change direction
286	*/
287
288	nuc900_i2c_stop(i2c, -EINVAL);
289	}
290
291	goto retry_write;
292	} else {
293	/* send the new start */
294	nuc900_i2c_message_start(i2c, i2c->msg);
295	i2c->state = STATE_START;
296	}
297
298	} else {
299	/* send stop */
300
301	nuc900_i2c_stop(i2c, 0);
302	}
303	break;
304
305	case STATE_READ:
306	/* we have a byte of data in the data register, do
307	* something with it, and then work out wether we are
308	* going to do any more read/write
309	*/
310
311	byte = readb(i2c->regs + RXR);
312	i2c->msg->buf[i2c->msg_ptr++] = byte;
313
314	prepare_read:
315	if (is_msglast(i2c)) {
316	/* last byte of buffer */
317
318	if (is_lastmsg(i2c))
319	writel(I2C_CMD_READ \| I2C_CMD_NACK,
320	i2c->regs + CMDR);
321
322	} else if (is_msgend(i2c)) {
323	/* ok, we've read the entire buffer, see if there
324	* is anything else we need to do
325	*/
326
327	if (is_lastmsg(i2c)) {
328	/* last message, send stop and complete */
329	dev_dbg(i2c->dev, "READ: Send Stop\n");
330
331	nuc900_i2c_stop(i2c, 0);
332	} else {
333	/* go to the next transfer */
334	dev_dbg(i2c->dev, "READ: Next Transfer\n");
335
336	i2c->msg_ptr = 0;
337	i2c->msg_idx++;
338	i2c->msg++;
339
340	writel(I2C_CMD_READ, i2c->regs + CMDR);
341	}
342
343	} else {
344	writel(I2C_CMD_READ, i2c->regs + CMDR);
345	}
346
347	break;
348	}
349	}
350
351	/* nuc900_i2c_irq
352	*
353	* top level IRQ servicing routine
354	*/
355
356	static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
357	{
358	struct nuc900_i2c *i2c = dev_id;
359	unsigned long status;
360
361	status = readl(i2c->regs + CSR);
362	writel(status \| IRQFLAG, i2c->regs + CSR);
363
364	if (status & ARBIT_LOST) {
365	/* deal with arbitration loss */
366	dev_err(i2c->dev, "deal with arbitration loss\n");
367	goto out;
368	}
369
370	if (i2c->state == STATE_IDLE) {
371	dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
372	goto out;
373	}
374
375	/* pretty much this leaves us with the fact that we've
376	* transmitted or received whatever byte we last sent
377	*/
378
379	i2c_nuc900_irq_nextbyte(i2c, status);
380
381	out:
382	return IRQ_HANDLED;
383	}
384
385
386	/* nuc900_i2c_set_master
387	*
388	* get the i2c bus for a master transaction
389	*/
390
391	static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
392	{
393	int timeout = 400;
394
395	while (timeout-- > 0) {
396	if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
397	((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
398	return 0;
399	}
400
401	msleep(1);
402	}
403
404	return -ETIMEDOUT;
405	}
406
407	/* nuc900_i2c_doxfer
408	*
409	* this starts an i2c transfer
410	*/
411
412	static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
413	struct i2c_msg *msgs, int num)
414	{
415	unsigned long iicstat, timeout;
416	int spins = 20;
417	int ret;
418
419	ret = nuc900_i2c_set_master(i2c);
420	if (ret != 0) {
421	dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
422	ret = -EAGAIN;
423	goto out;
424	}
425
426	spin_lock_irq(&i2c->lock);
427
428	i2c->msg = msgs;
429	i2c->msg_num = num;
430	i2c->msg_ptr = 0;
431	i2c->msg_idx = 0;
432	i2c->state = STATE_START;
433
434	nuc900_i2c_message_start(i2c, msgs);
435	spin_unlock_irq(&i2c->lock);
436
437	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
438
439	ret = i2c->msg_idx;
440
441	/* having these next two as dev_err() makes life very
442	* noisy when doing an i2cdetect
443	*/
444
445	if (timeout == 0)
446	dev_dbg(i2c->dev, "timeout\n");
447	else if (ret != num)
448	dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
449
450	/* ensure the stop has been through the bus */
451
452	dev_dbg(i2c->dev, "waiting for bus idle\n");
453
454	/* first, try busy waiting briefly */
455	do {
456	iicstat = readl(i2c->regs + CSR);
457	} while ((iicstat & I2CBUSY) && --spins);
458
459	/* if that timed out sleep */
460	if (!spins) {
461	msleep(1);
462	iicstat = readl(i2c->regs + CSR);
463	}
464
465	if (iicstat & I2CBUSY)
466	dev_warn(i2c->dev, "timeout waiting for bus idle\n");
467
468	out:
469	return ret;
470	}
471
472	/* nuc900_i2c_xfer
473	*
474	* first port of call from the i2c bus code when an message needs
475	* transferring across the i2c bus.
476	*/
477
478	static int nuc900_i2c_xfer(struct i2c_adapter *adap,
479	struct i2c_msg *msgs, int num)
480	{
481	struct nuc900_i2c i2c = (struct nuc900_i2c )adap->algo_data;
482	int retry;
483	int ret;
484
485	nuc900_i2c_enable_irq(i2c);
486
487	for (retry = 0; retry < adap->retries; retry++) {
488
489	ret = nuc900_i2c_doxfer(i2c, msgs, num);
490
491	if (ret != -EAGAIN)
492	return ret;
493
494	dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
495
496	udelay(100);
497	}
498
499	return -EREMOTEIO;
500	}
501
502	/* declare our i2c functionality */
503	static u32 nuc900_i2c_func(struct i2c_adapter *adap)
504	{
505	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL \| I2C_FUNC_PROTOCOL_MANGLING;
506	}
507
508	/* i2c bus registration info */
509
510	static const struct i2c_algorithm nuc900_i2c_algorithm = {
511	.master_xfer = nuc900_i2c_xfer,
512	.functionality = nuc900_i2c_func,
513	};
514
515	/* nuc900_i2c_probe
516	*
517	* called by the bus driver when a suitable device is found
518	*/
519
520	static int __devinit nuc900_i2c_probe(struct platform_device *pdev)
521	{
522	struct nuc900_i2c *i2c;
523	struct nuc900_platform_i2c *pdata;
524	struct resource *res;
525	int ret;
526
527	pdata = pdev->dev.platform_data;
528	if (!pdata) {
529	dev_err(&pdev->dev, "no platform data\n");
530	return -EINVAL;
531	}
532
533	i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
534	if (!i2c) {
535	dev_err(&pdev->dev, "no memory for state\n");
536	return -ENOMEM;
537	}
538
539	strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
540	i2c->adap.owner = THIS_MODULE;
541	i2c->adap.algo = &nuc900_i2c_algorithm;
542	i2c->adap.retries = 2;
543	i2c->adap.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD;
544
545	spin_lock_init(&i2c->lock);
546	init_waitqueue_head(&i2c->wait);
547
548	/* find the clock and enable it */
549
550	i2c->dev = &pdev->dev;
551	i2c->clk = clk_get(&pdev->dev, NULL);
552	if (IS_ERR(i2c->clk)) {
553	dev_err(&pdev->dev, "cannot get clock\n");
554	ret = -ENOENT;
555	goto err_noclk;
556	}
557
558	dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
559
560	clk_enable(i2c->clk);
561
562	/* map the registers */
563
564	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
565	if (res == NULL) {
566	dev_err(&pdev->dev, "cannot find IO resource\n");
567	ret = -ENOENT;
568	goto err_clk;
569	}
570
571	i2c->ioarea = request_mem_region(res->start, resource_size(res),
572	pdev->name);
573
574	if (i2c->ioarea == NULL) {
575	dev_err(&pdev->dev, "cannot request IO\n");
576	ret = -ENXIO;
577	goto err_clk;
578	}
579
580	i2c->regs = ioremap(res->start, resource_size(res));
581
582	if (i2c->regs == NULL) {
583	dev_err(&pdev->dev, "cannot map IO\n");
584	ret = -ENXIO;
585	goto err_ioarea;
586	}
587
588	dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
589	i2c->regs, i2c->ioarea, res);
590
591	/* setup info block for the i2c core */
592
593	i2c->adap.algo_data = i2c;
594	i2c->adap.dev.parent = &pdev->dev;
595
97371fa9	596	mfp_set_groupg(&pdev->dev, NULL);
ededad3e WZ	597
	598	clk_get_rate(i2c->clk);
	599
	600	ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
	601	writel(ret & 0xffff, i2c->regs + DIVIDER);
	602
	603	/* find the IRQ for this unit (note, this relies on the init call to
	604	* ensure no current IRQs pending
	605	*/
	606
	607	i2c->irq = ret = platform_get_irq(pdev, 0);
	608	if (ret <= 0) {
	609	dev_err(&pdev->dev, "cannot find IRQ\n");
	610	goto err_iomap;
	611	}
	612
4311051c	613	ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED,
ededad3e WZ	614	dev_name(&pdev->dev), i2c);
	615
	616	if (ret != 0) {
	617	dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
	618	goto err_iomap;
	619	}
	620
	621	/* Note, previous versions of the driver used i2c_add_adapter()
	622	* to add the bus at any number. We now pass the bus number via
	623	* the platform data, so if unset it will now default to always
	624	* being bus 0.
	625	*/
	626
	627	i2c->adap.nr = pdata->bus_num;
	628
	629	ret = i2c_add_numbered_adapter(&i2c->adap);
	630	if (ret < 0) {
	631	dev_err(&pdev->dev, "failed to add bus to i2c core\n");
	632	goto err_irq;
	633	}
	634
	635	platform_set_drvdata(pdev, i2c);
	636
	637	dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
	638	dev_name(&i2c->adap.dev));
	639	return 0;
	640
	641	err_irq:
	642	free_irq(i2c->irq, i2c);
	643
	644	err_iomap:
	645	iounmap(i2c->regs);
	646
	647	err_ioarea:
	648	release_resource(i2c->ioarea);
	649	kfree(i2c->ioarea);
	650
	651	err_clk:
	652	clk_disable(i2c->clk);
	653	clk_put(i2c->clk);
	654
	655	err_noclk:
	656	kfree(i2c);
	657	return ret;
	658	}
	659
	660	/* nuc900_i2c_remove
	661	*
	662	* called when device is removed from the bus
	663	*/
	664
	665	static int __devexit nuc900_i2c_remove(struct platform_device *pdev)
	666	{
	667	struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
	668
	669	i2c_del_adapter(&i2c->adap);
	670	free_irq(i2c->irq, i2c);
	671
	672	clk_disable(i2c->clk);
	673	clk_put(i2c->clk);
	674
	675	iounmap(i2c->regs);
	676
	677	release_resource(i2c->ioarea);
678	kfree(i2c->ioarea);
679	kfree(i2c);
680
681	return 0;
682	}
683
684	static struct platform_driver nuc900_i2c_driver = {
685	.probe = nuc900_i2c_probe,
686	.remove = __devexit_p(nuc900_i2c_remove),
687	.driver = {
688	.owner = THIS_MODULE,
689	.name = "nuc900-i2c0",
690	},
691	};
692
693	static int __init i2c_adap_nuc900_init(void)
694	{
695	return platform_driver_register(&nuc900_i2c_driver);
696	}
697
698	static void __exit i2c_adap_nuc900_exit(void)
699	{
700	platform_driver_unregister(&nuc900_i2c_driver);
701	}
702	subsys_initcall(i2c_adap_nuc900_init);
703	module_exit(i2c_adap_nuc900_exit);
704
705	MODULE_DESCRIPTION("NUC900 I2C Bus driver");
706	MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
707	MODULE_LICENSE("GPL");
708	MODULE_ALIAS("platform:nuc900-i2c0");