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hwmon: (nct6775) Add support for temperature sensors
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / nct6775.c
CommitLineData
9de2e2e8
GR		 1/*
2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
4 *
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
6 *
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
14 *
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 *
33 * Supports the following chips:
34 *
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
39 *
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
42 */
43
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
50#include <linux/platform_device.h>
51#include <linux/hwmon.h>
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
54#include <linux/err.h>
55#include <linux/mutex.h>
56#include <linux/acpi.h>
57#include <linux/io.h>
58#include "lm75.h"
59
aa136e5d
GR		 60#define USE_ALTERNATE
61
9de2e2e8
GR		 62enum kinds { nct6775, nct6776, nct6779 };
63
64/* used to set data->name = nct6775_device_names[data->sio_kind] */
65static const char * const nct6775_device_names[] = {
66 "nct6775",
67 "nct6776",
68 "nct6779",
69};
70
71static unsigned short force_id;
72module_param(force_id, ushort, 0);
73MODULE_PARM_DESC(force_id, "Override the detected device ID");
74
75#define DRVNAME "nct6775"
76
77/*
78 * Super-I/O constants and functions
79 */
80
a6bd5878 81#define NCT6775_LD_ACPI 0x0a
9de2e2e8
GR		 82#define NCT6775_LD_HWM 0x0b
83#define NCT6775_LD_VID 0x0d
84
85#define SIO_REG_LDSEL 0x07 /* Logical device select */
86#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
87#define SIO_REG_ENABLE 0x30 /* Logical device enable */
88#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
89
90#define SIO_NCT6775_ID 0xb470
91#define SIO_NCT6776_ID 0xc330
92#define SIO_NCT6779_ID 0xc560
93#define SIO_ID_MASK 0xFFF0
94
95static inline void
96superio_outb(int ioreg, int reg, int val)
97{
98 outb(reg, ioreg);
99 outb(val, ioreg + 1);
100}
101
102static inline int
103superio_inb(int ioreg, int reg)
104{
105 outb(reg, ioreg);
106 return inb(ioreg + 1);
107}
108
109static inline void
110superio_select(int ioreg, int ld)
111{
112 outb(SIO_REG_LDSEL, ioreg);
113 outb(ld, ioreg + 1);
114}
115
116static inline int
117superio_enter(int ioreg)
118{
119 /*
120 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
121 */
122 if (!request_muxed_region(ioreg, 2, DRVNAME))
123 return -EBUSY;
124
125 outb(0x87, ioreg);
126 outb(0x87, ioreg);
127
128 return 0;
129}
130
131static inline void
132superio_exit(int ioreg)
133{
134 outb(0xaa, ioreg);
135 outb(0x02, ioreg);
136 outb(0x02, ioreg + 1);
137 release_region(ioreg, 2);
138}
139
140/*
141 * ISA constants
142 */
143
144#define IOREGION_ALIGNMENT (~7)
145#define IOREGION_OFFSET 5
146#define IOREGION_LENGTH 2
147#define ADDR_REG_OFFSET 0
148#define DATA_REG_OFFSET 1
149
150#define NCT6775_REG_BANK 0x4E
151#define NCT6775_REG_CONFIG 0x40
152
153/*
154 * Not currently used:
155 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
156 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
157 * REG_MAN_ID is at port 0x4f
158 * REG_CHIP_ID is at port 0x58
159 */
160
aa136e5d
GR		 161#define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
162#define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
163
9de2e2e8
GR		 164#define NUM_REG_ALARM 4 /* Max number of alarm registers */
165
166/* Common and NCT6775 specific data */
167
168/* Voltage min/max registers for nr=7..14 are in bank 5 */
169
170static const u16 NCT6775_REG_IN_MAX[] = {
171 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
172 0x55c, 0x55e, 0x560, 0x562 };
173static const u16 NCT6775_REG_IN_MIN[] = {
174 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
175 0x55d, 0x55f, 0x561, 0x563 };
176static const u16 NCT6775_REG_IN[] = {
177 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
178};
179
180#define NCT6775_REG_VBAT 0x5D
aa136e5d 181#define NCT6775_REG_DIODE 0x5E
9de2e2e8
GR		 182
183static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
184
185/* 0..15 voltages, 16..23 fans, 24..31 temperatures */
186
187static const s8 NCT6775_ALARM_BITS[] = {
188 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
189 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
190 -1, /* unused */
191 6, 7, 11, 10, 23, /* fan1..fan5 */
192 -1, -1, -1, /* unused */
193 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
194 12, -1 }; /* intrusion0, intrusion1 */
195
aa136e5d 196#define TEMP_ALARM_BASE 24
a6bd5878
GR		 197#define INTRUSION_ALARM_BASE 30
198
199static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
200static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
201
aa136e5d
GR		 202static const u16 NCT6775_REG_TEMP[] = {
203 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
204
205static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
206 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
207static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
208 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
209static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
210 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
211
212static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
213 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
214
215static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
216
217static const char *const nct6775_temp_label[] = {
218 "",
219 "SYSTIN",
220 "CPUTIN",
221 "AUXTIN",
222 "AMD SB-TSI",
223 "PECI Agent 0",
224 "PECI Agent 1",
225 "PECI Agent 2",
226 "PECI Agent 3",
227 "PECI Agent 4",
228 "PECI Agent 5",
229 "PECI Agent 6",
230 "PECI Agent 7",
231 "PCH_CHIP_CPU_MAX_TEMP",
232 "PCH_CHIP_TEMP",
233 "PCH_CPU_TEMP",
234 "PCH_MCH_TEMP",
235 "PCH_DIM0_TEMP",
236 "PCH_DIM1_TEMP",
237 "PCH_DIM2_TEMP",
238 "PCH_DIM3_TEMP"
239};
240
241static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
242 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
243
244static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
245 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
246 0xa07 };
247
9de2e2e8
GR		 248/* NCT6776 specific data */
249
250static const s8 NCT6776_ALARM_BITS[] = {
251 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
252 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
253 -1, /* unused */
254 6, 7, 11, 10, 23, /* fan1..fan5 */
255 -1, -1, -1, /* unused */
256 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
257 12, 9 }; /* intrusion0, intrusion1 */
258
aa136e5d
GR		 259static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
260 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
261
262static const char *const nct6776_temp_label[] = {
263 "",
264 "SYSTIN",
265 "CPUTIN",
266 "AUXTIN",
267 "SMBUSMASTER 0",
268 "SMBUSMASTER 1",
269 "SMBUSMASTER 2",
270 "SMBUSMASTER 3",
271 "SMBUSMASTER 4",
272 "SMBUSMASTER 5",
273 "SMBUSMASTER 6",
274 "SMBUSMASTER 7",
275 "PECI Agent 0",
276 "PECI Agent 1",
277 "PCH_CHIP_CPU_MAX_TEMP",
278 "PCH_CHIP_TEMP",
279 "PCH_CPU_TEMP",
280 "PCH_MCH_TEMP",
281 "PCH_DIM0_TEMP",
282 "PCH_DIM1_TEMP",
283 "PCH_DIM2_TEMP",
284 "PCH_DIM3_TEMP",
285 "BYTE_TEMP"
286};
287
288static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
289 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
290
291static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
292 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
293
9de2e2e8
GR		 294/* NCT6779 specific data */
295
296static const u16 NCT6779_REG_IN[] = {
297 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
298 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
299
300static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
301 0x459, 0x45A, 0x45B, 0x568 };
302
303static const s8 NCT6779_ALARM_BITS[] = {
304 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
305 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
306 -1, /* unused */
307 6, 7, 11, 10, 23, /* fan1..fan5 */
308 -1, -1, -1, /* unused */
309 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
310 12, 9 }; /* intrusion0, intrusion1 */
311
aa136e5d
GR		 312static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
313static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
314 0x18, 0x152 };
315static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
316 0x3a, 0x153 };
317static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
318 0x39, 0x155 };
319
320static const u16 NCT6779_REG_TEMP_OFFSET[] = {
321 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
322
323static const char *const nct6779_temp_label[] = {
324 "",
325 "SYSTIN",
326 "CPUTIN",
327 "AUXTIN0",
328 "AUXTIN1",
329 "AUXTIN2",
330 "AUXTIN3",
331 "",
332 "SMBUSMASTER 0",
333 "SMBUSMASTER 1",
334 "SMBUSMASTER 2",
335 "SMBUSMASTER 3",
336 "SMBUSMASTER 4",
337 "SMBUSMASTER 5",
338 "SMBUSMASTER 6",
339 "SMBUSMASTER 7",
340 "PECI Agent 0",
341 "PECI Agent 1",
342 "PCH_CHIP_CPU_MAX_TEMP",
343 "PCH_CHIP_TEMP",
344 "PCH_CPU_TEMP",
345 "PCH_MCH_TEMP",
346 "PCH_DIM0_TEMP",
347 "PCH_DIM1_TEMP",
348 "PCH_DIM2_TEMP",
349 "PCH_DIM3_TEMP",
350 "BYTE_TEMP"
351};
352
353static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
354 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
355 0, 0, 0, 0, 0, 0, 0, 0,
356 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
357 0x408, 0 };
358
359static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
360 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
361
9de2e2e8
GR		 362/*
363 * Conversions
364 */
365
366/*
367 * Some of the voltage inputs have internal scaling, the tables below
368 * contain 8 (the ADC LSB in mV) * scaling factor * 100
369 */
370static const u16 scale_in[15] = {
371 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
372 800, 800
373};
374
375static inline long in_from_reg(u8 reg, u8 nr)
376{
377 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
378}
379
380static inline u8 in_to_reg(u32 val, u8 nr)
381{
382 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
383}
384
385/*
386 * Data structures and manipulation thereof
387 */
388
389struct nct6775_data {
390 int addr; /* IO base of hw monitor block */
391 enum kinds kind;
392 const char *name;
393
394 struct device *hwmon_dev;
395 struct mutex lock;
396
aa136e5d
GR		 397 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
398 * 3=temp_crit
399 */
400 u8 temp_src[NUM_TEMP];
401 u16 reg_temp_config[NUM_TEMP];
402 const char * const *temp_label;
403 int temp_label_num;
404
9de2e2e8
GR		 405 u16 REG_CONFIG;
406 u16 REG_VBAT;
aa136e5d 407 u16 REG_DIODE;
9de2e2e8
GR		 408
409 const s8 *ALARM_BITS;
410
411 const u16 *REG_VIN;
412 const u16 *REG_IN_MINMAX[2];
413
aa136e5d
GR		 414 const u16 *REG_TEMP_SOURCE; /* temp register sources */
415
416 const u16 *REG_TEMP_OFFSET;
417
9de2e2e8
GR		 418 const u16 *REG_ALARM;
419
420 struct mutex update_lock;
421 bool valid; /* true if following fields are valid */
422 unsigned long last_updated; /* In jiffies */
423
424 /* Register values */
425 u8 bank; /* current register bank */
426 u8 in_num; /* number of in inputs we have */
427 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
428
aa136e5d
GR		 429 u8 temp_fixed_num; /* 3 or 6 */
430 u8 temp_type[NUM_TEMP_FIXED];
431 s8 temp_offset[NUM_TEMP_FIXED];
432 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
433 * 3=temp_crit */
9de2e2e8
GR		 434 u64 alarms;
435
436 u8 vid;
437 u8 vrm;
438
aa136e5d
GR		 439 u16 have_temp;
440 u16 have_temp_fixed;
9de2e2e8
GR		 441 u16 have_in;
442};
443
444struct nct6775_sio_data {
445 int sioreg;
446 enum kinds kind;
447};
448
449static bool is_word_sized(struct nct6775_data *data, u16 reg)
450{
451 switch (data->kind) {
452 case nct6775:
453 return (((reg & 0xff00) == 0x100 ||
454 (reg & 0xff00) == 0x200) &&
455 ((reg & 0x00ff) == 0x50 ||
456 (reg & 0x00ff) == 0x53 ||
457 (reg & 0x00ff) == 0x55)) ||
458 (reg & 0xfff0) == 0x630 ||
459 reg == 0x640 || reg == 0x642 ||
460 reg == 0x662 ||
461 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
462 reg == 0x73 || reg == 0x75 || reg == 0x77;
463 case nct6776:
464 return (((reg & 0xff00) == 0x100 ||
465 (reg & 0xff00) == 0x200) &&
466 ((reg & 0x00ff) == 0x50 ||
467 (reg & 0x00ff) == 0x53 ||
468 (reg & 0x00ff) == 0x55)) ||
469 (reg & 0xfff0) == 0x630 ||
470 reg == 0x402 ||
471 reg == 0x640 || reg == 0x642 ||
472 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
473 reg == 0x73 || reg == 0x75 || reg == 0x77;
474 case nct6779:
475 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
476 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
477 reg == 0x402 ||
478 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
479 reg == 0x640 || reg == 0x642 ||
480 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
481 reg == 0x7b;
482 }
483 return false;
484}
485
486/*
487 * On older chips, only registers 0x50-0x5f are banked.
488 * On more recent chips, all registers are banked.
489 * Assume that is the case and set the bank number for each access.
490 * Cache the bank number so it only needs to be set if it changes.
491 */
492static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
493{
494 u8 bank = reg >> 8;
495 if (data->bank != bank) {
496 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
497 outb_p(bank, data->addr + DATA_REG_OFFSET);
498 data->bank = bank;
499 }
500}
501
502static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
503{
504 int res, word_sized = is_word_sized(data, reg);
505
506 mutex_lock(&data->lock);
507
508 nct6775_set_bank(data, reg);
509 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
510 res = inb_p(data->addr + DATA_REG_OFFSET);
511 if (word_sized) {
512 outb_p((reg & 0xff) + 1,
513 data->addr + ADDR_REG_OFFSET);
514 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
515 }
516
517 mutex_unlock(&data->lock);
518 return res;
519}
520
521static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
522{
523 int word_sized = is_word_sized(data, reg);
524
525 mutex_lock(&data->lock);
526
527 nct6775_set_bank(data, reg);
528 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
529 if (word_sized) {
530 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
531 outb_p((reg & 0xff) + 1,
532 data->addr + ADDR_REG_OFFSET);
533 }
534 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
535
536 mutex_unlock(&data->lock);
537 return 0;
538}
539
aa136e5d
GR		 540/* We left-align 8-bit temperature values to make the code simpler */
541static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
542{
543 u16 res;
544
545 res = nct6775_read_value(data, reg);
546 if (!is_word_sized(data, reg))
547 res <<= 8;
548
549 return res;
550}
551
552static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
553{
554 if (!is_word_sized(data, reg))
555 value >>= 8;
556 return nct6775_write_value(data, reg, value);
557}
558
9de2e2e8
GR		 559static struct nct6775_data *nct6775_update_device(struct device *dev)
560{
561 struct nct6775_data *data = dev_get_drvdata(dev);
aa136e5d 562 int i, j;
9de2e2e8
GR		 563
564 mutex_lock(&data->update_lock);
565
566 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
567 || !data->valid) {
568 /* Measured voltages and limits */
569 for (i = 0; i < data->in_num; i++) {
570 if (!(data->have_in & (1 << i)))
571 continue;
572
573 data->in[i][0] = nct6775_read_value(data,
574 data->REG_VIN[i]);
575 data->in[i][1] = nct6775_read_value(data,
576 data->REG_IN_MINMAX[0][i]);
577 data->in[i][2] = nct6775_read_value(data,
578 data->REG_IN_MINMAX[1][i]);
579 }
580
aa136e5d
GR		 581 /* Measured temperatures and limits */
582 for (i = 0; i < NUM_TEMP; i++) {
583 if (!(data->have_temp & (1 << i)))
584 continue;
585 for (j = 0; j < 4; j++) {
586 if (data->reg_temp[j][i])
587 data->temp[j][i]
588 = nct6775_read_temp(data,
589 data->reg_temp[j][i]);
590 }
591 if (!(data->have_temp_fixed & (1 << i)))
592 continue;
593 data->temp_offset[i]
594 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
595 }
596
9de2e2e8
GR		 597 data->alarms = 0;
598 for (i = 0; i < NUM_REG_ALARM; i++) {
599 u8 alarm;
600 if (!data->REG_ALARM[i])
601 continue;
602 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
603 data->alarms |= ((u64)alarm) << (i << 3);
604 }
605
606 data->last_updated = jiffies;
607 data->valid = true;
608 }
609
610 mutex_unlock(&data->update_lock);
611 return data;
612}
613
614/*
615 * Sysfs callback functions
616 */
617static ssize_t
618show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
619{
620 struct nct6775_data *data = nct6775_update_device(dev);
621 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
622 int nr = sattr->nr;
623 int index = sattr->index;
624 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
625}
626
627static ssize_t
628store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
629 size_t count)
630{
631 struct nct6775_data *data = dev_get_drvdata(dev);
632 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
633 int nr = sattr->nr;
634 int index = sattr->index;
635 unsigned long val;
636 int err = kstrtoul(buf, 10, &val);
637 if (err < 0)
638 return err;
639 mutex_lock(&data->update_lock);
640 data->in[nr][index] = in_to_reg(val, nr);
641 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
642 data->in[nr][index]);
643 mutex_unlock(&data->update_lock);
644 return count;
645}
646
647static ssize_t
648show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
649{
650 struct nct6775_data *data = nct6775_update_device(dev);
651 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
652 int nr = data->ALARM_BITS[sattr->index];
653 return sprintf(buf, "%u\n",
654 (unsigned int)((data->alarms >> nr) & 0x01));
655}
656
657static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
658static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
659static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
660static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
661static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
662static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
663static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
664static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
665static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
666static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
667static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
668static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
669static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
670static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
671static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
672
673static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
674static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
675static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
676static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
677static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
678static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
679static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
680static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
681static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
682static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
683static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
684static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
685static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
686static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
687static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
688
689static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
690 store_in_reg, 0, 1);
691static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
692 store_in_reg, 1, 1);
693static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
694 store_in_reg, 2, 1);
695static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
696 store_in_reg, 3, 1);
697static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
698 store_in_reg, 4, 1);
699static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
700 store_in_reg, 5, 1);
701static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
702 store_in_reg, 6, 1);
703static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
704 store_in_reg, 7, 1);
705static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
706 store_in_reg, 8, 1);
707static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
708 store_in_reg, 9, 1);
709static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
710 store_in_reg, 10, 1);
711static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
712 store_in_reg, 11, 1);
713static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
714 store_in_reg, 12, 1);
715static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
716 store_in_reg, 13, 1);
717static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
718 store_in_reg, 14, 1);
719
720static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
721 store_in_reg, 0, 2);
722static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
723 store_in_reg, 1, 2);
724static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
725 store_in_reg, 2, 2);
726static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
727 store_in_reg, 3, 2);
728static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
729 store_in_reg, 4, 2);
730static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
731 store_in_reg, 5, 2);
732static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
733 store_in_reg, 6, 2);
734static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
735 store_in_reg, 7, 2);
736static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
737 store_in_reg, 8, 2);
738static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
739 store_in_reg, 9, 2);
740static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
741 store_in_reg, 10, 2);
742static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
743 store_in_reg, 11, 2);
744static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
745 store_in_reg, 12, 2);
746static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
747 store_in_reg, 13, 2);
748static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
749 store_in_reg, 14, 2);
750
751static struct attribute *nct6775_attributes_in[15][5] = {
752 {
753 &sensor_dev_attr_in0_input.dev_attr.attr,
754 &sensor_dev_attr_in0_min.dev_attr.attr,
755 &sensor_dev_attr_in0_max.dev_attr.attr,
756 &sensor_dev_attr_in0_alarm.dev_attr.attr,
757 NULL
758 },
759 {
760 &sensor_dev_attr_in1_input.dev_attr.attr,
761 &sensor_dev_attr_in1_min.dev_attr.attr,
762 &sensor_dev_attr_in1_max.dev_attr.attr,
763 &sensor_dev_attr_in1_alarm.dev_attr.attr,
764 NULL
765 },
766 {
767 &sensor_dev_attr_in2_input.dev_attr.attr,
768 &sensor_dev_attr_in2_min.dev_attr.attr,
769 &sensor_dev_attr_in2_max.dev_attr.attr,
770 &sensor_dev_attr_in2_alarm.dev_attr.attr,
771 NULL
772 },
773 {
774 &sensor_dev_attr_in3_input.dev_attr.attr,
775 &sensor_dev_attr_in3_min.dev_attr.attr,
776 &sensor_dev_attr_in3_max.dev_attr.attr,
777 &sensor_dev_attr_in3_alarm.dev_attr.attr,
778 NULL
779 },
780 {
781 &sensor_dev_attr_in4_input.dev_attr.attr,
782 &sensor_dev_attr_in4_min.dev_attr.attr,
783 &sensor_dev_attr_in4_max.dev_attr.attr,
784 &sensor_dev_attr_in4_alarm.dev_attr.attr,
785 NULL
786 },
787 {
788 &sensor_dev_attr_in5_input.dev_attr.attr,
789 &sensor_dev_attr_in5_min.dev_attr.attr,
790 &sensor_dev_attr_in5_max.dev_attr.attr,
791 &sensor_dev_attr_in5_alarm.dev_attr.attr,
792 NULL
793 },
794 {
795 &sensor_dev_attr_in6_input.dev_attr.attr,
796 &sensor_dev_attr_in6_min.dev_attr.attr,
797 &sensor_dev_attr_in6_max.dev_attr.attr,
798 &sensor_dev_attr_in6_alarm.dev_attr.attr,
799 NULL
800 },
801 {
802 &sensor_dev_attr_in7_input.dev_attr.attr,
803 &sensor_dev_attr_in7_min.dev_attr.attr,
804 &sensor_dev_attr_in7_max.dev_attr.attr,
805 &sensor_dev_attr_in7_alarm.dev_attr.attr,
806 NULL
807 },
808 {
809 &sensor_dev_attr_in8_input.dev_attr.attr,
810 &sensor_dev_attr_in8_min.dev_attr.attr,
811 &sensor_dev_attr_in8_max.dev_attr.attr,
812 &sensor_dev_attr_in8_alarm.dev_attr.attr,
813 NULL
814 },
815 {
816 &sensor_dev_attr_in9_input.dev_attr.attr,
817 &sensor_dev_attr_in9_min.dev_attr.attr,
818 &sensor_dev_attr_in9_max.dev_attr.attr,
819 &sensor_dev_attr_in9_alarm.dev_attr.attr,
820 NULL
821 },
822 {
823 &sensor_dev_attr_in10_input.dev_attr.attr,
824 &sensor_dev_attr_in10_min.dev_attr.attr,
825 &sensor_dev_attr_in10_max.dev_attr.attr,
826 &sensor_dev_attr_in10_alarm.dev_attr.attr,
827 NULL
828 },
829 {
830 &sensor_dev_attr_in11_input.dev_attr.attr,
831 &sensor_dev_attr_in11_min.dev_attr.attr,
832 &sensor_dev_attr_in11_max.dev_attr.attr,
833 &sensor_dev_attr_in11_alarm.dev_attr.attr,
834 NULL
835 },
836 {
837 &sensor_dev_attr_in12_input.dev_attr.attr,
838 &sensor_dev_attr_in12_min.dev_attr.attr,
839 &sensor_dev_attr_in12_max.dev_attr.attr,
840 &sensor_dev_attr_in12_alarm.dev_attr.attr,
841 NULL
842 },
843 {
844 &sensor_dev_attr_in13_input.dev_attr.attr,
845 &sensor_dev_attr_in13_min.dev_attr.attr,
846 &sensor_dev_attr_in13_max.dev_attr.attr,
847 &sensor_dev_attr_in13_alarm.dev_attr.attr,
848 NULL
849 },
850 {
851 &sensor_dev_attr_in14_input.dev_attr.attr,
852 &sensor_dev_attr_in14_min.dev_attr.attr,
853 &sensor_dev_attr_in14_max.dev_attr.attr,
854 &sensor_dev_attr_in14_alarm.dev_attr.attr,
855 NULL
856 },
857};
858
859static const struct attribute_group nct6775_group_in[15] = {
860 { .attrs = nct6775_attributes_in[0] },
861 { .attrs = nct6775_attributes_in[1] },
862 { .attrs = nct6775_attributes_in[2] },
863 { .attrs = nct6775_attributes_in[3] },
864 { .attrs = nct6775_attributes_in[4] },
865 { .attrs = nct6775_attributes_in[5] },
866 { .attrs = nct6775_attributes_in[6] },
867 { .attrs = nct6775_attributes_in[7] },
868 { .attrs = nct6775_attributes_in[8] },
869 { .attrs = nct6775_attributes_in[9] },
870 { .attrs = nct6775_attributes_in[10] },
871 { .attrs = nct6775_attributes_in[11] },
872 { .attrs = nct6775_attributes_in[12] },
873 { .attrs = nct6775_attributes_in[13] },
874 { .attrs = nct6775_attributes_in[14] },
875};
876
aa136e5d
GR		 877static ssize_t
878show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
879{
880 struct nct6775_data *data = nct6775_update_device(dev);
881 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
882 int nr = sattr->index;
883 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
884}
885
886static ssize_t
887show_temp(struct device *dev, struct device_attribute *attr, char *buf)
888{
889 struct nct6775_data *data = nct6775_update_device(dev);
890 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
891 int nr = sattr->nr;
892 int index = sattr->index;
893
894 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
895}
896
897static ssize_t
898store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
899 size_t count)
900{
901 struct nct6775_data *data = dev_get_drvdata(dev);
902 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
903 int nr = sattr->nr;
904 int index = sattr->index;
905 int err;
906 long val;
907
908 err = kstrtol(buf, 10, &val);
909 if (err < 0)
910 return err;
911
912 mutex_lock(&data->update_lock);
913 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
914 nct6775_write_temp(data, data->reg_temp[index][nr],
915 data->temp[index][nr]);
916 mutex_unlock(&data->update_lock);
917 return count;
918}
919
920static ssize_t
921show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
922{
923 struct nct6775_data *data = nct6775_update_device(dev);
924 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
925
926 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
927}
928
929static ssize_t
930store_temp_offset(struct device *dev, struct device_attribute *attr,
931 const char *buf, size_t count)
932{
933 struct nct6775_data *data = dev_get_drvdata(dev);
934 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
935 int nr = sattr->index;
936 long val;
937 int err;
938
939 err = kstrtol(buf, 10, &val);
940 if (err < 0)
941 return err;
942
943 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
944
945 mutex_lock(&data->update_lock);
946 data->temp_offset[nr] = val;
947 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
948 mutex_unlock(&data->update_lock);
949
950 return count;
951}
952
953static ssize_t
954show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
955{
956 struct nct6775_data *data = nct6775_update_device(dev);
957 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
958 int nr = sattr->index;
959 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
960}
961
962static ssize_t
963store_temp_type(struct device *dev, struct device_attribute *attr,
964 const char *buf, size_t count)
965{
966 struct nct6775_data *data = nct6775_update_device(dev);
967 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
968 int nr = sattr->index;
969 unsigned long val;
970 int err;
971 u8 vbat, diode, bit;
972
973 err = kstrtoul(buf, 10, &val);
974 if (err < 0)
975 return err;
976
977 if (val != 1 && val != 3 && val != 4)
978 return -EINVAL;
979
980 mutex_lock(&data->update_lock);
981
982 data->temp_type[nr] = val;
983 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
984 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
985 bit = 0x02 << nr;
986 switch (val) {
987 case 1: /* CPU diode (diode, current mode) */
988 vbat |= bit;
989 diode |= bit;
990 break;
991 case 3: /* diode, voltage mode */
992 vbat |= bit;
993 break;
994 case 4: /* thermistor */
995 break;
996 }
997 nct6775_write_value(data, data->REG_VBAT, vbat);
998 nct6775_write_value(data, data->REG_DIODE, diode);
999
1000 mutex_unlock(&data->update_lock);
1001 return count;
1002}
1003
1004static struct sensor_device_attribute_2 sda_temp_input[] = {
1005 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1006 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1007 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1008 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1009 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1010 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1011 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1012 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1013 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1014 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1015};
1016
1017static struct sensor_device_attribute sda_temp_label[] = {
1018 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1019 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1020 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1021 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1022 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1023 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1024 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1025 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1026 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1027 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1028};
1029
1030static struct sensor_device_attribute_2 sda_temp_max[] = {
1031 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1032 0, 1),
1033 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1034 1, 1),
1035 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1036 2, 1),
1037 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1038 3, 1),
1039 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1040 4, 1),
1041 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1042 5, 1),
1043 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1044 6, 1),
1045 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1046 7, 1),
1047 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1048 8, 1),
1049 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1050 9, 1),
1051};
1052
1053static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1054 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1055 0, 2),
1056 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1057 1, 2),
1058 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1059 2, 2),
1060 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1061 3, 2),
1062 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1063 4, 2),
1064 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1065 5, 2),
1066 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1067 6, 2),
1068 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1069 7, 2),
1070 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1071 8, 2),
1072 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1073 9, 2),
1074};
1075
1076static struct sensor_device_attribute_2 sda_temp_crit[] = {
1077 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1078 0, 3),
1079 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1080 1, 3),
1081 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1082 2, 3),
1083 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1084 3, 3),
1085 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1086 4, 3),
1087 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1088 5, 3),
1089 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1090 6, 3),
1091 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1092 7, 3),
1093 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1094 8, 3),
1095 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1096 9, 3),
1097};
1098
1099static struct sensor_device_attribute sda_temp_offset[] = {
1100 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1101 store_temp_offset, 0),
1102 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1103 store_temp_offset, 1),
1104 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1105 store_temp_offset, 2),
1106 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1107 store_temp_offset, 3),
1108 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1109 store_temp_offset, 4),
1110 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1111 store_temp_offset, 5),
1112};
1113
1114static struct sensor_device_attribute sda_temp_type[] = {
1115 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1116 store_temp_type, 0),
1117 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1118 store_temp_type, 1),
1119 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1120 store_temp_type, 2),
1121 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1122 store_temp_type, 3),
1123 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1124 store_temp_type, 4),
1125 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1126 store_temp_type, 5),
1127};
1128
1129static struct sensor_device_attribute sda_temp_alarm[] = {
1130 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1131 TEMP_ALARM_BASE),
1132 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1133 TEMP_ALARM_BASE + 1),
1134 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1135 TEMP_ALARM_BASE + 2),
1136 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1137 TEMP_ALARM_BASE + 3),
1138 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1139 TEMP_ALARM_BASE + 4),
1140 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1141 TEMP_ALARM_BASE + 5),
1142};
1143
1144#define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1145
9de2e2e8
GR		 1146static ssize_t
1147show_name(struct device *dev, struct device_attribute *attr, char *buf)
1148{
1149 struct nct6775_data *data = dev_get_drvdata(dev);
1150
1151 return sprintf(buf, "%s\n", data->name);
1152}
1153
1154static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1155
1156static ssize_t
1157show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1158{
1159 struct nct6775_data *data = dev_get_drvdata(dev);
1160 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1161}
1162
1163static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1164
a6bd5878
GR		 1165/* Case open detection */
1166
1167static ssize_t
1168clear_caseopen(struct device *dev, struct device_attribute *attr,
1169 const char *buf, size_t count)
1170{
1171 struct nct6775_data *data = dev_get_drvdata(dev);
1172 struct nct6775_sio_data *sio_data = dev->platform_data;
1173 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
1174 unsigned long val;
1175 u8 reg;
1176 int ret;
1177
1178 if (kstrtoul(buf, 10, &val) || val != 0)
1179 return -EINVAL;
1180
1181 mutex_lock(&data->update_lock);
1182
1183 /*
1184 * Use CR registers to clear caseopen status.
1185 * The CR registers are the same for all chips, and not all chips
1186 * support clearing the caseopen status through "regular" registers.
1187 */
1188 ret = superio_enter(sio_data->sioreg);
1189 if (ret) {
1190 count = ret;
1191 goto error;
1192 }
1193
1194 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
1195 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
1196 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1197 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1198 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1199 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1200 superio_exit(sio_data->sioreg);
1201
1202 data->valid = false; /* Force cache refresh */
1203error:
1204 mutex_unlock(&data->update_lock);
1205 return count;
1206}
1207
1208static struct sensor_device_attribute sda_caseopen[] = {
1209 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
1210 clear_caseopen, INTRUSION_ALARM_BASE),
1211 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
1212 clear_caseopen, INTRUSION_ALARM_BASE + 1),
1213};
1214
9de2e2e8
GR		 1215/*
1216 * Driver and device management
1217 */
1218
1219static void nct6775_device_remove_files(struct device *dev)
1220{
1221 /*
1222 * some entries in the following arrays may not have been used in
1223 * device_create_file(), but device_remove_file() will ignore them
1224 */
1225 int i;
1226 struct nct6775_data *data = dev_get_drvdata(dev);
1227
1228 for (i = 0; i < data->in_num; i++)
1229 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
1230
aa136e5d
GR		 1231 for (i = 0; i < NUM_TEMP; i++) {
1232 if (!(data->have_temp & (1 << i)))
1233 continue;
1234 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1235 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1236 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1237 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1238 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
1239 if (!(data->have_temp_fixed & (1 << i)))
1240 continue;
1241 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1242 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1243 if (i >= NUM_TEMP_ALARM)
1244 continue;
1245 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1246 }
1247
a6bd5878
GR		 1248 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1249 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1250
9de2e2e8
GR		 1251 device_remove_file(dev, &dev_attr_name);
1252 device_remove_file(dev, &dev_attr_cpu0_vid);
1253}
1254
1255/* Get the monitoring functions started */
1256static inline void nct6775_init_device(struct nct6775_data *data)
1257{
aa136e5d
GR		 1258 int i;
1259 u8 tmp, diode;
9de2e2e8
GR		 1260
1261 /* Start monitoring if needed */
1262 if (data->REG_CONFIG) {
1263 tmp = nct6775_read_value(data, data->REG_CONFIG);
1264 if (!(tmp & 0x01))
1265 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
1266 }
1267
aa136e5d
GR		 1268 /* Enable temperature sensors if needed */
1269 for (i = 0; i < NUM_TEMP; i++) {
1270 if (!(data->have_temp & (1 << i)))
1271 continue;
1272 if (!data->reg_temp_config[i])
1273 continue;
1274 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
1275 if (tmp & 0x01)
1276 nct6775_write_value(data, data->reg_temp_config[i],
1277 tmp & 0xfe);
1278 }
1279
9de2e2e8
GR		 1280 /* Enable VBAT monitoring if needed */
1281 tmp = nct6775_read_value(data, data->REG_VBAT);
1282 if (!(tmp & 0x01))
1283 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
aa136e5d
GR		 1284
1285 diode = nct6775_read_value(data, data->REG_DIODE);
1286
1287 for (i = 0; i < data->temp_fixed_num; i++) {
1288 if (!(data->have_temp_fixed & (1 << i)))
1289 continue;
1290 if ((tmp & (0x02 << i))) /* diode */
1291 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
1292 else /* thermistor */
1293 data->temp_type[i] = 4;
1294 }
9de2e2e8
GR		 1295}
1296
1297static int nct6775_probe(struct platform_device *pdev)
1298{
1299 struct device *dev = &pdev->dev;
1300 struct nct6775_sio_data *sio_data = dev->platform_data;
1301 struct nct6775_data *data;
1302 struct resource *res;
aa136e5d
GR		 1303 int i, s, err = 0;
1304 int src, mask, available;
1305 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
1306 const u16 *reg_temp_alternate, *reg_temp_crit;
1307 int num_reg_temp;
9de2e2e8
GR		 1308
1309 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1310 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
1311 DRVNAME))
1312 return -EBUSY;
1313
1314 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
1315 GFP_KERNEL);
1316 if (!data)
1317 return -ENOMEM;
1318
1319 data->kind = sio_data->kind;
1320 data->addr = res->start;
1321 mutex_init(&data->lock);
1322 mutex_init(&data->update_lock);
1323 data->name = nct6775_device_names[data->kind];
1324 data->bank = 0xff; /* Force initial bank selection */
1325 platform_set_drvdata(pdev, data);
1326
1327 switch (data->kind) {
1328 case nct6775:
1329 data->in_num = 9;
aa136e5d 1330 data->temp_fixed_num = 3;
9de2e2e8
GR		 1331
1332 data->ALARM_BITS = NCT6775_ALARM_BITS;
1333
aa136e5d
GR		 1334 data->temp_label = nct6775_temp_label;
1335 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
1336
9de2e2e8
GR		 1337 data->REG_CONFIG = NCT6775_REG_CONFIG;
1338 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1339 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1340 data->REG_VIN = NCT6775_REG_IN;
1341 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1342 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
aa136e5d
GR		 1343 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1344 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1345 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1346
1347 reg_temp = NCT6775_REG_TEMP;
1348 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1349 reg_temp_over = NCT6775_REG_TEMP_OVER;
1350 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1351 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
1352 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
1353 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
1354
9de2e2e8
GR		 1355 break;
1356 case nct6776:
1357 data->in_num = 9;
aa136e5d 1358 data->temp_fixed_num = 3;
9de2e2e8
GR		 1359
1360 data->ALARM_BITS = NCT6776_ALARM_BITS;
1361
aa136e5d
GR		 1362 data->temp_label = nct6776_temp_label;
1363 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
1364
9de2e2e8
GR		 1365 data->REG_CONFIG = NCT6775_REG_CONFIG;
1366 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1367 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1368 data->REG_VIN = NCT6775_REG_IN;
1369 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1370 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
aa136e5d
GR		 1371 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1372 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1373 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1374
1375 reg_temp = NCT6775_REG_TEMP;
1376 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1377 reg_temp_over = NCT6775_REG_TEMP_OVER;
1378 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1379 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
1380 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
1381 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
1382
9de2e2e8
GR		 1383 break;
1384 case nct6779:
1385 data->in_num = 15;
aa136e5d 1386 data->temp_fixed_num = 6;
9de2e2e8
GR		 1387
1388 data->ALARM_BITS = NCT6779_ALARM_BITS;
1389
aa136e5d
GR		 1390 data->temp_label = nct6779_temp_label;
1391 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
1392
9de2e2e8
GR		 1393 data->REG_CONFIG = NCT6775_REG_CONFIG;
1394 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1395 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1396 data->REG_VIN = NCT6779_REG_IN;
1397 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1398 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
aa136e5d
GR		 1399 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
1400 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1401 data->REG_ALARM = NCT6779_REG_ALARM;
aa136e5d
GR		 1402
1403 reg_temp = NCT6779_REG_TEMP;
1404 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
1405 reg_temp_over = NCT6779_REG_TEMP_OVER;
1406 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
1407 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
1408 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
1409 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
1410
9de2e2e8
GR		 1411 break;
1412 default:
1413 return -ENODEV;
1414 }
1415 data->have_in = (1 << data->in_num) - 1;
aa136e5d
GR		 1416 data->have_temp = 0;
1417
1418 /*
1419 * On some boards, not all available temperature sources are monitored,
1420 * even though some of the monitoring registers are unused.
1421 * Get list of unused monitoring registers, then detect if any fan
1422 * controls are configured to use unmonitored temperature sources.
1423 * If so, assign the unmonitored temperature sources to available
1424 * monitoring registers.
1425 */
1426 mask = 0;
1427 available = 0;
1428 for (i = 0; i < num_reg_temp; i++) {
1429 if (reg_temp[i] == 0)
1430 continue;
1431
1432 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1433 if (!src || (mask & (1 << src)))
1434 available |= 1 << i;
1435
1436 mask |= 1 << src;
1437 }
1438
1439 mask = 0;
1440 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
1441 for (i = 0; i < num_reg_temp; i++) {
1442 if (reg_temp[i] == 0)
1443 continue;
1444
1445 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1446 if (!src || (mask & (1 << src)))
1447 continue;
1448
1449 if (src >= data->temp_label_num ||
1450 !strlen(data->temp_label[src])) {
1451 dev_info(dev,
1452 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
1453 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
1454 continue;
1455 }
1456
1457 mask |= 1 << src;
1458
1459 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
1460 if (src <= data->temp_fixed_num) {
1461 data->have_temp |= 1 << (src - 1);
1462 data->have_temp_fixed |= 1 << (src - 1);
1463 data->reg_temp[0][src - 1] = reg_temp[i];
1464 data->reg_temp[1][src - 1] = reg_temp_over[i];
1465 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
1466 data->reg_temp_config[src - 1] = reg_temp_config[i];
1467 data->temp_src[src - 1] = src;
1468 continue;
1469 }
1470
1471 if (s >= NUM_TEMP)
1472 continue;
1473
1474 /* Use dynamic index for other sources */
1475 data->have_temp |= 1 << s;
1476 data->reg_temp[0][s] = reg_temp[i];
1477 data->reg_temp[1][s] = reg_temp_over[i];
1478 data->reg_temp[2][s] = reg_temp_hyst[i];
1479 data->reg_temp_config[s] = reg_temp_config[i];
1480 if (reg_temp_crit[src - 1])
1481 data->reg_temp[3][s] = reg_temp_crit[src - 1];
1482
1483 data->temp_src[s] = src;
1484 s++;
1485 }
1486
1487#ifdef USE_ALTERNATE
1488 /*
1489 * Go through the list of alternate temp registers and enable
1490 * if possible.
1491 * The temperature is already monitored if the respective bit in <mask>
1492 * is set.
1493 */
1494 for (i = 0; i < data->temp_label_num - 1; i++) {
1495 if (!reg_temp_alternate[i])
1496 continue;
1497 if (mask & (1 << (i + 1)))
1498 continue;
1499 if (i < data->temp_fixed_num) {
1500 if (data->have_temp & (1 << i))
1501 continue;
1502 data->have_temp |= 1 << i;
1503 data->have_temp_fixed |= 1 << i;
1504 data->reg_temp[0][i] = reg_temp_alternate[i];
1505 data->reg_temp[1][i] = reg_temp_over[i];
1506 data->reg_temp[2][i] = reg_temp_hyst[i];
1507 data->temp_src[i] = i + 1;
1508 continue;
1509 }
1510
1511 if (s >= NUM_TEMP) /* Abort if no more space */
1512 break;
1513
1514 data->have_temp |= 1 << s;
1515 data->reg_temp[0][s] = reg_temp_alternate[i];
1516 data->temp_src[s] = i + 1;
1517 s++;
1518 }
1519#endif /* USE_ALTERNATE */
1520
1521 switch (data->kind) {
1522 case nct6775:
1523 break;
1524 case nct6776:
1525 /*
1526 * On NCT6776, AUXTIN and VIN3 pins are shared.
1527 * Only way to detect it is to check if AUXTIN is used
1528 * as a temperature source, and if that source is
1529 * enabled.
1530 *
1531 * If that is the case, disable in6, which reports VIN3.
1532 * Otherwise disable temp3.
1533 */
1534 if (data->have_temp & (1 << 2)) {
1535 u8 reg = nct6775_read_value(data,
1536 data->reg_temp_config[2]);
1537 if (reg & 0x01)
1538 data->have_temp &= ~(1 << 2);
1539 else
1540 data->have_in &= ~(1 << 6);
1541 }
1542 break;
1543 case nct6779:
1544 /*
1545 * Shared pins:
1546 * VIN4 / AUXTIN0
1547 * VIN5 / AUXTIN1
1548 * VIN6 / AUXTIN2
1549 * VIN7 / AUXTIN3
1550 *
1551 * There does not seem to be a clean way to detect if VINx or
1552 * AUXTINx is active, so for keep both sensor types enabled
1553 * for now.
1554 */
1555 break;
1556 }
9de2e2e8
GR		 1557
1558 /* Initialize the chip */
1559 nct6775_init_device(data);
1560
1561 data->vrm = vid_which_vrm();
1562 err = superio_enter(sio_data->sioreg);
1563 if (err)
1564 return err;
1565
1566 /*
1567 * Read VID value
1568 * We can get the VID input values directly at logical device D 0xe3.
1569 */
1570 superio_select(sio_data->sioreg, NCT6775_LD_VID);
1571 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1572 superio_exit(sio_data->sioreg);
1573
1574 err = device_create_file(dev, &dev_attr_cpu0_vid);
1575 if (err)
1576 return err;
1577
1578 for (i = 0; i < data->in_num; i++) {
1579 if (!(data->have_in & (1 << i)))
1580 continue;
1581 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
1582 if (err)
1583 goto exit_remove;
1584 }
1585
aa136e5d
GR		 1586 for (i = 0; i < NUM_TEMP; i++) {
1587 if (!(data->have_temp & (1 << i)))
1588 continue;
1589 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
1590 if (err)
1591 goto exit_remove;
1592 if (data->temp_label) {
1593 err = device_create_file(dev,
1594 &sda_temp_label[i].dev_attr);
1595 if (err)
1596 goto exit_remove;
1597 }
1598 if (data->reg_temp[1][i]) {
1599 err = device_create_file(dev,
1600 &sda_temp_max[i].dev_attr);
1601 if (err)
1602 goto exit_remove;
1603 }
1604 if (data->reg_temp[2][i]) {
1605 err = device_create_file(dev,
1606 &sda_temp_max_hyst[i].dev_attr);
1607 if (err)
1608 goto exit_remove;
1609 }
1610 if (data->reg_temp[3][i]) {
1611 err = device_create_file(dev,
1612 &sda_temp_crit[i].dev_attr);
1613 if (err)
1614 goto exit_remove;
1615 }
1616 if (!(data->have_temp_fixed & (1 << i)))
1617 continue;
1618 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
1619 if (err)
1620 goto exit_remove;
1621 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
1622 if (err)
1623 goto exit_remove;
1624 if (i >= NUM_TEMP_ALARM ||
1625 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
1626 continue;
1627 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
1628 if (err)
1629 goto exit_remove;
1630 }
1631
a6bd5878
GR		 1632 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
1633 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
1634 continue;
1635 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
1636 if (err)
1637 goto exit_remove;
1638 }
1639
9de2e2e8
GR		 1640 err = device_create_file(dev, &dev_attr_name);
1641 if (err)
1642 goto exit_remove;
1643
1644 data->hwmon_dev = hwmon_device_register(dev);
1645 if (IS_ERR(data->hwmon_dev)) {
1646 err = PTR_ERR(data->hwmon_dev);
1647 goto exit_remove;
1648 }
1649
1650 return 0;
1651
1652exit_remove:
1653 nct6775_device_remove_files(dev);
1654 return err;
1655}
1656
1657static int nct6775_remove(struct platform_device *pdev)
1658{
1659 struct nct6775_data *data = platform_get_drvdata(pdev);
1660
1661 hwmon_device_unregister(data->hwmon_dev);
1662 nct6775_device_remove_files(&pdev->dev);
1663
1664 return 0;
1665}
1666
1667static struct platform_driver nct6775_driver = {
1668 .driver = {
1669 .owner = THIS_MODULE,
1670 .name = DRVNAME,
1671 },
1672 .probe = nct6775_probe,
1673 .remove = nct6775_remove,
1674};
1675
1676/* nct6775_find() looks for a '627 in the Super-I/O config space */
1677static int __init nct6775_find(int sioaddr, unsigned short *addr,
1678 struct nct6775_sio_data *sio_data)
1679{
1680 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
1681 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
1682 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
1683
1684 u16 val;
1685 const char *sio_name;
1686 int err;
1687
1688 err = superio_enter(sioaddr);
1689 if (err)
1690 return err;
1691
1692 if (force_id)
1693 val = force_id;
1694 else
1695 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1696 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1697 switch (val & SIO_ID_MASK) {
1698 case SIO_NCT6775_ID:
1699 sio_data->kind = nct6775;
1700 sio_name = sio_name_NCT6775;
1701 break;
1702 case SIO_NCT6776_ID:
1703 sio_data->kind = nct6776;
1704 sio_name = sio_name_NCT6776;
1705 break;
1706 case SIO_NCT6779_ID:
1707 sio_data->kind = nct6779;
1708 sio_name = sio_name_NCT6779;
1709 break;
1710 default:
1711 if (val != 0xffff)
1712 pr_debug("unsupported chip ID: 0x%04x\n", val);
1713 superio_exit(sioaddr);
1714 return -ENODEV;
1715 }
1716
1717 /* We have a known chip, find the HWM I/O address */
1718 superio_select(sioaddr, NCT6775_LD_HWM);
1719 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1720 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1721 *addr = val & IOREGION_ALIGNMENT;
1722 if (*addr == 0) {
1723 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
1724 superio_exit(sioaddr);
1725 return -ENODEV;
1726 }
1727
1728 /* Activate logical device if needed */
1729 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1730 if (!(val & 0x01)) {
1731 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
1732 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1733 }
1734
1735 superio_exit(sioaddr);
1736 pr_info("Found %s chip at %#x\n", sio_name, *addr);
1737 sio_data->sioreg = sioaddr;
1738
1739 return 0;
1740}
1741
1742/*
1743 * when Super-I/O functions move to a separate file, the Super-I/O
1744 * bus will manage the lifetime of the device and this module will only keep
1745 * track of the nct6775 driver. But since we platform_device_alloc(), we
1746 * must keep track of the device
1747 */
1748static struct platform_device *pdev;
1749
1750static int __init sensors_nct6775_init(void)
1751{
1752 int err;
1753 unsigned short address;
1754 struct resource res;
1755 struct nct6775_sio_data sio_data;
1756
1757 /*
1758 * initialize sio_data->kind and sio_data->sioreg.
1759 *
1760 * when Super-I/O functions move to a separate file, the Super-I/O
1761 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1762 * nct6775 hardware monitor, and call probe()
1763 */
1764 if (nct6775_find(0x2e, &address, &sio_data) &&
1765 nct6775_find(0x4e, &address, &sio_data))
1766 return -ENODEV;
1767
1768 err = platform_driver_register(&nct6775_driver);
1769 if (err)
1770 goto exit;
1771
1772 pdev = platform_device_alloc(DRVNAME, address);
1773 if (!pdev) {
1774 err = -ENOMEM;
1775 pr_err("Device allocation failed\n");
1776 goto exit_unregister;
1777 }
1778
1779 err = platform_device_add_data(pdev, &sio_data,
1780 sizeof(struct nct6775_sio_data));
1781 if (err) {
1782 pr_err("Platform data allocation failed\n");
1783 goto exit_device_put;
1784 }
1785
1786 memset(&res, 0, sizeof(res));
1787 res.name = DRVNAME;
1788 res.start = address + IOREGION_OFFSET;
1789 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1790 res.flags = IORESOURCE_IO;
1791
1792 err = acpi_check_resource_conflict(&res);
1793 if (err)
1794 goto exit_device_put;
1795
1796 err = platform_device_add_resources(pdev, &res, 1);
1797 if (err) {
1798 pr_err("Device resource addition failed (%d)\n", err);
1799 goto exit_device_put;
1800 }
1801
1802 /* platform_device_add calls probe() */
1803 err = platform_device_add(pdev);
1804 if (err) {
1805 pr_err("Device addition failed (%d)\n", err);
1806 goto exit_device_put;
1807 }
1808
1809 return 0;
1810
1811exit_device_put:
1812 platform_device_put(pdev);
1813exit_unregister:
1814 platform_driver_unregister(&nct6775_driver);
1815exit:
1816 return err;
1817}
1818
1819static void __exit sensors_nct6775_exit(void)
1820{
1821 platform_device_unregister(pdev);
1822 platform_driver_unregister(&nct6775_driver);
1823}
1824
1825MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
1826MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
1827MODULE_LICENSE("GPL");
1828
1829module_init(sensors_nct6775_init);
1830module_exit(sensors_nct6775_exit);
kernel source for telekom puls (alcatel/mediatek)