[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#include "drmP.h"
#include "drm_crtc_helper.h"
#include "radeon_drm.h"
#include "radeon_reg.h"
#include "radeon.h"
#include "atom.h"

#define RADEON_WAIT_IDLE_TIMEOUT 200

/**
 * radeon_driver_irq_handler_kms - irq handler for KMS
 *
 * @DRM_IRQ_ARGS: args
 *
 * This is the irq handler for the radeon KMS driver (all asics).
 * radeon_irq_process is a macro that points to the per-asic
 * irq handler callback.
 */
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
{
	struct drm_device *dev = (struct drm_device *) arg;
	struct radeon_device *rdev = dev->dev_private;

	return radeon_irq_process(rdev);
}

/*
 * Handle hotplug events outside the interrupt handler proper.
 */
/**
 * radeon_hotplug_work_func - display hotplug work handler
 *
 * @work: work struct
 *
 * This is the hot plug event work handler (all asics).
 * The work gets scheduled from the irq handler if there
 * was a hot plug interrupt.  It walks the connector table
 * and calls the hotplug handler for each one, then sends
 * a drm hotplug event to alert userspace.
 */
static void radeon_hotplug_work_func(struct work_struct *work)
{
	struct radeon_device *rdev = container_of(work, struct radeon_device,
						  hotplug_work);
	struct drm_device *dev = rdev->ddev;
	struct drm_mode_config *mode_config = &dev->mode_config;
	struct drm_connector *connector;

	if (mode_config->num_connector) {
		list_for_each_entry(connector, &mode_config->connector_list, head)
			radeon_connector_hotplug(connector);
	}
	/* Just fire off a uevent and let userspace tell us what to do */
	drm_helper_hpd_irq_event(dev);
}

/**
 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
 *
 * @dev: drm dev pointer
 *
 * Gets the hw ready to enable irqs (all asics).
 * This function disables all interrupt sources on the GPU.
 */
void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
{
	struct radeon_device *rdev = dev->dev_private;
	unsigned long irqflags;
	unsigned i;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	/* Disable *all* interrupts */
	for (i = 0; i < RADEON_NUM_RINGS; i++)
		atomic_set(&rdev->irq.ring_int[i], 0);
	rdev->irq.gui_idle = false;
	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
		rdev->irq.hpd[i] = false;
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
		rdev->irq.crtc_vblank_int[i] = false;
		atomic_set(&rdev->irq.pflip[i], 0);
		rdev->irq.afmt[i] = false;
	}
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	/* Clear bits */
	radeon_irq_process(rdev);
}

/**
 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
 *
 * @dev: drm dev pointer
 *
 * Handles stuff to be done after enabling irqs (all asics).
 * Returns 0 on success.
 */
int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
{
	dev->max_vblank_count = 0x001fffff;
	return 0;
}

/**
 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
 *
 * @dev: drm dev pointer
 *
 * This function disables all interrupt sources on the GPU (all asics).
 */
void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
{
	struct radeon_device *rdev = dev->dev_private;
	unsigned long irqflags;
	unsigned i;

	if (rdev == NULL) {
		return;
	}
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	/* Disable *all* interrupts */
	for (i = 0; i < RADEON_NUM_RINGS; i++)
		atomic_set(&rdev->irq.ring_int[i], 0);
	rdev->irq.gui_idle = false;
	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
		rdev->irq.hpd[i] = false;
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
		rdev->irq.crtc_vblank_int[i] = false;
		atomic_set(&rdev->irq.pflip[i], 0);
		rdev->irq.afmt[i] = false;
	}
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_msi_ok - asic specific msi checks
 *
 * @rdev: radeon device pointer
 *
 * Handles asic specific MSI checks to determine if
 * MSIs should be enabled on a particular chip (all asics).
 * Returns true if MSIs should be enabled, false if MSIs
 * should not be enabled.
 */
static bool radeon_msi_ok(struct radeon_device *rdev)
{
	/* RV370/RV380 was first asic with MSI support */
	if (rdev->family < CHIP_RV380)
		return false;

	/* MSIs don't work on AGP */
	if (rdev->flags & RADEON_IS_AGP)
		return false;

	/* force MSI on */
	if (radeon_msi == 1)
		return true;
	else if (radeon_msi == 0)
		return false;

	/* Quirks */
	/* HP RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x103c) &&
	    (rdev->pdev->subsystem_device == 0x30c2))
		return true;

	/* Dell RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x1028) &&
	    (rdev->pdev->subsystem_device == 0x01fc))
		return true;

	/* Dell RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x1028) &&
	    (rdev->pdev->subsystem_device == 0x01fd))
		return true;

	/* RV515 seems to have MSI issues where it loses
	 * MSI rearms occasionally. This leads to lockups and freezes.
	 * disable it by default.
	 */
	if (rdev->family == CHIP_RV515)
		return false;
	if (rdev->flags & RADEON_IS_IGP) {
		/* APUs work fine with MSIs */
		if (rdev->family >= CHIP_PALM)
			return true;
		/* lots of IGPs have problems with MSIs */
		return false;
	}

	return true;
}

/**
 * radeon_irq_kms_init - init driver interrupt info
 *
 * @rdev: radeon device pointer
 *
 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
 * Returns 0 for success, error for failure.
 */
int radeon_irq_kms_init(struct radeon_device *rdev)
{
	int r = 0;

	INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);

	spin_lock_init(&rdev->irq.lock);
	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
	if (r) {
		return r;
	}
	/* enable msi */
	rdev->msi_enabled = 0;

	if (radeon_msi_ok(rdev)) {
		int ret = pci_enable_msi(rdev->pdev);
		if (!ret) {
			rdev->msi_enabled = 1;
			dev_info(rdev->dev, "radeon: using MSI.\n");
		}
	}
	rdev->irq.installed = true;
	r = drm_irq_install(rdev->ddev);
	if (r) {
		rdev->irq.installed = false;
		return r;
	}
	DRM_INFO("radeon: irq initialized.\n");
	return 0;
}

/**
 * radeon_irq_kms_fini - tear down driver interrrupt info
 *
 * @rdev: radeon device pointer
 *
 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
 */
void radeon_irq_kms_fini(struct radeon_device *rdev)
{
	drm_vblank_cleanup(rdev->ddev);
	if (rdev->irq.installed) {
		drm_irq_uninstall(rdev->ddev);
		rdev->irq.installed = false;
		if (rdev->msi_enabled)
			pci_disable_msi(rdev->pdev);
	}
	flush_work_sync(&rdev->hotplug_work);
}

/**
 * radeon_irq_kms_sw_irq_get - enable software interrupt
 *
 * @rdev: radeon device pointer
 * @ring: ring whose interrupt you want to enable
 *
 * Enables the software interrupt for a specific ring (all asics).
 * The software interrupt is generally used to signal a fence on
 * a particular ring.
 */
void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_sw_irq_put - disable software interrupt
 *
 * @rdev: radeon device pointer
 * @ring: ring whose interrupt you want to disable
 *
 * Disables the software interrupt for a specific ring (all asics).
 * The software interrupt is generally used to signal a fence on
 * a particular ring.
 */
void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
 *
 * @rdev: radeon device pointer
 * @crtc: crtc whose interrupt you want to enable
 *
 * Enables the pageflip interrupt for a specific crtc (all asics).
 * For pageflips we use the vblank interrupt source.
 */
void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
{
	unsigned long irqflags;

	if (crtc < 0 || crtc >= rdev->num_crtc)
		return;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
 *
 * @rdev: radeon device pointer
 * @crtc: crtc whose interrupt you want to disable
 *
 * Disables the pageflip interrupt for a specific crtc (all asics).
 * For pageflips we use the vblank interrupt source.
 */
void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
{
	unsigned long irqflags;

	if (crtc < 0 || crtc >= rdev->num_crtc)
		return;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
 *
 * @rdev: radeon device pointer
 * @block: afmt block whose interrupt you want to enable
 *
 * Enables the afmt change interrupt for a specific afmt block (all asics).
 */
void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
{
	unsigned long irqflags;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.afmt[block] = true;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);

}

/**
 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
 *
 * @rdev: radeon device pointer
 * @block: afmt block whose interrupt you want to disable
 *
 * Disables the afmt change interrupt for a specific afmt block (all asics).
 */
void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
{
	unsigned long irqflags;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.afmt[block] = false;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
 *
 * @rdev: radeon device pointer
 * @hpd_mask: mask of hpd pins you want to enable.
 *
 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
 */
void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
{
	unsigned long irqflags;
	int i;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
 *
 * @rdev: radeon device pointer
 * @hpd_mask: mask of hpd pins you want to disable.
 *
 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
 */
void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
{
	unsigned long irqflags;
	int i;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_irq_kms_wait_gui_idle - waits for drawing engine to be idle
 *
 * @rdev: radeon device pointer
 *
 * Enabled the GUI idle interrupt and waits for it to fire (r6xx+).
 * This is currently used to make sure the 3D engine is idle for power
 * management, but should be replaces with proper fence waits.
 * GUI idle interrupts don't work very well on pre-r6xx hw and it also
 * does not take into account other aspects of the chip that may be busy.
 * DO NOT USE GOING FORWARD.
 */
int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev)
{
	unsigned long irqflags;
	int r;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.gui_idle = true;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);

	r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev),
			       msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.gui_idle = false;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	return r;
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Jerome Glisse.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Dave Airlie
	25	* Alex Deucher
	26	* Jerome Glisse
	27	*/
	28	#include "drmP.h"
eb1f8e4f	29	#include "drm_crtc_helper.h"
771fe6b9 JG	30	#include "radeon_drm.h"
771fe6b9 JG	31	#include "radeon_reg.h"
771fe6b9 JG	32	#include "radeon.h"
	33	#include "atom.h"
	34
fb98257a CK	35	#define RADEON_WAIT_IDLE_TIMEOUT 200
fb98257a CK	36
b73ba98d AD	37	/**
	38	* radeon_driver_irq_handler_kms - irq handler for KMS
	39	*
	40	* @DRM_IRQ_ARGS: args
	41	*
	42	* This is the irq handler for the radeon KMS driver (all asics).
	43	* radeon_irq_process is a macro that points to the per-asic
	44	* irq handler callback.
	45	*/
771fe6b9 JG	46	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
	47	{
	48	struct drm_device dev = (struct drm_device ) arg;
	49	struct radeon_device *rdev = dev->dev_private;
	50
	51	return radeon_irq_process(rdev);
	52	}
	53
d4877cf2 AD	54	/*
	55	* Handle hotplug events outside the interrupt handler proper.
	56	*/
b73ba98d AD	57	/**
	58	* radeon_hotplug_work_func - display hotplug work handler
	59	*
	60	* @work: work struct
	61	*
	62	* This is the hot plug event work handler (all asics).
	63	* The work gets scheduled from the irq handler if there
	64	* was a hot plug interrupt. It walks the connector table
	65	* and calls the hotplug handler for each one, then sends
	66	* a drm hotplug event to alert userspace.
	67	*/
d4877cf2 AD	68	static void radeon_hotplug_work_func(struct work_struct *work)
	69	{
	70	struct radeon_device *rdev = container_of(work, struct radeon_device,
	71	hotplug_work);
	72	struct drm_device *dev = rdev->ddev;
	73	struct drm_mode_config *mode_config = &dev->mode_config;
	74	struct drm_connector *connector;
	75
	76	if (mode_config->num_connector) {
	77	list_for_each_entry(connector, &mode_config->connector_list, head)
	78	radeon_connector_hotplug(connector);
	79	}
	80	/* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f	81	drm_helper_hpd_irq_event(dev);
d4877cf2 AD	82	}
d4877cf2 AD	83
b73ba98d AD	84	/**
	85	* radeon_driver_irq_preinstall_kms - drm irq preinstall callback
	86	*
	87	* @dev: drm dev pointer
	88	*
	89	* Gets the hw ready to enable irqs (all asics).
	90	* This function disables all interrupt sources on the GPU.
	91	*/
771fe6b9 JG	92	void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
	93	{
	94	struct radeon_device *rdev = dev->dev_private;
fb98257a	95	unsigned long irqflags;
771fe6b9 JG	96	unsigned i;
771fe6b9 JG	97
fb98257a	98	spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9	99	/* Disable all interrupts */
1b37078b	100	for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f	101	atomic_set(&rdev->irq.ring_int[i], 0);
2031f77c	102	rdev->irq.gui_idle = false;
54bd5206	103	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e	104	rdev->irq.hpd[i] = false;
54bd5206 IH	105	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
54bd5206 IH	106	rdev->irq.crtc_vblank_int[i] = false;
736fc37f	107	atomic_set(&rdev->irq.pflip[i], 0);
f122c610	108	rdev->irq.afmt[i] = false;
6f34be50	109	}
771fe6b9	110	radeon_irq_set(rdev);
fb98257a	111	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9 JG	112	/* Clear bits */
	113	radeon_irq_process(rdev);
	114	}
	115
b73ba98d AD	116	/**
	117	* radeon_driver_irq_postinstall_kms - drm irq preinstall callback
	118	*
	119	* @dev: drm dev pointer
	120	*
	121	* Handles stuff to be done after enabling irqs (all asics).
	122	* Returns 0 on success.
	123	*/
771fe6b9 JG	124	int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
771fe6b9 JG	125	{
771fe6b9	126	dev->max_vblank_count = 0x001fffff;
771fe6b9 JG	127	return 0;
	128	}
	129
b73ba98d AD	130	/**
	131	* radeon_driver_irq_uninstall_kms - drm irq uninstall callback
	132	*
	133	* @dev: drm dev pointer
	134	*
	135	* This function disables all interrupt sources on the GPU (all asics).
	136	*/
771fe6b9 JG	137	void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
	138	{
	139	struct radeon_device *rdev = dev->dev_private;
fb98257a	140	unsigned long irqflags;
771fe6b9 JG	141	unsigned i;
	142
	143	if (rdev == NULL) {
	144	return;
	145	}
fb98257a	146	spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9	147	/* Disable all interrupts */
1b37078b	148	for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f	149	atomic_set(&rdev->irq.ring_int[i], 0);
2031f77c	150	rdev->irq.gui_idle = false;
54bd5206	151	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9	152	rdev->irq.hpd[i] = false;
54bd5206 IH	153	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
54bd5206 IH	154	rdev->irq.crtc_vblank_int[i] = false;
736fc37f	155	atomic_set(&rdev->irq.pflip[i], 0);
f122c610	156	rdev->irq.afmt[i] = false;
6f34be50	157	}
771fe6b9	158	radeon_irq_set(rdev);
fb98257a	159	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9 JG	160	}
771fe6b9 JG	161
b73ba98d AD	162	/**
	163	* radeon_msi_ok - asic specific msi checks
	164	*
	165	* @rdev: radeon device pointer
	166	*
	167	* Handles asic specific MSI checks to determine if
	168	* MSIs should be enabled on a particular chip (all asics).
	169	* Returns true if MSIs should be enabled, false if MSIs
	170	* should not be enabled.
	171	*/
8f6c25c5 AD	172	static bool radeon_msi_ok(struct radeon_device *rdev)
	173	{
	174	/* RV370/RV380 was first asic with MSI support */
	175	if (rdev->family < CHIP_RV380)
	176	return false;
	177
	178	/* MSIs don't work on AGP */
	179	if (rdev->flags & RADEON_IS_AGP)
	180	return false;
	181
a18cee15 AD	182	/* force MSI on */
	183	if (radeon_msi == 1)
	184	return true;
	185	else if (radeon_msi == 0)
	186	return false;
	187
b362105f AD	188	/* Quirks */
	189	/* HP RS690 only seems to work with MSIs. */
	190	if ((rdev->pdev->device == 0x791f) &&
	191	(rdev->pdev->subsystem_vendor == 0x103c) &&
	192	(rdev->pdev->subsystem_device == 0x30c2))
	193	return true;
	194
44517c44 AD	195	/* Dell RS690 only seems to work with MSIs. */
	196	if ((rdev->pdev->device == 0x791f) &&
	197	(rdev->pdev->subsystem_vendor == 0x1028) &&
	198	(rdev->pdev->subsystem_device == 0x01fc))
	199	return true;
	200
01e718ec AD	201	/* Dell RS690 only seems to work with MSIs. */
	202	if ((rdev->pdev->device == 0x791f) &&
	203	(rdev->pdev->subsystem_vendor == 0x1028) &&
	204	(rdev->pdev->subsystem_device == 0x01fd))
	205	return true;
	206
16a5e32b DA	207	/* RV515 seems to have MSI issues where it loses
	208	* MSI rearms occasionally. This leads to lockups and freezes.
	209	* disable it by default.
	210	*/
	211	if (rdev->family == CHIP_RV515)
	212	return false;
8f6c25c5 AD	213	if (rdev->flags & RADEON_IS_IGP) {
	214	/* APUs work fine with MSIs */
	215	if (rdev->family >= CHIP_PALM)
	216	return true;
	217	/* lots of IGPs have problems with MSIs */
	218	return false;
	219	}
	220
	221	return true;
	222	}
	223
b73ba98d AD	224	/**
	225	* radeon_irq_kms_init - init driver interrupt info
	226	*
	227	* @rdev: radeon device pointer
	228	*
	229	* Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
	230	* Returns 0 for success, error for failure.
	231	*/
771fe6b9 JG	232	int radeon_irq_kms_init(struct radeon_device *rdev)
	233	{
	234	int r = 0;
	235
32c87fca	236	INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
f122c610	237	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
32c87fca	238
fb98257a	239	spin_lock_init(&rdev->irq.lock);
9e7b414e	240	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
771fe6b9 JG	241	if (r) {
	242	return r;
	243	}
3e5cb98d AD	244	/* enable msi */
3e5cb98d AD	245	rdev->msi_enabled = 0;
8f6c25c5 AD	246
8f6c25c5 AD	247	if (radeon_msi_ok(rdev)) {
3e5cb98d	248	int ret = pci_enable_msi(rdev->pdev);
d8f60cfc	249	if (!ret) {
3e5cb98d	250	rdev->msi_enabled = 1;
da7be684	251	dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc	252	}
3e5cb98d	253	}
771fe6b9	254	rdev->irq.installed = true;
003e69f9 JG	255	r = drm_irq_install(rdev->ddev);
	256	if (r) {
	257	rdev->irq.installed = false;
	258	return r;
	259	}
771fe6b9 JG	260	DRM_INFO("radeon: irq initialized.\n");
	261	return 0;
	262	}
	263
b73ba98d AD	264	/**
	265	* radeon_irq_kms_fini - tear down driver interrrupt info
	266	*
	267	* @rdev: radeon device pointer
	268	*
	269	* Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
	270	*/
771fe6b9 JG	271	void radeon_irq_kms_fini(struct radeon_device *rdev)
771fe6b9 JG	272	{
003e69f9	273	drm_vblank_cleanup(rdev->ddev);
771fe6b9	274	if (rdev->irq.installed) {
771fe6b9	275	drm_irq_uninstall(rdev->ddev);
003e69f9	276	rdev->irq.installed = false;
3e5cb98d AD	277	if (rdev->msi_enabled)
3e5cb98d AD	278	pci_disable_msi(rdev->pdev);
771fe6b9	279	}
32c87fca	280	flush_work_sync(&rdev->hotplug_work);
771fe6b9	281	}
1614f8b1	282
b73ba98d AD	283	/**
	284	* radeon_irq_kms_sw_irq_get - enable software interrupt
	285	*
	286	* @rdev: radeon device pointer
	287	* @ring: ring whose interrupt you want to enable
	288	*
	289	* Enables the software interrupt for a specific ring (all asics).
	290	* The software interrupt is generally used to signal a fence on
	291	* a particular ring.
	292	*/
1b37078b	293	void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1 DA	294	{
	295	unsigned long irqflags;
	296
736fc37f CK	297	if (!rdev->ddev->irq_enabled)
	298	return;
	299
	300	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
	301	spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1	302	radeon_irq_set(rdev);
736fc37f	303	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1	304	}
1614f8b1 DA	305	}
1614f8b1 DA	306
b73ba98d AD	307	/**
	308	* radeon_irq_kms_sw_irq_put - disable software interrupt
	309	*
	310	* @rdev: radeon device pointer
	311	* @ring: ring whose interrupt you want to disable
	312	*
	313	* Disables the software interrupt for a specific ring (all asics).
	314	* The software interrupt is generally used to signal a fence on
	315	* a particular ring.
	316	*/
1b37078b	317	void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1 DA	318	{
	319	unsigned long irqflags;
	320
736fc37f CK	321	if (!rdev->ddev->irq_enabled)
	322	return;
	323
	324	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
	325	spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1	326	radeon_irq_set(rdev);
736fc37f	327	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1	328	}
1614f8b1 DA	329	}
1614f8b1 DA	330
b73ba98d AD	331	/**
	332	* radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
	333	*
	334	* @rdev: radeon device pointer
	335	* @crtc: crtc whose interrupt you want to enable
	336	*
	337	* Enables the pageflip interrupt for a specific crtc (all asics).
	338	* For pageflips we use the vblank interrupt source.
	339	*/
6f34be50 AD	340	void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
	341	{
	342	unsigned long irqflags;
	343
	344	if (crtc < 0 \|\| crtc >= rdev->num_crtc)
	345	return;
	346
736fc37f CK	347	if (!rdev->ddev->irq_enabled)
	348	return;
	349
	350	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
	351	spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50	352	radeon_irq_set(rdev);
736fc37f	353	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50	354	}
6f34be50 AD	355	}
6f34be50 AD	356
b73ba98d AD	357	/**
	358	* radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
	359	*
	360	* @rdev: radeon device pointer
	361	* @crtc: crtc whose interrupt you want to disable
	362	*
	363	* Disables the pageflip interrupt for a specific crtc (all asics).
	364	* For pageflips we use the vblank interrupt source.
	365	*/
6f34be50 AD	366	void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
	367	{
	368	unsigned long irqflags;
	369
	370	if (crtc < 0 \|\| crtc >= rdev->num_crtc)
	371	return;
	372
736fc37f CK	373	if (!rdev->ddev->irq_enabled)
	374	return;
	375
	376	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
	377	spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50	378	radeon_irq_set(rdev);
736fc37f	379	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50	380	}
6f34be50 AD	381	}
6f34be50 AD	382
b73ba98d AD	383	/**
	384	* radeon_irq_kms_enable_afmt - enable audio format change interrupt
	385	*
	386	* @rdev: radeon device pointer
	387	* @block: afmt block whose interrupt you want to enable
	388	*
	389	* Enables the afmt change interrupt for a specific afmt block (all asics).
	390	*/
fb98257a CK	391	void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
	392	{
	393	unsigned long irqflags;
	394
	395	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	396	rdev->irq.afmt[block] = true;
	397	radeon_irq_set(rdev);
	398	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	399
	400	}
	401
b73ba98d AD	402	/**
	403	* radeon_irq_kms_disable_afmt - disable audio format change interrupt
	404	*
	405	* @rdev: radeon device pointer
	406	* @block: afmt block whose interrupt you want to disable
	407	*
	408	* Disables the afmt change interrupt for a specific afmt block (all asics).
	409	*/
fb98257a CK	410	void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
	411	{
	412	unsigned long irqflags;
	413
	414	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	415	rdev->irq.afmt[block] = false;
	416	radeon_irq_set(rdev);
	417	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	418	}
	419
b73ba98d AD	420	/**
	421	* radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
	422	*
	423	* @rdev: radeon device pointer
	424	* @hpd_mask: mask of hpd pins you want to enable.
	425	*
	426	* Enables the hotplug detect interrupt for a specific hpd pin (all asics).
	427	*/
fb98257a CK	428	void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
	429	{
	430	unsigned long irqflags;
	431	int i;
	432
	433	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	434	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
	435	rdev->irq.hpd[i] \|= !!(hpd_mask & (1 << i));
	436	radeon_irq_set(rdev);
	437	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	438	}
	439
b73ba98d AD	440	/**
	441	* radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
	442	*
	443	* @rdev: radeon device pointer
	444	* @hpd_mask: mask of hpd pins you want to disable.
	445	*
	446	* Disables the hotplug detect interrupt for a specific hpd pin (all asics).
	447	*/
fb98257a CK	448	void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
	449	{
	450	unsigned long irqflags;
	451	int i;
	452
	453	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	454	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
	455	rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
	456	radeon_irq_set(rdev);
	457	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	458	}
	459
b73ba98d AD	460	/**
	461	* radeon_irq_kms_wait_gui_idle - waits for drawing engine to be idle
	462	*
	463	* @rdev: radeon device pointer
	464	*
	465	* Enabled the GUI idle interrupt and waits for it to fire (r6xx+).
	466	* This is currently used to make sure the 3D engine is idle for power
	467	* management, but should be replaces with proper fence waits.
	468	* GUI idle interrupts don't work very well on pre-r6xx hw and it also
	469	* does not take into account other aspects of the chip that may be busy.
	470	* DO NOT USE GOING FORWARD.
	471	*/
fb98257a CK	472	int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev)
	473	{
	474	unsigned long irqflags;
	475	int r;
	476
	477	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	478	rdev->irq.gui_idle = true;
	479	radeon_irq_set(rdev);
	480	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	481
	482	r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev),
	483	msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));
	484
	485	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	486	rdev->irq.gui_idle = false;
	487	radeon_irq_set(rdev);
	488	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	489	return r;
	490	}