[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_encoders.c

/*
 * Copyright 2007-8 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 */
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <drm/radeon_drm.h>
#include "radeon.h"
#include "atom.h"

static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_encoder *clone_encoder;
	uint32_t index_mask = 0;
	int count;

	/* DIG routing gets problematic */
	if (rdev->family >= CHIP_R600)
		return index_mask;
	/* LVDS/TV are too wacky */
	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
		return index_mask;
	/* DVO requires 2x ppll clocks depending on tmds chip */
	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
		return index_mask;

	count = -1;
	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
		struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
		count++;

		if (clone_encoder == encoder)
			continue;
		if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
			continue;
		if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
			continue;
		else
			index_mask |= (1 << count);
	}
	return index_mask;
}

void radeon_setup_encoder_clones(struct drm_device *dev)
{
	struct drm_encoder *encoder;

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		encoder->possible_clones = radeon_encoder_clones(encoder);
	}
}

uint32_t
radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
{
	struct radeon_device *rdev = dev->dev_private;
	uint32_t ret = 0;

	switch (supported_device) {
	case ATOM_DEVICE_CRT1_SUPPORT:
	case ATOM_DEVICE_TV1_SUPPORT:
	case ATOM_DEVICE_TV2_SUPPORT:
	case ATOM_DEVICE_CRT2_SUPPORT:
	case ATOM_DEVICE_CV_SUPPORT:
		switch (dac) {
		case 1: /* dac a */
			if ((rdev->family == CHIP_RS300) ||
			    (rdev->family == CHIP_RS400) ||
			    (rdev->family == CHIP_RS480))
				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
			else if (ASIC_IS_AVIVO(rdev))
				ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
			else
				ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
			break;
		case 2: /* dac b */
			if (ASIC_IS_AVIVO(rdev))
				ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
			else {
				/*if (rdev->family == CHIP_R200)
				  ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
				  else*/
				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
			}
			break;
		case 3: /* external dac */
			if (ASIC_IS_AVIVO(rdev))
				ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
			else
				ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
			break;
		}
		break;
	case ATOM_DEVICE_LCD1_SUPPORT:
		if (ASIC_IS_AVIVO(rdev))
			ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
		else
			ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
		break;
	case ATOM_DEVICE_DFP1_SUPPORT:
		if ((rdev->family == CHIP_RS300) ||
		    (rdev->family == CHIP_RS400) ||
		    (rdev->family == CHIP_RS480))
			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
		else if (ASIC_IS_AVIVO(rdev))
			ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
		else
			ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
		break;
	case ATOM_DEVICE_LCD2_SUPPORT:
	case ATOM_DEVICE_DFP2_SUPPORT:
		if ((rdev->family == CHIP_RS600) ||
		    (rdev->family == CHIP_RS690) ||
		    (rdev->family == CHIP_RS740))
			ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
		else if (ASIC_IS_AVIVO(rdev))
			ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
		else
			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
		break;
	case ATOM_DEVICE_DFP3_SUPPORT:
		ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
		break;
	}

	return ret;
}

void
radeon_link_encoder_connector(struct drm_device *dev)
{
	struct drm_connector *connector;
	struct radeon_connector *radeon_connector;
	struct drm_encoder *encoder;
	struct radeon_encoder *radeon_encoder;

	/* walk the list and link encoders to connectors */
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		radeon_connector = to_radeon_connector(connector);
		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
			radeon_encoder = to_radeon_encoder(encoder);
			if (radeon_encoder->devices & radeon_connector->devices)
				drm_mode_connector_attach_encoder(connector, encoder);
		}
	}
}

void radeon_encoder_set_active_device(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_connector *connector;

	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		if (connector->encoder == encoder) {
			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
			radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
				  radeon_encoder->active_device, radeon_encoder->devices,
				  radeon_connector->devices, encoder->encoder_type);
		}
	}
}

struct drm_connector *
radeon_get_connector_for_encoder(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_connector *connector;
	struct radeon_connector *radeon_connector;

	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		radeon_connector = to_radeon_connector(connector);
		if (radeon_encoder->active_device & radeon_connector->devices)
			return connector;
	}
	return NULL;
}

struct drm_connector *
radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_connector *connector;
	struct radeon_connector *radeon_connector;

	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		radeon_connector = to_radeon_connector(connector);
		if (radeon_encoder->devices & radeon_connector->devices)
			return connector;
	}
	return NULL;
}

struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_encoder *other_encoder;
	struct radeon_encoder *other_radeon_encoder;

	if (radeon_encoder->is_ext_encoder)
		return NULL;

	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
		if (other_encoder == encoder)
			continue;
		other_radeon_encoder = to_radeon_encoder(other_encoder);
		if (other_radeon_encoder->is_ext_encoder &&
		    (radeon_encoder->devices & other_radeon_encoder->devices))
			return other_encoder;
	}
	return NULL;
}

u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
{
	struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);

	if (other_encoder) {
		struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);

		switch (radeon_encoder->encoder_id) {
		case ENCODER_OBJECT_ID_TRAVIS:
		case ENCODER_OBJECT_ID_NUTMEG:
			return radeon_encoder->encoder_id;
		default:
			return ENCODER_OBJECT_ID_NONE;
		}
	}
	return ENCODER_OBJECT_ID_NONE;
}

void radeon_panel_mode_fixup(struct drm_encoder *encoder,
			     struct drm_display_mode *adjusted_mode)
{
	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;

	adjusted_mode->clock = native_mode->clock;
	adjusted_mode->flags = native_mode->flags;

	if (ASIC_IS_AVIVO(rdev)) {
		adjusted_mode->hdisplay = native_mode->hdisplay;
		adjusted_mode->vdisplay = native_mode->vdisplay;
	}

	adjusted_mode->htotal = native_mode->hdisplay + hblank;
	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;

	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;

	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);

	if (ASIC_IS_AVIVO(rdev)) {
		adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
		adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
	}

	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;

	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;

}

bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
				    u32 pixel_clock)
{
	struct drm_device *dev = encoder->dev;
	struct radeon_device *rdev = dev->dev_private;
	struct drm_connector *connector;
	struct radeon_connector *radeon_connector;
	struct radeon_connector_atom_dig *dig_connector;

	connector = radeon_get_connector_for_encoder(encoder);
	/* if we don't have an active device yet, just use one of
	 * the connectors tied to the encoder.
	 */
	if (!connector)
		connector = radeon_get_connector_for_encoder_init(encoder);
	radeon_connector = to_radeon_connector(connector);

	switch (connector->connector_type) {
	case DRM_MODE_CONNECTOR_DVII:
	case DRM_MODE_CONNECTOR_HDMIB:
		if (radeon_connector->use_digital) {
			/* HDMI 1.3 supports up to 340 Mhz over single link */
			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
				if (pixel_clock > 340000)
					return true;
				else
					return false;
			} else {
				if (pixel_clock > 165000)
					return true;
				else
					return false;
			}
		} else
			return false;
	case DRM_MODE_CONNECTOR_DVID:
	case DRM_MODE_CONNECTOR_HDMIA:
	case DRM_MODE_CONNECTOR_DisplayPort:
		dig_connector = radeon_connector->con_priv;
		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
			return false;
		else {
			/* HDMI 1.3 supports up to 340 Mhz over single link */
			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
				if (pixel_clock > 340000)
					return true;
				else
					return false;
			} else {
				if (pixel_clock > 165000)
					return true;
				else
					return false;
			}
		}
	default:
		return false;
	}
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2007-8 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice shall be included in
	13	* all copies or substantial portions of the Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	19	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	20	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	21	* OTHER DEALINGS IN THE SOFTWARE.
	22	*
	23	* Authors: Dave Airlie
	24	* Alex Deucher
	25	*/
760285e7 DH	26	#include <drm/drmP.h>
	27	#include <drm/drm_crtc_helper.h>
	28	#include <drm/radeon_drm.h>
771fe6b9 JG	29	#include "radeon.h"
	30	#include "atom.h"
	31
1f3b6a45 DA	32	static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
	33	{
	34	struct drm_device *dev = encoder->dev;
	35	struct radeon_device *rdev = dev->dev_private;
	36	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	37	struct drm_encoder *clone_encoder;
	38	uint32_t index_mask = 0;
	39	int count;
	40
	41	/* DIG routing gets problematic */
	42	if (rdev->family >= CHIP_R600)
	43	return index_mask;
	44	/* LVDS/TV are too wacky */
	45	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
	46	return index_mask;
	47	/* DVO requires 2x ppll clocks depending on tmds chip */
	48	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
	49	return index_mask;
bcc1c2a1	50
1f3b6a45 DA	51	count = -1;
	52	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
	53	struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
	54	count++;
	55
	56	if (clone_encoder == encoder)
	57	continue;
	58	if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
	59	continue;
	60	if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
	61	continue;
	62	else
	63	index_mask \|= (1 << count);
	64	}
	65	return index_mask;
	66	}
	67
	68	void radeon_setup_encoder_clones(struct drm_device *dev)
	69	{
	70	struct drm_encoder *encoder;
	71
	72	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	73	encoder->possible_clones = radeon_encoder_clones(encoder);
	74	}
	75	}
	76
771fe6b9	77	uint32_t
5137ee94	78	radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
771fe6b9 JG	79	{
	80	struct radeon_device *rdev = dev->dev_private;
	81	uint32_t ret = 0;
	82
	83	switch (supported_device) {
	84	case ATOM_DEVICE_CRT1_SUPPORT:
	85	case ATOM_DEVICE_TV1_SUPPORT:
	86	case ATOM_DEVICE_TV2_SUPPORT:
	87	case ATOM_DEVICE_CRT2_SUPPORT:
	88	case ATOM_DEVICE_CV_SUPPORT:
	89	switch (dac) {
	90	case 1: /* dac a */
	91	if ((rdev->family == CHIP_RS300) \|\|
	92	(rdev->family == CHIP_RS400) \|\|
	93	(rdev->family == CHIP_RS480))
5137ee94	94	ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
771fe6b9	95	else if (ASIC_IS_AVIVO(rdev))
5137ee94	96	ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
771fe6b9	97	else
5137ee94	98	ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
771fe6b9 JG	99	break;
	100	case 2: /* dac b */
	101	if (ASIC_IS_AVIVO(rdev))
5137ee94	102	ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
771fe6b9 JG	103	else {
771fe6b9 JG	104	/*if (rdev->family == CHIP_R200)
5137ee94	105	ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9	106	else*/
5137ee94	107	ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
771fe6b9 JG	108	}
	109	break;
	110	case 3: /* external dac */
	111	if (ASIC_IS_AVIVO(rdev))
5137ee94	112	ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9	113	else
5137ee94	114	ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 JG	115	break;
	116	}
	117	break;
	118	case ATOM_DEVICE_LCD1_SUPPORT:
	119	if (ASIC_IS_AVIVO(rdev))
5137ee94	120	ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
771fe6b9	121	else
5137ee94	122	ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
771fe6b9 JG	123	break;
	124	case ATOM_DEVICE_DFP1_SUPPORT:
	125	if ((rdev->family == CHIP_RS300) \|\|
	126	(rdev->family == CHIP_RS400) \|\|
	127	(rdev->family == CHIP_RS480))
5137ee94	128	ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9	129	else if (ASIC_IS_AVIVO(rdev))
5137ee94	130	ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
771fe6b9	131	else
5137ee94	132	ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
771fe6b9 JG	133	break;
	134	case ATOM_DEVICE_LCD2_SUPPORT:
	135	case ATOM_DEVICE_DFP2_SUPPORT:
	136	if ((rdev->family == CHIP_RS600) \|\|
	137	(rdev->family == CHIP_RS690) \|\|
	138	(rdev->family == CHIP_RS740))
5137ee94	139	ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
771fe6b9	140	else if (ASIC_IS_AVIVO(rdev))
5137ee94	141	ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9	142	else
5137ee94	143	ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 JG	144	break;
771fe6b9 JG	145	case ATOM_DEVICE_DFP3_SUPPORT:
5137ee94	146	ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
771fe6b9 JG	147	break;
	148	}
	149
	150	return ret;
	151	}
	152
	153	void
	154	radeon_link_encoder_connector(struct drm_device *dev)
	155	{
	156	struct drm_connector *connector;
	157	struct radeon_connector *radeon_connector;
	158	struct drm_encoder *encoder;
	159	struct radeon_encoder *radeon_encoder;
	160
	161	/* walk the list and link encoders to connectors */
	162	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	163	radeon_connector = to_radeon_connector(connector);
	164	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	165	radeon_encoder = to_radeon_encoder(encoder);
	166	if (radeon_encoder->devices & radeon_connector->devices)
	167	drm_mode_connector_attach_encoder(connector, encoder);
	168	}
	169	}
	170	}
	171
4ce001ab DA	172	void radeon_encoder_set_active_device(struct drm_encoder *encoder)
	173	{
	174	struct drm_device *dev = encoder->dev;
	175	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	176	struct drm_connector *connector;
	177
	178	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	179	if (connector->encoder == encoder) {
	180	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
	181	radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
d9fdaafb	182	DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
f641e51e DA	183	radeon_encoder->active_device, radeon_encoder->devices,
f641e51e DA	184	radeon_connector->devices, encoder->encoder_type);
4ce001ab DA	185	}
	186	}
	187	}
	188
5b1714d3	189	struct drm_connector *
771fe6b9 JG	190	radeon_get_connector_for_encoder(struct drm_encoder *encoder)
	191	{
	192	struct drm_device *dev = encoder->dev;
	193	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	194	struct drm_connector *connector;
	195	struct radeon_connector *radeon_connector;
	196
	197	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	198	radeon_connector = to_radeon_connector(connector);
43c33ed8	199	if (radeon_encoder->active_device & radeon_connector->devices)
771fe6b9 JG	200	return connector;
	201	}
	202	return NULL;
	203	}
	204
9aa59993 AD	205	struct drm_connector *
	206	radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
	207	{
	208	struct drm_device *dev = encoder->dev;
	209	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	210	struct drm_connector *connector;
	211	struct radeon_connector *radeon_connector;
	212
	213	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	214	radeon_connector = to_radeon_connector(connector);
	215	if (radeon_encoder->devices & radeon_connector->devices)
	216	return connector;
	217	}
	218	return NULL;
	219	}
	220
3f03ced8	221	struct drm_encoder radeon_get_external_encoder(struct drm_encoder encoder)
3e4b9982 AD	222	{
	223	struct drm_device *dev = encoder->dev;
	224	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	225	struct drm_encoder *other_encoder;
	226	struct radeon_encoder *other_radeon_encoder;
	227
	228	if (radeon_encoder->is_ext_encoder)
	229	return NULL;
	230
	231	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
	232	if (other_encoder == encoder)
	233	continue;
	234	other_radeon_encoder = to_radeon_encoder(other_encoder);
	235	if (other_radeon_encoder->is_ext_encoder &&
	236	(radeon_encoder->devices & other_radeon_encoder->devices))
	237	return other_encoder;
	238	}
	239	return NULL;
	240	}
	241
1d33e1fc	242	u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
d7fa8bb3	243	{
3f03ced8	244	struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
d7fa8bb3 AD	245
	246	if (other_encoder) {
	247	struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
	248
	249	switch (radeon_encoder->encoder_id) {
	250	case ENCODER_OBJECT_ID_TRAVIS:
	251	case ENCODER_OBJECT_ID_NUTMEG:
dc87cd5c	252	return radeon_encoder->encoder_id;
d7fa8bb3	253	default:
dc87cd5c	254	return ENCODER_OBJECT_ID_NONE;
d7fa8bb3 AD	255	}
d7fa8bb3 AD	256	}
dc87cd5c	257	return ENCODER_OBJECT_ID_NONE;
d7fa8bb3 AD	258	}
d7fa8bb3 AD	259
3515387b AD	260	void radeon_panel_mode_fixup(struct drm_encoder *encoder,
	261	struct drm_display_mode *adjusted_mode)
	262	{
	263	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
	264	struct drm_device *dev = encoder->dev;
	265	struct radeon_device *rdev = dev->dev_private;
	266	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
	267	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
	268	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
	269	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
	270	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
	271	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
	272	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
	273
	274	adjusted_mode->clock = native_mode->clock;
	275	adjusted_mode->flags = native_mode->flags;
	276
	277	if (ASIC_IS_AVIVO(rdev)) {
	278	adjusted_mode->hdisplay = native_mode->hdisplay;
	279	adjusted_mode->vdisplay = native_mode->vdisplay;
	280	}
	281
	282	adjusted_mode->htotal = native_mode->hdisplay + hblank;
	283	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
	284	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
	285
	286	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
	287	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
	288	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
	289
	290	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
	291
	292	if (ASIC_IS_AVIVO(rdev)) {
	293	adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
	294	adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
	295	}
	296
	297	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
	298	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
	299	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
	300
	301	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
	302	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
	303	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
	304
	305	}
	306
9aa59993 AD	307	bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
	308	u32 pixel_clock)
	309	{
1b2681ba AD	310	struct drm_device *dev = encoder->dev;
1b2681ba AD	311	struct radeon_device *rdev = dev->dev_private;
9aa59993 AD	312	struct drm_connector *connector;
	313	struct radeon_connector *radeon_connector;
	314	struct radeon_connector_atom_dig *dig_connector;
	315
	316	connector = radeon_get_connector_for_encoder(encoder);
	317	/* if we don't have an active device yet, just use one of
	318	* the connectors tied to the encoder.
	319	*/
	320	if (!connector)
	321	connector = radeon_get_connector_for_encoder_init(encoder);
	322	radeon_connector = to_radeon_connector(connector);
	323
	324	switch (connector->connector_type) {
	325	case DRM_MODE_CONNECTOR_DVII:
	326	case DRM_MODE_CONNECTOR_HDMIB:
	327	if (radeon_connector->use_digital) {
	328	/* HDMI 1.3 supports up to 340 Mhz over single link */
1b2681ba	329	if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
9aa59993 AD	330	if (pixel_clock > 340000)
	331	return true;
	332	else
	333	return false;
	334	} else {
	335	if (pixel_clock > 165000)
	336	return true;
	337	else
	338	return false;
	339	}
	340	} else
	341	return false;
	342	case DRM_MODE_CONNECTOR_DVID:
	343	case DRM_MODE_CONNECTOR_HDMIA:
	344	case DRM_MODE_CONNECTOR_DisplayPort:
	345	dig_connector = radeon_connector->con_priv;
	346	if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) \|\|
	347	(dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
	348	return false;
	349	else {
	350	/* HDMI 1.3 supports up to 340 Mhz over single link */
1b2681ba	351	if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
9aa59993 AD	352	if (pixel_clock > 340000)
	353	return true;
	354	else
	355	return false;
	356	} else {
	357	if (pixel_clock > 165000)
	358	return true;
	359	else
	360	return false;
	361	}
	362	}
	363	default:
	364	return false;
	365	}
	366	}
	367