[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "drmP.h"
#include "drm.h"
#include "radeon_drm.h"
#include "radeon_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>


/*
 * KMS wrapper.
 * - 2.0.0 - initial interface
 * - 2.1.0 - add square tiling interface
 * - 2.2.0 - add r6xx/r7xx const buffer support
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 * - 2.4.0 - add crtc id query
 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	6
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_new_pll = -1;
int radeon_audio = 1;
int radeon_disp_priority = 0;
int radeon_hw_i2c = 0;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(new_pll, "Select new PLL code");
module_param_named(new_pll, radeon_new_pll, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
module_param_named(audio, radeon_audio, int, 0444);

MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
module_param_named(disp_priority, radeon_disp_priority, int, 0444);

MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_pci_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = radeon_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = radeon_kms_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
		 .probe = radeon_pci_probe,
		 .remove = radeon_pci_remove,
		 .suspend = radeon_pci_suspend,
		 .resume = radeon_pci_resume,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;

static int __init radeon_init(void)
{
	driver = &driver_old;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
		radeon_register_atpx_handler();
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_init(driver);
}

static void __exit radeon_exit(void)
{
	drm_exit(driver);
	radeon_unregister_atpx_handler();
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
1da177e4 LT	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "radeon_drm.h"
	35	#include "radeon_drv.h"
	36
	37	#include "drm_pciids.h"
771fe6b9 JG	38	#include <linux/console.h>
	39
	40
771fe6b9 JG	41	/*
771fe6b9 JG	42	* KMS wrapper.
0de1a57b DA	43	* - 2.0.0 - initial interface
0de1a57b DA	44	* - 2.1.0 - add square tiling interface
fdb43528	45	* - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a	46	* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb	47	* - 2.4.0 - add crtc id query
148a03bc	48	* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59	49	* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
771fe6b9 JG	50	*/
771fe6b9 JG	51	#define KMS_DRIVER_MAJOR 2
e7aeeba6	52	#define KMS_DRIVER_MINOR 6
771fe6b9 JG	53	#define KMS_DRIVER_PATCHLEVEL 0
	54	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	55	int radeon_driver_unload_kms(struct drm_device *dev);
	56	int radeon_driver_firstopen_kms(struct drm_device *dev);
	57	void radeon_driver_lastclose_kms(struct drm_device *dev);
	58	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	59	void radeon_driver_postclose_kms(struct drm_device *dev,
	60	struct drm_file *file_priv);
	61	void radeon_driver_preclose_kms(struct drm_device *dev,
	62	struct drm_file *file_priv);
	63	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	64	int radeon_resume_kms(struct drm_device *dev);
	65	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	66	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	67	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
	68	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	69	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	70	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	71	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	72	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	73	struct drm_file *file_priv);
	74	int radeon_gem_object_init(struct drm_gem_object *obj);
	75	void radeon_gem_object_free(struct drm_gem_object *obj);
	76	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	77	extern int radeon_max_kms_ioctl;
	78	int radeon_mmap(struct file filp, struct vm_area_struct vma);
	79	#if defined(CONFIG_DEBUG_FS)
	80	int radeon_debugfs_init(struct drm_minor *minor);
	81	void radeon_debugfs_cleanup(struct drm_minor *minor);
	82	#endif
771fe6b9	83
1da177e4	84
689b9d74	85	int radeon_no_wb;
771fe6b9 JG	86	int radeon_modeset = -1;
	87	int radeon_dynclks = -1;
	88	int radeon_r4xx_atom = 0;
	89	int radeon_agpmode = 0;
	90	int radeon_vram_limit = 0;
	91	int radeon_gart_size = 512; /* default gart size */
	92	int radeon_benchmarking = 0;
ecc0b326	93	int radeon_testing = 0;
771fe6b9	94	int radeon_connector_table = 0;
4ce001ab	95	int radeon_tv = 1;
383be5d1	96	int radeon_new_pll = -1;
dafc3bd5	97	int radeon_audio = 1;
f46c0120	98	int radeon_disp_priority = 0;
e2b0a8e1	99	int radeon_hw_i2c = 0;
689b9d74	100
61a2d07d	101	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	102	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	103
771fe6b9 JG	104	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	105	module_param_named(modeset, radeon_modeset, int, 0400);
	106
	107	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	108	module_param_named(dynclks, radeon_dynclks, int, 0444);
	109
	110	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	111	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	112
	113	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	114	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	115
	116	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	117	module_param_named(agpmode, radeon_agpmode, int, 0444);
	118
	119	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
	120	module_param_named(gartsize, radeon_gart_size, int, 0600);
	121
	122	MODULE_PARM_DESC(benchmark, "Run benchmark");
	123	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	124
ecc0b326 MD	125	MODULE_PARM_DESC(test, "Run tests");
	126	module_param_named(test, radeon_testing, int, 0444);
	127
771fe6b9 JG	128	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	129	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	130
	131	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	132	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	133
383be5d1	134	MODULE_PARM_DESC(new_pll, "Select new PLL code");
b27b6375 AD	135	module_param_named(new_pll, radeon_new_pll, int, 0444);
b27b6375 AD	136
dafc3bd5 CK	137	MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
	138	module_param_named(audio, radeon_audio, int, 0444);
	139
f46c0120 AD	140	MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
	141	module_param_named(disp_priority, radeon_disp_priority, int, 0444);
	142
e2b0a8e1 AD	143	MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
	144	module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
	145
0a3e67a4 JB	146	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	147	{
	148	drm_radeon_private_t *dev_priv = dev->dev_private;
	149
03efb885 DA	150	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	151	return 0;
	152
0a3e67a4	153	/* Disable all interrupts */
800b6995	154	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	155	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	156	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	157	return 0;
	158	}
	159
	160	static int radeon_resume(struct drm_device *dev)
	161	{
	162	drm_radeon_private_t *dev_priv = dev->dev_private;
	163
03efb885 DA	164	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	165	return 0;
	166
0a3e67a4	167	/* Restore interrupt registers */
800b6995	168	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	169	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	170	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	171	return 0;
	172	}
	173
1da177e4 LT	174	static struct pci_device_id pciidlist[] = {
	175	radeon_PCI_IDS
	176	};
	177
771fe6b9 JG	178	#if defined(CONFIG_DRM_RADEON_KMS)
	179	MODULE_DEVICE_TABLE(pci, pciidlist);
	180	#endif
	181
	182	static struct drm_driver driver_old = {
b5e89ed5 DA	183	.driver_features =
b5e89ed5 DA	184	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	185	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	186	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	187	.load = radeon_driver_load,
	188	.firstopen = radeon_driver_firstopen,
	189	.open = radeon_driver_open,
	190	.preclose = radeon_driver_preclose,
	191	.postclose = radeon_driver_postclose,
	192	.lastclose = radeon_driver_lastclose,
	193	.unload = radeon_driver_unload,
0a3e67a4 JB	194	.suspend = radeon_suspend,
	195	.resume = radeon_resume,
	196	.get_vblank_counter = radeon_get_vblank_counter,
	197	.enable_vblank = radeon_enable_vblank,
	198	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	199	.master_create = radeon_master_create,
60f2ee0b DA	200	.master_destroy = radeon_master_destroy,
1da177e4 LT	201	.irq_preinstall = radeon_driver_irq_preinstall,
	202	.irq_postinstall = radeon_driver_irq_postinstall,
	203	.irq_uninstall = radeon_driver_irq_uninstall,
	204	.irq_handler = radeon_driver_irq_handler,
1da177e4 LT	205	.reclaim_buffers = drm_core_reclaim_buffers,
	206	.get_map_ofs = drm_core_get_map_ofs,
	207	.get_reg_ofs = drm_core_get_reg_ofs,
1da177e4 LT	208	.ioctls = radeon_ioctls,
	209	.dma_ioctl = radeon_cp_buffers,
	210	.fops = {
b5e89ed5 DA	211	.owner = THIS_MODULE,
	212	.open = drm_open,
	213	.release = drm_release,
ed8b6704	214	.unlocked_ioctl = drm_ioctl,
b5e89ed5 DA	215	.mmap = drm_mmap,
	216	.poll = drm_poll,
	217	.fasync = drm_fasync,
4fa07bf1	218	.read = drm_read,
9a186645	219	#ifdef CONFIG_COMPAT
b5e89ed5	220	.compat_ioctl = radeon_compat_ioctl,
9a186645	221	#endif
22eae947 DA	222	},
22eae947 DA	223
1da177e4	224	.pci_driver = {
22eae947 DA	225	.name = DRIVER_NAME,
	226	.id_table = pciidlist,
	227	},
	228
	229	.name = DRIVER_NAME,
	230	.desc = DRIVER_DESC,
	231	.date = DRIVER_DATE,
	232	.major = DRIVER_MAJOR,
	233	.minor = DRIVER_MINOR,
	234	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	235	};
1da177e4 LT	236
771fe6b9 JG	237	static struct drm_driver kms_driver;
	238
	239	static int __devinit
	240	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	241	{
dcdb1674	242	return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9 JG	243	}
	244
	245	static void
	246	radeon_pci_remove(struct pci_dev *pdev)
	247	{
	248	struct drm_device *dev = pci_get_drvdata(pdev);
	249
	250	drm_put_dev(dev);
	251	}
	252
	253	static int
	254	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	255	{
	256	struct drm_device *dev = pci_get_drvdata(pdev);
	257	return radeon_suspend_kms(dev, state);
	258	}
	259
	260	static int
	261	radeon_pci_resume(struct pci_dev *pdev)
	262	{
	263	struct drm_device *dev = pci_get_drvdata(pdev);
	264	return radeon_resume_kms(dev);
	265	}
	266
	267	static struct drm_driver kms_driver = {
	268	.driver_features =
	269	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
	270	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	271	.dev_priv_size = 0,
	272	.load = radeon_driver_load_kms,
	273	.firstopen = radeon_driver_firstopen_kms,
	274	.open = radeon_driver_open_kms,
	275	.preclose = radeon_driver_preclose_kms,
	276	.postclose = radeon_driver_postclose_kms,
	277	.lastclose = radeon_driver_lastclose_kms,
	278	.unload = radeon_driver_unload_kms,
	279	.suspend = radeon_suspend_kms,
	280	.resume = radeon_resume_kms,
	281	.get_vblank_counter = radeon_get_vblank_counter_kms,
	282	.enable_vblank = radeon_enable_vblank_kms,
	283	.disable_vblank = radeon_disable_vblank_kms,
771fe6b9 JG	284	#if defined(CONFIG_DEBUG_FS)
	285	.debugfs_init = radeon_debugfs_init,
	286	.debugfs_cleanup = radeon_debugfs_cleanup,
	287	#endif
	288	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	289	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	290	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	291	.irq_handler = radeon_driver_irq_handler_kms,
	292	.reclaim_buffers = drm_core_reclaim_buffers,
	293	.get_map_ofs = drm_core_get_map_ofs,
	294	.get_reg_ofs = drm_core_get_reg_ofs,
	295	.ioctls = radeon_ioctls_kms,
	296	.gem_init_object = radeon_gem_object_init,
	297	.gem_free_object = radeon_gem_object_free,
	298	.dma_ioctl = radeon_dma_ioctl_kms,
	299	.fops = {
	300	.owner = THIS_MODULE,
	301	.open = drm_open,
	302	.release = drm_release,
ed8b6704	303	.unlocked_ioctl = drm_ioctl,
771fe6b9 JG	304	.mmap = radeon_mmap,
	305	.poll = drm_poll,
	306	.fasync = drm_fasync,
4fa07bf1	307	.read = drm_read,
771fe6b9	308	#ifdef CONFIG_COMPAT
70ba2a37	309	.compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9 JG	310	#endif
	311	},
	312
	313	.pci_driver = {
	314	.name = DRIVER_NAME,
	315	.id_table = pciidlist,
	316	.probe = radeon_pci_probe,
	317	.remove = radeon_pci_remove,
	318	.suspend = radeon_pci_suspend,
	319	.resume = radeon_pci_resume,
	320	},
	321
	322	.name = DRIVER_NAME,
	323	.desc = DRIVER_DESC,
	324	.date = DRIVER_DATE,
	325	.major = KMS_DRIVER_MAJOR,
	326	.minor = KMS_DRIVER_MINOR,
	327	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	328	};
771fe6b9 JG	329
	330	static struct drm_driver *driver;
	331
1da177e4 LT	332	static int __init radeon_init(void)
1da177e4 LT	333	{
771fe6b9 JG	334	driver = &driver_old;
771fe6b9 JG	335	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	336	#ifdef CONFIG_VGA_CONSOLE
	337	if (vgacon_text_force() && radeon_modeset == -1) {
	338	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	339	driver = &driver_old;
	340	driver->driver_features &= ~DRIVER_MODESET;
	341	radeon_modeset = 0;
	342	}
	343	#endif
771fe6b9 JG	344	/* if enabled by default */
771fe6b9 JG	345	if (radeon_modeset == -1) {
a0cdc649 DA	346	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	347	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	348	radeon_modeset = 1;
a0cdc649 DA	349	#else
	350	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	351	radeon_modeset = 0;
	352	#endif
771fe6b9 JG	353	}
	354	if (radeon_modeset == 1) {
	355	DRM_INFO("radeon kernel modesetting enabled.\n");
	356	driver = &kms_driver;
	357	driver->driver_features \|= DRIVER_MODESET;
	358	driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af	359	radeon_register_atpx_handler();
771fe6b9	360	}
771fe6b9 JG	361	/* if the vga console setting is enabled still
771fe6b9 JG	362	* let modprobe override it */
771fe6b9	363	return drm_init(driver);
1da177e4 LT	364	}
	365
	366	static void __exit radeon_exit(void)
	367	{
771fe6b9	368	drm_exit(driver);
6a9ee8af	369	radeon_unregister_atpx_handler();
1da177e4 LT	370	}
1da177e4 LT	371
176f613e	372	module_init(radeon_init);
1da177e4 LT	373	module_exit(radeon_exit);
1da177e4 LT	374
b5e89ed5 DA	375	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	376	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	377	MODULE_LICENSE("GPL and additional rights");