[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_drv.c

/**
 * \file radeon_drv.c
 * ATI Radeon driver
 *
 * \author Gareth Hughes <gareth@valinux.com>
 */

/*
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon_drv.h"

#include <drm/drm_pciids.h>
#include <linux/console.h>
#include <linux/module.h>


/*
 * KMS wrapper.
 * - 2.0.0 - initial interface
 * - 2.1.0 - add square tiling interface
 * - 2.2.0 - add r6xx/r7xx const buffer support
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 * - 2.4.0 - add crtc id query
 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 *   2.10.0 - fusion 2D tiling
 *   2.11.0 - backend map, initial compute support for the CS checker
 *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
 *   2.13.0 - virtual memory support, streamout
 *   2.14.0 - add evergreen tiling informations
 *   2.15.0 - add max_pipes query
 *   2.16.0 - fix evergreen 2D tiled surface calculation
 *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
 *   2.18.0 - r600-eg: allow "invalid" DB formats
 *   2.19.0 - r600-eg: MSAA textures
 *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
 *   2.21.0 - r600-r700: FMASK and CMASK
 *   2.22.0 - r600 only: RESOLVE_BOX allowed
 */
#define KMS_DRIVER_MAJOR	2
#define KMS_DRIVER_MINOR	22
#define KMS_DRIVER_PATCHLEVEL	0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);
int radeon_driver_firstopen_kms(struct drm_device *dev);
void radeon_driver_lastclose_kms(struct drm_device *dev);
int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
void radeon_driver_postclose_kms(struct drm_device *dev,
				 struct drm_file *file_priv);
void radeon_driver_preclose_kms(struct drm_device *dev,
				struct drm_file *file_priv);
int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
int radeon_resume_kms(struct drm_device *dev);
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
				    int *max_error,
				    struct timeval *vblank_time,
				    unsigned flags);
void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int radeon_gem_object_init(struct drm_gem_object *obj);
void radeon_gem_object_free(struct drm_gem_object *obj);
int radeon_gem_object_open(struct drm_gem_object *obj,
				struct drm_file *file_priv);
void radeon_gem_object_close(struct drm_gem_object *obj,
				struct drm_file *file_priv);
extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
				      int *vpos, int *hpos);
extern struct drm_ioctl_desc radeon_ioctls_kms[];
extern int radeon_max_kms_ioctl;
int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p);
int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args);
int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle);
struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
					struct drm_gem_object *obj,
					int flags);
struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
					       struct dma_buf *dma_buf);

#if defined(CONFIG_DEBUG_FS)
int radeon_debugfs_init(struct drm_minor *minor);
void radeon_debugfs_cleanup(struct drm_minor *minor);
#endif


int radeon_no_wb;
int radeon_modeset = -1;
int radeon_dynclks = -1;
int radeon_r4xx_atom = 0;
int radeon_agpmode = 0;
int radeon_vram_limit = 0;
int radeon_gart_size = 512; /* default gart size */
int radeon_benchmarking = 0;
int radeon_testing = 0;
int radeon_connector_table = 0;
int radeon_tv = 1;
int radeon_audio = 0;
int radeon_disp_priority = 0;
int radeon_hw_i2c = 0;
int radeon_pcie_gen2 = -1;
int radeon_msi = -1;
int radeon_lockup_timeout = 10000;

MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);

MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, radeon_modeset, int, 0400);

MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
module_param_named(dynclks, radeon_dynclks, int, 0444);

MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);

MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
module_param_named(vramlimit, radeon_vram_limit, int, 0600);

MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
module_param_named(agpmode, radeon_agpmode, int, 0444);

MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
module_param_named(gartsize, radeon_gart_size, int, 0600);

MODULE_PARM_DESC(benchmark, "Run benchmark");
module_param_named(benchmark, radeon_benchmarking, int, 0444);

MODULE_PARM_DESC(test, "Run tests");
module_param_named(test, radeon_testing, int, 0444);

MODULE_PARM_DESC(connector_table, "Force connector table");
module_param_named(connector_table, radeon_connector_table, int, 0444);

MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
module_param_named(tv, radeon_tv, int, 0444);

MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
module_param_named(audio, radeon_audio, int, 0444);

MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
module_param_named(disp_priority, radeon_disp_priority, int, 0444);

MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);

MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);

MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
module_param_named(msi, radeon_msi, int, 0444);

MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);

static int radeon_suspend(struct drm_device *dev, pm_message_t state)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Disable *all* interrupts */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	return 0;
}

static int radeon_resume(struct drm_device *dev)
{
	drm_radeon_private_t *dev_priv = dev->dev_private;

	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
		return 0;

	/* Restore interrupt registers */
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	return 0;
}

static struct pci_device_id pciidlist[] = {
	radeon_PCI_IDS
};

#if defined(CONFIG_DRM_RADEON_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static const struct file_operations radeon_driver_old_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = drm_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = radeon_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

static struct drm_driver driver_old = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
	.load = radeon_driver_load,
	.firstopen = radeon_driver_firstopen,
	.open = radeon_driver_open,
	.preclose = radeon_driver_preclose,
	.postclose = radeon_driver_postclose,
	.lastclose = radeon_driver_lastclose,
	.unload = radeon_driver_unload,
	.suspend = radeon_suspend,
	.resume = radeon_resume,
	.get_vblank_counter = radeon_get_vblank_counter,
	.enable_vblank = radeon_enable_vblank,
	.disable_vblank = radeon_disable_vblank,
	.master_create = radeon_master_create,
	.master_destroy = radeon_master_destroy,
	.irq_preinstall = radeon_driver_irq_preinstall,
	.irq_postinstall = radeon_driver_irq_postinstall,
	.irq_uninstall = radeon_driver_irq_uninstall,
	.irq_handler = radeon_driver_irq_handler,
	.ioctls = radeon_ioctls,
	.dma_ioctl = radeon_cp_buffers,
	.fops = &radeon_driver_old_fops,
	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static struct drm_driver kms_driver;

static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
{
	struct apertures_struct *ap;
	bool primary = false;

	ap = alloc_apertures(1);
	ap->ranges[0].base = pci_resource_start(pdev, 0);
	ap->ranges[0].size = pci_resource_len(pdev, 0);

#ifdef CONFIG_X86
	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
#endif
	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	kfree(ap);
}

static int __devinit
radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	/* Get rid of things like offb */
	radeon_kick_out_firmware_fb(pdev);

	return drm_get_pci_dev(pdev, ent, &kms_driver);
}

static void
radeon_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_suspend_kms(dev, state);
}

static int
radeon_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	return radeon_resume_kms(dev);
}

static const struct file_operations radeon_driver_kms_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = radeon_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = radeon_kms_compat_ioctl,
#endif
};

static struct drm_driver kms_driver = {
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
	    DRIVER_PRIME,
	.dev_priv_size = 0,
	.load = radeon_driver_load_kms,
	.firstopen = radeon_driver_firstopen_kms,
	.open = radeon_driver_open_kms,
	.preclose = radeon_driver_preclose_kms,
	.postclose = radeon_driver_postclose_kms,
	.lastclose = radeon_driver_lastclose_kms,
	.unload = radeon_driver_unload_kms,
	.suspend = radeon_suspend_kms,
	.resume = radeon_resume_kms,
	.get_vblank_counter = radeon_get_vblank_counter_kms,
	.enable_vblank = radeon_enable_vblank_kms,
	.disable_vblank = radeon_disable_vblank_kms,
	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
	.get_scanout_position = radeon_get_crtc_scanoutpos,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = radeon_debugfs_init,
	.debugfs_cleanup = radeon_debugfs_cleanup,
#endif
	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	.irq_handler = radeon_driver_irq_handler_kms,
	.ioctls = radeon_ioctls_kms,
	.gem_init_object = radeon_gem_object_init,
	.gem_free_object = radeon_gem_object_free,
	.gem_open_object = radeon_gem_object_open,
	.gem_close_object = radeon_gem_object_close,
	.dma_ioctl = radeon_dma_ioctl_kms,
	.dumb_create = radeon_mode_dumb_create,
	.dumb_map_offset = radeon_mode_dumb_mmap,
	.dumb_destroy = radeon_mode_dumb_destroy,
	.fops = &radeon_driver_kms_fops,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = radeon_gem_prime_export,
	.gem_prime_import = radeon_gem_prime_import,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = KMS_DRIVER_MAJOR,
	.minor = KMS_DRIVER_MINOR,
	.patchlevel = KMS_DRIVER_PATCHLEVEL,
};

static struct drm_driver *driver;
static struct pci_driver *pdriver;

static struct pci_driver radeon_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
};

static struct pci_driver radeon_kms_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
	.probe = radeon_pci_probe,
	.remove = radeon_pci_remove,
	.suspend = radeon_pci_suspend,
	.resume = radeon_pci_resume,
};

static int __init radeon_init(void)
{
	driver = &driver_old;
	pdriver = &radeon_pci_driver;
	driver->num_ioctls = radeon_max_ioctl;
#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && radeon_modeset == -1) {
		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
		driver = &driver_old;
		pdriver = &radeon_pci_driver;
		driver->driver_features &= ~DRIVER_MODESET;
		radeon_modeset = 0;
	}
#endif
	/* if enabled by default */
	if (radeon_modeset == -1) {
#ifdef CONFIG_DRM_RADEON_KMS
		DRM_INFO("radeon defaulting to kernel modesetting.\n");
		radeon_modeset = 1;
#else
		DRM_INFO("radeon defaulting to userspace modesetting.\n");
		radeon_modeset = 0;
#endif
	}
	if (radeon_modeset == 1) {
		DRM_INFO("radeon kernel modesetting enabled.\n");
		driver = &kms_driver;
		pdriver = &radeon_kms_pci_driver;
		driver->driver_features |= DRIVER_MODESET;
		driver->num_ioctls = radeon_max_kms_ioctl;
		radeon_register_atpx_handler();
	}
	/* if the vga console setting is enabled still
	 * let modprobe override it */
	return drm_pci_init(driver, pdriver);
}

static void __exit radeon_exit(void)
{
	drm_pci_exit(driver, pdriver);
	radeon_unregister_atpx_handler();
}

module_init(radeon_init);
module_exit(radeon_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/**
	2	* \file radeon_drv.c
	3	* ATI Radeon driver
	4	*
	5	* \author Gareth Hughes <gareth@valinux.com>
	6	*/
	7
	8	/*
	9	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
	10	* All Rights Reserved.
	11	*
	12	* Permission is hereby granted, free of charge, to any person obtaining a
	13	* copy of this software and associated documentation files (the "Software"),
	14	* to deal in the Software without restriction, including without limitation
	15	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	16	* and/or sell copies of the Software, and to permit persons to whom the
	17	* Software is furnished to do so, subject to the following conditions:
	18	*
	19	* The above copyright notice and this permission notice (including the next
	20	* paragraph) shall be included in all copies or substantial portions of the
	21	* Software.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	24	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	25	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	26	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	27	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	28	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	29	* OTHER DEALINGS IN THE SOFTWARE.
	30	*/
	31
760285e7 DH	32	#include <drm/drmP.h>
760285e7 DH	33	#include <drm/radeon_drm.h>
1da177e4 LT	34	#include "radeon_drv.h"
1da177e4 LT	35
760285e7	36	#include <drm/drm_pciids.h>
771fe6b9	37	#include <linux/console.h>
e0cd3608	38	#include <linux/module.h>
771fe6b9 JG	39
771fe6b9 JG	40
771fe6b9 JG	41	/*
771fe6b9 JG	42	* KMS wrapper.
0de1a57b DA	43	* - 2.0.0 - initial interface
0de1a57b DA	44	* - 2.1.0 - add square tiling interface
fdb43528	45	* - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a	46	* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb	47	* - 2.4.0 - add crtc id query
148a03bc	48	* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59	49	* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4	50	* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018	51	* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189	52	* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894 AD	53	* 2.10.0 - fusion 2D tiling
b8709894 AD	54	* 2.11.0 - backend map, initial compute support for the CS checker
e70f224c	55	* 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
dd220a00	56	* 2.13.0 - virtual memory support, streamout
285484e2	57	* 2.14.0 - add evergreen tiling informations
609c1e15	58	* 2.15.0 - add max_pipes query
d2609875	59	* 2.16.0 - fix evergreen 2D tiled surface calculation
7c77bf2a	60	* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
0f457e48	61	* 2.18.0 - r600-eg: allow "invalid" DB formats
b51ad12a	62	* 2.19.0 - r600-eg: MSAA textures
6759a0a7	63	* 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
c116cc94	64	* 2.21.0 - r600-r700: FMASK and CMASK
523885de	65	* 2.22.0 - r600 only: RESOLVE_BOX allowed
771fe6b9 JG	66	*/
771fe6b9 JG	67	#define KMS_DRIVER_MAJOR 2
523885de	68	#define KMS_DRIVER_MINOR 22
771fe6b9 JG	69	#define KMS_DRIVER_PATCHLEVEL 0
	70	int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
	71	int radeon_driver_unload_kms(struct drm_device *dev);
	72	int radeon_driver_firstopen_kms(struct drm_device *dev);
	73	void radeon_driver_lastclose_kms(struct drm_device *dev);
	74	int radeon_driver_open_kms(struct drm_device dev, struct drm_file file_priv);
	75	void radeon_driver_postclose_kms(struct drm_device *dev,
	76	struct drm_file *file_priv);
	77	void radeon_driver_preclose_kms(struct drm_device *dev,
	78	struct drm_file *file_priv);
	79	int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
	80	int radeon_resume_kms(struct drm_device *dev);
	81	u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
	82	int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
	83	void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209 MK	84	int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
	85	int *max_error,
	86	struct timeval *vblank_time,
	87	unsigned flags);
771fe6b9 JG	88	void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
	89	int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
	90	void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
	91	irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 JG	92	int radeon_dma_ioctl_kms(struct drm_device dev, void data,
	93	struct drm_file *file_priv);
	94	int radeon_gem_object_init(struct drm_gem_object *obj);
	95	void radeon_gem_object_free(struct drm_gem_object *obj);
721604a1 JG	96	int radeon_gem_object_open(struct drm_gem_object *obj,
	97	struct drm_file *file_priv);
	98	void radeon_gem_object_close(struct drm_gem_object *obj,
	99	struct drm_file *file_priv);
f5a80209 MK	100	extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
f5a80209 MK	101	int vpos, int hpos);
771fe6b9 JG	102	extern struct drm_ioctl_desc radeon_ioctls_kms[];
	103	extern int radeon_max_kms_ioctl;
	104	int radeon_mmap(struct file filp, struct vm_area_struct vma);
ff72145b DA	105	int radeon_mode_dumb_mmap(struct drm_file *filp,
	106	struct drm_device *dev,
	107	uint32_t handle, uint64_t *offset_p);
	108	int radeon_mode_dumb_create(struct drm_file *file_priv,
	109	struct drm_device *dev,
	110	struct drm_mode_create_dumb *args);
	111	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	112	struct drm_device *dev,
	113	uint32_t handle);
40f5cf99 AD	114	struct dma_buf radeon_gem_prime_export(struct drm_device dev,
	115	struct drm_gem_object *obj,
	116	int flags);
	117	struct drm_gem_object radeon_gem_prime_import(struct drm_device dev,
	118	struct dma_buf *dma_buf);
ff72145b	119
771fe6b9 JG	120	#if defined(CONFIG_DEBUG_FS)
	121	int radeon_debugfs_init(struct drm_minor *minor);
	122	void radeon_debugfs_cleanup(struct drm_minor *minor);
	123	#endif
771fe6b9	124
1da177e4	125
689b9d74	126	int radeon_no_wb;
771fe6b9 JG	127	int radeon_modeset = -1;
	128	int radeon_dynclks = -1;
	129	int radeon_r4xx_atom = 0;
	130	int radeon_agpmode = 0;
	131	int radeon_vram_limit = 0;
	132	int radeon_gart_size = 512; /* default gart size */
	133	int radeon_benchmarking = 0;
ecc0b326	134	int radeon_testing = 0;
771fe6b9	135	int radeon_connector_table = 0;
4ce001ab	136	int radeon_tv = 1;
805c2216	137	int radeon_audio = 0;
f46c0120	138	int radeon_disp_priority = 0;
e2b0a8e1	139	int radeon_hw_i2c = 0;
197bbb3d	140	int radeon_pcie_gen2 = -1;
a18cee15	141	int radeon_msi = -1;
3368ff0c	142	int radeon_lockup_timeout = 10000;
689b9d74	143
61a2d07d	144	MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74 DA	145	module_param_named(no_wb, radeon_no_wb, int, 0444);
689b9d74 DA	146
771fe6b9 JG	147	MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
	148	module_param_named(modeset, radeon_modeset, int, 0400);
	149
	150	MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
	151	module_param_named(dynclks, radeon_dynclks, int, 0444);
	152
	153	MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
	154	module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
	155
	156	MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
	157	module_param_named(vramlimit, radeon_vram_limit, int, 0600);
	158
	159	MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
	160	module_param_named(agpmode, radeon_agpmode, int, 0444);
	161
27d4d052	162	MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
771fe6b9 JG	163	module_param_named(gartsize, radeon_gart_size, int, 0600);
	164
	165	MODULE_PARM_DESC(benchmark, "Run benchmark");
	166	module_param_named(benchmark, radeon_benchmarking, int, 0444);
	167
ecc0b326 MD	168	MODULE_PARM_DESC(test, "Run tests");
	169	module_param_named(test, radeon_testing, int, 0444);
	170
771fe6b9 JG	171	MODULE_PARM_DESC(connector_table, "Force connector table");
771fe6b9 JG	172	module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab DA	173
	174	MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
	175	module_param_named(tv, radeon_tv, int, 0444);
771fe6b9	176
805c2216	177	MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
dafc3bd5 CK	178	module_param_named(audio, radeon_audio, int, 0444);
dafc3bd5 CK	179
f46c0120 AD	180	MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
	181	module_param_named(disp_priority, radeon_disp_priority, int, 0444);
	182
e2b0a8e1 AD	183	MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
	184	module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
	185
197bbb3d	186	MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
d42dd579 AD	187	module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
d42dd579 AD	188
a18cee15 AD	189	MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
	190	module_param_named(msi, radeon_msi, int, 0444);
	191
3368ff0c CK	192	MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
	193	module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
	194
0a3e67a4 JB	195	static int radeon_suspend(struct drm_device *dev, pm_message_t state)
	196	{
	197	drm_radeon_private_t *dev_priv = dev->dev_private;
	198
03efb885 DA	199	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	200	return 0;
	201
0a3e67a4	202	/* Disable all interrupts */
800b6995	203	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	204	RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
	205	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
	206	return 0;
	207	}
	208
	209	static int radeon_resume(struct drm_device *dev)
	210	{
	211	drm_radeon_private_t *dev_priv = dev->dev_private;
	212
03efb885 DA	213	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
	214	return 0;
	215
0a3e67a4	216	/* Restore interrupt registers */
800b6995	217	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4 JB	218	RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
	219	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
	220	return 0;
	221	}
	222
1da177e4 LT	223	static struct pci_device_id pciidlist[] = {
	224	radeon_PCI_IDS
	225	};
	226
771fe6b9 JG	227	#if defined(CONFIG_DRM_RADEON_KMS)
	228	MODULE_DEVICE_TABLE(pci, pciidlist);
	229	#endif
	230
e08e96de AV	231	static const struct file_operations radeon_driver_old_fops = {
	232	.owner = THIS_MODULE,
	233	.open = drm_open,
	234	.release = drm_release,
	235	.unlocked_ioctl = drm_ioctl,
	236	.mmap = drm_mmap,
	237	.poll = drm_poll,
	238	.fasync = drm_fasync,
	239	.read = drm_read,
	240	#ifdef CONFIG_COMPAT
	241	.compat_ioctl = radeon_compat_ioctl,
	242	#endif
	243	.llseek = noop_llseek,
	244	};
	245
771fe6b9	246	static struct drm_driver driver_old = {
b5e89ed5 DA	247	.driver_features =
b5e89ed5 DA	248	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
0a3e67a4	249	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED,
1da177e4	250	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947 DA	251	.load = radeon_driver_load,
	252	.firstopen = radeon_driver_firstopen,
	253	.open = radeon_driver_open,
	254	.preclose = radeon_driver_preclose,
	255	.postclose = radeon_driver_postclose,
	256	.lastclose = radeon_driver_lastclose,
	257	.unload = radeon_driver_unload,
0a3e67a4 JB	258	.suspend = radeon_suspend,
	259	.resume = radeon_resume,
	260	.get_vblank_counter = radeon_get_vblank_counter,
	261	.enable_vblank = radeon_enable_vblank,
	262	.disable_vblank = radeon_disable_vblank,
60f2ee0b DA	263	.master_create = radeon_master_create,
60f2ee0b DA	264	.master_destroy = radeon_master_destroy,
1da177e4 LT	265	.irq_preinstall = radeon_driver_irq_preinstall,
	266	.irq_postinstall = radeon_driver_irq_postinstall,
	267	.irq_uninstall = radeon_driver_irq_uninstall,
	268	.irq_handler = radeon_driver_irq_handler,
1da177e4 LT	269	.ioctls = radeon_ioctls,
1da177e4 LT	270	.dma_ioctl = radeon_cp_buffers,
e08e96de	271	.fops = &radeon_driver_old_fops,
22eae947 DA	272	.name = DRIVER_NAME,
	273	.desc = DRIVER_DESC,
	274	.date = DRIVER_DATE,
	275	.major = DRIVER_MAJOR,
	276	.minor = DRIVER_MINOR,
	277	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	278	};
1da177e4 LT	279
771fe6b9 JG	280	static struct drm_driver kms_driver;
771fe6b9 JG	281
a56f7428 BH	282	static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
	283	{
	284	struct apertures_struct *ap;
	285	bool primary = false;
	286
	287	ap = alloc_apertures(1);
	288	ap->ranges[0].base = pci_resource_start(pdev, 0);
	289	ap->ranges[0].size = pci_resource_len(pdev, 0);
	290
	291	#ifdef CONFIG_X86
	292	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
	293	#endif
	294	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
	295	kfree(ap);
	296	}
	297
771fe6b9 JG	298	static int __devinit
	299	radeon_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	300	{
a56f7428 BH	301	/* Get rid of things like offb */
	302	radeon_kick_out_firmware_fb(pdev);
	303
dcdb1674	304	return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9 JG	305	}
	306
	307	static void
	308	radeon_pci_remove(struct pci_dev *pdev)
	309	{
	310	struct drm_device *dev = pci_get_drvdata(pdev);
	311
	312	drm_put_dev(dev);
	313	}
	314
	315	static int
	316	radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	317	{
	318	struct drm_device *dev = pci_get_drvdata(pdev);
	319	return radeon_suspend_kms(dev, state);
	320	}
	321
	322	static int
	323	radeon_pci_resume(struct pci_dev *pdev)
	324	{
	325	struct drm_device *dev = pci_get_drvdata(pdev);
	326	return radeon_resume_kms(dev);
	327	}
	328
e08e96de AV	329	static const struct file_operations radeon_driver_kms_fops = {
	330	.owner = THIS_MODULE,
	331	.open = drm_open,
	332	.release = drm_release,
	333	.unlocked_ioctl = drm_ioctl,
	334	.mmap = radeon_mmap,
	335	.poll = drm_poll,
	336	.fasync = drm_fasync,
	337	.read = drm_read,
	338	#ifdef CONFIG_COMPAT
	339	.compat_ioctl = radeon_kms_compat_ioctl,
	340	#endif
	341	};
	342
771fe6b9 JG	343	static struct drm_driver kms_driver = {
	344	.driver_features =
	345	DRIVER_USE_AGP \| DRIVER_USE_MTRR \| DRIVER_PCI_DMA \| DRIVER_SG \|
40f5cf99 AD	346	DRIVER_HAVE_IRQ \| DRIVER_HAVE_DMA \| DRIVER_IRQ_SHARED \| DRIVER_GEM \|
40f5cf99 AD	347	DRIVER_PRIME,
771fe6b9 JG	348	.dev_priv_size = 0,
	349	.load = radeon_driver_load_kms,
	350	.firstopen = radeon_driver_firstopen_kms,
	351	.open = radeon_driver_open_kms,
	352	.preclose = radeon_driver_preclose_kms,
	353	.postclose = radeon_driver_postclose_kms,
	354	.lastclose = radeon_driver_lastclose_kms,
	355	.unload = radeon_driver_unload_kms,
	356	.suspend = radeon_suspend_kms,
	357	.resume = radeon_resume_kms,
	358	.get_vblank_counter = radeon_get_vblank_counter_kms,
	359	.enable_vblank = radeon_enable_vblank_kms,
	360	.disable_vblank = radeon_disable_vblank_kms,
f5a80209 MK	361	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
f5a80209 MK	362	.get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9 JG	363	#if defined(CONFIG_DEBUG_FS)
	364	.debugfs_init = radeon_debugfs_init,
	365	.debugfs_cleanup = radeon_debugfs_cleanup,
	366	#endif
	367	.irq_preinstall = radeon_driver_irq_preinstall_kms,
	368	.irq_postinstall = radeon_driver_irq_postinstall_kms,
	369	.irq_uninstall = radeon_driver_irq_uninstall_kms,
	370	.irq_handler = radeon_driver_irq_handler_kms,
771fe6b9 JG	371	.ioctls = radeon_ioctls_kms,
	372	.gem_init_object = radeon_gem_object_init,
	373	.gem_free_object = radeon_gem_object_free,
721604a1 JG	374	.gem_open_object = radeon_gem_object_open,
721604a1 JG	375	.gem_close_object = radeon_gem_object_close,
771fe6b9	376	.dma_ioctl = radeon_dma_ioctl_kms,
ff72145b DA	377	.dumb_create = radeon_mode_dumb_create,
	378	.dumb_map_offset = radeon_mode_dumb_mmap,
	379	.dumb_destroy = radeon_mode_dumb_destroy,
e08e96de	380	.fops = &radeon_driver_kms_fops,
40f5cf99 AD	381
	382	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	383	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	384	.gem_prime_export = radeon_gem_prime_export,
	385	.gem_prime_import = radeon_gem_prime_import,
	386
771fe6b9 JG	387	.name = DRIVER_NAME,
	388	.desc = DRIVER_DESC,
	389	.date = DRIVER_DATE,
	390	.major = KMS_DRIVER_MAJOR,
	391	.minor = KMS_DRIVER_MINOR,
	392	.patchlevel = KMS_DRIVER_PATCHLEVEL,
	393	};
771fe6b9 JG	394
771fe6b9 JG	395	static struct drm_driver *driver;
8410ea3b DA	396	static struct pci_driver *pdriver;
	397
	398	static struct pci_driver radeon_pci_driver = {
	399	.name = DRIVER_NAME,
	400	.id_table = pciidlist,
	401	};
	402
	403	static struct pci_driver radeon_kms_pci_driver = {
	404	.name = DRIVER_NAME,
	405	.id_table = pciidlist,
	406	.probe = radeon_pci_probe,
	407	.remove = radeon_pci_remove,
	408	.suspend = radeon_pci_suspend,
	409	.resume = radeon_pci_resume,
	410	};
771fe6b9	411
1da177e4 LT	412	static int __init radeon_init(void)
1da177e4 LT	413	{
771fe6b9	414	driver = &driver_old;
8410ea3b	415	pdriver = &radeon_pci_driver;
771fe6b9	416	driver->num_ioctls = radeon_max_ioctl;
de05065f DA	417	#ifdef CONFIG_VGA_CONSOLE
	418	if (vgacon_text_force() && radeon_modeset == -1) {
	419	DRM_INFO("VGACON disable radeon kernel modesetting.\n");
	420	driver = &driver_old;
8410ea3b	421	pdriver = &radeon_pci_driver;
de05065f DA	422	driver->driver_features &= ~DRIVER_MODESET;
	423	radeon_modeset = 0;
	424	}
	425	#endif
771fe6b9 JG	426	/* if enabled by default */
771fe6b9 JG	427	if (radeon_modeset == -1) {
a0cdc649 DA	428	#ifdef CONFIG_DRM_RADEON_KMS
a0cdc649 DA	429	DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9	430	radeon_modeset = 1;
a0cdc649 DA	431	#else
	432	DRM_INFO("radeon defaulting to userspace modesetting.\n");
	433	radeon_modeset = 0;
	434	#endif
771fe6b9 JG	435	}
	436	if (radeon_modeset == 1) {
	437	DRM_INFO("radeon kernel modesetting enabled.\n");
	438	driver = &kms_driver;
8410ea3b	439	pdriver = &radeon_kms_pci_driver;
771fe6b9 JG	440	driver->driver_features \|= DRIVER_MODESET;
771fe6b9 JG	441	driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af	442	radeon_register_atpx_handler();
771fe6b9	443	}
771fe6b9 JG	444	/* if the vga console setting is enabled still
771fe6b9 JG	445	* let modprobe override it */
8410ea3b	446	return drm_pci_init(driver, pdriver);
1da177e4 LT	447	}
	448
	449	static void __exit radeon_exit(void)
	450	{
8410ea3b	451	drm_pci_exit(driver, pdriver);
6a9ee8af	452	radeon_unregister_atpx_handler();
1da177e4 LT	453	}
1da177e4 LT	454
176f613e	455	module_init(radeon_init);
1da177e4 LT	456	module_exit(radeon_exit);
1da177e4 LT	457
b5e89ed5 DA	458	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	459	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	460	MODULE_LICENSE("GPL and additional rights");