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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
63ec0119 MD |
43 | extern void |
44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | |
45 | struct drm_connector *drm_connector); | |
46 | ||
591a10e1 AD |
47 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); |
48 | ||
d4877cf2 AD |
49 | void radeon_connector_hotplug(struct drm_connector *connector) |
50 | { | |
51 | struct drm_device *dev = connector->dev; | |
52 | struct radeon_device *rdev = dev->dev_private; | |
53 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
54 | ||
cbac9543 AD |
55 | /* bail if the connector does not have hpd pin, e.g., |
56 | * VGA, TV, etc. | |
57 | */ | |
58 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
59 | return; | |
60 | ||
1e85e1d0 | 61 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 62 | |
73104b5c AD |
63 | /* if the connector is already off, don't turn it back on */ |
64 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
65 | return; | |
66 | ||
d5811e87 AD |
67 | /* just deal with DP (not eDP) here. */ |
68 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
69 | int saved_dpms = connector->dpms; | |
7c3ed0fd | 70 | |
d5811e87 AD |
71 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) && |
72 | radeon_dp_needs_link_train(radeon_connector)) | |
1e85e1d0 AD |
73 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); |
74 | else | |
75 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
d5811e87 | 76 | connector->dpms = saved_dpms; |
d4877cf2 | 77 | } |
d4877cf2 AD |
78 | } |
79 | ||
445282db DA |
80 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
81 | { | |
82 | struct drm_crtc *crtc = encoder->crtc; | |
83 | ||
84 | if (crtc && crtc->enabled) { | |
85 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
86 | crtc->x, crtc->y, crtc->fb); | |
87 | } | |
88 | } | |
771fe6b9 JG |
89 | static void |
90 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
91 | { | |
92 | struct drm_device *dev = connector->dev; | |
93 | struct radeon_device *rdev = dev->dev_private; | |
94 | struct drm_encoder *best_encoder = NULL; | |
95 | struct drm_encoder *encoder = NULL; | |
96 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
97 | struct drm_mode_object *obj; | |
98 | bool connected; | |
99 | int i; | |
100 | ||
101 | best_encoder = connector_funcs->best_encoder(connector); | |
102 | ||
103 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
104 | if (connector->encoder_ids[i] == 0) | |
105 | break; | |
106 | ||
107 | obj = drm_mode_object_find(connector->dev, | |
108 | connector->encoder_ids[i], | |
109 | DRM_MODE_OBJECT_ENCODER); | |
110 | if (!obj) | |
111 | continue; | |
112 | ||
113 | encoder = obj_to_encoder(obj); | |
114 | ||
115 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
116 | connected = true; | |
117 | else | |
118 | connected = false; | |
119 | ||
120 | if (rdev->is_atom_bios) | |
121 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
122 | else | |
123 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
124 | ||
125 | } | |
126 | } | |
127 | ||
445282db DA |
128 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
129 | { | |
130 | struct drm_mode_object *obj; | |
131 | struct drm_encoder *encoder; | |
132 | int i; | |
133 | ||
134 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
135 | if (connector->encoder_ids[i] == 0) | |
136 | break; | |
137 | ||
138 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
139 | if (!obj) | |
140 | continue; | |
141 | ||
142 | encoder = obj_to_encoder(obj); | |
143 | if (encoder->encoder_type == encoder_type) | |
144 | return encoder; | |
145 | } | |
146 | return NULL; | |
147 | } | |
148 | ||
771fe6b9 JG |
149 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
150 | { | |
151 | int enc_id = connector->encoder_ids[0]; | |
152 | struct drm_mode_object *obj; | |
153 | struct drm_encoder *encoder; | |
154 | ||
155 | /* pick the encoder ids */ | |
156 | if (enc_id) { | |
157 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
158 | if (!obj) | |
159 | return NULL; | |
160 | encoder = obj_to_encoder(obj); | |
161 | return encoder; | |
162 | } | |
163 | return NULL; | |
164 | } | |
165 | ||
4ce001ab DA |
166 | /* |
167 | * radeon_connector_analog_encoder_conflict_solve | |
168 | * - search for other connectors sharing this encoder | |
169 | * if priority is true, then set them disconnected if this is connected | |
170 | * if priority is false, set us disconnected if they are connected | |
171 | */ | |
172 | static enum drm_connector_status | |
173 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
174 | struct drm_encoder *encoder, | |
175 | enum drm_connector_status current_status, | |
176 | bool priority) | |
177 | { | |
178 | struct drm_device *dev = connector->dev; | |
179 | struct drm_connector *conflict; | |
08d07511 | 180 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
181 | int i; |
182 | ||
183 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
184 | if (conflict == connector) | |
185 | continue; | |
186 | ||
08d07511 | 187 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
188 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
189 | if (conflict->encoder_ids[i] == 0) | |
190 | break; | |
191 | ||
192 | /* if the IDs match */ | |
193 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
194 | if (conflict->status != connector_status_connected) | |
195 | continue; | |
08d07511 AD |
196 | |
197 | if (radeon_conflict->use_digital) | |
198 | continue; | |
4ce001ab DA |
199 | |
200 | if (priority == true) { | |
c5d46b4e AD |
201 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
202 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
203 | conflict->status = connector_status_disconnected; |
204 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
205 | } else { | |
c5d46b4e AD |
206 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
207 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
208 | current_status = connector_status_disconnected; |
209 | } | |
210 | break; | |
211 | } | |
212 | } | |
213 | } | |
214 | return current_status; | |
215 | ||
216 | } | |
217 | ||
771fe6b9 JG |
218 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
219 | { | |
220 | struct drm_device *dev = encoder->dev; | |
221 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
222 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 223 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 224 | |
de2103e4 AD |
225 | if (native_mode->hdisplay != 0 && |
226 | native_mode->vdisplay != 0 && | |
227 | native_mode->clock != 0) { | |
fb06ca8f | 228 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
229 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
230 | drm_mode_set_name(mode); | |
231 | ||
d9fdaafb | 232 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
233 | } else if (native_mode->hdisplay != 0 && |
234 | native_mode->vdisplay != 0) { | |
235 | /* mac laptops without an edid */ | |
236 | /* Note that this is not necessarily the exact panel mode, | |
237 | * but an approximation based on the cvt formula. For these | |
238 | * systems we should ideally read the mode info out of the | |
239 | * registers or add a mode table, but this works and is much | |
240 | * simpler. | |
241 | */ | |
242 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
243 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 244 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
245 | } |
246 | return mode; | |
247 | } | |
248 | ||
923f6848 AD |
249 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
250 | { | |
251 | struct drm_device *dev = encoder->dev; | |
252 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
253 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 254 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
255 | int i; |
256 | struct mode_size { | |
257 | int w; | |
258 | int h; | |
259 | } common_modes[17] = { | |
260 | { 640, 480}, | |
261 | { 720, 480}, | |
262 | { 800, 600}, | |
263 | { 848, 480}, | |
264 | {1024, 768}, | |
265 | {1152, 768}, | |
266 | {1280, 720}, | |
267 | {1280, 800}, | |
268 | {1280, 854}, | |
269 | {1280, 960}, | |
270 | {1280, 1024}, | |
271 | {1440, 900}, | |
272 | {1400, 1050}, | |
273 | {1680, 1050}, | |
274 | {1600, 1200}, | |
275 | {1920, 1080}, | |
276 | {1920, 1200} | |
277 | }; | |
278 | ||
279 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
280 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
281 | if (common_modes[i].w > 1024 || | |
282 | common_modes[i].h > 768) | |
283 | continue; | |
284 | } | |
923f6848 | 285 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
286 | if (common_modes[i].w > native_mode->hdisplay || |
287 | common_modes[i].h > native_mode->vdisplay || | |
288 | (common_modes[i].w == native_mode->hdisplay && | |
289 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
290 | continue; |
291 | } | |
292 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
293 | continue; | |
294 | ||
d50ba256 | 295 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
296 | drm_mode_probed_add(connector, mode); |
297 | } | |
298 | } | |
299 | ||
771fe6b9 JG |
300 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
301 | uint64_t val) | |
302 | { | |
445282db DA |
303 | struct drm_device *dev = connector->dev; |
304 | struct radeon_device *rdev = dev->dev_private; | |
305 | struct drm_encoder *encoder; | |
306 | struct radeon_encoder *radeon_encoder; | |
307 | ||
308 | if (property == rdev->mode_info.coherent_mode_property) { | |
309 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 310 | bool new_coherent_mode; |
445282db DA |
311 | |
312 | /* need to find digital encoder on connector */ | |
313 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
314 | if (!encoder) | |
315 | return 0; | |
316 | ||
317 | radeon_encoder = to_radeon_encoder(encoder); | |
318 | ||
319 | if (!radeon_encoder->enc_priv) | |
320 | return 0; | |
321 | ||
322 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
323 | new_coherent_mode = val ? true : false; |
324 | if (dig->coherent_mode != new_coherent_mode) { | |
325 | dig->coherent_mode = new_coherent_mode; | |
326 | radeon_property_change_mode(&radeon_encoder->base); | |
327 | } | |
445282db DA |
328 | } |
329 | ||
5b1714d3 AD |
330 | if (property == rdev->mode_info.underscan_property) { |
331 | /* need to find digital encoder on connector */ | |
332 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
333 | if (!encoder) | |
334 | return 0; | |
335 | ||
336 | radeon_encoder = to_radeon_encoder(encoder); | |
337 | ||
338 | if (radeon_encoder->underscan_type != val) { | |
339 | radeon_encoder->underscan_type = val; | |
340 | radeon_property_change_mode(&radeon_encoder->base); | |
341 | } | |
342 | } | |
343 | ||
5bccf5e3 MG |
344 | if (property == rdev->mode_info.underscan_hborder_property) { |
345 | /* need to find digital encoder on connector */ | |
346 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
347 | if (!encoder) | |
348 | return 0; | |
349 | ||
350 | radeon_encoder = to_radeon_encoder(encoder); | |
351 | ||
352 | if (radeon_encoder->underscan_hborder != val) { | |
353 | radeon_encoder->underscan_hborder = val; | |
354 | radeon_property_change_mode(&radeon_encoder->base); | |
355 | } | |
356 | } | |
357 | ||
358 | if (property == rdev->mode_info.underscan_vborder_property) { | |
359 | /* need to find digital encoder on connector */ | |
360 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
361 | if (!encoder) | |
362 | return 0; | |
363 | ||
364 | radeon_encoder = to_radeon_encoder(encoder); | |
365 | ||
366 | if (radeon_encoder->underscan_vborder != val) { | |
367 | radeon_encoder->underscan_vborder = val; | |
368 | radeon_property_change_mode(&radeon_encoder->base); | |
369 | } | |
370 | } | |
371 | ||
445282db DA |
372 | if (property == rdev->mode_info.tv_std_property) { |
373 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
374 | if (!encoder) { | |
375 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
376 | } | |
377 | ||
378 | if (!encoder) | |
379 | return 0; | |
380 | ||
381 | radeon_encoder = to_radeon_encoder(encoder); | |
382 | if (!radeon_encoder->enc_priv) | |
383 | return 0; | |
643acacf | 384 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
385 | struct radeon_encoder_atom_dac *dac_int; |
386 | dac_int = radeon_encoder->enc_priv; | |
387 | dac_int->tv_std = val; | |
388 | } else { | |
389 | struct radeon_encoder_tv_dac *dac_int; | |
390 | dac_int = radeon_encoder->enc_priv; | |
391 | dac_int->tv_std = val; | |
392 | } | |
393 | radeon_property_change_mode(&radeon_encoder->base); | |
394 | } | |
395 | ||
396 | if (property == rdev->mode_info.load_detect_property) { | |
397 | struct radeon_connector *radeon_connector = | |
398 | to_radeon_connector(connector); | |
399 | ||
400 | if (val == 0) | |
401 | radeon_connector->dac_load_detect = false; | |
402 | else | |
403 | radeon_connector->dac_load_detect = true; | |
404 | } | |
405 | ||
406 | if (property == rdev->mode_info.tmds_pll_property) { | |
407 | struct radeon_encoder_int_tmds *tmds = NULL; | |
408 | bool ret = false; | |
409 | /* need to find digital encoder on connector */ | |
410 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
411 | if (!encoder) | |
412 | return 0; | |
413 | ||
414 | radeon_encoder = to_radeon_encoder(encoder); | |
415 | ||
416 | tmds = radeon_encoder->enc_priv; | |
417 | if (!tmds) | |
418 | return 0; | |
419 | ||
420 | if (val == 0) { | |
421 | if (rdev->is_atom_bios) | |
422 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
423 | else | |
424 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
425 | } | |
426 | if (val == 1 || ret == false) { | |
427 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
428 | } | |
429 | radeon_property_change_mode(&radeon_encoder->base); | |
430 | } | |
431 | ||
771fe6b9 JG |
432 | return 0; |
433 | } | |
434 | ||
e384fab8 TR |
435 | /* |
436 | * Some integrated ATI Radeon chipset implementations (e. g. | |
437 | * Asus M2A-VM HDMI) may indicate the availability of a DDC, | |
438 | * even when there's no monitor connected. For these connectors | |
439 | * following DDC probe extension will be applied: check also for the | |
440 | * availability of EDID with at least a correct EDID header. Only then, | |
441 | * DDC is assumed to be available. This prevents drm_get_edid() and | |
442 | * drm_edid_block_valid() from periodically dumping data and kernel | |
443 | * errors into the logs and onto the terminal. | |
444 | */ | |
445 | static bool radeon_connector_needs_extended_probe(struct radeon_device *dev, | |
446 | uint32_t supported_device, | |
447 | int connector_type) | |
448 | { | |
449 | /* Asus M2A-VM HDMI board sends data to i2c bus even, | |
450 | * if HDMI add-on card is not plugged in or HDMI is disabled in | |
451 | * BIOS. Valid DDC can only be assumed, if also a valid EDID header | |
452 | * can be retrieved via i2c bus during DDC probe */ | |
453 | if ((dev->pdev->device == 0x791e) && | |
454 | (dev->pdev->subsystem_vendor == 0x1043) && | |
455 | (dev->pdev->subsystem_device == 0x826d)) { | |
456 | if ((connector_type == DRM_MODE_CONNECTOR_HDMIA) && | |
457 | (supported_device == ATOM_DEVICE_DFP2_SUPPORT)) | |
458 | return true; | |
459 | } | |
a81b31e9 TR |
460 | /* ECS A740GM-M with ATI RADEON 2100 sends data to i2c bus |
461 | * for a DVI connector that is not implemented */ | |
462 | if ((dev->pdev->device == 0x796e) && | |
463 | (dev->pdev->subsystem_vendor == 0x1019) && | |
464 | (dev->pdev->subsystem_device == 0x2615)) { | |
465 | if ((connector_type == DRM_MODE_CONNECTOR_DVID) && | |
466 | (supported_device == ATOM_DEVICE_DFP2_SUPPORT)) | |
467 | return true; | |
468 | } | |
f2b60717 TR |
469 | /* TOSHIBA Satellite L300D with ATI Mobility Radeon x1100 |
470 | * (RS690M) sends data to i2c bus for a HDMI connector that | |
471 | * is not implemented */ | |
472 | if ((dev->pdev->device == 0x791f) && | |
473 | (dev->pdev->subsystem_vendor == 0x1179) && | |
474 | (dev->pdev->subsystem_device == 0xff68)) { | |
475 | if ((connector_type == DRM_MODE_CONNECTOR_HDMIA) && | |
476 | (supported_device == ATOM_DEVICE_DFP2_SUPPORT)) | |
477 | return true; | |
478 | } | |
e384fab8 TR |
479 | |
480 | /* Default: no EDID header probe required for DDC probing */ | |
481 | return false; | |
482 | } | |
483 | ||
8dfaa8a7 MD |
484 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
485 | struct drm_connector *connector) | |
486 | { | |
487 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 488 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
489 | struct drm_display_mode *t, *mode; |
490 | ||
491 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
492 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
493 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
494 | if (mode->hdisplay != native_mode->hdisplay || | |
495 | mode->vdisplay != native_mode->vdisplay) | |
496 | memcpy(native_mode, mode, sizeof(*mode)); | |
497 | } | |
498 | } | |
8dfaa8a7 MD |
499 | |
500 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 501 | if (!native_mode->clock) { |
8dfaa8a7 | 502 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
503 | if (mode->hdisplay == native_mode->hdisplay && |
504 | mode->vdisplay == native_mode->vdisplay) { | |
505 | *native_mode = *mode; | |
506 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 507 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
508 | break; |
509 | } | |
510 | } | |
511 | } | |
13bb9430 | 512 | |
de2103e4 | 513 | if (!native_mode->clock) { |
c5d46b4e | 514 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
515 | radeon_encoder->rmx_type = RMX_OFF; |
516 | } | |
517 | } | |
771fe6b9 JG |
518 | |
519 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
520 | { | |
521 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
522 | struct drm_encoder *encoder; | |
523 | int ret = 0; | |
524 | struct drm_display_mode *mode; | |
525 | ||
526 | if (radeon_connector->ddc_bus) { | |
527 | ret = radeon_ddc_get_modes(radeon_connector); | |
528 | if (ret > 0) { | |
7747b713 | 529 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
530 | if (encoder) { |
531 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
532 | /* add scaled modes */ |
533 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 534 | } |
771fe6b9 JG |
535 | return ret; |
536 | } | |
537 | } | |
538 | ||
539 | encoder = radeon_best_single_encoder(connector); | |
540 | if (!encoder) | |
541 | return 0; | |
542 | ||
543 | /* we have no EDID modes */ | |
544 | mode = radeon_fp_native_mode(encoder); | |
545 | if (mode) { | |
546 | ret = 1; | |
547 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
548 | /* add the width/height from vbios tables if available */ |
549 | connector->display_info.width_mm = mode->width_mm; | |
550 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
551 | /* add scaled modes */ |
552 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 553 | } |
923f6848 | 554 | |
771fe6b9 JG |
555 | return ret; |
556 | } | |
557 | ||
558 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
559 | struct drm_display_mode *mode) | |
560 | { | |
a3fa6320 AD |
561 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
562 | ||
563 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
564 | return MODE_PANEL; | |
565 | ||
566 | if (encoder) { | |
567 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
568 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
569 | ||
570 | /* AVIVO hardware supports downscaling modes larger than the panel | |
571 | * to the panel size, but I'm not sure this is desirable. | |
572 | */ | |
573 | if ((mode->hdisplay > native_mode->hdisplay) || | |
574 | (mode->vdisplay > native_mode->vdisplay)) | |
575 | return MODE_PANEL; | |
576 | ||
577 | /* if scaling is disabled, block non-native modes */ | |
578 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
579 | if ((mode->hdisplay != native_mode->hdisplay) || | |
580 | (mode->vdisplay != native_mode->vdisplay)) | |
581 | return MODE_PANEL; | |
582 | } | |
583 | } | |
584 | ||
771fe6b9 JG |
585 | return MODE_OK; |
586 | } | |
587 | ||
7b334fcb | 588 | static enum drm_connector_status |
930a9e28 | 589 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 590 | { |
0549a061 | 591 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 592 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 593 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
594 | |
595 | if (encoder) { | |
596 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 597 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
598 | |
599 | /* check if panel is valid */ | |
de2103e4 | 600 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
601 | ret = connector_status_connected; |
602 | ||
603 | } | |
0549a061 AD |
604 | |
605 | /* check for edid as well */ | |
0294cf4f AD |
606 | if (radeon_connector->edid) |
607 | ret = connector_status_connected; | |
608 | else { | |
609 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
610 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
611 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
612 | if (radeon_connector->edid) |
613 | ret = connector_status_connected; | |
614 | } | |
0549a061 | 615 | } |
771fe6b9 | 616 | /* check acpi lid status ??? */ |
2ffb8429 | 617 | |
771fe6b9 JG |
618 | radeon_connector_update_scratch_regs(connector, ret); |
619 | return ret; | |
620 | } | |
621 | ||
622 | static void radeon_connector_destroy(struct drm_connector *connector) | |
623 | { | |
624 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
625 | ||
0294cf4f AD |
626 | if (radeon_connector->edid) |
627 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
628 | kfree(radeon_connector->con_priv); |
629 | drm_sysfs_connector_remove(connector); | |
630 | drm_connector_cleanup(connector); | |
631 | kfree(connector); | |
632 | } | |
633 | ||
445282db DA |
634 | static int radeon_lvds_set_property(struct drm_connector *connector, |
635 | struct drm_property *property, | |
636 | uint64_t value) | |
637 | { | |
638 | struct drm_device *dev = connector->dev; | |
639 | struct radeon_encoder *radeon_encoder; | |
640 | enum radeon_rmx_type rmx_type; | |
641 | ||
d9fdaafb | 642 | DRM_DEBUG_KMS("\n"); |
445282db DA |
643 | if (property != dev->mode_config.scaling_mode_property) |
644 | return 0; | |
645 | ||
646 | if (connector->encoder) | |
647 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
648 | else { | |
649 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
650 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
651 | } | |
652 | ||
653 | switch (value) { | |
654 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
655 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
656 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
657 | default: | |
658 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
659 | } | |
660 | if (radeon_encoder->rmx_type == rmx_type) | |
661 | return 0; | |
662 | ||
663 | radeon_encoder->rmx_type = rmx_type; | |
664 | ||
665 | radeon_property_change_mode(&radeon_encoder->base); | |
666 | return 0; | |
667 | } | |
668 | ||
669 | ||
771fe6b9 JG |
670 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
671 | .get_modes = radeon_lvds_get_modes, | |
672 | .mode_valid = radeon_lvds_mode_valid, | |
673 | .best_encoder = radeon_best_single_encoder, | |
674 | }; | |
675 | ||
676 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
677 | .dpms = drm_helper_connector_dpms, | |
678 | .detect = radeon_lvds_detect, | |
679 | .fill_modes = drm_helper_probe_single_connector_modes, | |
680 | .destroy = radeon_connector_destroy, | |
445282db | 681 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
682 | }; |
683 | ||
684 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
685 | { | |
686 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
687 | int ret; | |
688 | ||
689 | ret = radeon_ddc_get_modes(radeon_connector); | |
690 | ||
691 | return ret; | |
692 | } | |
693 | ||
694 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
695 | struct drm_display_mode *mode) | |
696 | { | |
b20f9bef AD |
697 | struct drm_device *dev = connector->dev; |
698 | struct radeon_device *rdev = dev->dev_private; | |
699 | ||
a3fa6320 | 700 | /* XXX check mode bandwidth */ |
b20f9bef AD |
701 | |
702 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
703 | return MODE_CLOCK_HIGH; | |
704 | ||
771fe6b9 JG |
705 | return MODE_OK; |
706 | } | |
707 | ||
7b334fcb | 708 | static enum drm_connector_status |
930a9e28 | 709 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 710 | { |
fafcf94e AD |
711 | struct drm_device *dev = connector->dev; |
712 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
713 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
714 | struct drm_encoder *encoder; | |
715 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 716 | bool dret = false; |
771fe6b9 JG |
717 | enum drm_connector_status ret = connector_status_disconnected; |
718 | ||
4ce001ab DA |
719 | encoder = radeon_best_single_encoder(connector); |
720 | if (!encoder) | |
721 | ret = connector_status_disconnected; | |
722 | ||
eb6b6d7c | 723 | if (radeon_connector->ddc_bus) |
e384fab8 TR |
724 | dret = radeon_ddc_probe(radeon_connector, |
725 | radeon_connector->requires_extended_probe); | |
0294cf4f AD |
726 | if (dret) { |
727 | if (radeon_connector->edid) { | |
728 | kfree(radeon_connector->edid); | |
729 | radeon_connector->edid = NULL; | |
730 | } | |
0294cf4f | 731 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
732 | |
733 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
734 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
735 | drm_get_connector_name(connector)); | |
736 | ret = connector_status_connected; | |
0294cf4f AD |
737 | } else { |
738 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
739 | ||
740 | /* some oems have boards with separate digital and analog connectors | |
741 | * with a shared ddc line (often vga + hdmi) | |
742 | */ | |
743 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
744 | kfree(radeon_connector->edid); | |
745 | radeon_connector->edid = NULL; | |
746 | ret = connector_status_disconnected; | |
747 | } else | |
748 | ret = connector_status_connected; | |
749 | } | |
750 | } else { | |
c3cceedd DA |
751 | |
752 | /* if we aren't forcing don't do destructive polling */ | |
753 | if (!force) | |
754 | return connector->status; | |
755 | ||
d8a7f792 | 756 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
757 | encoder_funcs = encoder->helper_private; |
758 | ret = encoder_funcs->detect(encoder, connector); | |
759 | } | |
771fe6b9 JG |
760 | } |
761 | ||
4ce001ab DA |
762 | if (ret == connector_status_connected) |
763 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
764 | |
765 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
766 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
767 | * by other means, assume the CRT is connected and use that EDID. | |
768 | */ | |
769 | if ((!rdev->is_atom_bios) && | |
770 | (ret == connector_status_disconnected) && | |
771 | rdev->mode_info.bios_hardcoded_edid_size) { | |
772 | ret = connector_status_connected; | |
773 | } | |
774 | ||
771fe6b9 JG |
775 | radeon_connector_update_scratch_regs(connector, ret); |
776 | return ret; | |
777 | } | |
778 | ||
779 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
780 | .get_modes = radeon_vga_get_modes, | |
781 | .mode_valid = radeon_vga_mode_valid, | |
782 | .best_encoder = radeon_best_single_encoder, | |
783 | }; | |
784 | ||
785 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
786 | .dpms = drm_helper_connector_dpms, | |
787 | .detect = radeon_vga_detect, | |
788 | .fill_modes = drm_helper_probe_single_connector_modes, | |
789 | .destroy = radeon_connector_destroy, | |
790 | .set_property = radeon_connector_set_property, | |
791 | }; | |
792 | ||
4ce001ab DA |
793 | static int radeon_tv_get_modes(struct drm_connector *connector) |
794 | { | |
795 | struct drm_device *dev = connector->dev; | |
923f6848 | 796 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 797 | struct drm_display_mode *tv_mode; |
923f6848 | 798 | struct drm_encoder *encoder; |
4ce001ab | 799 | |
923f6848 AD |
800 | encoder = radeon_best_single_encoder(connector); |
801 | if (!encoder) | |
802 | return 0; | |
4ce001ab | 803 | |
923f6848 AD |
804 | /* avivo chips can scale any mode */ |
805 | if (rdev->family >= CHIP_RS600) | |
806 | /* add scaled modes */ | |
807 | radeon_add_common_modes(encoder, connector); | |
808 | else { | |
809 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 810 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
811 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
812 | drm_mode_probed_add(connector, tv_mode); | |
813 | } | |
4ce001ab DA |
814 | return 1; |
815 | } | |
816 | ||
817 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
818 | struct drm_display_mode *mode) | |
819 | { | |
a3fa6320 AD |
820 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
821 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
822 | return MODE_OK; |
823 | } | |
824 | ||
7b334fcb | 825 | static enum drm_connector_status |
930a9e28 | 826 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
827 | { |
828 | struct drm_encoder *encoder; | |
829 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
830 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
831 | enum drm_connector_status ret = connector_status_disconnected; | |
832 | ||
833 | if (!radeon_connector->dac_load_detect) | |
834 | return ret; | |
4ce001ab DA |
835 | |
836 | encoder = radeon_best_single_encoder(connector); | |
837 | if (!encoder) | |
838 | ret = connector_status_disconnected; | |
839 | else { | |
840 | encoder_funcs = encoder->helper_private; | |
841 | ret = encoder_funcs->detect(encoder, connector); | |
842 | } | |
843 | if (ret == connector_status_connected) | |
844 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
845 | radeon_connector_update_scratch_regs(connector, ret); | |
846 | return ret; | |
847 | } | |
848 | ||
849 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
850 | .get_modes = radeon_tv_get_modes, | |
851 | .mode_valid = radeon_tv_mode_valid, | |
852 | .best_encoder = radeon_best_single_encoder, | |
853 | }; | |
854 | ||
855 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
856 | .dpms = drm_helper_connector_dpms, | |
857 | .detect = radeon_tv_detect, | |
858 | .fill_modes = drm_helper_probe_single_connector_modes, | |
859 | .destroy = radeon_connector_destroy, | |
860 | .set_property = radeon_connector_set_property, | |
861 | }; | |
862 | ||
771fe6b9 JG |
863 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
864 | { | |
865 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
866 | int ret; | |
867 | ||
868 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
869 | return ret; |
870 | } | |
871 | ||
4ce001ab DA |
872 | /* |
873 | * DVI is complicated | |
874 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
875 | * we can do analog/digital monitor detection at this point. | |
876 | * If the monitor is an analog monitor or we got no DDC, | |
877 | * we need to find the DAC encoder object for this connector. | |
878 | * If we got no DDC, we do load detection on the DAC encoder object. | |
879 | * If we got analog DDC or load detection passes on the DAC encoder | |
880 | * we have to check if this analog encoder is shared with anyone else (TV) | |
881 | * if its shared we have to set the other connector to disconnected. | |
882 | */ | |
7b334fcb | 883 | static enum drm_connector_status |
930a9e28 | 884 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 885 | { |
fafcf94e AD |
886 | struct drm_device *dev = connector->dev; |
887 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 888 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 889 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
890 | struct drm_encoder_helper_funcs *encoder_funcs; |
891 | struct drm_mode_object *obj; | |
892 | int i; | |
893 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 894 | bool dret = false; |
771fe6b9 | 895 | |
eb6b6d7c | 896 | if (radeon_connector->ddc_bus) |
e384fab8 TR |
897 | dret = radeon_ddc_probe(radeon_connector, |
898 | radeon_connector->requires_extended_probe); | |
4ce001ab | 899 | if (dret) { |
0294cf4f AD |
900 | if (radeon_connector->edid) { |
901 | kfree(radeon_connector->edid); | |
902 | radeon_connector->edid = NULL; | |
903 | } | |
4ce001ab | 904 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
905 | |
906 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
907 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
908 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
909 | /* rs690 seems to have a problem with connectors not existing and always |
910 | * return a block of 0's. If we see this just stop polling on this output */ | |
911 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
912 | ret = connector_status_disconnected; | |
913 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
914 | radeon_connector->ddc_bus = NULL; | |
915 | } | |
4ce001ab DA |
916 | } else { |
917 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
918 | ||
0294cf4f AD |
919 | /* some oems have boards with separate digital and analog connectors |
920 | * with a shared ddc line (often vga + hdmi) | |
921 | */ | |
922 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
923 | kfree(radeon_connector->edid); | |
924 | radeon_connector->edid = NULL; | |
925 | ret = connector_status_disconnected; | |
926 | } else | |
927 | ret = connector_status_connected; | |
71407c46 | 928 | |
42f14c4b AD |
929 | /* This gets complicated. We have boards with VGA + HDMI with a |
930 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
931 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
932 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 933 | */ |
d3932d6c | 934 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
935 | struct drm_connector *list_connector; |
936 | struct radeon_connector *list_radeon_connector; | |
937 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
938 | if (connector == list_connector) | |
939 | continue; | |
940 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
941 | if (list_radeon_connector->shared_ddc && |
942 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
943 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
944 | /* cases where both connectors are digital */ |
945 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
946 | /* hpd is our only option in this case */ | |
947 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
948 | kfree(radeon_connector->edid); |
949 | radeon_connector->edid = NULL; | |
950 | ret = connector_status_disconnected; | |
951 | } | |
952 | } | |
953 | } | |
954 | } | |
955 | } | |
4ce001ab DA |
956 | } |
957 | } | |
958 | ||
959 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
960 | goto out; | |
961 | ||
5f0a2612 AD |
962 | /* DVI-D and HDMI-A are digital only */ |
963 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
964 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
965 | goto out; | |
966 | ||
c3cceedd DA |
967 | if (!force) { |
968 | ret = connector->status; | |
969 | goto out; | |
970 | } | |
971 | ||
4ce001ab | 972 | /* find analog encoder */ |
445282db DA |
973 | if (radeon_connector->dac_load_detect) { |
974 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
975 | if (connector->encoder_ids[i] == 0) | |
976 | break; | |
771fe6b9 | 977 | |
445282db DA |
978 | obj = drm_mode_object_find(connector->dev, |
979 | connector->encoder_ids[i], | |
980 | DRM_MODE_OBJECT_ENCODER); | |
981 | if (!obj) | |
982 | continue; | |
771fe6b9 | 983 | |
445282db | 984 | encoder = obj_to_encoder(obj); |
771fe6b9 | 985 | |
445282db DA |
986 | encoder_funcs = encoder->helper_private; |
987 | if (encoder_funcs->detect) { | |
988 | if (ret != connector_status_connected) { | |
989 | ret = encoder_funcs->detect(encoder, connector); | |
990 | if (ret == connector_status_connected) { | |
991 | radeon_connector->use_digital = false; | |
992 | } | |
771fe6b9 | 993 | } |
445282db | 994 | break; |
771fe6b9 JG |
995 | } |
996 | } | |
997 | } | |
998 | ||
4ce001ab DA |
999 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1000 | encoder) { | |
1001 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1002 | } | |
1003 | ||
fafcf94e AD |
1004 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1005 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1006 | * by other means, assume the DFP is connected and use that EDID. In most | |
1007 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1008 | * processor. | |
1009 | */ | |
1010 | if ((!rdev->is_atom_bios) && | |
1011 | (ret == connector_status_disconnected) && | |
1012 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1013 | radeon_connector->use_digital = true; | |
1014 | ret = connector_status_connected; | |
1015 | } | |
1016 | ||
4ce001ab | 1017 | out: |
771fe6b9 JG |
1018 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1019 | radeon_connector_update_scratch_regs(connector, ret); | |
1020 | return ret; | |
1021 | } | |
1022 | ||
1023 | /* okay need to be smart in here about which encoder to pick */ | |
1024 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
1025 | { | |
1026 | int enc_id = connector->encoder_ids[0]; | |
1027 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1028 | struct drm_mode_object *obj; | |
1029 | struct drm_encoder *encoder; | |
1030 | int i; | |
1031 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1032 | if (connector->encoder_ids[i] == 0) | |
1033 | break; | |
1034 | ||
1035 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1036 | if (!obj) | |
1037 | continue; | |
1038 | ||
1039 | encoder = obj_to_encoder(obj); | |
1040 | ||
4ce001ab | 1041 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1042 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1043 | return encoder; | |
1044 | } else { | |
1045 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1046 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1047 | return encoder; | |
1048 | } | |
1049 | } | |
1050 | ||
1051 | /* see if we have a default encoder TODO */ | |
1052 | ||
1053 | /* then check use digitial */ | |
1054 | /* pick the first one */ | |
1055 | if (enc_id) { | |
1056 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1057 | if (!obj) | |
1058 | return NULL; | |
1059 | encoder = obj_to_encoder(obj); | |
1060 | return encoder; | |
1061 | } | |
1062 | return NULL; | |
1063 | } | |
1064 | ||
d50ba256 DA |
1065 | static void radeon_dvi_force(struct drm_connector *connector) |
1066 | { | |
1067 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1068 | if (connector->force == DRM_FORCE_ON) | |
1069 | radeon_connector->use_digital = false; | |
1070 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1071 | radeon_connector->use_digital = true; | |
1072 | } | |
1073 | ||
a3fa6320 AD |
1074 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1075 | struct drm_display_mode *mode) | |
1076 | { | |
1b24203e AD |
1077 | struct drm_device *dev = connector->dev; |
1078 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1079 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1080 | ||
1081 | /* XXX check mode bandwidth */ | |
1082 | ||
1b24203e AD |
1083 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1084 | if (radeon_connector->use_digital && | |
1085 | (rdev->family == CHIP_RV100) && | |
1086 | (mode->clock > 135000)) | |
1087 | return MODE_CLOCK_HIGH; | |
1088 | ||
a3fa6320 AD |
1089 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1090 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1091 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1092 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1093 | return MODE_OK; | |
e1e84017 AD |
1094 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1095 | if (ASIC_IS_DCE3(rdev)) { | |
1096 | /* HDMI 1.3+ supports max clock of 340 Mhz */ | |
1097 | if (mode->clock > 340000) | |
1098 | return MODE_CLOCK_HIGH; | |
1099 | else | |
1100 | return MODE_OK; | |
1101 | } else | |
1102 | return MODE_CLOCK_HIGH; | |
1103 | } else | |
a3fa6320 AD |
1104 | return MODE_CLOCK_HIGH; |
1105 | } | |
b20f9bef AD |
1106 | |
1107 | /* check against the max pixel clock */ | |
1108 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1109 | return MODE_CLOCK_HIGH; | |
1110 | ||
a3fa6320 AD |
1111 | return MODE_OK; |
1112 | } | |
1113 | ||
771fe6b9 JG |
1114 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
1115 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 1116 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1117 | .best_encoder = radeon_dvi_encoder, |
1118 | }; | |
1119 | ||
1120 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
1121 | .dpms = drm_helper_connector_dpms, | |
1122 | .detect = radeon_dvi_detect, | |
1123 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1124 | .set_property = radeon_connector_set_property, | |
1125 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1126 | .force = radeon_dvi_force, |
771fe6b9 JG |
1127 | }; |
1128 | ||
ffd09c64 AD |
1129 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1130 | { | |
1131 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1132 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1133 | ||
ffd09c64 AD |
1134 | if (radeon_connector->edid) |
1135 | kfree(radeon_connector->edid); | |
1136 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1137 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1138 | kfree(radeon_connector->con_priv); |
1139 | drm_sysfs_connector_remove(connector); | |
1140 | drm_connector_cleanup(connector); | |
1141 | kfree(connector); | |
1142 | } | |
1143 | ||
746c1aa4 DA |
1144 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1145 | { | |
1146 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1147 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1148 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1149 | int ret; |
1150 | ||
f89931f3 AD |
1151 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1152 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1153 | struct drm_display_mode *mode; |
1154 | ||
8b834852 AD |
1155 | if (!radeon_dig_connector->edp_on) |
1156 | atombios_set_edp_panel_power(connector, | |
1157 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
d291767b | 1158 | ret = radeon_ddc_get_modes(radeon_connector); |
8b834852 AD |
1159 | if (!radeon_dig_connector->edp_on) |
1160 | atombios_set_edp_panel_power(connector, | |
1161 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
d291767b AD |
1162 | |
1163 | if (ret > 0) { | |
d291767b AD |
1164 | if (encoder) { |
1165 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1166 | /* add scaled modes */ | |
1167 | radeon_add_common_modes(encoder, connector); | |
1168 | } | |
1169 | return ret; | |
1170 | } | |
1171 | ||
1172 | encoder = radeon_best_single_encoder(connector); | |
1173 | if (!encoder) | |
1174 | return 0; | |
1175 | ||
1176 | /* we have no EDID modes */ | |
1177 | mode = radeon_fp_native_mode(encoder); | |
1178 | if (mode) { | |
1179 | ret = 1; | |
1180 | drm_mode_probed_add(connector, mode); | |
1181 | /* add the width/height from vbios tables if available */ | |
1182 | connector->display_info.width_mm = mode->width_mm; | |
1183 | connector->display_info.height_mm = mode->height_mm; | |
1184 | /* add scaled modes */ | |
1185 | radeon_add_common_modes(encoder, connector); | |
1186 | } | |
591a10e1 AD |
1187 | } else { |
1188 | /* need to setup ddc on the bridge */ | |
1189 | if (radeon_connector_encoder_is_dp_bridge(connector)) { | |
1190 | if (encoder) | |
1191 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1192 | } | |
d291767b | 1193 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1194 | } |
8b834852 | 1195 | |
746c1aa4 DA |
1196 | return ret; |
1197 | } | |
1198 | ||
d7fa8bb3 AD |
1199 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector) |
1200 | { | |
1201 | struct drm_mode_object *obj; | |
1202 | struct drm_encoder *encoder; | |
1203 | struct radeon_encoder *radeon_encoder; | |
1204 | int i; | |
1205 | bool found = false; | |
1206 | ||
1207 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1208 | if (connector->encoder_ids[i] == 0) | |
1209 | break; | |
1210 | ||
1211 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1212 | if (!obj) | |
1213 | continue; | |
1214 | ||
1215 | encoder = obj_to_encoder(obj); | |
1216 | radeon_encoder = to_radeon_encoder(encoder); | |
1217 | ||
1218 | switch (radeon_encoder->encoder_id) { | |
1219 | case ENCODER_OBJECT_ID_TRAVIS: | |
1220 | case ENCODER_OBJECT_ID_NUTMEG: | |
1221 | found = true; | |
1222 | break; | |
1223 | default: | |
1224 | break; | |
1225 | } | |
1226 | } | |
1227 | ||
1228 | return found; | |
1229 | } | |
1230 | ||
1231 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1232 | { | |
1233 | struct drm_mode_object *obj; | |
1234 | struct drm_encoder *encoder; | |
1235 | struct radeon_encoder *radeon_encoder; | |
1236 | int i; | |
1237 | bool found = false; | |
1238 | ||
1239 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1240 | if (connector->encoder_ids[i] == 0) | |
1241 | break; | |
1242 | ||
1243 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1244 | if (!obj) | |
1245 | continue; | |
1246 | ||
1247 | encoder = obj_to_encoder(obj); | |
1248 | radeon_encoder = to_radeon_encoder(encoder); | |
1249 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1250 | found = true; | |
1251 | } | |
1252 | ||
1253 | return found; | |
1254 | } | |
1255 | ||
1256 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1257 | { | |
1258 | struct drm_device *dev = connector->dev; | |
1259 | struct radeon_device *rdev = dev->dev_private; | |
1260 | ||
1261 | if (ASIC_IS_DCE5(rdev) && | |
1262 | (rdev->clock.dp_extclk >= 53900) && | |
1263 | radeon_connector_encoder_is_hbr2(connector)) { | |
1264 | return true; | |
1265 | } | |
1266 | ||
1267 | return false; | |
1268 | } | |
1269 | ||
7b334fcb | 1270 | static enum drm_connector_status |
930a9e28 | 1271 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1272 | { |
f8d0edde AD |
1273 | struct drm_device *dev = connector->dev; |
1274 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1275 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1276 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1277 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1278 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1279 | |
1280 | if (radeon_connector->edid) { | |
1281 | kfree(radeon_connector->edid); | |
1282 | radeon_connector->edid = NULL; | |
1283 | } | |
1284 | ||
f89931f3 AD |
1285 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1286 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1287 | if (encoder) { |
1288 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1289 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1290 | ||
1291 | /* check if panel is valid */ | |
1292 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1293 | ret = connector_status_connected; | |
1294 | } | |
6f50eae7 AD |
1295 | /* eDP is always DP */ |
1296 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1297 | if (!radeon_dig_connector->edp_on) |
1298 | atombios_set_edp_panel_power(connector, | |
1299 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1300 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1301 | ret = connector_status_connected; |
8b834852 AD |
1302 | if (!radeon_dig_connector->edp_on) |
1303 | atombios_set_edp_panel_power(connector, | |
1304 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
b06947b5 AD |
1305 | } else if (radeon_connector_encoder_is_dp_bridge(connector)) { |
1306 | /* DP bridges are always DP */ | |
1307 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1308 | /* get the DPCD from the bridge */ | |
1309 | radeon_dp_getdpcd(radeon_connector); | |
1310 | ||
1311 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
1312 | ret = connector_status_connected; | |
1313 | else { | |
1314 | /* need to setup ddc on the bridge */ | |
591a10e1 AD |
1315 | if (encoder) |
1316 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
b06947b5 AD |
1317 | if (radeon_ddc_probe(radeon_connector, |
1318 | radeon_connector->requires_extended_probe)) | |
1319 | ret = connector_status_connected; | |
1320 | } | |
1321 | ||
1322 | if ((ret == connector_status_disconnected) && | |
1323 | radeon_connector->dac_load_detect) { | |
1324 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | |
1325 | struct drm_encoder_helper_funcs *encoder_funcs; | |
1326 | if (encoder) { | |
1327 | encoder_funcs = encoder->helper_private; | |
1328 | ret = encoder_funcs->detect(encoder, connector); | |
1329 | } | |
591a10e1 | 1330 | } |
b06947b5 | 1331 | } else { |
6f50eae7 | 1332 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1333 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1334 | ret = connector_status_connected; | |
1335 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1336 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1337 | } else { |
f8d0edde AD |
1338 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1339 | if (radeon_dp_getdpcd(radeon_connector)) | |
1340 | ret = connector_status_connected; | |
1341 | } else { | |
e384fab8 TR |
1342 | if (radeon_ddc_probe(radeon_connector, |
1343 | radeon_connector->requires_extended_probe)) | |
f8d0edde AD |
1344 | ret = connector_status_connected; |
1345 | } | |
4143e919 | 1346 | } |
746c1aa4 | 1347 | } |
4143e919 | 1348 | |
30f44372 | 1349 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1350 | return ret; |
1351 | } | |
1352 | ||
5801ead6 AD |
1353 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1354 | struct drm_display_mode *mode) | |
1355 | { | |
1356 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1357 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1358 | ||
1359 | /* XXX check mode bandwidth */ | |
1360 | ||
f89931f3 AD |
1361 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1362 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1363 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1364 | ||
1365 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1366 | return MODE_PANEL; | |
1367 | ||
1368 | if (encoder) { | |
1369 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1370 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1371 | ||
f89931f3 | 1372 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1373 | * to the panel size, but I'm not sure this is desirable. |
1374 | */ | |
1375 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1376 | (mode->vdisplay > native_mode->vdisplay)) | |
1377 | return MODE_PANEL; | |
1378 | ||
1379 | /* if scaling is disabled, block non-native modes */ | |
1380 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1381 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1382 | (mode->vdisplay != native_mode->vdisplay)) | |
1383 | return MODE_PANEL; | |
1384 | } | |
1385 | } | |
5801ead6 | 1386 | return MODE_OK; |
d291767b AD |
1387 | } else { |
1388 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1389 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1390 | return radeon_dp_mode_valid_helper(connector, mode); | |
1391 | else | |
1392 | return MODE_OK; | |
1393 | } | |
5801ead6 AD |
1394 | } |
1395 | ||
746c1aa4 DA |
1396 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1397 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1398 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1399 | .best_encoder = radeon_dvi_encoder, |
1400 | }; | |
1401 | ||
1402 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1403 | .dpms = drm_helper_connector_dpms, | |
1404 | .detect = radeon_dp_detect, | |
1405 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1406 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1407 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1408 | .force = radeon_dvi_force, |
1409 | }; | |
1410 | ||
771fe6b9 JG |
1411 | void |
1412 | radeon_add_atom_connector(struct drm_device *dev, | |
1413 | uint32_t connector_id, | |
1414 | uint32_t supported_device, | |
1415 | int connector_type, | |
1416 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1417 | uint32_t igp_lane_info, |
eed45b30 | 1418 | uint16_t connector_object_id, |
26b5bc98 AD |
1419 | struct radeon_hpd *hpd, |
1420 | struct radeon_router *router) | |
771fe6b9 | 1421 | { |
445282db | 1422 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1423 | struct drm_connector *connector; |
1424 | struct radeon_connector *radeon_connector; | |
1425 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1426 | struct drm_encoder *encoder; |
1427 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1428 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1429 | bool shared_ddc = false; |
eac4dff6 | 1430 | bool is_dp_bridge = false; |
771fe6b9 | 1431 | |
4ce001ab | 1432 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1433 | return; |
1434 | ||
cf4c12f9 AD |
1435 | /* if the user selected tv=0 don't try and add the connector */ |
1436 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1437 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1438 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1439 | (radeon_tv == 0)) | |
1440 | return; | |
1441 | ||
771fe6b9 JG |
1442 | /* see if we already added it */ |
1443 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1444 | radeon_connector = to_radeon_connector(connector); | |
1445 | if (radeon_connector->connector_id == connector_id) { | |
1446 | radeon_connector->devices |= supported_device; | |
1447 | return; | |
1448 | } | |
0294cf4f | 1449 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1450 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1451 | radeon_connector->shared_ddc = true; |
1452 | shared_ddc = true; | |
1453 | } | |
fb939dfc | 1454 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1455 | (radeon_connector->router.router_id == router->router_id)) { |
1456 | radeon_connector->shared_ddc = false; | |
1457 | shared_ddc = false; | |
1458 | } | |
0294cf4f | 1459 | } |
771fe6b9 JG |
1460 | } |
1461 | ||
eac4dff6 AD |
1462 | /* check if it's a dp bridge */ |
1463 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1464 | radeon_encoder = to_radeon_encoder(encoder); | |
1465 | if (radeon_encoder->devices & supported_device) { | |
1466 | switch (radeon_encoder->encoder_id) { | |
1467 | case ENCODER_OBJECT_ID_TRAVIS: | |
1468 | case ENCODER_OBJECT_ID_NUTMEG: | |
1469 | is_dp_bridge = true; | |
1470 | break; | |
1471 | default: | |
1472 | break; | |
1473 | } | |
1474 | } | |
1475 | } | |
1476 | ||
771fe6b9 JG |
1477 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1478 | if (!radeon_connector) | |
1479 | return; | |
1480 | ||
1481 | connector = &radeon_connector->base; | |
1482 | ||
1483 | radeon_connector->connector_id = connector_id; | |
1484 | radeon_connector->devices = supported_device; | |
0294cf4f | 1485 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1486 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1487 | radeon_connector->hpd = *hpd; |
e384fab8 TR |
1488 | radeon_connector->requires_extended_probe = |
1489 | radeon_connector_needs_extended_probe(rdev, supported_device, | |
1490 | connector_type); | |
26b5bc98 | 1491 | radeon_connector->router = *router; |
fb939dfc | 1492 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1493 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1494 | if (!radeon_connector->router_bus) | |
a70882aa | 1495 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1496 | } |
eac4dff6 AD |
1497 | |
1498 | if (is_dp_bridge) { | |
771fe6b9 JG |
1499 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1500 | if (!radeon_dig_connector) | |
1501 | goto failed; | |
771fe6b9 JG |
1502 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1503 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1504 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1505 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1506 | if (i2c_bus->valid) { |
eac4dff6 AD |
1507 | /* add DP i2c bus */ |
1508 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1509 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1510 | else | |
1511 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1512 | if (!radeon_dig_connector->dp_i2c_bus) | |
1513 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1514 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1515 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1516 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1517 | } |
eac4dff6 AD |
1518 | switch (connector_type) { |
1519 | case DRM_MODE_CONNECTOR_VGA: | |
1520 | case DRM_MODE_CONNECTOR_DVIA: | |
1521 | default: | |
1522 | connector->interlace_allowed = true; | |
1523 | connector->doublescan_allowed = true; | |
d629a3ce AD |
1524 | radeon_connector->dac_load_detect = true; |
1525 | drm_connector_attach_property(&radeon_connector->base, | |
1526 | rdev->mode_info.load_detect_property, | |
1527 | 1); | |
eac4dff6 AD |
1528 | break; |
1529 | case DRM_MODE_CONNECTOR_DVII: | |
1530 | case DRM_MODE_CONNECTOR_DVID: | |
1531 | case DRM_MODE_CONNECTOR_HDMIA: | |
1532 | case DRM_MODE_CONNECTOR_HDMIB: | |
1533 | case DRM_MODE_CONNECTOR_DisplayPort: | |
430f70d5 AD |
1534 | drm_connector_attach_property(&radeon_connector->base, |
1535 | rdev->mode_info.underscan_property, | |
56bec7c0 | 1536 | UNDERSCAN_OFF); |
5bccf5e3 MG |
1537 | drm_connector_attach_property(&radeon_connector->base, |
1538 | rdev->mode_info.underscan_hborder_property, | |
1539 | 0); | |
1540 | drm_connector_attach_property(&radeon_connector->base, | |
1541 | rdev->mode_info.underscan_vborder_property, | |
1542 | 0); | |
eac4dff6 AD |
1543 | subpixel_order = SubPixelHorizontalRGB; |
1544 | connector->interlace_allowed = true; | |
1545 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1546 | connector->doublescan_allowed = true; | |
1547 | else | |
1548 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1549 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1550 | radeon_connector->dac_load_detect = true; | |
1551 | drm_connector_attach_property(&radeon_connector->base, | |
1552 | rdev->mode_info.load_detect_property, | |
1553 | 1); | |
1554 | } | |
eac4dff6 AD |
1555 | break; |
1556 | case DRM_MODE_CONNECTOR_LVDS: | |
1557 | case DRM_MODE_CONNECTOR_eDP: | |
1558 | drm_connector_attach_property(&radeon_connector->base, | |
1559 | dev->mode_config.scaling_mode_property, | |
1560 | DRM_MODE_SCALE_FULLSCREEN); | |
1561 | subpixel_order = SubPixelHorizontalRGB; | |
1562 | connector->interlace_allowed = false; | |
1563 | connector->doublescan_allowed = false; | |
1564 | break; | |
5bccf5e3 | 1565 | } |
eac4dff6 AD |
1566 | } else { |
1567 | switch (connector_type) { | |
1568 | case DRM_MODE_CONNECTOR_VGA: | |
1569 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1570 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1571 | if (i2c_bus->valid) { | |
1572 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1573 | if (!radeon_connector->ddc_bus) | |
1574 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1575 | } | |
390d0bbe AD |
1576 | radeon_connector->dac_load_detect = true; |
1577 | drm_connector_attach_property(&radeon_connector->base, | |
1578 | rdev->mode_info.load_detect_property, | |
1579 | 1); | |
eac4dff6 AD |
1580 | /* no HPD on analog connectors */ |
1581 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1582 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1583 | connector->interlace_allowed = true; | |
c49948f4 | 1584 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1585 | break; |
1586 | case DRM_MODE_CONNECTOR_DVIA: | |
1587 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1588 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1589 | if (i2c_bus->valid) { | |
1590 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1591 | if (!radeon_connector->ddc_bus) | |
1592 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1593 | } | |
1594 | radeon_connector->dac_load_detect = true; | |
430f70d5 | 1595 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1596 | rdev->mode_info.load_detect_property, |
1597 | 1); | |
1598 | /* no HPD on analog connectors */ | |
1599 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1600 | connector->interlace_allowed = true; | |
1601 | connector->doublescan_allowed = true; | |
1602 | break; | |
1603 | case DRM_MODE_CONNECTOR_DVII: | |
1604 | case DRM_MODE_CONNECTOR_DVID: | |
1605 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1606 | if (!radeon_dig_connector) | |
1607 | goto failed; | |
1608 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1609 | radeon_connector->con_priv = radeon_dig_connector; | |
1610 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1611 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1612 | if (i2c_bus->valid) { | |
1613 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1614 | if (!radeon_connector->ddc_bus) | |
1615 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1616 | } | |
1617 | subpixel_order = SubPixelHorizontalRGB; | |
5bccf5e3 | 1618 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1619 | rdev->mode_info.coherent_mode_property, |
1620 | 1); | |
1621 | if (ASIC_IS_AVIVO(rdev)) { | |
1622 | drm_connector_attach_property(&radeon_connector->base, | |
1623 | rdev->mode_info.underscan_property, | |
1624 | UNDERSCAN_OFF); | |
1625 | drm_connector_attach_property(&radeon_connector->base, | |
1626 | rdev->mode_info.underscan_hborder_property, | |
1627 | 0); | |
1628 | drm_connector_attach_property(&radeon_connector->base, | |
1629 | rdev->mode_info.underscan_vborder_property, | |
1630 | 0); | |
1631 | } | |
1632 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1633 | radeon_connector->dac_load_detect = true; | |
1634 | drm_connector_attach_property(&radeon_connector->base, | |
1635 | rdev->mode_info.load_detect_property, | |
1636 | 1); | |
1637 | } | |
1638 | connector->interlace_allowed = true; | |
1639 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1640 | connector->doublescan_allowed = true; | |
1641 | else | |
1642 | connector->doublescan_allowed = false; | |
1643 | break; | |
1644 | case DRM_MODE_CONNECTOR_HDMIA: | |
1645 | case DRM_MODE_CONNECTOR_HDMIB: | |
1646 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1647 | if (!radeon_dig_connector) | |
1648 | goto failed; | |
1649 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1650 | radeon_connector->con_priv = radeon_dig_connector; | |
1651 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1652 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1653 | if (i2c_bus->valid) { | |
1654 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1655 | if (!radeon_connector->ddc_bus) | |
1656 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1657 | } | |
5bccf5e3 | 1658 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1659 | rdev->mode_info.coherent_mode_property, |
1660 | 1); | |
1661 | if (ASIC_IS_AVIVO(rdev)) { | |
1662 | drm_connector_attach_property(&radeon_connector->base, | |
1663 | rdev->mode_info.underscan_property, | |
1664 | UNDERSCAN_OFF); | |
1665 | drm_connector_attach_property(&radeon_connector->base, | |
1666 | rdev->mode_info.underscan_hborder_property, | |
1667 | 0); | |
1668 | drm_connector_attach_property(&radeon_connector->base, | |
1669 | rdev->mode_info.underscan_vborder_property, | |
1670 | 0); | |
1671 | } | |
1672 | subpixel_order = SubPixelHorizontalRGB; | |
1673 | connector->interlace_allowed = true; | |
1674 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1675 | connector->doublescan_allowed = true; | |
1676 | else | |
1677 | connector->doublescan_allowed = false; | |
1678 | break; | |
1679 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1680 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1681 | if (!radeon_dig_connector) | |
1682 | goto failed; | |
1683 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1684 | radeon_connector->con_priv = radeon_dig_connector; | |
1685 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1686 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1687 | if (i2c_bus->valid) { | |
1688 | /* add DP i2c bus */ | |
1689 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1690 | if (!radeon_dig_connector->dp_i2c_bus) | |
1691 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1692 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1693 | if (!radeon_connector->ddc_bus) | |
1694 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1695 | } | |
1696 | subpixel_order = SubPixelHorizontalRGB; | |
1697 | drm_connector_attach_property(&radeon_connector->base, | |
1698 | rdev->mode_info.coherent_mode_property, | |
1699 | 1); | |
1700 | if (ASIC_IS_AVIVO(rdev)) { | |
1701 | drm_connector_attach_property(&radeon_connector->base, | |
1702 | rdev->mode_info.underscan_property, | |
1703 | UNDERSCAN_OFF); | |
1704 | drm_connector_attach_property(&radeon_connector->base, | |
1705 | rdev->mode_info.underscan_hborder_property, | |
1706 | 0); | |
1707 | drm_connector_attach_property(&radeon_connector->base, | |
1708 | rdev->mode_info.underscan_vborder_property, | |
1709 | 0); | |
1710 | } | |
1711 | connector->interlace_allowed = true; | |
1712 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1713 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1714 | break; |
1715 | case DRM_MODE_CONNECTOR_eDP: | |
1716 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1717 | if (!radeon_dig_connector) | |
1718 | goto failed; | |
1719 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1720 | radeon_connector->con_priv = radeon_dig_connector; | |
1721 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1722 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1723 | if (i2c_bus->valid) { | |
1724 | /* add DP i2c bus */ | |
1725 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1726 | if (!radeon_dig_connector->dp_i2c_bus) | |
1727 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1728 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1729 | if (!radeon_connector->ddc_bus) | |
1730 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1731 | } | |
430f70d5 | 1732 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1733 | dev->mode_config.scaling_mode_property, |
1734 | DRM_MODE_SCALE_FULLSCREEN); | |
1735 | subpixel_order = SubPixelHorizontalRGB; | |
1736 | connector->interlace_allowed = false; | |
1737 | connector->doublescan_allowed = false; | |
1738 | break; | |
1739 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1740 | case DRM_MODE_CONNECTOR_Composite: | |
1741 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1742 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1743 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1744 | radeon_connector->dac_load_detect = true; | |
5bccf5e3 | 1745 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1746 | rdev->mode_info.load_detect_property, |
1747 | 1); | |
5bccf5e3 | 1748 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1749 | rdev->mode_info.tv_std_property, |
1750 | radeon_atombios_get_tv_info(rdev)); | |
1751 | /* no HPD on analog connectors */ | |
1752 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1753 | connector->interlace_allowed = false; | |
1754 | connector->doublescan_allowed = false; | |
1755 | break; | |
1756 | case DRM_MODE_CONNECTOR_LVDS: | |
1757 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1758 | if (!radeon_dig_connector) | |
1759 | goto failed; | |
1760 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1761 | radeon_connector->con_priv = radeon_dig_connector; | |
1762 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1763 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1764 | if (i2c_bus->valid) { | |
1765 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1766 | if (!radeon_connector->ddc_bus) | |
1767 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1768 | } | |
1769 | drm_connector_attach_property(&radeon_connector->base, | |
1770 | dev->mode_config.scaling_mode_property, | |
1771 | DRM_MODE_SCALE_FULLSCREEN); | |
1772 | subpixel_order = SubPixelHorizontalRGB; | |
1773 | connector->interlace_allowed = false; | |
1774 | connector->doublescan_allowed = false; | |
1775 | break; | |
771fe6b9 | 1776 | } |
771fe6b9 JG |
1777 | } |
1778 | ||
2581afcc | 1779 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1780 | if (i2c_bus->valid) |
1781 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1782 | } else | |
1783 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1784 | ||
771fe6b9 JG |
1785 | connector->display_info.subpixel_order = subpixel_order; |
1786 | drm_sysfs_connector_add(connector); | |
1787 | return; | |
1788 | ||
1789 | failed: | |
771fe6b9 JG |
1790 | drm_connector_cleanup(connector); |
1791 | kfree(connector); | |
1792 | } | |
1793 | ||
1794 | void | |
1795 | radeon_add_legacy_connector(struct drm_device *dev, | |
1796 | uint32_t connector_id, | |
1797 | uint32_t supported_device, | |
1798 | int connector_type, | |
b75fad06 | 1799 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1800 | uint16_t connector_object_id, |
1801 | struct radeon_hpd *hpd) | |
771fe6b9 | 1802 | { |
445282db | 1803 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1804 | struct drm_connector *connector; |
1805 | struct radeon_connector *radeon_connector; | |
1806 | uint32_t subpixel_order = SubPixelNone; | |
1807 | ||
4ce001ab | 1808 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1809 | return; |
1810 | ||
cf4c12f9 AD |
1811 | /* if the user selected tv=0 don't try and add the connector */ |
1812 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1813 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1814 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1815 | (radeon_tv == 0)) | |
1816 | return; | |
1817 | ||
771fe6b9 JG |
1818 | /* see if we already added it */ |
1819 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1820 | radeon_connector = to_radeon_connector(connector); | |
1821 | if (radeon_connector->connector_id == connector_id) { | |
1822 | radeon_connector->devices |= supported_device; | |
1823 | return; | |
1824 | } | |
1825 | } | |
1826 | ||
1827 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1828 | if (!radeon_connector) | |
1829 | return; | |
1830 | ||
1831 | connector = &radeon_connector->base; | |
1832 | ||
1833 | radeon_connector->connector_id = connector_id; | |
1834 | radeon_connector->devices = supported_device; | |
b75fad06 | 1835 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1836 | radeon_connector->hpd = *hpd; |
e384fab8 TR |
1837 | radeon_connector->requires_extended_probe = |
1838 | radeon_connector_needs_extended_probe(rdev, supported_device, | |
1839 | connector_type); | |
771fe6b9 JG |
1840 | switch (connector_type) { |
1841 | case DRM_MODE_CONNECTOR_VGA: | |
1842 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1843 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1844 | if (i2c_bus->valid) { |
f376b94f | 1845 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1846 | if (!radeon_connector->ddc_bus) |
a70882aa | 1847 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1848 | } |
35e4b7af | 1849 | radeon_connector->dac_load_detect = true; |
445282db DA |
1850 | drm_connector_attach_property(&radeon_connector->base, |
1851 | rdev->mode_info.load_detect_property, | |
1852 | 1); | |
2581afcc AD |
1853 | /* no HPD on analog connectors */ |
1854 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1855 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1856 | connector->interlace_allowed = true; |
1857 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1858 | break; |
1859 | case DRM_MODE_CONNECTOR_DVIA: | |
1860 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1861 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1862 | if (i2c_bus->valid) { |
f376b94f | 1863 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1864 | if (!radeon_connector->ddc_bus) |
a70882aa | 1865 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1866 | } |
35e4b7af | 1867 | radeon_connector->dac_load_detect = true; |
445282db DA |
1868 | drm_connector_attach_property(&radeon_connector->base, |
1869 | rdev->mode_info.load_detect_property, | |
1870 | 1); | |
2581afcc AD |
1871 | /* no HPD on analog connectors */ |
1872 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1873 | connector->interlace_allowed = true; |
1874 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1875 | break; |
1876 | case DRM_MODE_CONNECTOR_DVII: | |
1877 | case DRM_MODE_CONNECTOR_DVID: | |
1878 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1879 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1880 | if (i2c_bus->valid) { |
f376b94f | 1881 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1882 | if (!radeon_connector->ddc_bus) |
a70882aa | 1883 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1884 | } |
1885 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1886 | radeon_connector->dac_load_detect = true; |
445282db DA |
1887 | drm_connector_attach_property(&radeon_connector->base, |
1888 | rdev->mode_info.load_detect_property, | |
1889 | 1); | |
771fe6b9 JG |
1890 | } |
1891 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1892 | connector->interlace_allowed = true; |
1893 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1894 | connector->doublescan_allowed = true; | |
1895 | else | |
1896 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1897 | break; |
1898 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1899 | case DRM_MODE_CONNECTOR_Composite: | |
1900 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1901 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1902 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1903 | radeon_connector->dac_load_detect = true; | |
1904 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1905 | * of false positive on load detect, we haven't yet | |
1906 | * found a way to make load detect reliable on those | |
1907 | * chipset, thus just disable it for TV. | |
1908 | */ | |
1909 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1910 | radeon_connector->dac_load_detect = false; | |
1911 | drm_connector_attach_property(&radeon_connector->base, | |
1912 | rdev->mode_info.load_detect_property, | |
1913 | radeon_connector->dac_load_detect); | |
1914 | drm_connector_attach_property(&radeon_connector->base, | |
1915 | rdev->mode_info.tv_std_property, | |
1916 | radeon_combios_get_tv_info(rdev)); | |
1917 | /* no HPD on analog connectors */ | |
1918 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1919 | connector->interlace_allowed = false; |
1920 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1921 | break; |
1922 | case DRM_MODE_CONNECTOR_LVDS: | |
1923 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1924 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1925 | if (i2c_bus->valid) { |
f376b94f | 1926 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1927 | if (!radeon_connector->ddc_bus) |
a70882aa | 1928 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1929 | } |
445282db DA |
1930 | drm_connector_attach_property(&radeon_connector->base, |
1931 | dev->mode_config.scaling_mode_property, | |
1932 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1933 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1934 | connector->interlace_allowed = false; |
1935 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1936 | break; |
1937 | } | |
1938 | ||
2581afcc | 1939 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1940 | if (i2c_bus->valid) |
1941 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1942 | } else | |
1943 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1944 | connector->display_info.subpixel_order = subpixel_order; |
1945 | drm_sysfs_connector_add(connector); | |
63ec0119 MD |
1946 | if (connector_type == DRM_MODE_CONNECTOR_LVDS) { |
1947 | struct drm_encoder *drm_encoder; | |
1948 | ||
1949 | list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) { | |
1950 | struct radeon_encoder *radeon_encoder; | |
1951 | ||
1952 | radeon_encoder = to_radeon_encoder(drm_encoder); | |
1953 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS) | |
1954 | radeon_legacy_backlight_init(radeon_encoder, connector); | |
1955 | } | |
1956 | } | |
771fe6b9 | 1957 | } |