Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / gpu / drm / nouveau / nv04_tv.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2009 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7 27#include <drm/drmP.h>
77145f1c
BS
28#include "nouveau_drm.h"
29#include "nouveau_reg.h"
6ee73861
BS
30#include "nouveau_encoder.h"
31#include "nouveau_connector.h"
32#include "nouveau_crtc.h"
33#include "nouveau_hw.h"
760285e7 34#include <drm/drm_crtc_helper.h>
6ee73861 35
760285e7 36#include <drm/i2c/ch7006.h>
6ee73861 37
77145f1c
BS
38#include <subdev/i2c.h>
39
6d416d80 40static struct i2c_board_info nv04_tv_encoder_info[] = {
6ee73861 41 {
6d416d80
FJ
42 I2C_BOARD_INFO("ch7006", 0x75),
43 .platform_data = &(struct ch7006_encoder_params) {
6ee73861
BS
44 CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
45 0, 0, 0,
46 CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
47 CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
6d416d80 48 }
6ee73861 49 },
6d416d80 50 { }
6ee73861
BS
51};
52
6ee73861
BS
53int nv04_tv_identify(struct drm_device *dev, int i2c_index)
54{
77145f1c
BS
55 struct nouveau_drm *drm = nouveau_drm(dev);
56 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
57
58 return i2c->identify(i2c, i2c_index, "TV encoder",
59 nv04_tv_encoder_info, NULL);
6ee73861
BS
60}
61
6d416d80 62
6ee73861
BS
63#define PLLSEL_TV_CRTC1_MASK \
64 (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1 \
65 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
66#define PLLSEL_TV_CRTC2_MASK \
67 (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2 \
68 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
69
70static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
71{
72 struct drm_device *dev = encoder->dev;
77145f1c 73 struct nouveau_drm *drm = nouveau_drm(dev);
6ee73861 74 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
017e6e29 75 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
6ee73861
BS
76 uint8_t crtc1A;
77
77145f1c 78 NV_INFO(drm, "Setting dpms mode %d on TV encoder (output %d)\n",
6ee73861
BS
79 mode, nv_encoder->dcb->index);
80
81 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
82
83 if (mode == DRM_MODE_DPMS_ON) {
84 int head = nouveau_crtc(encoder->crtc)->index;
85 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
86
87 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
88 PLLSEL_TV_CRTC1_MASK;
89
90 /* Inhibit hsync */
91 crtc1A |= 0x80;
92
93 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
94 }
95
96 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
97
4a9f822f 98 get_slave_funcs(encoder)->dpms(encoder, mode);
6ee73861
BS
99}
100
101static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
102{
017e6e29 103 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
6ee73861
BS
104
105 state->tv_setup = 0;
106
cd2fb2e9 107 if (bind)
6ee73861 108 state->CRTC[NV_CIO_CRE_49] |= 0x10;
cd2fb2e9 109 else
6ee73861 110 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
6ee73861
BS
111
112 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
113 state->CRTC[NV_CIO_CRE_LCD__INDEX]);
114 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
115 state->CRTC[NV_CIO_CRE_49]);
116 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
117 state->tv_setup);
118}
119
120static void nv04_tv_prepare(struct drm_encoder *encoder)
121{
122 struct drm_device *dev = encoder->dev;
123 int head = nouveau_crtc(encoder->crtc)->index;
124 struct drm_encoder_helper_funcs *helper = encoder->helper_private;
125
126 helper->dpms(encoder, DRM_MODE_DPMS_OFF);
127
128 nv04_dfp_disable(dev, head);
129
130 if (nv_two_heads(dev))
131 nv04_tv_bind(dev, head ^ 1, false);
132
133 nv04_tv_bind(dev, head, true);
134}
135
136static void nv04_tv_mode_set(struct drm_encoder *encoder,
137 struct drm_display_mode *mode,
138 struct drm_display_mode *adjusted_mode)
139{
140 struct drm_device *dev = encoder->dev;
6ee73861 141 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
017e6e29 142 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
6ee73861
BS
143
144 regp->tv_htotal = adjusted_mode->htotal;
145 regp->tv_vtotal = adjusted_mode->vtotal;
146
147 /* These delay the TV signals with respect to the VGA port,
148 * they might be useful if we ever allow a CRTC to drive
149 * multiple outputs.
150 */
151 regp->tv_hskew = 1;
152 regp->tv_hsync_delay = 1;
153 regp->tv_hsync_delay2 = 64;
154 regp->tv_vskew = 1;
155 regp->tv_vsync_delay = 1;
156
4a9f822f 157 get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode);
6ee73861
BS
158}
159
160static void nv04_tv_commit(struct drm_encoder *encoder)
161{
162 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
163 struct drm_device *dev = encoder->dev;
77145f1c 164 struct nouveau_drm *drm = nouveau_drm(dev);
6ee73861
BS
165 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
166 struct drm_encoder_helper_funcs *helper = encoder->helper_private;
167
168 helper->dpms(encoder, DRM_MODE_DPMS_ON);
169
77145f1c 170 NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n",
6ee73861
BS
171 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index,
172 '@' + ffs(nv_encoder->dcb->or));
173}
174
175static void nv04_tv_destroy(struct drm_encoder *encoder)
176{
4a9f822f 177 get_slave_funcs(encoder)->destroy(encoder);
6ee73861
BS
178 drm_encoder_cleanup(encoder);
179
6d416d80
FJ
180 kfree(encoder->helper_private);
181 kfree(nouveau_encoder(encoder));
6ee73861
BS
182}
183
6d416d80
FJ
184static const struct drm_encoder_funcs nv04_tv_funcs = {
185 .destroy = nv04_tv_destroy,
186};
187
8f1a6086 188int
cb75d97e 189nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
6ee73861
BS
190{
191 struct nouveau_encoder *nv_encoder;
192 struct drm_encoder *encoder;
8f1a6086 193 struct drm_device *dev = connector->dev;
6d416d80
FJ
194 struct drm_encoder_helper_funcs *hfuncs;
195 struct drm_encoder_slave_funcs *sfuncs;
77145f1c
BS
196 struct nouveau_drm *drm = nouveau_drm(dev);
197 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
198 struct nouveau_i2c_port *port = i2c->find(i2c, entry->i2c_index);
6ee73861 199 int type, ret;
6ee73861
BS
200
201 /* Ensure that we can talk to this encoder */
6d416d80 202 type = nv04_tv_identify(dev, entry->i2c_index);
6ee73861
BS
203 if (type < 0)
204 return type;
205
206 /* Allocate the necessary memory */
207 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
208 if (!nv_encoder)
209 return -ENOMEM;
210
6d416d80
FJ
211 hfuncs = kzalloc(sizeof(*hfuncs), GFP_KERNEL);
212 if (!hfuncs) {
213 ret = -ENOMEM;
214 goto fail_free;
215 }
216
6ee73861
BS
217 /* Initialize the common members */
218 encoder = to_drm_encoder(nv_encoder);
219
6d416d80 220 drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC);
6ee73861
BS
221 drm_encoder_helper_add(encoder, hfuncs);
222
223 encoder->possible_crtcs = entry->heads;
224 encoder->possible_clones = 0;
6ee73861
BS
225 nv_encoder->dcb = entry;
226 nv_encoder->or = ffs(entry->or) - 1;
227
228 /* Run the slave-specific initialization */
6d416d80 229 ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
77145f1c 230 &port->adapter, &nv04_tv_encoder_info[type]);
6ee73861 231 if (ret < 0)
6d416d80 232 goto fail_cleanup;
6ee73861
BS
233
234 /* Fill the function pointers */
4a9f822f 235 sfuncs = get_slave_funcs(encoder);
6ee73861 236
6ee73861
BS
237 *hfuncs = (struct drm_encoder_helper_funcs) {
238 .dpms = nv04_tv_dpms,
239 .save = sfuncs->save,
240 .restore = sfuncs->restore,
241 .mode_fixup = sfuncs->mode_fixup,
242 .prepare = nv04_tv_prepare,
243 .commit = nv04_tv_commit,
244 .mode_set = nv04_tv_mode_set,
245 .detect = sfuncs->detect,
246 };
247
6d416d80 248 /* Attach it to the specified connector. */
8f1a6086 249 sfuncs->create_resources(encoder, connector);
8f1a6086 250 drm_mode_connector_attach_encoder(connector, encoder);
6d416d80 251
6ee73861
BS
252 return 0;
253
6d416d80 254fail_cleanup:
6ee73861 255 drm_encoder_cleanup(encoder);
6d416d80
FJ
256 kfree(hfuncs);
257fail_free:
6ee73861
BS
258 kfree(nv_encoder);
259 return ret;
260}