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1 | /* |
2 | * Copyright 2010 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
760285e7 | 25 | #include <drm/drmP.h> |
77145f1c BS |
26 | #include "nouveau_drm.h" |
27 | #include "nouveau_reg.h" | |
442b626e | 28 | #include "nouveau_hw.h" |
5c4abd09 | 29 | #include "nouveau_pm.h" |
442b626e | 30 | |
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31 | #include <subdev/bios/pll.h> |
32 | #include <subdev/clock.h> | |
33 | #include <subdev/timer.h> | |
34 | ||
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35 | int |
36 | nv04_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl) | |
37 | { | |
38 | int ret; | |
39 | ||
40 | ret = nouveau_hw_get_clock(dev, PLL_CORE); | |
41 | if (ret < 0) | |
42 | return ret; | |
43 | perflvl->core = ret; | |
44 | ||
45 | ret = nouveau_hw_get_clock(dev, PLL_MEMORY); | |
46 | if (ret < 0) | |
47 | return ret; | |
48 | perflvl->memory = ret; | |
49 | ||
50 | return 0; | |
51 | } | |
52 | ||
53 | struct nv04_pm_clock { | |
70790f4f | 54 | struct nvbios_pll pll; |
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55 | struct nouveau_pll_vals calc; |
56 | }; | |
57 | ||
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58 | struct nv04_pm_state { |
59 | struct nv04_pm_clock core; | |
60 | struct nv04_pm_clock memory; | |
61 | }; | |
62 | ||
63 | static int | |
64 | calc_pll(struct drm_device *dev, u32 id, int khz, struct nv04_pm_clock *clk) | |
442b626e | 65 | { |
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66 | struct nouveau_device *device = nouveau_dev(dev); |
67 | struct nouveau_bios *bios = nouveau_bios(device); | |
68 | struct nouveau_clock *pclk = nouveau_clock(device); | |
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69 | int ret; |
70 | ||
77145f1c | 71 | ret = nvbios_pll_parse(bios, id, &clk->pll); |
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72 | if (ret) |
73 | return ret; | |
74 | ||
77145f1c | 75 | ret = pclk->pll_calc(pclk, &clk->pll, khz, &clk->calc); |
36f1317e BS |
76 | if (!ret) |
77 | return -EINVAL; | |
78 | ||
79 | return 0; | |
442b626e BS |
80 | } |
81 | ||
82 | void * | |
36f1317e | 83 | nv04_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) |
442b626e | 84 | { |
36f1317e | 85 | struct nv04_pm_state *info; |
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86 | int ret; |
87 | ||
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88 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
89 | if (!info) | |
442b626e BS |
90 | return ERR_PTR(-ENOMEM); |
91 | ||
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92 | ret = calc_pll(dev, PLL_CORE, perflvl->core, &info->core); |
93 | if (ret) | |
94 | goto error; | |
442b626e | 95 | |
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96 | if (perflvl->memory) { |
97 | ret = calc_pll(dev, PLL_MEMORY, perflvl->memory, &info->memory); | |
98 | if (ret) | |
99 | goto error; | |
442b626e BS |
100 | } |
101 | ||
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102 | return info; |
103 | error: | |
104 | kfree(info); | |
105 | return ERR_PTR(ret); | |
442b626e BS |
106 | } |
107 | ||
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108 | static void |
109 | prog_pll(struct drm_device *dev, struct nv04_pm_clock *clk) | |
442b626e | 110 | { |
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111 | struct nouveau_device *device = nouveau_dev(dev); |
112 | struct nouveau_clock *pclk = nouveau_clock(device); | |
36f1317e | 113 | u32 reg = clk->pll.reg; |
442b626e BS |
114 | |
115 | /* thank the insane nouveau_hw_setpll() interface for this */ | |
77145f1c | 116 | if (device->card_type >= NV_40) |
442b626e BS |
117 | reg += 4; |
118 | ||
77145f1c | 119 | pclk->pll_prog(pclk, reg, &clk->calc); |
36f1317e BS |
120 | } |
121 | ||
122 | int | |
123 | nv04_pm_clocks_set(struct drm_device *dev, void *pre_state) | |
124 | { | |
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125 | struct nouveau_device *device = nouveau_dev(dev); |
126 | struct nouveau_timer *ptimer = nouveau_timer(device); | |
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127 | struct nv04_pm_state *state = pre_state; |
128 | ||
129 | prog_pll(dev, &state->core); | |
63d6fd32 | 130 | |
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131 | if (state->memory.pll.reg) { |
132 | prog_pll(dev, &state->memory); | |
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133 | if (device->card_type < NV_30) { |
134 | if (device->card_type == NV_20) | |
135 | nv_mask(device, 0x1002c4, 0, 1 << 20); | |
63d6fd32 | 136 | |
36f1317e | 137 | /* Reset the DLLs */ |
77145f1c | 138 | nv_mask(device, 0x1002c0, 0, 1 << 8); |
36f1317e | 139 | } |
63d6fd32 FJ |
140 | } |
141 | ||
77145f1c | 142 | nv_ofuncs(ptimer)->init(nv_object(ptimer)); |
f3f2f54e | 143 | |
442b626e | 144 | kfree(state); |
36f1317e | 145 | return 0; |
442b626e | 146 | } |