drm/nv40/disp: implement support for hotplug irq
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
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1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#include "drmP.h"
28#include "drm_crtc_helper.h"
29#include "nouveau_drv.h"
30#include "nouveau_fb.h"
31#include "nouveau_fbcon.h"
042206c0 32#include "nouveau_hw.h"
332b242f
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33#include "nouveau_crtc.h"
34#include "nouveau_dma.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
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37
38static void
39nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
40{
41 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 42
bc9025bd
LB
43 if (fb->nvbo)
44 drm_gem_object_unreference_unlocked(fb->nvbo->gem);
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45
46 drm_framebuffer_cleanup(drm_fb);
47 kfree(fb);
48}
49
50static int
51nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
52 struct drm_file *file_priv,
53 unsigned int *handle)
54{
55 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
56
57 return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
58}
59
60static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
61 .destroy = nouveau_user_framebuffer_destroy,
62 .create_handle = nouveau_user_framebuffer_create_handle,
63};
64
38651674 65int
45c4e0aa
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66nouveau_framebuffer_init(struct drm_device *dev,
67 struct nouveau_framebuffer *nv_fb,
308e5bcb 68 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 69 struct nouveau_bo *nvbo)
6ee73861 70{
45c4e0aa
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71 struct drm_nouveau_private *dev_priv = dev->dev_private;
72 struct drm_framebuffer *fb = &nv_fb->base;
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73 int ret;
74
45c4e0aa 75 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861 76 if (ret) {
38651674 77 return ret;
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78 }
79
45c4e0aa
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80 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
81 nv_fb->nvbo = nvbo;
82
83 if (dev_priv->card_type >= NV_50) {
84 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
85 if (tile_flags == 0x7a00 ||
86 tile_flags == 0xfe00)
87 nv_fb->r_dma = NvEvoFB32;
88 else
89 if (tile_flags == 0x7000)
90 nv_fb->r_dma = NvEvoFB16;
91 else
92 nv_fb->r_dma = NvEvoVRAM_LP;
93
94 switch (fb->depth) {
95 case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
96 case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
97 case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
98 case 24:
99 case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
100 case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
101 default:
102 NV_ERROR(dev, "unknown depth %d\n", fb->depth);
103 return -EINVAL;
104 }
105
106 if (dev_priv->chipset == 0x50)
107 nv_fb->r_format |= (tile_flags << 8);
108
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109 if (!tile_flags) {
110 if (dev_priv->card_type < NV_D0)
01f2c773 111 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 112 else
01f2c773 113 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 114 } else {
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115 u32 mode = nvbo->tile_mode;
116 if (dev_priv->card_type >= NV_C0)
117 mode >>= 4;
01f2c773 118 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
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119 }
120 }
121
38651674 122 return 0;
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123}
124
125static struct drm_framebuffer *
126nouveau_user_framebuffer_create(struct drm_device *dev,
127 struct drm_file *file_priv,
308e5bcb 128 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 129{
38651674 130 struct nouveau_framebuffer *nouveau_fb;
6ee73861 131 struct drm_gem_object *gem;
38651674 132 int ret;
6ee73861 133
308e5bcb 134 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 135 if (!gem)
cce13ff7 136 return ERR_PTR(-ENOENT);
6ee73861 137
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138 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
139 if (!nouveau_fb)
cce13ff7 140 return ERR_PTR(-ENOMEM);
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141
142 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
143 if (ret) {
6ee73861 144 drm_gem_object_unreference(gem);
cce13ff7 145 return ERR_PTR(ret);
6ee73861
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146 }
147
38651674 148 return &nouveau_fb->base;
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149}
150
27d5030a 151static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 152 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 153 .output_poll_changed = nouveau_fbcon_output_poll_changed,
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154};
155
b29caa58
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156
157struct drm_prop_enum_list {
de691855 158 u8 gen_mask;
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159 int type;
160 char *name;
161};
162
de691855 163static struct drm_prop_enum_list underscan[] = {
92854622
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164 { 6, UNDERSCAN_AUTO, "auto" },
165 { 6, UNDERSCAN_OFF, "off" },
166 { 6, UNDERSCAN_ON, "on" },
de691855 167 {}
b29caa58
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168};
169
de691855
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170static struct drm_prop_enum_list dither_mode[] = {
171 { 7, DITHERING_MODE_AUTO, "auto" },
172 { 7, DITHERING_MODE_OFF, "off" },
173 { 1, DITHERING_MODE_ON, "on" },
174 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
175 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
176 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
177 {}
178};
179
180static struct drm_prop_enum_list dither_depth[] = {
181 { 6, DITHERING_DEPTH_AUTO, "auto" },
182 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
183 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
184 {}
185};
186
187#define PROP_ENUM(p,gen,n,list) do { \
188 struct drm_prop_enum_list *l = (list); \
189 int c = 0; \
190 while (l->gen_mask) { \
191 if (l->gen_mask & (1 << (gen))) \
192 c++; \
193 l++; \
194 } \
195 if (c) { \
196 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
197 l = (list); \
198 c = 0; \
199 while (p && l->gen_mask) { \
200 if (l->gen_mask & (1 << (gen))) { \
201 drm_property_add_enum(p, c, l->type, l->name); \
202 c++; \
203 } \
204 l++; \
205 } \
206 } \
207} while(0)
208
f62b27db
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209int
210nouveau_display_init(struct drm_device *dev)
211{
212 struct drm_nouveau_private *dev_priv = dev->dev_private;
213 struct nouveau_display_engine *disp = &dev_priv->engine.display;
214 int ret;
215
216 ret = disp->init(dev);
217 if (ret == 0) {
218 drm_kms_helper_poll_enable(dev);
219 }
220
221 return ret;
222}
223
224void
225nouveau_display_fini(struct drm_device *dev)
226{
227 struct drm_nouveau_private *dev_priv = dev->dev_private;
228 struct nouveau_display_engine *disp = &dev_priv->engine.display;
229
230 drm_kms_helper_poll_disable(dev);
231 disp->fini(dev);
232}
233
27d5030a
BS
234int
235nouveau_display_create(struct drm_device *dev)
236{
237 struct drm_nouveau_private *dev_priv = dev->dev_private;
238 struct nouveau_display_engine *disp = &dev_priv->engine.display;
de691855 239 int ret, gen;
27d5030a
BS
240
241 drm_mode_config_init(dev);
242 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 243 drm_mode_create_dvi_i_properties(dev);
de691855
BS
244
245 if (dev_priv->card_type < NV_50)
246 gen = 0;
247 else
248 if (dev_priv->card_type < NV_D0)
249 gen = 1;
250 else
251 gen = 2;
252
253 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
254 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
255 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
256
257 disp->underscan_hborder_property =
258 drm_property_create(dev, DRM_MODE_PROP_RANGE,
259 "underscan hborder", 2);
260 disp->underscan_hborder_property->values[0] = 0;
261 disp->underscan_hborder_property->values[1] = 128;
262
263 disp->underscan_vborder_property =
264 drm_property_create(dev, DRM_MODE_PROP_RANGE,
265 "underscan vborder", 2);
266 disp->underscan_vborder_property->values[0] = 0;
267 disp->underscan_vborder_property->values[1] = 128;
268
27d5030a
BS
269 dev->mode_config.funcs = (void *)&nouveau_mode_config_funcs;
270 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
271
272 dev->mode_config.min_width = 0;
273 dev->mode_config.min_height = 0;
274 if (dev_priv->card_type < NV_10) {
275 dev->mode_config.max_width = 2048;
276 dev->mode_config.max_height = 2048;
277 } else
278 if (dev_priv->card_type < NV_50) {
279 dev->mode_config.max_width = 4096;
280 dev->mode_config.max_height = 4096;
281 } else {
282 dev->mode_config.max_width = 8192;
283 dev->mode_config.max_height = 8192;
284 }
285
f62b27db
BS
286 drm_kms_helper_poll_init(dev);
287 drm_kms_helper_poll_disable(dev);
288
27d5030a
BS
289 ret = disp->create(dev);
290 if (ret)
291 return ret;
292
f62b27db
BS
293 if (dev->mode_config.num_crtc) {
294 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
295 if (ret)
296 return ret;
297 }
298
2a44e499 299 return ret;
27d5030a
BS
300}
301
302void
303nouveau_display_destroy(struct drm_device *dev)
304{
305 struct drm_nouveau_private *dev_priv = dev->dev_private;
306 struct nouveau_display_engine *disp = &dev_priv->engine.display;
307
f62b27db
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308 drm_vblank_cleanup(dev);
309
27d5030a 310 disp->destroy(dev);
f62b27db
BS
311
312 drm_kms_helper_poll_fini(dev);
27d5030a
BS
313 drm_mode_config_cleanup(dev);
314}
315
042206c0
FJ
316int
317nouveau_vblank_enable(struct drm_device *dev, int crtc)
318{
319 struct drm_nouveau_private *dev_priv = dev->dev_private;
320
321 if (dev_priv->card_type >= NV_50)
322 nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
323 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
324 else
325 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
326 NV_PCRTC_INTR_0_VBLANK);
327
328 return 0;
329}
330
331void
332nouveau_vblank_disable(struct drm_device *dev, int crtc)
333{
334 struct drm_nouveau_private *dev_priv = dev->dev_private;
335
336 if (dev_priv->card_type >= NV_50)
337 nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
338 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
339 else
340 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
341}
332b242f
FJ
342
343static int
344nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
345 struct nouveau_bo *new_bo)
346{
347 int ret;
348
349 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
350 if (ret)
351 return ret;
352
353 ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
354 if (ret)
355 goto fail;
356
357 ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
358 if (ret)
359 goto fail_unreserve;
360
361 return 0;
362
363fail_unreserve:
364 ttm_bo_unreserve(&new_bo->bo);
365fail:
366 nouveau_bo_unpin(new_bo);
367 return ret;
368}
369
370static void
371nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
372 struct nouveau_bo *new_bo,
373 struct nouveau_fence *fence)
374{
375 nouveau_bo_fence(new_bo, fence);
376 ttm_bo_unreserve(&new_bo->bo);
377
378 nouveau_bo_fence(old_bo, fence);
379 ttm_bo_unreserve(&old_bo->bo);
380
381 nouveau_bo_unpin(old_bo);
382}
383
384static int
385nouveau_page_flip_emit(struct nouveau_channel *chan,
386 struct nouveau_bo *old_bo,
387 struct nouveau_bo *new_bo,
388 struct nouveau_page_flip_state *s,
389 struct nouveau_fence **pfence)
390{
bd2f2037 391 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
332b242f
FJ
392 struct drm_device *dev = chan->dev;
393 unsigned long flags;
394 int ret;
395
396 /* Queue it to the pending list */
397 spin_lock_irqsave(&dev->event_lock, flags);
398 list_add_tail(&s->head, &chan->nvsw.flip);
399 spin_unlock_irqrestore(&dev->event_lock, flags);
400
401 /* Synchronize with the old framebuffer */
402 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
403 if (ret)
404 goto fail;
405
406 /* Emit the pageflip */
407 ret = RING_SPACE(chan, 2);
408 if (ret)
409 goto fail;
410
bd2f2037
BS
411 if (dev_priv->card_type < NV_C0)
412 BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
413 else
414 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0500, 1);
415 OUT_RING (chan, 0);
416 FIRE_RING (chan);
332b242f
FJ
417
418 ret = nouveau_fence_new(chan, pfence, true);
419 if (ret)
420 goto fail;
421
422 return 0;
423fail:
424 spin_lock_irqsave(&dev->event_lock, flags);
425 list_del(&s->head);
426 spin_unlock_irqrestore(&dev->event_lock, flags);
427 return ret;
428}
429
430int
431nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
432 struct drm_pending_vblank_event *event)
433{
434 struct drm_device *dev = crtc->dev;
435 struct drm_nouveau_private *dev_priv = dev->dev_private;
436 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
437 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
438 struct nouveau_page_flip_state *s;
439 struct nouveau_channel *chan;
440 struct nouveau_fence *fence;
441 int ret;
442
a82dd49f 443 if (!dev_priv->channel)
332b242f
FJ
444 return -ENODEV;
445
446 s = kzalloc(sizeof(*s), GFP_KERNEL);
447 if (!s)
448 return -ENOMEM;
449
450 /* Don't let the buffers go away while we flip */
451 ret = nouveau_page_flip_reserve(old_bo, new_bo);
452 if (ret)
453 goto fail_free;
454
455 /* Initialize a page flip struct */
456 *s = (struct nouveau_page_flip_state)
2503c6fa 457 { { }, event, nouveau_crtc(crtc)->index,
01f2c773 458 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f
FJ
459 new_bo->bo.offset };
460
461 /* Choose the channel the flip will be handled in */
462 chan = nouveau_fence_channel(new_bo->bo.sync_obj);
463 if (!chan)
464 chan = nouveau_channel_get_unlocked(dev_priv->channel);
465 mutex_lock(&chan->mutex);
466
467 /* Emit a page flip */
d7117e0d 468 if (dev_priv->card_type >= NV_50) {
3376ee37
BS
469 if (dev_priv->card_type >= NV_D0)
470 ret = nvd0_display_flip_next(crtc, fb, chan, 0);
471 else
472 ret = nv50_display_flip_next(crtc, fb, chan);
d7117e0d
BS
473 if (ret) {
474 nouveau_channel_put(&chan);
475 goto fail_unreserve;
476 }
477 }
478
332b242f
FJ
479 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
480 nouveau_channel_put(&chan);
481 if (ret)
482 goto fail_unreserve;
483
484 /* Update the crtc struct and cleanup */
485 crtc->fb = fb;
486
487 nouveau_page_flip_unreserve(old_bo, new_bo, fence);
488 nouveau_fence_unref(&fence);
489 return 0;
490
491fail_unreserve:
492 nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
493fail_free:
494 kfree(s);
495 return ret;
496}
497
498int
499nouveau_finish_page_flip(struct nouveau_channel *chan,
500 struct nouveau_page_flip_state *ps)
501{
502 struct drm_device *dev = chan->dev;
503 struct nouveau_page_flip_state *s;
504 unsigned long flags;
505
506 spin_lock_irqsave(&dev->event_lock, flags);
507
508 if (list_empty(&chan->nvsw.flip)) {
509 NV_ERROR(dev, "Unexpected pageflip in channel %d.\n", chan->id);
510 spin_unlock_irqrestore(&dev->event_lock, flags);
511 return -EINVAL;
512 }
513
514 s = list_first_entry(&chan->nvsw.flip,
515 struct nouveau_page_flip_state, head);
516 if (s->event) {
517 struct drm_pending_vblank_event *e = s->event;
518 struct timeval now;
519
520 do_gettimeofday(&now);
521 e->event.sequence = 0;
522 e->event.tv_sec = now.tv_sec;
523 e->event.tv_usec = now.tv_usec;
524 list_add_tail(&e->base.link, &e->base.file_priv->event_list);
525 wake_up_interruptible(&e->base.file_priv->event_wait);
526 }
527
528 list_del(&s->head);
d7117e0d
BS
529 if (ps)
530 *ps = *s;
332b242f
FJ
531 kfree(s);
532
533 spin_unlock_irqrestore(&dev->event_lock, flags);
534 return 0;
535}
33dbc27f
BS
536
537int
538nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
539 struct drm_mode_create_dumb *args)
540{
541 struct nouveau_bo *bo;
542 int ret;
543
544 args->pitch = roundup(args->width * (args->bpp / 8), 256);
545 args->size = args->pitch * args->height;
546 args->size = roundup(args->size, PAGE_SIZE);
547
548 ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
549 if (ret)
550 return ret;
551
552 ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
553 drm_gem_object_unreference_unlocked(bo->gem);
554 return ret;
555}
556
557int
558nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
559 uint32_t handle)
560{
561 return drm_gem_handle_delete(file_priv, handle);
562}
563
564int
565nouveau_display_dumb_map_offset(struct drm_file *file_priv,
566 struct drm_device *dev,
567 uint32_t handle, uint64_t *poffset)
568{
569 struct drm_gem_object *gem;
570
571 gem = drm_gem_object_lookup(dev, file_priv, handle);
572 if (gem) {
573 struct nouveau_bo *bo = gem->driver_private;
574 *poffset = bo->bo.addr_space_offset;
575 drm_gem_object_unreference_unlocked(gem);
576 return 0;
577 }
578
579 return -ENOENT;
580}