Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
042206c0 31#include "nouveau_hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
e0996aea 40#include <subdev/bios/gpio.h>
77145f1c
BS
41#include <subdev/gpio.h>
42#include <engine/disp.h>
e0996aea 43
6ee73861
BS
44static void
45nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
46{
47 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 48
bc9025bd
LB
49 if (fb->nvbo)
50 drm_gem_object_unreference_unlocked(fb->nvbo->gem);
6ee73861
BS
51
52 drm_framebuffer_cleanup(drm_fb);
53 kfree(fb);
54}
55
56static int
57nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
58 struct drm_file *file_priv,
59 unsigned int *handle)
60{
61 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
62
63 return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
64}
65
66static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
67 .destroy = nouveau_user_framebuffer_destroy,
68 .create_handle = nouveau_user_framebuffer_create_handle,
69};
70
38651674 71int
45c4e0aa
BS
72nouveau_framebuffer_init(struct drm_device *dev,
73 struct nouveau_framebuffer *nv_fb,
308e5bcb 74 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 75 struct nouveau_bo *nvbo)
6ee73861 76{
77145f1c 77 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 78 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
79 int ret;
80
45c4e0aa 81 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861 82 if (ret) {
38651674 83 return ret;
6ee73861
BS
84 }
85
45c4e0aa
BS
86 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
87 nv_fb->nvbo = nvbo;
88
77145f1c 89 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
90 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
91 if (tile_flags == 0x7a00 ||
92 tile_flags == 0xfe00)
93 nv_fb->r_dma = NvEvoFB32;
94 else
95 if (tile_flags == 0x7000)
96 nv_fb->r_dma = NvEvoFB16;
97 else
98 nv_fb->r_dma = NvEvoVRAM_LP;
99
100 switch (fb->depth) {
101 case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
102 case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
103 case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
104 case 24:
105 case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
106 case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
107 default:
77145f1c 108 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
109 return -EINVAL;
110 }
111
77145f1c 112 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
113 nv_fb->r_format |= (tile_flags << 8);
114
2fad3d5e 115 if (!tile_flags) {
77145f1c 116 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 117 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 118 else
01f2c773 119 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 120 } else {
45c4e0aa 121 u32 mode = nvbo->tile_mode;
77145f1c 122 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 123 mode >>= 4;
01f2c773 124 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
125 }
126 }
127
38651674 128 return 0;
6ee73861
BS
129}
130
131static struct drm_framebuffer *
132nouveau_user_framebuffer_create(struct drm_device *dev,
133 struct drm_file *file_priv,
308e5bcb 134 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 135{
38651674 136 struct nouveau_framebuffer *nouveau_fb;
6ee73861 137 struct drm_gem_object *gem;
38651674 138 int ret;
6ee73861 139
308e5bcb 140 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 141 if (!gem)
cce13ff7 142 return ERR_PTR(-ENOENT);
6ee73861 143
38651674
DA
144 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
145 if (!nouveau_fb)
cce13ff7 146 return ERR_PTR(-ENOMEM);
38651674
DA
147
148 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
149 if (ret) {
6ee73861 150 drm_gem_object_unreference(gem);
cce13ff7 151 return ERR_PTR(ret);
6ee73861
BS
152 }
153
38651674 154 return &nouveau_fb->base;
6ee73861
BS
155}
156
27d5030a 157static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 158 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 159 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
160};
161
b29caa58 162
4a67d391 163struct nouveau_drm_prop_enum_list {
de691855 164 u8 gen_mask;
b29caa58
BS
165 int type;
166 char *name;
167};
168
4a67d391 169static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
170 { 6, UNDERSCAN_AUTO, "auto" },
171 { 6, UNDERSCAN_OFF, "off" },
172 { 6, UNDERSCAN_ON, "on" },
de691855 173 {}
b29caa58
BS
174};
175
4a67d391 176static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
177 { 7, DITHERING_MODE_AUTO, "auto" },
178 { 7, DITHERING_MODE_OFF, "off" },
179 { 1, DITHERING_MODE_ON, "on" },
180 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
181 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
182 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
183 {}
184};
185
4a67d391 186static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
187 { 6, DITHERING_DEPTH_AUTO, "auto" },
188 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
189 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
190 {}
191};
192
193#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 194 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
195 int c = 0; \
196 while (l->gen_mask) { \
197 if (l->gen_mask & (1 << (gen))) \
198 c++; \
199 l++; \
200 } \
201 if (c) { \
202 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
203 l = (list); \
204 c = 0; \
205 while (p && l->gen_mask) { \
206 if (l->gen_mask & (1 << (gen))) { \
207 drm_property_add_enum(p, c, l->type, l->name); \
208 c++; \
209 } \
210 l++; \
211 } \
212 } \
213} while(0)
214
f62b27db
BS
215int
216nouveau_display_init(struct drm_device *dev)
217{
77145f1c
BS
218 struct nouveau_drm *drm = nouveau_drm(dev);
219 struct nouveau_display *disp = nouveau_display(dev);
220 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767 221 struct drm_connector *connector;
f62b27db
BS
222 int ret;
223
224 ret = disp->init(dev);
52c4d767
BS
225 if (ret)
226 return ret;
227
7df898b1
BS
228 /* power on internal panel if it's not already. the init tables of
229 * some vbios default this to off for some reason, causing the
230 * panel to not work after resume
231 */
77145f1c
BS
232 if (gpio && gpio->get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff) == 0) {
233 gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
7df898b1
BS
234 msleep(300);
235 }
236
237 /* enable polling for external displays */
52c4d767
BS
238 drm_kms_helper_poll_enable(dev);
239
240 /* enable hotplug interrupts */
241 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
242 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
243 if (gpio)
244 gpio->irq(gpio, 0, conn->hpd, 0xff, true);
f62b27db
BS
245 }
246
247 return ret;
248}
249
250void
251nouveau_display_fini(struct drm_device *dev)
252{
77145f1c
BS
253 struct nouveau_drm *drm = nouveau_drm(dev);
254 struct nouveau_display *disp = nouveau_display(dev);
255 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767
BS
256 struct drm_connector *connector;
257
258 /* disable hotplug interrupts */
259 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
260 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
261 if (gpio)
262 gpio->irq(gpio, 0, conn->hpd, 0xff, false);
52c4d767 263 }
f62b27db
BS
264
265 drm_kms_helper_poll_disable(dev);
266 disp->fini(dev);
267}
268
ebb945a9
BS
269static void
270nouveau_display_vblank_notify(void *data, int crtc)
271{
272 drm_handle_vblank(data, crtc);
273}
274
275static void
276nouveau_display_vblank_get(void *data, int crtc)
277{
278 drm_vblank_get(data, crtc);
279}
280
281static void
282nouveau_display_vblank_put(void *data, int crtc)
283{
284 drm_vblank_put(data, crtc);
285}
286
27d5030a
BS
287int
288nouveau_display_create(struct drm_device *dev)
289{
77145f1c
BS
290 struct nouveau_drm *drm = nouveau_drm(dev);
291 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
292 struct nouveau_display *disp;
de691855 293 int ret, gen;
27d5030a 294
77145f1c
BS
295 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
296 if (!disp)
297 return -ENOMEM;
298
299 pdisp->vblank.data = dev;
300 pdisp->vblank.notify = nouveau_display_vblank_notify;
301 pdisp->vblank.get = nouveau_display_vblank_get;
302 pdisp->vblank.put = nouveau_display_vblank_put;
303
27d5030a
BS
304 drm_mode_config_init(dev);
305 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 306 drm_mode_create_dvi_i_properties(dev);
de691855 307
77145f1c 308 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
309 gen = 0;
310 else
77145f1c 311 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
312 gen = 1;
313 else
314 gen = 2;
315
316 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
317 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
318 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
319
320 disp->underscan_hborder_property =
d9bc3c02 321 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
322
323 disp->underscan_vborder_property =
d9bc3c02 324 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 325
df26bc9c
CB
326 if (gen == 1) {
327 disp->vibrant_hue_property =
328 drm_property_create(dev, DRM_MODE_PROP_RANGE,
329 "vibrant hue", 2);
330 disp->vibrant_hue_property->values[0] = 0;
331 disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
332
333 disp->color_vibrance_property =
334 drm_property_create(dev, DRM_MODE_PROP_RANGE,
335 "color vibrance", 2);
336 disp->color_vibrance_property->values[0] = 0;
337 disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
338 }
339
e6ecefaa 340 dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a
BS
341 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
342
343 dev->mode_config.min_width = 0;
344 dev->mode_config.min_height = 0;
77145f1c 345 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
346 dev->mode_config.max_width = 2048;
347 dev->mode_config.max_height = 2048;
348 } else
77145f1c 349 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
350 dev->mode_config.max_width = 4096;
351 dev->mode_config.max_height = 4096;
352 } else {
353 dev->mode_config.max_width = 8192;
354 dev->mode_config.max_height = 8192;
355 }
356
f1377998
DA
357 dev->mode_config.preferred_depth = 24;
358 dev->mode_config.prefer_shadow = 1;
359
f62b27db
BS
360 drm_kms_helper_poll_init(dev);
361 drm_kms_helper_poll_disable(dev);
362
77145f1c
BS
363 if (nv_device(drm->device)->card_type < NV_50)
364 ret = nv04_display_create(dev);
365 else
366 if (nv_device(drm->device)->card_type < NV_D0)
367 ret = nv50_display_create(dev);
368 else
369 ret = nvd0_display_create(dev);
27d5030a 370 if (ret)
5ace2c9d 371 goto disp_create_err;
27d5030a 372
f62b27db
BS
373 if (dev->mode_config.num_crtc) {
374 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
375 if (ret)
5ace2c9d 376 goto vblank_err;
f62b27db
BS
377 }
378
77145f1c 379 nouveau_backlight_init(dev);
5ace2c9d
MS
380 return 0;
381
382vblank_err:
77145f1c 383 disp->dtor(dev);
5ace2c9d
MS
384disp_create_err:
385 drm_kms_helper_poll_fini(dev);
386 drm_mode_config_cleanup(dev);
2a44e499 387 return ret;
27d5030a
BS
388}
389
390void
391nouveau_display_destroy(struct drm_device *dev)
392{
77145f1c 393 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 394
77145f1c 395 nouveau_backlight_exit(dev);
f62b27db
BS
396 drm_vblank_cleanup(dev);
397
77145f1c 398 disp->dtor(dev);
f62b27db
BS
399
400 drm_kms_helper_poll_fini(dev);
27d5030a 401 drm_mode_config_cleanup(dev);
77145f1c
BS
402 nouveau_drm(dev)->display = NULL;
403 kfree(disp);
404}
405
406int
407nouveau_display_suspend(struct drm_device *dev)
408{
409 struct nouveau_drm *drm = nouveau_drm(dev);
410 struct drm_crtc *crtc;
411
412 nouveau_display_fini(dev);
413
414 NV_INFO(drm, "unpinning framebuffer(s)...\n");
415 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
416 struct nouveau_framebuffer *nouveau_fb;
417
418 nouveau_fb = nouveau_framebuffer(crtc->fb);
419 if (!nouveau_fb || !nouveau_fb->nvbo)
420 continue;
421
422 nouveau_bo_unpin(nouveau_fb->nvbo);
423 }
424
425 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
426 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
427
428 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
429 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
430 }
431
432 return 0;
433}
434
435void
436nouveau_display_resume(struct drm_device *dev)
437{
438 struct nouveau_drm *drm = nouveau_drm(dev);
439 struct drm_crtc *crtc;
440 int ret;
441
442 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
443 struct nouveau_framebuffer *nouveau_fb;
444
445 nouveau_fb = nouveau_framebuffer(crtc->fb);
446 if (!nouveau_fb || !nouveau_fb->nvbo)
447 continue;
448
449 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
450 }
451
452 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
453 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
454
455 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
456 if (!ret)
457 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
458 if (ret)
459 NV_ERROR(drm, "Could not pin/map cursor.\n");
460 }
461
462 nouveau_fbcon_set_suspend(dev, 0);
463 nouveau_fbcon_zfill_all(dev);
464
465 nouveau_display_init(dev);
466
467 /* Force CLUT to get re-loaded during modeset */
468 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
469 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
470
471 nv_crtc->lut.depth = 0;
472 }
473
474 drm_helper_resume_force_mode(dev);
475
476 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
477 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
478 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
479
480 nv_crtc->cursor.set_offset(nv_crtc, offset);
481 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
482 nv_crtc->cursor_saved_y);
483 }
27d5030a
BS
484}
485
042206c0
FJ
486int
487nouveau_vblank_enable(struct drm_device *dev, int crtc)
488{
77145f1c 489 struct nouveau_device *device = nouveau_dev(dev);
042206c0 490
77145f1c
BS
491 if (device->card_type >= NV_D0)
492 nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 1);
ebb945a9 493 else
77145f1c
BS
494 if (device->card_type >= NV_50)
495 nv_mask(device, NV50_PDISPLAY_INTR_EN_1, 0,
042206c0
FJ
496 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
497 else
498 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
499 NV_PCRTC_INTR_0_VBLANK);
500
501 return 0;
502}
503
504void
505nouveau_vblank_disable(struct drm_device *dev, int crtc)
506{
77145f1c 507 struct nouveau_device *device = nouveau_dev(dev);
042206c0 508
77145f1c
BS
509 if (device->card_type >= NV_D0)
510 nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 0);
ebb945a9 511 else
77145f1c
BS
512 if (device->card_type >= NV_50)
513 nv_mask(device, NV50_PDISPLAY_INTR_EN_1,
042206c0
FJ
514 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
515 else
516 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
517}
332b242f
FJ
518
519static int
520nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
521 struct nouveau_bo *new_bo)
522{
523 int ret;
524
525 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
526 if (ret)
527 return ret;
528
529 ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
530 if (ret)
531 goto fail;
532
533 ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
534 if (ret)
535 goto fail_unreserve;
536
537 return 0;
538
539fail_unreserve:
540 ttm_bo_unreserve(&new_bo->bo);
541fail:
542 nouveau_bo_unpin(new_bo);
543 return ret;
544}
545
546static void
547nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
548 struct nouveau_bo *new_bo,
549 struct nouveau_fence *fence)
550{
551 nouveau_bo_fence(new_bo, fence);
552 ttm_bo_unreserve(&new_bo->bo);
553
554 nouveau_bo_fence(old_bo, fence);
555 ttm_bo_unreserve(&old_bo->bo);
556
557 nouveau_bo_unpin(old_bo);
558}
559
560static int
561nouveau_page_flip_emit(struct nouveau_channel *chan,
562 struct nouveau_bo *old_bo,
563 struct nouveau_bo *new_bo,
564 struct nouveau_page_flip_state *s,
565 struct nouveau_fence **pfence)
566{
f589be88 567 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
568 struct nouveau_drm *drm = chan->drm;
569 struct drm_device *dev = drm->dev;
332b242f
FJ
570 unsigned long flags;
571 int ret;
572
573 /* Queue it to the pending list */
574 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 575 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
576 spin_unlock_irqrestore(&dev->event_lock, flags);
577
578 /* Synchronize with the old framebuffer */
579 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
580 if (ret)
581 goto fail;
582
583 /* Emit the pageflip */
d5316e25 584 ret = RING_SPACE(chan, 3);
332b242f
FJ
585 if (ret)
586 goto fail;
587
77145f1c 588 if (nv_device(drm->device)->card_type < NV_C0) {
6d597027 589 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25
BS
590 OUT_RING (chan, 0x00000000);
591 OUT_RING (chan, 0x00000000);
592 } else {
6d597027 593 BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
5e120f6e 594 OUT_RING (chan, 0);
6d597027 595 BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
d5316e25 596 }
bd2f2037 597 FIRE_RING (chan);
332b242f 598
d375e7d5 599 ret = nouveau_fence_new(chan, pfence);
332b242f
FJ
600 if (ret)
601 goto fail;
602
603 return 0;
604fail:
605 spin_lock_irqsave(&dev->event_lock, flags);
606 list_del(&s->head);
607 spin_unlock_irqrestore(&dev->event_lock, flags);
608 return ret;
609}
610
611int
612nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
613 struct drm_pending_vblank_event *event)
614{
615 struct drm_device *dev = crtc->dev;
77145f1c 616 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
617 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
618 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
619 struct nouveau_page_flip_state *s;
d375e7d5 620 struct nouveau_channel *chan = NULL;
332b242f
FJ
621 struct nouveau_fence *fence;
622 int ret;
623
77145f1c 624 if (!drm->channel)
332b242f
FJ
625 return -ENODEV;
626
627 s = kzalloc(sizeof(*s), GFP_KERNEL);
628 if (!s)
629 return -ENOMEM;
630
631 /* Don't let the buffers go away while we flip */
632 ret = nouveau_page_flip_reserve(old_bo, new_bo);
633 if (ret)
634 goto fail_free;
635
636 /* Initialize a page flip struct */
637 *s = (struct nouveau_page_flip_state)
2503c6fa 638 { { }, event, nouveau_crtc(crtc)->index,
01f2c773 639 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f
FJ
640 new_bo->bo.offset };
641
642 /* Choose the channel the flip will be handled in */
d375e7d5
BS
643 fence = new_bo->bo.sync_obj;
644 if (fence)
ebb945a9 645 chan = fence->channel;
332b242f 646 if (!chan)
77145f1c
BS
647 chan = drm->channel;
648 mutex_lock(&chan->cli->mutex);
332b242f
FJ
649
650 /* Emit a page flip */
77145f1c
BS
651 if (nv_device(drm->device)->card_type >= NV_50) {
652 if (nv_device(drm->device)->card_type >= NV_D0)
3376ee37
BS
653 ret = nvd0_display_flip_next(crtc, fb, chan, 0);
654 else
655 ret = nv50_display_flip_next(crtc, fb, chan);
d7117e0d 656 if (ret) {
77145f1c 657 mutex_unlock(&chan->cli->mutex);
d7117e0d
BS
658 goto fail_unreserve;
659 }
660 }
661
332b242f 662 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 663 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
664 if (ret)
665 goto fail_unreserve;
666
667 /* Update the crtc struct and cleanup */
668 crtc->fb = fb;
669
670 nouveau_page_flip_unreserve(old_bo, new_bo, fence);
671 nouveau_fence_unref(&fence);
672 return 0;
673
674fail_unreserve:
675 nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
676fail_free:
677 kfree(s);
678 return ret;
679}
680
681int
682nouveau_finish_page_flip(struct nouveau_channel *chan,
683 struct nouveau_page_flip_state *ps)
684{
f589be88 685 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
686 struct nouveau_drm *drm = chan->drm;
687 struct drm_device *dev = drm->dev;
332b242f
FJ
688 struct nouveau_page_flip_state *s;
689 unsigned long flags;
690
691 spin_lock_irqsave(&dev->event_lock, flags);
692
f589be88 693 if (list_empty(&fctx->flip)) {
77145f1c 694 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
695 spin_unlock_irqrestore(&dev->event_lock, flags);
696 return -EINVAL;
697 }
698
f589be88 699 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
332b242f
FJ
700 if (s->event) {
701 struct drm_pending_vblank_event *e = s->event;
702 struct timeval now;
703
704 do_gettimeofday(&now);
705 e->event.sequence = 0;
706 e->event.tv_sec = now.tv_sec;
707 e->event.tv_usec = now.tv_usec;
708 list_add_tail(&e->base.link, &e->base.file_priv->event_list);
709 wake_up_interruptible(&e->base.file_priv->event_wait);
710 }
711
712 list_del(&s->head);
d7117e0d
BS
713 if (ps)
714 *ps = *s;
332b242f
FJ
715 kfree(s);
716
717 spin_unlock_irqrestore(&dev->event_lock, flags);
718 return 0;
719}
33dbc27f 720
f589be88
BS
721int
722nouveau_flip_complete(void *data)
723{
724 struct nouveau_channel *chan = data;
77145f1c 725 struct nouveau_drm *drm = chan->drm;
f589be88
BS
726 struct nouveau_page_flip_state state;
727
728 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
729 if (nv_device(drm->device)->card_type < NV_50) {
730 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
731 state.y * state.pitch +
732 state.x * state.bpp / 8);
733 }
734 }
735
736 return 0;
737}
738
33dbc27f
BS
739int
740nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
741 struct drm_mode_create_dumb *args)
742{
743 struct nouveau_bo *bo;
744 int ret;
745
746 args->pitch = roundup(args->width * (args->bpp / 8), 256);
747 args->size = args->pitch * args->height;
748 args->size = roundup(args->size, PAGE_SIZE);
749
610bd7da 750 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
751 if (ret)
752 return ret;
753
754 ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
755 drm_gem_object_unreference_unlocked(bo->gem);
756 return ret;
757}
758
759int
760nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
761 uint32_t handle)
762{
763 return drm_gem_handle_delete(file_priv, handle);
764}
765
766int
767nouveau_display_dumb_map_offset(struct drm_file *file_priv,
768 struct drm_device *dev,
769 uint32_t handle, uint64_t *poffset)
770{
771 struct drm_gem_object *gem;
772
773 gem = drm_gem_object_lookup(dev, file_priv, handle);
774 if (gem) {
775 struct nouveau_bo *bo = gem->driver_private;
776 *poffset = bo->bo.addr_space_offset;
777 drm_gem_object_unreference_unlocked(gem);
778 return 0;
779 }
780
781 return -ENOENT;
782}