Merge tag 'topic/drm-misc-2016-01-17' of git://anongit.freedesktop.org/drm-intel...
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / drivers / gpu / drm / i915 / intel_dp_mst.c
CommitLineData
0e32b39c
DA
1/*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26#include <drm/drmP.h>
27#include "i915_drv.h"
28#include "intel_drv.h"
c6f95f27 29#include <drm/drm_atomic_helper.h>
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DA
30#include <drm/drm_crtc_helper.h>
31#include <drm/drm_edid.h>
32
33static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
5cec258b 34 struct intel_crtc_state *pipe_config)
0e32b39c 35{
6fa2d197 36 struct drm_device *dev = encoder->base.dev;
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DA
37 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
38 struct intel_digital_port *intel_dig_port = intel_mst->primary;
39 struct intel_dp *intel_dp = &intel_dig_port->dp;
e75f4771
ACO
40 struct drm_atomic_state *state;
41 int bpp, i;
04a60f9f 42 int lane_count, slots;
7c5f93b0 43 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
da3ced29
ACO
44 struct drm_connector *drm_connector;
45 struct intel_connector *connector, *found = NULL;
46 struct drm_connector_state *connector_state;
0e32b39c
DA
47 int mst_pbn;
48
49 pipe_config->dp_encoder_is_mst = true;
50 pipe_config->has_pch_encoder = false;
51 pipe_config->has_dp_encoder = true;
52 bpp = 24;
53 /*
54 * for MST we always configure max link bw - the spec doesn't
55 * seem to suggest we should do otherwise.
56 */
57 lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
ed4e9c1d 58
ed4e9c1d 59
90a6b7b0 60 pipe_config->lane_count = lane_count;
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61
62 pipe_config->pipe_bpp = 24;
04a60f9f 63 pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
0e32b39c 64
e75f4771
ACO
65 state = pipe_config->base.state;
66
da3ced29
ACO
67 for_each_connector_in_state(state, drm_connector, connector_state, i) {
68 connector = to_intel_connector(drm_connector);
e75f4771 69
da3ced29
ACO
70 if (connector_state->best_encoder == &encoder->base) {
71 found = connector;
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DA
72 break;
73 }
74 }
75
76 if (!found) {
77 DRM_ERROR("can't find connector\n");
78 return false;
79 }
80
3d52ccf5
LY
81 if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, found->port))
82 pipe_config->has_audio = true;
aad941d5 83 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
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DA
84
85 pipe_config->pbn = mst_pbn;
86 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
87
88 intel_link_compute_m_n(bpp, lane_count,
89 adjusted_mode->crtc_clock,
90 pipe_config->port_clock,
91 &pipe_config->dp_m_n);
92
93 pipe_config->dp_m_n.tu = slots;
6fa2d197
ACO
94
95 if (IS_HASWELL(dev) || IS_BROADWELL(dev))
96 hsw_dp_set_ddi_pll_sel(pipe_config);
97
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98 return true;
99
100}
101
102static void intel_mst_disable_dp(struct intel_encoder *encoder)
103{
104 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
105 struct intel_digital_port *intel_dig_port = intel_mst->primary;
106 struct intel_dp *intel_dp = &intel_dig_port->dp;
3d52ccf5
LY
107 struct drm_device *dev = encoder->base.dev;
108 struct drm_i915_private *dev_priv = dev->dev_private;
109 struct drm_crtc *crtc = encoder->base.crtc;
110 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
111
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DA
112 int ret;
113
114 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
115
116 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
117
118 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
119 if (ret) {
120 DRM_ERROR("failed to update payload %d\n", ret);
121 }
3d52ccf5
LY
122 if (intel_crtc->config->has_audio) {
123 intel_audio_codec_disable(encoder);
124 intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
125 }
0e32b39c
DA
126}
127
128static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
129{
130 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
131 struct intel_digital_port *intel_dig_port = intel_mst->primary;
132 struct intel_dp *intel_dp = &intel_dig_port->dp;
133
134 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
135
136 /* this can fail */
137 drm_dp_check_act_status(&intel_dp->mst_mgr);
138 /* and this can also fail */
139 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
140
141 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
142
143 intel_dp->active_mst_links--;
144 intel_mst->port = NULL;
145 if (intel_dp->active_mst_links == 0) {
146 intel_dig_port->base.post_disable(&intel_dig_port->base);
147 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
148 }
149}
150
151static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
152{
153 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
154 struct intel_digital_port *intel_dig_port = intel_mst->primary;
155 struct intel_dp *intel_dp = &intel_dig_port->dp;
156 struct drm_device *dev = encoder->base.dev;
157 struct drm_i915_private *dev_priv = dev->dev_private;
158 enum port port = intel_dig_port->port;
159 int ret;
160 uint32_t temp;
9b4fd8f2 161 struct intel_connector *found = NULL, *connector;
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162 int slots;
163 struct drm_crtc *crtc = encoder->base.crtc;
164 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
165
9b4fd8f2
ACO
166 for_each_intel_connector(dev, connector) {
167 if (connector->base.state->best_encoder == &encoder->base) {
168 found = connector;
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169 break;
170 }
171 }
172
173 if (!found) {
174 DRM_ERROR("can't find connector\n");
175 return;
176 }
177
e85376cb
ML
178 /* MST encoders are bound to a crtc, not to a connector,
179 * force the mapping here for get_hw_state.
180 */
181 found->encoder = encoder;
182
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183 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
184 intel_mst->port = found->port;
185
186 if (intel_dp->active_mst_links == 0) {
e404ba8d 187 intel_ddi_clk_select(encoder, intel_crtc->config);
0e32b39c 188
901c2daf
VS
189 intel_dp_set_link_params(intel_dp, intel_crtc->config);
190
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191 intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
192
193 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
194
0e32b39c 195 intel_dp_start_link_train(intel_dp);
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196 intel_dp_stop_link_train(intel_dp);
197 }
198
199 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
6e3c9717
ACO
200 intel_mst->port,
201 intel_crtc->config->pbn, &slots);
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202 if (ret == false) {
203 DRM_ERROR("failed to allocate vcpi\n");
204 return;
205 }
206
207
208 intel_dp->active_mst_links++;
209 temp = I915_READ(DP_TP_STATUS(port));
210 I915_WRITE(DP_TP_STATUS(port), temp);
211
212 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
213}
214
215static void intel_mst_enable_dp(struct intel_encoder *encoder)
216{
217 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
218 struct intel_digital_port *intel_dig_port = intel_mst->primary;
219 struct intel_dp *intel_dp = &intel_dig_port->dp;
220 struct drm_device *dev = intel_dig_port->base.base.dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
3d52ccf5 222 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
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DA
223 enum port port = intel_dig_port->port;
224 int ret;
225
226 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
227
228 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
229 1))
230 DRM_ERROR("Timed out waiting for ACT sent\n");
231
232 ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
233
234 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
3d52ccf5
LY
235
236 if (crtc->config->has_audio) {
237 DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
238 pipe_name(crtc->pipe));
239 intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
240 intel_audio_codec_enable(encoder);
241 }
0e32b39c
DA
242}
243
244static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
245 enum pipe *pipe)
246{
247 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
248 *pipe = intel_mst->pipe;
249 if (intel_mst->port)
250 return true;
251 return false;
252}
253
254static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
5cec258b 255 struct intel_crtc_state *pipe_config)
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DA
256{
257 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
258 struct intel_digital_port *intel_dig_port = intel_mst->primary;
259 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
260 struct drm_device *dev = encoder->base.dev;
261 struct drm_i915_private *dev_priv = dev->dev_private;
0cb09a97 262 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
0e32b39c
DA
263 u32 temp, flags = 0;
264
265 pipe_config->has_dp_encoder = true;
266
3d52ccf5
LY
267 pipe_config->has_audio =
268 intel_ddi_is_audio_enabled(dev_priv, crtc);
269
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DA
270 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
271 if (temp & TRANS_DDI_PHSYNC)
272 flags |= DRM_MODE_FLAG_PHSYNC;
273 else
274 flags |= DRM_MODE_FLAG_NHSYNC;
275 if (temp & TRANS_DDI_PVSYNC)
276 flags |= DRM_MODE_FLAG_PVSYNC;
277 else
278 flags |= DRM_MODE_FLAG_NVSYNC;
279
280 switch (temp & TRANS_DDI_BPC_MASK) {
281 case TRANS_DDI_BPC_6:
282 pipe_config->pipe_bpp = 18;
283 break;
284 case TRANS_DDI_BPC_8:
285 pipe_config->pipe_bpp = 24;
286 break;
287 case TRANS_DDI_BPC_10:
288 pipe_config->pipe_bpp = 30;
289 break;
290 case TRANS_DDI_BPC_12:
291 pipe_config->pipe_bpp = 36;
292 break;
293 default:
294 break;
295 }
2d112de7 296 pipe_config->base.adjusted_mode.flags |= flags;
90a6b7b0
VS
297
298 pipe_config->lane_count =
299 ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
300
0e32b39c
DA
301 intel_dp_get_m_n(crtc, pipe_config);
302
303 intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
304}
305
306static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
307{
308 struct intel_connector *intel_connector = to_intel_connector(connector);
309 struct intel_dp *intel_dp = intel_connector->mst_port;
310 struct edid *edid;
311 int ret;
312
313 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
314 if (!edid)
315 return 0;
316
317 ret = intel_connector_update_modes(connector, edid);
318 kfree(edid);
319
320 return ret;
321}
322
323static enum drm_connector_status
f7f3d48a 324intel_dp_mst_detect(struct drm_connector *connector, bool force)
0e32b39c
DA
325{
326 struct intel_connector *intel_connector = to_intel_connector(connector);
327 struct intel_dp *intel_dp = intel_connector->mst_port;
328
c6a0aed4 329 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
0e32b39c
DA
330}
331
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DA
332static int
333intel_dp_mst_set_property(struct drm_connector *connector,
334 struct drm_property *property,
335 uint64_t val)
336{
337 return 0;
338}
339
340static void
341intel_dp_mst_connector_destroy(struct drm_connector *connector)
342{
343 struct intel_connector *intel_connector = to_intel_connector(connector);
344
345 if (!IS_ERR_OR_NULL(intel_connector->edid))
346 kfree(intel_connector->edid);
347
348 drm_connector_cleanup(connector);
349 kfree(connector);
350}
351
352static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
4d688a2a 353 .dpms = drm_atomic_helper_connector_dpms,
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DA
354 .detect = intel_dp_mst_detect,
355 .fill_modes = drm_helper_probe_single_connector_modes,
356 .set_property = intel_dp_mst_set_property,
2545e4a6 357 .atomic_get_property = intel_connector_atomic_get_property,
0e32b39c 358 .destroy = intel_dp_mst_connector_destroy,
c6f95f27 359 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
98969725 360 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0e32b39c
DA
361};
362
363static int intel_dp_mst_get_modes(struct drm_connector *connector)
364{
365 return intel_dp_mst_get_ddc_modes(connector);
366}
367
368static enum drm_mode_status
369intel_dp_mst_mode_valid(struct drm_connector *connector,
370 struct drm_display_mode *mode)
371{
372 /* TODO - validate mode against available PBN for link */
373 if (mode->clock < 10000)
374 return MODE_CLOCK_LOW;
375
376 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
377 return MODE_H_ILLEGAL;
378
379 return MODE_OK;
380}
381
459485ad
DV
382static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
383 struct drm_connector_state *state)
384{
385 struct intel_connector *intel_connector = to_intel_connector(connector);
386 struct intel_dp *intel_dp = intel_connector->mst_port;
387 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
388
389 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
390}
391
0e32b39c
DA
392static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
393{
394 struct intel_connector *intel_connector = to_intel_connector(connector);
395 struct intel_dp *intel_dp = intel_connector->mst_port;
396 return &intel_dp->mst_encoders[0]->base.base;
397}
398
399static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
400 .get_modes = intel_dp_mst_get_modes,
401 .mode_valid = intel_dp_mst_mode_valid,
459485ad 402 .atomic_best_encoder = intel_mst_atomic_best_encoder,
0e32b39c
DA
403 .best_encoder = intel_mst_best_encoder,
404};
405
406static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
407{
408 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
409
410 drm_encoder_cleanup(encoder);
411 kfree(intel_mst);
412}
413
414static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
415 .destroy = intel_dp_mst_encoder_destroy,
416};
417
418static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
419{
e85376cb 420 if (connector->encoder && connector->base.state->crtc) {
0e32b39c
DA
421 enum pipe pipe;
422 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
423 return false;
424 return true;
425 }
426 return false;
427}
428
7296c849
CW
429static void intel_connector_add_to_fbdev(struct intel_connector *connector)
430{
0695726e 431#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849 432 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
54632abe
LW
433
434 if (dev_priv->fbdev)
435 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
436 &connector->base);
7296c849
CW
437#endif
438}
439
440static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
441{
0695726e 442#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849 443 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
54632abe
LW
444
445 if (dev_priv->fbdev)
446 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
447 &connector->base);
7296c849
CW
448#endif
449}
450
12e6cecd 451static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
0e32b39c
DA
452{
453 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
454 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
455 struct drm_device *dev = intel_dig_port->base.base.dev;
0e32b39c
DA
456 struct intel_connector *intel_connector;
457 struct drm_connector *connector;
458 int i;
459
9bdbd0b9 460 intel_connector = intel_connector_alloc();
0e32b39c
DA
461 if (!intel_connector)
462 return NULL;
463
464 connector = &intel_connector->base;
465 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
466 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
467
468 intel_connector->unregister = intel_connector_unregister;
469 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
470 intel_connector->mst_port = intel_dp;
471 intel_connector->port = port;
472
473 for (i = PIPE_A; i <= PIPE_C; i++) {
474 drm_mode_connector_attach_encoder(&intel_connector->base,
475 &intel_dp->mst_encoders[i]->base.base);
476 }
477 intel_dp_add_properties(intel_dp, connector);
478
479 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
6f134d7b
DA
480 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
481
0e32b39c 482 drm_mode_connector_set_path_property(connector, pathprop);
d9515c5e
DA
483 return connector;
484}
485
486static void intel_dp_register_mst_connector(struct drm_connector *connector)
487{
488 struct intel_connector *intel_connector = to_intel_connector(connector);
489 struct drm_device *dev = connector->dev;
8bb4da1d 490 drm_modeset_lock_all(dev);
7296c849 491 intel_connector_add_to_fbdev(intel_connector);
8bb4da1d 492 drm_modeset_unlock_all(dev);
0e32b39c 493 drm_connector_register(&intel_connector->base);
0e32b39c
DA
494}
495
496static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
497 struct drm_connector *connector)
498{
499 struct intel_connector *intel_connector = to_intel_connector(connector);
500 struct drm_device *dev = connector->dev;
20fae983 501
0e32b39c 502 /* need to nuke the connector */
8bb4da1d 503 drm_modeset_lock_all(dev);
20fae983
ML
504 if (connector->state->crtc) {
505 struct drm_mode_set set;
506 int ret;
507
508 memset(&set, 0, sizeof(set));
509 set.crtc = connector->state->crtc,
510
511 ret = drm_atomic_helper_set_config(&set);
512
513 WARN(ret, "Disabling mst crtc failed with %i\n", ret);
514 }
8bb4da1d 515 drm_modeset_unlock_all(dev);
0e32b39c
DA
516
517 intel_connector->unregister(intel_connector);
518
8bb4da1d 519 drm_modeset_lock_all(dev);
7296c849 520 intel_connector_remove_from_fbdev(intel_connector);
0e32b39c 521 drm_connector_cleanup(connector);
8bb4da1d 522 drm_modeset_unlock_all(dev);
0e32b39c 523
0e32b39c
DA
524 kfree(intel_connector);
525 DRM_DEBUG_KMS("\n");
526}
527
528static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
529{
530 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
531 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
532 struct drm_device *dev = intel_dig_port->base.base.dev;
533
534 drm_kms_helper_hotplug_event(dev);
535}
536
69a0f89c 537static const struct drm_dp_mst_topology_cbs mst_cbs = {
0e32b39c 538 .add_connector = intel_dp_add_mst_connector,
d9515c5e 539 .register_connector = intel_dp_register_mst_connector,
0e32b39c
DA
540 .destroy_connector = intel_dp_destroy_mst_connector,
541 .hotplug = intel_dp_mst_hotplug,
542};
543
544static struct intel_dp_mst_encoder *
545intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
546{
547 struct intel_dp_mst_encoder *intel_mst;
548 struct intel_encoder *intel_encoder;
549 struct drm_device *dev = intel_dig_port->base.base.dev;
550
551 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
552
553 if (!intel_mst)
554 return NULL;
555
556 intel_mst->pipe = pipe;
557 intel_encoder = &intel_mst->base;
558 intel_mst->primary = intel_dig_port;
559
560 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
13a3d91f 561 DRM_MODE_ENCODER_DPMST, NULL);
0e32b39c
DA
562
563 intel_encoder->type = INTEL_OUTPUT_DP_MST;
564 intel_encoder->crtc_mask = 0x7;
565 intel_encoder->cloneable = 0;
566
567 intel_encoder->compute_config = intel_dp_mst_compute_config;
568 intel_encoder->disable = intel_mst_disable_dp;
569 intel_encoder->post_disable = intel_mst_post_disable_dp;
570 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
571 intel_encoder->enable = intel_mst_enable_dp;
572 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
573 intel_encoder->get_config = intel_dp_mst_enc_get_config;
574
575 return intel_mst;
576
577}
578
579static bool
580intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
581{
582 int i;
583 struct intel_dp *intel_dp = &intel_dig_port->dp;
584
585 for (i = PIPE_A; i <= PIPE_C; i++)
586 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
587 return true;
588}
589
590int
591intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
592{
593 struct intel_dp *intel_dp = &intel_dig_port->dp;
594 struct drm_device *dev = intel_dig_port->base.base.dev;
595 int ret;
596
597 intel_dp->can_mst = true;
598 intel_dp->mst_mgr.cbs = &mst_cbs;
599
600 /* create encoders */
601 intel_dp_create_fake_mst_encoders(intel_dig_port);
602 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
603 if (ret) {
604 intel_dp->can_mst = false;
605 return ret;
606 }
607 return 0;
608}
609
610void
611intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
612{
613 struct intel_dp *intel_dp = &intel_dig_port->dp;
614
615 if (!intel_dp->can_mst)
616 return;
617
618 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
619 /* encoders will get killed by normal cleanup */
620}