drm: Add colouring to the range allocator
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / gpu / drm / i915 / i915_gem_evict.c
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1/*
2 * Copyright © 2008-2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Chris Wilson <chris@chris-wilson.co.uuk>
26 *
27 */
28
29#include "drmP.h"
30#include "drm.h"
31#include "i915_drv.h"
32#include "i915_drm.h"
db53a302 33#include "i915_trace.h"
b47eb4a2 34
cd377ea9 35static bool
05394f39 36mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
b47eb4a2 37{
1b50247a
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38 if (obj->pin_count)
39 return false;
40
432e58ed 41 list_add(&obj->exec_list, unwind);
05394f39 42 return drm_mm_scan_add_block(obj->gtt_space);
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43}
44
45int
a6e0aa42 46i915_gem_evict_something(struct drm_device *dev, int min_size,
5eac3ab4 47 unsigned alignment, bool mappable)
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48{
49 drm_i915_private_t *dev_priv = dev->dev_private;
cd377ea9 50 struct list_head eviction_list, unwind_list;
05394f39 51 struct drm_i915_gem_object *obj;
cd377ea9 52 int ret = 0;
b47eb4a2 53
db53a302
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54 trace_i915_gem_evict(dev, min_size, alignment, mappable);
55
cd377ea9
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56 /*
57 * The goal is to evict objects and amalgamate space in LRU order.
58 * The oldest idle objects reside on the inactive list, which is in
59 * retirement order. The next objects to retire are those on the (per
60 * ring) active list that do not have an outstanding flush. Once the
61 * hardware reports completion (the seqno is updated after the
62 * batchbuffer has been finished) the clean buffer objects would
63 * be retired to the inactive list. Any dirty objects would be added
64 * to the tail of the flushing list. So after processing the clean
65 * active objects we need to emit a MI_FLUSH to retire the flushing
66 * list, hence the retirement order of the flushing list is in
67 * advance of the dirty objects on the active lists.
68 *
69 * The retirement sequence is thus:
70 * 1. Inactive objects (already retired)
71 * 2. Clean active objects
72 * 3. Flushing list
73 * 4. Dirty active objects.
74 *
75 * On each list, the oldest objects lie at the HEAD with the freshest
76 * object on the TAIL.
77 */
78
79 INIT_LIST_HEAD(&unwind_list);
a6e0aa42 80 if (mappable)
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81 drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
82 min_size, alignment, 0,
83 0, dev_priv->mm.gtt_mappable_end);
a6e0aa42 84 else
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85 drm_mm_init_scan(&dev_priv->mm.gtt_space,
86 min_size, alignment, 0);
cd377ea9
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87
88 /* First see if there is a large enough contiguous idle region... */
05394f39
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89 list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
90 if (mark_free(obj, &unwind_list))
cd377ea9
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91 goto found;
92 }
b47eb4a2 93
cd377ea9 94 /* Now merge in the soon-to-be-expired objects... */
05394f39 95 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
cd377ea9 96 /* Does the object require an outstanding flush? */
1b50247a 97 if (obj->base.write_domain)
b47eb4a2 98 continue;
b47eb4a2 99
05394f39 100 if (mark_free(obj, &unwind_list))
cd377ea9
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101 goto found;
102 }
b47eb4a2 103
cd377ea9 104 /* Finally add anything with a pending flush (in order of retirement) */
05394f39 105 list_for_each_entry(obj, &dev_priv->mm.flushing_list, mm_list) {
05394f39 106 if (mark_free(obj, &unwind_list))
cd377ea9
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107 goto found;
108 }
05394f39 109 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
1b50247a 110 if (!obj->base.write_domain)
b47eb4a2 111 continue;
b47eb4a2 112
05394f39 113 if (mark_free(obj, &unwind_list))
cd377ea9
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114 goto found;
115 }
116
117 /* Nothing found, clean up and bail out! */
092de6f2
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118 while (!list_empty(&unwind_list)) {
119 obj = list_first_entry(&unwind_list,
120 struct drm_i915_gem_object,
121 exec_list);
122
05394f39 123 ret = drm_mm_scan_remove_block(obj->gtt_space);
cd377ea9 124 BUG_ON(ret);
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125
126 list_del_init(&obj->exec_list);
cd377ea9
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127 }
128
129 /* We expect the caller to unpin, evict all and try again, or give up.
130 * So calling i915_gem_evict_everything() is unnecessary.
131 */
132 return -ENOSPC;
133
134found:
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135 /* drm_mm doesn't allow any other other operations while
136 * scanning, therefore store to be evicted objects on a
137 * temporary list. */
cd377ea9 138 INIT_LIST_HEAD(&eviction_list);
e39a0150 139 while (!list_empty(&unwind_list)) {
05394f39
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140 obj = list_first_entry(&unwind_list,
141 struct drm_i915_gem_object,
432e58ed 142 exec_list);
05394f39 143 if (drm_mm_scan_remove_block(obj->gtt_space)) {
432e58ed 144 list_move(&obj->exec_list, &eviction_list);
b6708242 145 drm_gem_object_reference(&obj->base);
e39a0150
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146 continue;
147 }
432e58ed 148 list_del_init(&obj->exec_list);
cd377ea9 149 }
b47eb4a2 150
cd377ea9 151 /* Unbinding will emit any required flushes */
e39a0150 152 while (!list_empty(&eviction_list)) {
05394f39
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153 obj = list_first_entry(&eviction_list,
154 struct drm_i915_gem_object,
432e58ed 155 exec_list);
e39a0150 156 if (ret == 0)
05394f39 157 ret = i915_gem_object_unbind(obj);
092de6f2 158
432e58ed 159 list_del_init(&obj->exec_list);
05394f39 160 drm_gem_object_unreference(&obj->base);
b47eb4a2 161 }
cd377ea9 162
e39a0150 163 return ret;
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164}
165
166int
5eac3ab4 167i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only)
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168{
169 drm_i915_private_t *dev_priv = dev->dev_private;
a39d7efc 170 struct drm_i915_gem_object *obj, *next;
b47eb4a2 171 bool lists_empty;
b4519513 172 int ret;
b47eb4a2 173
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174 lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
175 list_empty(&dev_priv->mm.flushing_list) &&
395b70be 176 list_empty(&dev_priv->mm.active_list));
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177 if (lists_empty)
178 return -ENOSPC;
179
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180 trace_i915_gem_evict_everything(dev, purgeable_only);
181
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182 /* The gpu_idle will flush everything in the write domain to the
183 * active list. Then we must move everything off the active list
184 * with retire requests.
185 */
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186 ret = i915_gpu_idle(dev);
187 if (ret)
188 return ret;
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189
190 i915_gem_retire_requests(dev);
191
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192 BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
193
a39d7efc 194 /* Having flushed everything, unbind() should never raise an error */
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195 list_for_each_entry_safe(obj, next,
196 &dev_priv->mm.inactive_list, mm_list) {
197 if (!purgeable_only || obj->madv != I915_MADV_WILLNEED) {
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198 if (obj->pin_count == 0)
199 WARN_ON(i915_gem_object_unbind(obj));
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200 }
201 }
202
b4519513 203 return 0;
b47eb4a2 204}