UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i810 / i810_dma.c
CommitLineData
1da177e4
LT
1/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
760285e7
DH
33#include <drm/drmP.h>
34#include <drm/i810_drm.h>
1da177e4
LT
35#include "i810_drv.h"
36#include <linux/interrupt.h> /* For task queue support */
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1da177e4
LT
39#include <linux/pagemap.h>
40
41#define I810_BUF_FREE 2
42#define I810_BUF_CLIENT 1
bc5f4523 43#define I810_BUF_HARDWARE 0
1da177e4
LT
44
45#define I810_BUF_UNMAPPED 0
46#define I810_BUF_MAPPED 1
47
056219e2 48static struct drm_buf *i810_freelist_get(struct drm_device * dev)
1da177e4 49{
cdd55a29 50 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
51 int i;
52 int used;
1da177e4
LT
53
54 /* Linear search might not be the best solution */
55
b5e89ed5 56 for (i = 0; i < dma->buf_count; i++) {
056219e2 57 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 59 /* In use is already a pointer */
b5e89ed5 60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
1da177e4 61 I810_BUF_CLIENT);
aca791c2 62 if (used == I810_BUF_FREE)
1da177e4 63 return buf;
1da177e4 64 }
b5e89ed5 65 return NULL;
1da177e4
LT
66}
67
68/* This should only be called if the buffer is not sent to the hardware
69 * yet, the hardware updates in use for us once its on the ring buffer.
70 */
71
aca791c2 72static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
1da177e4 73{
b5e89ed5
DA
74 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
75 int used;
1da177e4 76
b5e89ed5
DA
77 /* In use is already a pointer */
78 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
1da177e4 79 if (used != I810_BUF_CLIENT) {
b5e89ed5
DA
80 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
81 return -EINVAL;
1da177e4
LT
82 }
83
b5e89ed5 84 return 0;
1da177e4
LT
85}
86
c94f7029 87static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
1da177e4 88{
eddca551
DA
89 struct drm_file *priv = filp->private_data;
90 struct drm_device *dev;
b5e89ed5 91 drm_i810_private_t *dev_priv;
056219e2 92 struct drm_buf *buf;
1da177e4
LT
93 drm_i810_buf_priv_t *buf_priv;
94
2c14f28b 95 dev = priv->minor->dev;
1da177e4 96 dev_priv = dev->dev_private;
b5e89ed5 97 buf = dev_priv->mmap_buffer;
1da177e4
LT
98 buf_priv = buf->dev_private;
99
100 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
1da177e4 101
b5e89ed5 102 buf_priv->currently_mapped = I810_BUF_MAPPED;
1da177e4
LT
103
104 if (io_remap_pfn_range(vma, vma->vm_start,
3d77461e 105 vma->vm_pgoff,
b5e89ed5
DA
106 vma->vm_end - vma->vm_start, vma->vm_page_prot))
107 return -EAGAIN;
1da177e4
LT
108 return 0;
109}
110
2b8693c0 111static const struct file_operations i810_buffer_fops = {
b5e89ed5 112 .open = drm_open,
c94f7029 113 .release = drm_release,
1f692a14 114 .unlocked_ioctl = drm_ioctl,
b5e89ed5
DA
115 .mmap = i810_mmap_buffers,
116 .fasync = drm_fasync,
804d74ab
KP
117#ifdef CONFIG_COMPAT
118 .compat_ioctl = drm_compat_ioctl,
119#endif
6038f373 120 .llseek = noop_llseek,
c94f7029
DA
121};
122
aca791c2 123static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
1da177e4 124{
2c14f28b 125 struct drm_device *dev = file_priv->minor->dev;
1da177e4 126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 127 drm_i810_private_t *dev_priv = dev->dev_private;
99ac48f5 128 const struct file_operations *old_fops;
1da177e4
LT
129 int retcode = 0;
130
b5e89ed5 131 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1da177e4
LT
132 return -EINVAL;
133
6be5ceb0 134 /* This is all entirely broken */
6c340eac
EA
135 old_fops = file_priv->filp->f_op;
136 file_priv->filp->f_op = &i810_buffer_fops;
1da177e4 137 dev_priv->mmap_buffer = buf;
244ca2b4 138 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total,
b5e89ed5
DA
139 PROT_READ | PROT_WRITE,
140 MAP_SHARED, buf->bus_address);
1da177e4 141 dev_priv->mmap_buffer = NULL;
6c340eac 142 file_priv->filp->f_op = old_fops;
c7aed179 143 if (IS_ERR(buf_priv->virtual)) {
1da177e4
LT
144 /* Real error */
145 DRM_ERROR("mmap error\n");
c7aed179 146 retcode = PTR_ERR(buf_priv->virtual);
1da177e4
LT
147 buf_priv->virtual = NULL;
148 }
1da177e4
LT
149
150 return retcode;
151}
152
aca791c2 153static int i810_unmap_buffer(struct drm_buf *buf)
1da177e4
LT
154{
155 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
156 int retcode = 0;
157
158 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
159 return -EINVAL;
160
bfce281c 161 retcode = vm_munmap((unsigned long)buf_priv->virtual,
1da177e4 162 (size_t) buf->total);
1da177e4 163
b5e89ed5
DA
164 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
165 buf_priv->virtual = NULL;
1da177e4
LT
166
167 return retcode;
168}
169
aca791c2 170static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
6c340eac 171 struct drm_file *file_priv)
1da177e4 172{
056219e2 173 struct drm_buf *buf;
1da177e4
LT
174 drm_i810_buf_priv_t *buf_priv;
175 int retcode = 0;
176
177 buf = i810_freelist_get(dev);
178 if (!buf) {
179 retcode = -ENOMEM;
b5e89ed5 180 DRM_DEBUG("retcode=%d\n", retcode);
1da177e4
LT
181 return retcode;
182 }
183
6c340eac 184 retcode = i810_map_buffer(buf, file_priv);
1da177e4
LT
185 if (retcode) {
186 i810_freelist_put(dev, buf);
b5e89ed5 187 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
1da177e4
LT
188 return retcode;
189 }
6c340eac 190 buf->file_priv = file_priv;
1da177e4
LT
191 buf_priv = buf->dev_private;
192 d->granted = 1;
b5e89ed5
DA
193 d->request_idx = buf->idx;
194 d->request_size = buf->total;
195 d->virtual = buf_priv->virtual;
1da177e4
LT
196
197 return retcode;
198}
199
aca791c2 200static int i810_dma_cleanup(struct drm_device *dev)
1da177e4 201{
cdd55a29 202 struct drm_device_dma *dma = dev->dma;
1da177e4
LT
203
204 /* Make sure interrupts are disabled here because the uninstall ioctl
205 * may not have been called from userspace and after dev_private
206 * is freed, it's too late.
207 */
208 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
209 drm_irq_uninstall(dev);
210
211 if (dev->dev_private) {
212 int i;
b5e89ed5
DA
213 drm_i810_private_t *dev_priv =
214 (drm_i810_private_t *) dev->dev_private;
1da177e4 215
aca791c2 216 if (dev_priv->ring.virtual_start)
b9094d3a 217 drm_core_ioremapfree(&dev_priv->ring.map, dev);
b5e89ed5
DA
218 if (dev_priv->hw_status_page) {
219 pci_free_consistent(dev->pdev, PAGE_SIZE,
1da177e4
LT
220 dev_priv->hw_status_page,
221 dev_priv->dma_status_page);
1da177e4 222 }
9a298b2a 223 kfree(dev->dev_private);
b5e89ed5 224 dev->dev_private = NULL;
1da177e4
LT
225
226 for (i = 0; i < dma->buf_count; i++) {
056219e2 227 struct drm_buf *buf = dma->buflist[i];
1da177e4 228 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b9094d3a 229
b5e89ed5 230 if (buf_priv->kernel_virtual && buf->total)
b9094d3a 231 drm_core_ioremapfree(&buf_priv->map, dev);
1da177e4
LT
232 }
233 }
b5e89ed5 234 return 0;
1da177e4
LT
235}
236
aca791c2 237static int i810_wait_ring(struct drm_device *dev, int n)
1da177e4 238{
b5e89ed5
DA
239 drm_i810_private_t *dev_priv = dev->dev_private;
240 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
241 int iters = 0;
242 unsigned long end;
1da177e4
LT
243 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
244
b5e89ed5
DA
245 end = jiffies + (HZ * 3);
246 while (ring->space < n) {
247 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
248 ring->space = ring->head - (ring->tail + 8);
249 if (ring->space < 0)
250 ring->space += ring->Size;
251
1da177e4 252 if (ring->head != last_head) {
b5e89ed5 253 end = jiffies + (HZ * 3);
1da177e4
LT
254 last_head = ring->head;
255 }
b5e89ed5
DA
256
257 iters++;
1da177e4 258 if (time_before(end, jiffies)) {
b5e89ed5
DA
259 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
260 DRM_ERROR("lockup\n");
261 goto out_wait_ring;
1da177e4
LT
262 }
263 udelay(1);
264 }
265
aca791c2 266out_wait_ring:
b5e89ed5 267 return iters;
1da177e4
LT
268}
269
aca791c2 270static void i810_kernel_lost_context(struct drm_device *dev)
1da177e4 271{
b5e89ed5
DA
272 drm_i810_private_t *dev_priv = dev->dev_private;
273 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
1da177e4 274
b5e89ed5
DA
275 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
276 ring->tail = I810_READ(LP_RING + RING_TAIL);
277 ring->space = ring->head - (ring->tail + 8);
278 if (ring->space < 0)
279 ring->space += ring->Size;
1da177e4
LT
280}
281
aca791c2 282static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
1da177e4 283{
cdd55a29 284 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
285 int my_idx = 24;
286 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
287 int i;
1da177e4
LT
288
289 if (dma->buf_count > 1019) {
b5e89ed5
DA
290 /* Not enough space in the status page for the freelist */
291 return -EINVAL;
1da177e4
LT
292 }
293
b5e89ed5 294 for (i = 0; i < dma->buf_count; i++) {
056219e2 295 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 296 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 297
b5e89ed5
DA
298 buf_priv->in_use = hw_status++;
299 buf_priv->my_use_idx = my_idx;
300 my_idx += 4;
1da177e4 301
b5e89ed5 302 *buf_priv->in_use = I810_BUF_FREE;
1da177e4 303
b9094d3a
DA
304 buf_priv->map.offset = buf->bus_address;
305 buf_priv->map.size = buf->total;
306 buf_priv->map.type = _DRM_AGP;
307 buf_priv->map.flags = 0;
308 buf_priv->map.mtrr = 0;
309
310 drm_core_ioremap(&buf_priv->map, dev);
311 buf_priv->kernel_virtual = buf_priv->map.handle;
312
1da177e4
LT
313 }
314 return 0;
315}
316
aca791c2
NK
317static int i810_dma_initialize(struct drm_device *dev,
318 drm_i810_private_t *dev_priv,
319 drm_i810_init_t *init)
1da177e4 320{
55910517 321 struct drm_map_list *r_list;
b5e89ed5 322 memset(dev_priv, 0, sizeof(drm_i810_private_t));
1da177e4 323
bd1b331f 324 list_for_each_entry(r_list, &dev->maplist, head) {
1da177e4
LT
325 if (r_list->map &&
326 r_list->map->type == _DRM_SHM &&
b5e89ed5 327 r_list->map->flags & _DRM_CONTAINS_LOCK) {
1da177e4 328 dev_priv->sarea_map = r_list->map;
b5e89ed5
DA
329 break;
330 }
331 }
1da177e4
LT
332 if (!dev_priv->sarea_map) {
333 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
334 i810_dma_cleanup(dev);
335 DRM_ERROR("can not find sarea!\n");
336 return -EINVAL;
1da177e4
LT
337 }
338 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
339 if (!dev_priv->mmio_map) {
340 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
341 i810_dma_cleanup(dev);
342 DRM_ERROR("can not find mmio map!\n");
343 return -EINVAL;
1da177e4 344 }
d1f2b55a 345 dev->agp_buffer_token = init->buffers_offset;
1da177e4
LT
346 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
347 if (!dev->agp_buffer_map) {
348 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find dma buffer map!\n");
351 return -EINVAL;
1da177e4
LT
352 }
353
354 dev_priv->sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 355 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
1da177e4 356
b5e89ed5
DA
357 dev_priv->ring.Start = init->ring_start;
358 dev_priv->ring.End = init->ring_end;
359 dev_priv->ring.Size = init->ring_size;
1da177e4 360
b9094d3a
DA
361 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
362 dev_priv->ring.map.size = init->ring_size;
363 dev_priv->ring.map.type = _DRM_AGP;
364 dev_priv->ring.map.flags = 0;
365 dev_priv->ring.map.mtrr = 0;
1da177e4 366
b9094d3a
DA
367 drm_core_ioremap(&dev_priv->ring.map, dev);
368
369 if (dev_priv->ring.map.handle == NULL) {
b5e89ed5
DA
370 dev->dev_private = (void *)dev_priv;
371 i810_dma_cleanup(dev);
372 DRM_ERROR("can not ioremap virtual address for"
1da177e4 373 " ring buffer\n");
20caafa6 374 return -ENOMEM;
1da177e4
LT
375 }
376
b9094d3a
DA
377 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
378
b5e89ed5 379 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
1da177e4
LT
380
381 dev_priv->w = init->w;
382 dev_priv->h = init->h;
383 dev_priv->pitch = init->pitch;
384 dev_priv->back_offset = init->back_offset;
385 dev_priv->depth_offset = init->depth_offset;
386 dev_priv->front_offset = init->front_offset;
387
388 dev_priv->overlay_offset = init->overlay_offset;
389 dev_priv->overlay_physical = init->overlay_physical;
390
391 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
392 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
393 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
394
b5e89ed5
DA
395 /* Program Hardware Status Page */
396 dev_priv->hw_status_page =
397 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
398 &dev_priv->dma_status_page);
399 if (!dev_priv->hw_status_page) {
1da177e4
LT
400 dev->dev_private = (void *)dev_priv;
401 i810_dma_cleanup(dev);
402 DRM_ERROR("Can not allocate hardware status page\n");
403 return -ENOMEM;
404 }
b5e89ed5
DA
405 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
406 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
1da177e4
LT
407
408 I810_WRITE(0x02080, dev_priv->dma_status_page);
b5e89ed5 409 DRM_DEBUG("Enabled hardware status page\n");
1da177e4 410
b5e89ed5 411 /* Now we need to init our freelist */
1da177e4
LT
412 if (i810_freelist_init(dev, dev_priv) != 0) {
413 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
414 i810_dma_cleanup(dev);
415 DRM_ERROR("Not enough space in the status page for"
1da177e4 416 " the freelist\n");
b5e89ed5 417 return -ENOMEM;
1da177e4
LT
418 }
419 dev->dev_private = (void *)dev_priv;
420
b5e89ed5 421 return 0;
1da177e4
LT
422}
423
c153f45f
EA
424static int i810_dma_init(struct drm_device *dev, void *data,
425 struct drm_file *file_priv)
1da177e4 426{
b5e89ed5 427 drm_i810_private_t *dev_priv;
c153f45f 428 drm_i810_init_t *init = data;
b5e89ed5 429 int retcode = 0;
1da177e4 430
c153f45f 431 switch (init->func) {
b5e89ed5
DA
432 case I810_INIT_DMA_1_4:
433 DRM_INFO("Using v1.4 init.\n");
9a298b2a 434 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
b5e89ed5
DA
435 if (dev_priv == NULL)
436 return -ENOMEM;
c153f45f 437 retcode = i810_dma_initialize(dev, dev_priv, init);
b5e89ed5
DA
438 break;
439
440 case I810_CLEANUP_DMA:
441 DRM_INFO("DMA Cleanup\n");
442 retcode = i810_dma_cleanup(dev);
443 break;
c153f45f
EA
444 default:
445 return -EINVAL;
1da177e4
LT
446 }
447
b5e89ed5 448 return retcode;
1da177e4
LT
449}
450
1da177e4
LT
451/* Most efficient way to verify state for the i810 is as it is
452 * emitted. Non-conformant state is silently dropped.
453 *
454 * Use 'volatile' & local var tmp to force the emitted values to be
455 * identical to the verified ones.
456 */
aca791c2 457static void i810EmitContextVerified(struct drm_device *dev,
b5e89ed5 458 volatile unsigned int *code)
1da177e4 459{
b5e89ed5 460 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
461 int i, j = 0;
462 unsigned int tmp;
463 RING_LOCALS;
464
b5e89ed5 465 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
1da177e4 466
b5e89ed5
DA
467 OUT_RING(GFX_OP_COLOR_FACTOR);
468 OUT_RING(code[I810_CTXREG_CF1]);
1da177e4 469
b5e89ed5
DA
470 OUT_RING(GFX_OP_STIPPLE);
471 OUT_RING(code[I810_CTXREG_ST1]);
1da177e4 472
b5e89ed5 473 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
1da177e4
LT
474 tmp = code[i];
475
b5e89ed5
DA
476 if ((tmp & (7 << 29)) == (3 << 29) &&
477 (tmp & (0x1f << 24)) < (0x1d << 24)) {
478 OUT_RING(tmp);
1da177e4 479 j++;
b5e89ed5
DA
480 } else
481 printk("constext state dropped!!!\n");
1da177e4
LT
482 }
483
484 if (j & 1)
b5e89ed5 485 OUT_RING(0);
1da177e4
LT
486
487 ADVANCE_LP_RING();
488}
489
aca791c2 490static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
1da177e4 491{
b5e89ed5 492 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
493 int i, j = 0;
494 unsigned int tmp;
495 RING_LOCALS;
496
b5e89ed5 497 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
1da177e4 498
b5e89ed5
DA
499 OUT_RING(GFX_OP_MAP_INFO);
500 OUT_RING(code[I810_TEXREG_MI1]);
501 OUT_RING(code[I810_TEXREG_MI2]);
502 OUT_RING(code[I810_TEXREG_MI3]);
1da177e4 503
b5e89ed5 504 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
1da177e4
LT
505 tmp = code[i];
506
b5e89ed5
DA
507 if ((tmp & (7 << 29)) == (3 << 29) &&
508 (tmp & (0x1f << 24)) < (0x1d << 24)) {
509 OUT_RING(tmp);
1da177e4 510 j++;
b5e89ed5
DA
511 } else
512 printk("texture state dropped!!!\n");
1da177e4
LT
513 }
514
515 if (j & 1)
b5e89ed5 516 OUT_RING(0);
1da177e4
LT
517
518 ADVANCE_LP_RING();
519}
520
1da177e4
LT
521/* Need to do some additional checking when setting the dest buffer.
522 */
aca791c2 523static void i810EmitDestVerified(struct drm_device *dev,
b5e89ed5 524 volatile unsigned int *code)
1da177e4 525{
b5e89ed5 526 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
527 unsigned int tmp;
528 RING_LOCALS;
529
b5e89ed5 530 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
531
532 tmp = code[I810_DESTREG_DI1];
533 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
b5e89ed5
DA
534 OUT_RING(CMD_OP_DESTBUFFER_INFO);
535 OUT_RING(tmp);
1da177e4 536 } else
b5e89ed5
DA
537 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
538 tmp, dev_priv->front_di1, dev_priv->back_di1);
1da177e4
LT
539
540 /* invarient:
541 */
b5e89ed5
DA
542 OUT_RING(CMD_OP_Z_BUFFER_INFO);
543 OUT_RING(dev_priv->zi1);
1da177e4 544
b5e89ed5
DA
545 OUT_RING(GFX_OP_DESTBUFFER_VARS);
546 OUT_RING(code[I810_DESTREG_DV1]);
1da177e4 547
b5e89ed5
DA
548 OUT_RING(GFX_OP_DRAWRECT_INFO);
549 OUT_RING(code[I810_DESTREG_DR1]);
550 OUT_RING(code[I810_DESTREG_DR2]);
551 OUT_RING(code[I810_DESTREG_DR3]);
552 OUT_RING(code[I810_DESTREG_DR4]);
553 OUT_RING(0);
1da177e4
LT
554
555 ADVANCE_LP_RING();
556}
557
aca791c2 558static void i810EmitState(struct drm_device *dev)
1da177e4 559{
b5e89ed5
DA
560 drm_i810_private_t *dev_priv = dev->dev_private;
561 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 562 unsigned int dirty = sarea_priv->dirty;
b5e89ed5 563
3e684eae 564 DRM_DEBUG("%x\n", dirty);
1da177e4
LT
565
566 if (dirty & I810_UPLOAD_BUFFERS) {
b5e89ed5 567 i810EmitDestVerified(dev, sarea_priv->BufferState);
1da177e4
LT
568 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
569 }
570
571 if (dirty & I810_UPLOAD_CTX) {
b5e89ed5 572 i810EmitContextVerified(dev, sarea_priv->ContextState);
1da177e4
LT
573 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
574 }
575
576 if (dirty & I810_UPLOAD_TEX0) {
b5e89ed5 577 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
1da177e4
LT
578 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
579 }
580
581 if (dirty & I810_UPLOAD_TEX1) {
b5e89ed5 582 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
1da177e4
LT
583 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
584 }
585}
586
1da177e4
LT
587/* need to verify
588 */
aca791c2 589static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
b5e89ed5
DA
590 unsigned int clear_color,
591 unsigned int clear_zval)
1da177e4 592{
b5e89ed5
DA
593 drm_i810_private_t *dev_priv = dev->dev_private;
594 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 595 int nbox = sarea_priv->nbox;
eddca551 596 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
597 int pitch = dev_priv->pitch;
598 int cpp = 2;
599 int i;
600 RING_LOCALS;
b5e89ed5
DA
601
602 if (dev_priv->current_page == 1) {
603 unsigned int tmp = flags;
604
1da177e4 605 flags &= ~(I810_FRONT | I810_BACK);
b5e89ed5
DA
606 if (tmp & I810_FRONT)
607 flags |= I810_BACK;
608 if (tmp & I810_BACK)
609 flags |= I810_FRONT;
1da177e4
LT
610 }
611
b5e89ed5 612 i810_kernel_lost_context(dev);
1da177e4 613
b5e89ed5
DA
614 if (nbox > I810_NR_SAREA_CLIPRECTS)
615 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 616
b5e89ed5 617 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
618 unsigned int x = pbox->x1;
619 unsigned int y = pbox->y1;
620 unsigned int width = (pbox->x2 - x) * cpp;
621 unsigned int height = pbox->y2 - y;
622 unsigned int start = y * pitch + x * cpp;
623
624 if (pbox->x1 > pbox->x2 ||
625 pbox->y1 > pbox->y2 ||
b5e89ed5 626 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
627 continue;
628
b5e89ed5
DA
629 if (flags & I810_FRONT) {
630 BEGIN_LP_RING(6);
631 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
632 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
633 OUT_RING((height << 16) | width);
634 OUT_RING(start);
635 OUT_RING(clear_color);
636 OUT_RING(0);
1da177e4
LT
637 ADVANCE_LP_RING();
638 }
639
b5e89ed5
DA
640 if (flags & I810_BACK) {
641 BEGIN_LP_RING(6);
642 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
643 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
644 OUT_RING((height << 16) | width);
645 OUT_RING(dev_priv->back_offset + start);
646 OUT_RING(clear_color);
647 OUT_RING(0);
1da177e4
LT
648 ADVANCE_LP_RING();
649 }
650
b5e89ed5
DA
651 if (flags & I810_DEPTH) {
652 BEGIN_LP_RING(6);
653 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
654 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
655 OUT_RING((height << 16) | width);
656 OUT_RING(dev_priv->depth_offset + start);
657 OUT_RING(clear_zval);
658 OUT_RING(0);
1da177e4
LT
659 ADVANCE_LP_RING();
660 }
661 }
662}
663
aca791c2 664static void i810_dma_dispatch_swap(struct drm_device *dev)
1da177e4 665{
b5e89ed5
DA
666 drm_i810_private_t *dev_priv = dev->dev_private;
667 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 668 int nbox = sarea_priv->nbox;
eddca551 669 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
670 int pitch = dev_priv->pitch;
671 int cpp = 2;
672 int i;
673 RING_LOCALS;
674
675 DRM_DEBUG("swapbuffers\n");
676
b5e89ed5 677 i810_kernel_lost_context(dev);
1da177e4 678
b5e89ed5
DA
679 if (nbox > I810_NR_SAREA_CLIPRECTS)
680 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 681
b5e89ed5 682 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
683 unsigned int w = pbox->x2 - pbox->x1;
684 unsigned int h = pbox->y2 - pbox->y1;
b5e89ed5 685 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
1da177e4
LT
686 unsigned int start = dst;
687
688 if (pbox->x1 > pbox->x2 ||
689 pbox->y1 > pbox->y2 ||
b5e89ed5 690 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
691 continue;
692
b5e89ed5
DA
693 BEGIN_LP_RING(6);
694 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
695 OUT_RING(pitch | (0xCC << 16));
696 OUT_RING((h << 16) | (w * cpp));
1da177e4 697 if (dev_priv->current_page == 0)
b5e89ed5 698 OUT_RING(dev_priv->front_offset + start);
1da177e4 699 else
b5e89ed5
DA
700 OUT_RING(dev_priv->back_offset + start);
701 OUT_RING(pitch);
1da177e4 702 if (dev_priv->current_page == 0)
b5e89ed5 703 OUT_RING(dev_priv->back_offset + start);
1da177e4 704 else
b5e89ed5 705 OUT_RING(dev_priv->front_offset + start);
1da177e4
LT
706 ADVANCE_LP_RING();
707 }
708}
709
aca791c2
NK
710static void i810_dma_dispatch_vertex(struct drm_device *dev,
711 struct drm_buf *buf, int discard, int used)
1da177e4 712{
b5e89ed5 713 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4 714 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 715 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
eddca551 716 struct drm_clip_rect *box = sarea_priv->boxes;
b5e89ed5 717 int nbox = sarea_priv->nbox;
1da177e4
LT
718 unsigned long address = (unsigned long)buf->bus_address;
719 unsigned long start = address - dev->agp->base;
720 int i = 0;
b5e89ed5 721 RING_LOCALS;
1da177e4 722
b5e89ed5 723 i810_kernel_lost_context(dev);
1da177e4 724
b5e89ed5 725 if (nbox > I810_NR_SAREA_CLIPRECTS)
1da177e4
LT
726 nbox = I810_NR_SAREA_CLIPRECTS;
727
b5e89ed5 728 if (used > 4 * 1024)
1da177e4
LT
729 used = 0;
730
731 if (sarea_priv->dirty)
b5e89ed5 732 i810EmitState(dev);
1da177e4
LT
733
734 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
735 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
736
b5e89ed5
DA
737 *(u32 *) buf_priv->kernel_virtual =
738 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
1da177e4
LT
739
740 if (used & 4) {
c7aed179 741 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
1da177e4
LT
742 used += 4;
743 }
744
745 i810_unmap_buffer(buf);
746 }
747
748 if (used) {
749 do {
750 if (i < nbox) {
751 BEGIN_LP_RING(4);
b5e89ed5
DA
752 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
753 SC_ENABLE);
754 OUT_RING(GFX_OP_SCISSOR_INFO);
755 OUT_RING(box[i].x1 | (box[i].y1 << 16));
756 OUT_RING((box[i].x2 -
757 1) | ((box[i].y2 - 1) << 16));
1da177e4
LT
758 ADVANCE_LP_RING();
759 }
760
761 BEGIN_LP_RING(4);
b5e89ed5
DA
762 OUT_RING(CMD_OP_BATCH_BUFFER);
763 OUT_RING(start | BB1_PROTECTED);
764 OUT_RING(start + used - 4);
765 OUT_RING(0);
1da177e4
LT
766 ADVANCE_LP_RING();
767
768 } while (++i < nbox);
769 }
770
771 if (discard) {
772 dev_priv->counter++;
773
b5e89ed5
DA
774 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
775 I810_BUF_HARDWARE);
1da177e4
LT
776
777 BEGIN_LP_RING(8);
b5e89ed5
DA
778 OUT_RING(CMD_STORE_DWORD_IDX);
779 OUT_RING(20);
780 OUT_RING(dev_priv->counter);
781 OUT_RING(CMD_STORE_DWORD_IDX);
782 OUT_RING(buf_priv->my_use_idx);
783 OUT_RING(I810_BUF_FREE);
784 OUT_RING(CMD_REPORT_HEAD);
785 OUT_RING(0);
1da177e4
LT
786 ADVANCE_LP_RING();
787 }
788}
789
aca791c2 790static void i810_dma_dispatch_flip(struct drm_device *dev)
1da177e4 791{
b5e89ed5 792 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
793 int pitch = dev_priv->pitch;
794 RING_LOCALS;
795
3e684eae 796 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
b5e89ed5
DA
797 dev_priv->current_page,
798 dev_priv->sarea_priv->pf_current_page);
799
800 i810_kernel_lost_context(dev);
1da177e4 801
b5e89ed5
DA
802 BEGIN_LP_RING(2);
803 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
804 OUT_RING(0);
1da177e4
LT
805 ADVANCE_LP_RING();
806
b5e89ed5 807 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
808 /* On i815 at least ASYNC is buggy */
809 /* pitch<<5 is from 11.2.8 p158,
810 its the pitch / 8 then left shifted 8,
811 so (pitch >> 3) << 8 */
b5e89ed5
DA
812 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
813 if (dev_priv->current_page == 0) {
814 OUT_RING(dev_priv->back_offset);
1da177e4
LT
815 dev_priv->current_page = 1;
816 } else {
b5e89ed5 817 OUT_RING(dev_priv->front_offset);
1da177e4
LT
818 dev_priv->current_page = 0;
819 }
820 OUT_RING(0);
821 ADVANCE_LP_RING();
822
823 BEGIN_LP_RING(2);
b5e89ed5
DA
824 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
825 OUT_RING(0);
1da177e4
LT
826 ADVANCE_LP_RING();
827
828 /* Increment the frame counter. The client-side 3D driver must
829 * throttle the framerate by waiting for this value before
830 * performing the swapbuffer ioctl.
831 */
832 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
833
834}
835
aca791c2 836static void i810_dma_quiescent(struct drm_device *dev)
1da177e4 837{
b5e89ed5
DA
838 drm_i810_private_t *dev_priv = dev->dev_private;
839 RING_LOCALS;
1da177e4 840
b5e89ed5 841 i810_kernel_lost_context(dev);
1da177e4 842
b5e89ed5
DA
843 BEGIN_LP_RING(4);
844 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
845 OUT_RING(CMD_REPORT_HEAD);
846 OUT_RING(0);
847 OUT_RING(0);
848 ADVANCE_LP_RING();
1da177e4 849
b5e89ed5 850 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4
LT
851}
852
aca791c2 853static int i810_flush_queue(struct drm_device *dev)
1da177e4 854{
b5e89ed5 855 drm_i810_private_t *dev_priv = dev->dev_private;
cdd55a29 856 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
857 int i, ret = 0;
858 RING_LOCALS;
859
b5e89ed5 860 i810_kernel_lost_context(dev);
1da177e4 861
b5e89ed5
DA
862 BEGIN_LP_RING(2);
863 OUT_RING(CMD_REPORT_HEAD);
864 OUT_RING(0);
865 ADVANCE_LP_RING();
1da177e4 866
b5e89ed5 867 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4 868
b5e89ed5 869 for (i = 0; i < dma->buf_count; i++) {
056219e2 870 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 871 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4
LT
872
873 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
874 I810_BUF_FREE);
875
876 if (used == I810_BUF_HARDWARE)
877 DRM_DEBUG("reclaimed from HARDWARE\n");
878 if (used == I810_BUF_CLIENT)
879 DRM_DEBUG("still on client\n");
880 }
881
b5e89ed5 882 return ret;
1da177e4
LT
883}
884
885/* Must be called with the lock held */
d5346b37 886void i810_driver_reclaim_buffers(struct drm_device *dev,
6c340eac 887 struct drm_file *file_priv)
1da177e4 888{
cdd55a29 889 struct drm_device_dma *dma = dev->dma;
b5e89ed5 890 int i;
1da177e4 891
b5e89ed5
DA
892 if (!dma)
893 return;
894 if (!dev->dev_private)
895 return;
896 if (!dma->buflist)
897 return;
1da177e4 898
b5e89ed5 899 i810_flush_queue(dev);
1da177e4
LT
900
901 for (i = 0; i < dma->buf_count; i++) {
056219e2 902 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 903 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 904
6c340eac 905 if (buf->file_priv == file_priv && buf_priv) {
1da177e4
LT
906 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
907 I810_BUF_FREE);
908
909 if (used == I810_BUF_CLIENT)
910 DRM_DEBUG("reclaimed from client\n");
911 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
b5e89ed5 912 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1da177e4
LT
913 }
914 }
915}
916
c153f45f
EA
917static int i810_flush_ioctl(struct drm_device *dev, void *data,
918 struct drm_file *file_priv)
1da177e4 919{
6c340eac 920 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 921
b5e89ed5
DA
922 i810_flush_queue(dev);
923 return 0;
1da177e4
LT
924}
925
c153f45f
EA
926static int i810_dma_vertex(struct drm_device *dev, void *data,
927 struct drm_file *file_priv)
1da177e4 928{
cdd55a29 929 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
930 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
931 u32 *hw_status = dev_priv->hw_status_page;
932 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
933 dev_priv->sarea_priv;
c153f45f 934 drm_i810_vertex_t *vertex = data;
1da177e4 935
6c340eac 936 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 937
3e684eae 938 DRM_DEBUG("idx %d used %d discard %d\n",
c153f45f 939 vertex->idx, vertex->used, vertex->discard);
1da177e4 940
c153f45f 941 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1da177e4
LT
942 return -EINVAL;
943
b5e89ed5 944 i810_dma_dispatch_vertex(dev,
c153f45f
EA
945 dma->buflist[vertex->idx],
946 vertex->discard, vertex->used);
1da177e4 947
c153f45f 948 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 949 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
950 sarea_priv->last_enqueue = dev_priv->counter - 1;
951 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
952
953 return 0;
954}
955
c153f45f
EA
956static int i810_clear_bufs(struct drm_device *dev, void *data,
957 struct drm_file *file_priv)
1da177e4 958{
c153f45f 959 drm_i810_clear_t *clear = data;
1da177e4 960
6c340eac 961 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 962
b5e89ed5 963 /* GH: Someone's doing nasty things... */
aca791c2 964 if (!dev->dev_private)
b5e89ed5 965 return -EINVAL;
1da177e4 966
c153f45f
EA
967 i810_dma_dispatch_clear(dev, clear->flags,
968 clear->clear_color, clear->clear_depth);
b5e89ed5 969 return 0;
1da177e4
LT
970}
971
c153f45f
EA
972static int i810_swap_bufs(struct drm_device *dev, void *data,
973 struct drm_file *file_priv)
1da177e4 974{
3e684eae 975 DRM_DEBUG("\n");
1da177e4 976
6c340eac 977 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 978
b5e89ed5
DA
979 i810_dma_dispatch_swap(dev);
980 return 0;
1da177e4
LT
981}
982
c153f45f
EA
983static int i810_getage(struct drm_device *dev, void *data,
984 struct drm_file *file_priv)
1da177e4 985{
b5e89ed5
DA
986 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
987 u32 *hw_status = dev_priv->hw_status_page;
988 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
989 dev_priv->sarea_priv;
990
991 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
992 return 0;
993}
994
c153f45f
EA
995static int i810_getbuf(struct drm_device *dev, void *data,
996 struct drm_file *file_priv)
1da177e4 997{
b5e89ed5 998 int retcode = 0;
c153f45f 999 drm_i810_dma_t *d = data;
b5e89ed5
DA
1000 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1001 u32 *hw_status = dev_priv->hw_status_page;
1002 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1003 dev_priv->sarea_priv;
1004
6c340eac 1005 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1006
c153f45f 1007 d->granted = 0;
1da177e4 1008
c153f45f 1009 retcode = i810_dma_get_buffer(dev, d, file_priv);
1da177e4
LT
1010
1011 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
ba25f9dc 1012 task_pid_nr(current), retcode, d->granted);
1da177e4 1013
b5e89ed5 1014 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1015
1016 return retcode;
1017}
1018
c153f45f
EA
1019static int i810_copybuf(struct drm_device *dev, void *data,
1020 struct drm_file *file_priv)
1da177e4
LT
1021{
1022 /* Never copy - 2.4.x doesn't need it */
1023 return 0;
1024}
1025
c153f45f
EA
1026static int i810_docopy(struct drm_device *dev, void *data,
1027 struct drm_file *file_priv)
1da177e4
LT
1028{
1029 /* Never copy - 2.4.x doesn't need it */
1030 return 0;
1031}
1032
aca791c2 1033static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
b5e89ed5 1034 unsigned int last_render)
1da177e4
LT
1035{
1036 drm_i810_private_t *dev_priv = dev->dev_private;
1037 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1038 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1039 unsigned long address = (unsigned long)buf->bus_address;
1040 unsigned long start = address - dev->agp->base;
1041 int u;
1042 RING_LOCALS;
1043
1044 i810_kernel_lost_context(dev);
1045
b5e89ed5 1046 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
aca791c2 1047 if (u != I810_BUF_CLIENT)
1da177e4 1048 DRM_DEBUG("MC found buffer that isn't mine!\n");
1da177e4 1049
b5e89ed5 1050 if (used > 4 * 1024)
1da177e4
LT
1051 used = 0;
1052
1053 sarea_priv->dirty = 0x7f;
1054
3e684eae 1055 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1da177e4
LT
1056
1057 dev_priv->counter++;
1058 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1da177e4
LT
1059 DRM_DEBUG("start : %lx\n", start);
1060 DRM_DEBUG("used : %d\n", used);
1061 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1062
1063 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1064 if (used & 4) {
c7aed179 1065 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1da177e4
LT
1066 used += 4;
1067 }
1068
1069 i810_unmap_buffer(buf);
1070 }
1071 BEGIN_LP_RING(4);
b5e89ed5
DA
1072 OUT_RING(CMD_OP_BATCH_BUFFER);
1073 OUT_RING(start | BB1_PROTECTED);
1074 OUT_RING(start + used - 4);
1075 OUT_RING(0);
1da177e4
LT
1076 ADVANCE_LP_RING();
1077
1da177e4 1078 BEGIN_LP_RING(8);
b5e89ed5
DA
1079 OUT_RING(CMD_STORE_DWORD_IDX);
1080 OUT_RING(buf_priv->my_use_idx);
1081 OUT_RING(I810_BUF_FREE);
1082 OUT_RING(0);
1083
1084 OUT_RING(CMD_STORE_DWORD_IDX);
1085 OUT_RING(16);
1086 OUT_RING(last_render);
1087 OUT_RING(0);
1da177e4
LT
1088 ADVANCE_LP_RING();
1089}
1090
c153f45f
EA
1091static int i810_dma_mc(struct drm_device *dev, void *data,
1092 struct drm_file *file_priv)
1da177e4 1093{
cdd55a29 1094 struct drm_device_dma *dma = dev->dma;
b5e89ed5 1095 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4
LT
1096 u32 *hw_status = dev_priv->hw_status_page;
1097 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 1098 dev_priv->sarea_priv;
c153f45f 1099 drm_i810_mc_t *mc = data;
1da177e4 1100
6c340eac 1101 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1102
c153f45f 1103 if (mc->idx >= dma->buf_count || mc->idx < 0)
1da177e4
LT
1104 return -EINVAL;
1105
c153f45f
EA
1106 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1107 mc->last_render);
1da177e4 1108
c153f45f 1109 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 1110 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
1111 sarea_priv->last_enqueue = dev_priv->counter - 1;
1112 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1113
1114 return 0;
1115}
1116
c153f45f
EA
1117static int i810_rstatus(struct drm_device *dev, void *data,
1118 struct drm_file *file_priv)
1da177e4 1119{
b5e89ed5 1120 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1121
b5e89ed5 1122 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1da177e4
LT
1123}
1124
c153f45f
EA
1125static int i810_ov0_info(struct drm_device *dev, void *data,
1126 struct drm_file *file_priv)
1da177e4 1127{
b5e89ed5 1128 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
c153f45f
EA
1129 drm_i810_overlay_t *ov = data;
1130
1131 ov->offset = dev_priv->overlay_offset;
1132 ov->physical = dev_priv->overlay_physical;
1da177e4 1133
1da177e4
LT
1134 return 0;
1135}
1136
c153f45f
EA
1137static int i810_fstatus(struct drm_device *dev, void *data,
1138 struct drm_file *file_priv)
1da177e4 1139{
b5e89ed5 1140 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1141
6c340eac 1142 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
1143 return I810_READ(0x30008);
1144}
1145
c153f45f
EA
1146static int i810_ov0_flip(struct drm_device *dev, void *data,
1147 struct drm_file *file_priv)
1da177e4 1148{
b5e89ed5 1149 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1150
6c340eac 1151 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1152
aca791c2 1153 /* Tell the overlay to update */
b5e89ed5 1154 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1da177e4
LT
1155
1156 return 0;
1157}
1158
1da177e4 1159/* Not sure why this isn't set all the time:
b5e89ed5 1160 */
aca791c2 1161static void i810_do_init_pageflip(struct drm_device *dev)
1da177e4
LT
1162{
1163 drm_i810_private_t *dev_priv = dev->dev_private;
b5e89ed5 1164
3e684eae 1165 DRM_DEBUG("\n");
1da177e4
LT
1166 dev_priv->page_flipping = 1;
1167 dev_priv->current_page = 0;
1168 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1169}
1170
aca791c2 1171static int i810_do_cleanup_pageflip(struct drm_device *dev)
1da177e4
LT
1172{
1173 drm_i810_private_t *dev_priv = dev->dev_private;
1174
3e684eae 1175 DRM_DEBUG("\n");
1da177e4 1176 if (dev_priv->current_page != 0)
b5e89ed5 1177 i810_dma_dispatch_flip(dev);
1da177e4
LT
1178
1179 dev_priv->page_flipping = 0;
1180 return 0;
1181}
1182
c153f45f
EA
1183static int i810_flip_bufs(struct drm_device *dev, void *data,
1184 struct drm_file *file_priv)
1da177e4 1185{
1da177e4
LT
1186 drm_i810_private_t *dev_priv = dev->dev_private;
1187
3e684eae 1188 DRM_DEBUG("\n");
1da177e4 1189
6c340eac 1190 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1191
b5e89ed5
DA
1192 if (!dev_priv->page_flipping)
1193 i810_do_init_pageflip(dev);
1da177e4 1194
b5e89ed5
DA
1195 i810_dma_dispatch_flip(dev);
1196 return 0;
1da177e4
LT
1197}
1198
eddca551 1199int i810_driver_load(struct drm_device *dev, unsigned long flags)
22eae947
DA
1200{
1201 /* i810 has 4 more counters */
1202 dev->counters += 4;
1203 dev->types[6] = _DRM_STAT_IRQ;
1204 dev->types[7] = _DRM_STAT_PRIMARY;
1205 dev->types[8] = _DRM_STAT_SECONDARY;
1206 dev->types[9] = _DRM_STAT_DMA;
1207
466e69b8
DA
1208 pci_set_master(dev->pdev);
1209
22eae947
DA
1210 return 0;
1211}
1212
aca791c2 1213void i810_driver_lastclose(struct drm_device *dev)
1da177e4 1214{
b5e89ed5 1215 i810_dma_cleanup(dev);
1da177e4
LT
1216}
1217
aca791c2 1218void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1da177e4
LT
1219{
1220 if (dev->dev_private) {
1221 drm_i810_private_t *dev_priv = dev->dev_private;
aca791c2 1222 if (dev_priv->page_flipping)
1da177e4 1223 i810_do_cleanup_pageflip(dev);
1da177e4 1224 }
1da177e4 1225
d5346b37
DV
1226 if (file_priv->master && file_priv->master->lock.hw_lock) {
1227 drm_idlelock_take(&file_priv->master->lock);
1228 i810_driver_reclaim_buffers(dev, file_priv);
1229 drm_idlelock_release(&file_priv->master->lock);
1230 } else {
1231 /* master disappeared, clean up stuff anyway and hope nothing
1232 * goes wrong */
1233 i810_driver_reclaim_buffers(dev, file_priv);
1234 }
1235
1da177e4
LT
1236}
1237
aca791c2 1238int i810_driver_dma_quiescent(struct drm_device *dev)
1da177e4 1239{
b5e89ed5 1240 i810_dma_quiescent(dev);
1da177e4
LT
1241 return 0;
1242}
1243
c153f45f 1244struct drm_ioctl_desc i810_ioctls[] = {
1b2f1489
DA
1245 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1246 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1247 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1248 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1249 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1257 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1258 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1259 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1da177e4
LT
1260};
1261
1262int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
cda17380
DA
1263
1264/**
1265 * Determine if the device really is AGP or not.
1266 *
1267 * All Intel graphics chipsets are treated as AGP, even if they are really
1268 * PCI-e.
1269 *
1270 * \param dev The device to be tested.
1271 *
1272 * \returns
1273 * A value of 1 is always retured to indictate every i810 is AGP.
1274 */
aca791c2 1275int i810_driver_device_is_agp(struct drm_device *dev)
cda17380
DA
1276{
1277 return 1;
1278}