[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / drm_cache.c

/**************************************************************************
 *
 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 **************************************************************************/
/*
 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
 */

#include <linux/export.h>
#include <drm/drmP.h>

#if defined(CONFIG_X86)
static void
drm_clflush_page(struct page *page)
{
	uint8_t *page_virtual;
	unsigned int i;

	if (unlikely(page == NULL))
		return;

	page_virtual = kmap_atomic(page);
	for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
		clflush(page_virtual + i);
	kunmap_atomic(page_virtual);
}

static void drm_cache_flush_clflush(struct page *pages[],
				    unsigned long num_pages)
{
	unsigned long i;

	mb();
	for (i = 0; i < num_pages; i++)
		drm_clflush_page(*pages++);
	mb();
}

static void
drm_clflush_ipi_handler(void *null)
{
	wbinvd();
}
#endif

void
drm_clflush_pages(struct page *pages[], unsigned long num_pages)
{

#if defined(CONFIG_X86)
	if (cpu_has_clflush) {
		drm_cache_flush_clflush(pages, num_pages);
		return;
	}

	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
		printk(KERN_ERR "Timed out waiting for cache flush.\n");

#elif defined(__powerpc__)
	unsigned long i;
	for (i = 0; i < num_pages; i++) {
		struct page *page = pages[i];
		void *page_virtual;

		if (unlikely(page == NULL))
			continue;

		page_virtual = kmap_atomic(page);
		flush_dcache_range((unsigned long)page_virtual,
				   (unsigned long)page_virtual + PAGE_SIZE);
		kunmap_atomic(page_virtual);
	}
#else
	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
	WARN_ON_ONCE(1);
#endif
}
EXPORT_SYMBOL(drm_clflush_pages);

void
drm_clflush_virt_range(char *addr, unsigned long length)
{
#if defined(CONFIG_X86)
	if (cpu_has_clflush) {
		char *end = addr + length;
		mb();
		for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
			clflush(addr);
		clflush(end - 1);
		mb();
		return;
	}

	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
		printk(KERN_ERR "Timed out waiting for cache flush.\n");
#else
	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
	WARN_ON_ONCE(1);
#endif
}
EXPORT_SYMBOL(drm_clflush_virt_range);
Commit	Line	Data
673a394b EA	1	/**************************************************************************
	2	*
	3	* Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
	4	* All Rights Reserved.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the
	8	* "Software"), to deal in the Software without restriction, including
	9	* without limitation the rights to use, copy, modify, merge, publish,
	10	* distribute, sub license, and/or sell copies of the Software, and to
	11	* permit persons to whom the Software is furnished to do so, subject to
	12	* the following conditions:
	13	*
	14	* The above copyright notice and this permission notice (including the
	15	* next paragraph) shall be included in all copies or substantial portions
	16	* of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	21	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	22	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	23	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	24	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	25	*
	26	**************************************************************************/
	27	/*
	28	* Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
	29	*/
	30
2d1a8a48	31	#include <linux/export.h>
760285e7	32	#include <drm/drmP.h>
673a394b EA	33
	34	#if defined(CONFIG_X86)
	35	static void
	36	drm_clflush_page(struct page *page)
	37	{
	38	uint8_t *page_virtual;
	39	unsigned int i;
	40
	41	if (unlikely(page == NULL))
	42	return;
	43
1c9c20f6	44	page_virtual = kmap_atomic(page);
673a394b EA	45	for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
673a394b EA	46	clflush(page_virtual + i);
1c9c20f6	47	kunmap_atomic(page_virtual);
673a394b	48	}
673a394b	49
c9c97b8c DA	50	static void drm_cache_flush_clflush(struct page *pages[],
	51	unsigned long num_pages)
	52	{
	53	unsigned long i;
	54
	55	mb();
	56	for (i = 0; i < num_pages; i++)
	57	drm_clflush_page(*pages++);
	58	mb();
	59	}
	60
	61	static void
	62	drm_clflush_ipi_handler(void *null)
	63	{
	64	wbinvd();
	65	}
c9c97b8c	66	#endif
ed017d9f	67
673a394b EA	68	void
	69	drm_clflush_pages(struct page *pages[], unsigned long num_pages)
	70	{
	71
	72	#if defined(CONFIG_X86)
	73	if (cpu_has_clflush) {
c9c97b8c	74	drm_cache_flush_clflush(pages, num_pages);
673a394b EA	75	return;
673a394b EA	76	}
673a394b	77
c9c97b8c DA	78	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
	79	printk(KERN_ERR "Timed out waiting for cache flush.\n");
	80
	81	#elif defined(__powerpc__)
	82	unsigned long i;
	83	for (i = 0; i < num_pages; i++) {
	84	struct page *page = pages[i];
	85	void *page_virtual;
	86
	87	if (unlikely(page == NULL))
	88	continue;
	89
1c9c20f6	90	page_virtual = kmap_atomic(page);
c9c97b8c DA	91	flush_dcache_range((unsigned long)page_virtual,
c9c97b8c DA	92	(unsigned long)page_virtual + PAGE_SIZE);
1c9c20f6	93	kunmap_atomic(page_virtual);
c9c97b8c DA	94	}
c9c97b8c DA	95	#else
ed017d9f DA	96	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
ed017d9f DA	97	WARN_ON_ONCE(1);
e0f0754f	98	#endif
673a394b EA	99	}
673a394b EA	100	EXPORT_SYMBOL(drm_clflush_pages);
6d5cd9cb DV	101
	102	void
	103	drm_clflush_virt_range(char *addr, unsigned long length)
	104	{
	105	#if defined(CONFIG_X86)
	106	if (cpu_has_clflush) {
	107	char *end = addr + length;
	108	mb();
	109	for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
	110	clflush(addr);
	111	clflush(end - 1);
	112	mb();
	113	return;
	114	}
	115
	116	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
	117	printk(KERN_ERR "Timed out waiting for cache flush.\n");
	118	#else
	119	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
	120	WARN_ON_ONCE(1);
	121	#endif
	122	}
	123	EXPORT_SYMBOL(drm_clflush_virt_range);