[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpio / mcp23s08.c

/*
 * mcp23s08.c - SPI gpio expander driver
 */

#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/workqueue.h>
#include <linux/mutex.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/spi/mcp23s08.h>
#include <linux/slab.h>
#include <asm/byteorder.h>

/**
 * MCP types supported by driver
 */
#define MCP_TYPE_S08	0
#define MCP_TYPE_S17	1

/* Registers are all 8 bits wide.
 *
 * The mcp23s17 has twice as many bits, and can be configured to work
 * with either 16 bit registers or with two adjacent 8 bit banks.
 *
 * Also, there are I2C versions of both chips.
 */
#define MCP_IODIR	0x00		/* init/reset:  all ones */
#define MCP_IPOL	0x01
#define MCP_GPINTEN	0x02
#define MCP_DEFVAL	0x03
#define MCP_INTCON	0x04
#define MCP_IOCON	0x05
#	define IOCON_SEQOP	(1 << 5)
#	define IOCON_HAEN	(1 << 3)
#	define IOCON_ODR	(1 << 2)
#	define IOCON_INTPOL	(1 << 1)
#define MCP_GPPU	0x06
#define MCP_INTF	0x07
#define MCP_INTCAP	0x08
#define MCP_GPIO	0x09
#define MCP_OLAT	0x0a

struct mcp23s08;

struct mcp23s08_ops {
	int	(*read)(struct mcp23s08 *mcp, unsigned reg);
	int	(*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
	int	(*read_regs)(struct mcp23s08 *mcp, unsigned reg,
			     u16 *vals, unsigned n);
};

struct mcp23s08 {
	struct spi_device	*spi;
	u8			addr;

	u16			cache[11];
	/* lock protects the cached values */
	struct mutex		lock;

	struct gpio_chip	chip;

	struct work_struct	work;

	const struct mcp23s08_ops	*ops;
};

/* A given spi_device can represent up to eight mcp23sxx chips
 * sharing the same chipselect but using different addresses
 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
 * Driver data holds all the per-chip data.
 */
struct mcp23s08_driver_data {
	unsigned		ngpio;
	struct mcp23s08		*mcp[8];
	struct mcp23s08		chip[];
};

static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
{
	u8	tx[2], rx[1];
	int	status;

	tx[0] = mcp->addr | 0x01;
	tx[1] = reg;
	status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
	return (status < 0) ? status : rx[0];
}

static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
{
	u8	tx[3];

	tx[0] = mcp->addr;
	tx[1] = reg;
	tx[2] = val;
	return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
}

static int
mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
{
	u8	tx[2], *tmp;
	int	status;

	if ((n + reg) > sizeof mcp->cache)
		return -EINVAL;
	tx[0] = mcp->addr | 0x01;
	tx[1] = reg;

	tmp = (u8 *)vals;
	status = spi_write_then_read(mcp->spi, tx, sizeof tx, tmp, n);
	if (status >= 0) {
		while (n--)
			vals[n] = tmp[n]; /* expand to 16bit */
	}
	return status;
}

static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
{
	u8	tx[2], rx[2];
	int	status;

	tx[0] = mcp->addr | 0x01;
	tx[1] = reg << 1;
	status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
	return (status < 0) ? status : (rx[0] | (rx[1] << 8));
}

static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
{
	u8	tx[4];

	tx[0] = mcp->addr;
	tx[1] = reg << 1;
	tx[2] = val;
	tx[3] = val >> 8;
	return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
}

static int
mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
{
	u8	tx[2];
	int	status;

	if ((n + reg) > sizeof mcp->cache)
		return -EINVAL;
	tx[0] = mcp->addr | 0x01;
	tx[1] = reg << 1;

	status = spi_write_then_read(mcp->spi, tx, sizeof tx,
				     (u8 *)vals, n * 2);
	if (status >= 0) {
		while (n--)
			vals[n] = __le16_to_cpu((__le16)vals[n]);
	}

	return status;
}

static const struct mcp23s08_ops mcp23s08_ops = {
	.read		= mcp23s08_read,
	.write		= mcp23s08_write,
	.read_regs	= mcp23s08_read_regs,
};

static const struct mcp23s08_ops mcp23s17_ops = {
	.read		= mcp23s17_read,
	.write		= mcp23s17_write,
	.read_regs	= mcp23s17_read_regs,
};


/*----------------------------------------------------------------------*/

static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
{
	struct mcp23s08	*mcp = container_of(chip, struct mcp23s08, chip);
	int status;

	mutex_lock(&mcp->lock);
	mcp->cache[MCP_IODIR] |= (1 << offset);
	status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
	mutex_unlock(&mcp->lock);
	return status;
}

static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
{
	struct mcp23s08	*mcp = container_of(chip, struct mcp23s08, chip);
	int status;

	mutex_lock(&mcp->lock);

	/* REVISIT reading this clears any IRQ ... */
	status = mcp->ops->read(mcp, MCP_GPIO);
	if (status < 0)
		status = 0;
	else {
		mcp->cache[MCP_GPIO] = status;
		status = !!(status & (1 << offset));
	}
	mutex_unlock(&mcp->lock);
	return status;
}

static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
{
	unsigned olat = mcp->cache[MCP_OLAT];

	if (value)
		olat |= mask;
	else
		olat &= ~mask;
	mcp->cache[MCP_OLAT] = olat;
	return mcp->ops->write(mcp, MCP_OLAT, olat);
}

static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
{
	struct mcp23s08	*mcp = container_of(chip, struct mcp23s08, chip);
	unsigned mask = 1 << offset;

	mutex_lock(&mcp->lock);
	__mcp23s08_set(mcp, mask, value);
	mutex_unlock(&mcp->lock);
}

static int
mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
{
	struct mcp23s08	*mcp = container_of(chip, struct mcp23s08, chip);
	unsigned mask = 1 << offset;
	int status;

	mutex_lock(&mcp->lock);
	status = __mcp23s08_set(mcp, mask, value);
	if (status == 0) {
		mcp->cache[MCP_IODIR] &= ~mask;
		status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
	}
	mutex_unlock(&mcp->lock);
	return status;
}

/*----------------------------------------------------------------------*/

#ifdef CONFIG_DEBUG_FS

#include <linux/seq_file.h>

/*
 * This shows more info than the generic gpio dump code:
 * pullups, deglitching, open drain drive.
 */
static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
	struct mcp23s08	*mcp;
	char		bank;
	int		t;
	unsigned	mask;

	mcp = container_of(chip, struct mcp23s08, chip);

	/* NOTE: we only handle one bank for now ... */
	bank = '0' + ((mcp->addr >> 1) & 0x7);

	mutex_lock(&mcp->lock);
	t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
	if (t < 0) {
		seq_printf(s, " I/O ERROR %d\n", t);
		goto done;
	}

	for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
		const char	*label;

		label = gpiochip_is_requested(chip, t);
		if (!label)
			continue;

		seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
			chip->base + t, bank, t, label,
			(mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
			(mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
			(mcp->cache[MCP_GPPU] & mask) ? "  " : "up");
		/* NOTE:  ignoring the irq-related registers */
		seq_printf(s, "\n");
	}
done:
	mutex_unlock(&mcp->lock);
}

#else
#define mcp23s08_dbg_show	NULL
#endif

/*----------------------------------------------------------------------*/

static int mcp23s08_probe_one(struct spi_device *spi, unsigned addr,
			      unsigned type, unsigned base, unsigned pullups)
{
	struct mcp23s08_driver_data	*data = spi_get_drvdata(spi);
	struct mcp23s08			*mcp = data->mcp[addr];
	int				status;

	mutex_init(&mcp->lock);

	mcp->spi = spi;
	mcp->addr = 0x40 | (addr << 1);

	mcp->chip.direction_input = mcp23s08_direction_input;
	mcp->chip.get = mcp23s08_get;
	mcp->chip.direction_output = mcp23s08_direction_output;
	mcp->chip.set = mcp23s08_set;
	mcp->chip.dbg_show = mcp23s08_dbg_show;

	if (type == MCP_TYPE_S17) {
		mcp->ops = &mcp23s17_ops;
		mcp->chip.ngpio = 16;
		mcp->chip.label = "mcp23s17";
	} else {
		mcp->ops = &mcp23s08_ops;
		mcp->chip.ngpio = 8;
		mcp->chip.label = "mcp23s08";
	}
	mcp->chip.base = base;
	mcp->chip.can_sleep = 1;
	mcp->chip.dev = &spi->dev;
	mcp->chip.owner = THIS_MODULE;

	/* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
	 * and MCP_IOCON.HAEN = 1, so we work with all chips.
	 */
	status = mcp->ops->read(mcp, MCP_IOCON);
	if (status < 0)
		goto fail;
	if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) {
		/* mcp23s17 has IOCON twice, make sure they are in sync */
		status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
		status |= IOCON_HAEN | (IOCON_HAEN << 8);
		status = mcp->ops->write(mcp, MCP_IOCON, status);
		if (status < 0)
			goto fail;
	}

	/* configure ~100K pullups */
	status = mcp->ops->write(mcp, MCP_GPPU, pullups);
	if (status < 0)
		goto fail;

	status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
	if (status < 0)
		goto fail;

	/* disable inverter on input */
	if (mcp->cache[MCP_IPOL] != 0) {
		mcp->cache[MCP_IPOL] = 0;
		status = mcp->ops->write(mcp, MCP_IPOL, 0);
		if (status < 0)
			goto fail;
	}

	/* disable irqs */
	if (mcp->cache[MCP_GPINTEN] != 0) {
		mcp->cache[MCP_GPINTEN] = 0;
		status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
		if (status < 0)
			goto fail;
	}

	status = gpiochip_add(&mcp->chip);
fail:
	if (status < 0)
		dev_dbg(&spi->dev, "can't setup chip %d, --> %d\n",
				addr, status);
	return status;
}

static int mcp23s08_probe(struct spi_device *spi)
{
	struct mcp23s08_platform_data	*pdata;
	unsigned			addr;
	unsigned			chips = 0;
	struct mcp23s08_driver_data	*data;
	int				status, type;
	unsigned			base;

	type = spi_get_device_id(spi)->driver_data;

	pdata = spi->dev.platform_data;
	if (!pdata || !gpio_is_valid(pdata->base)) {
		dev_dbg(&spi->dev, "invalid or missing platform data\n");
		return -EINVAL;
	}

	for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
		if (!pdata->chip[addr].is_present)
			continue;
		chips++;
		if ((type == MCP_TYPE_S08) && (addr > 3)) {
			dev_err(&spi->dev,
				"mcp23s08 only supports address 0..3\n");
			return -EINVAL;
		}
	}
	if (!chips)
		return -ENODEV;

	data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08),
			GFP_KERNEL);
	if (!data)
		return -ENOMEM;
	spi_set_drvdata(spi, data);

	base = pdata->base;
	for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
		if (!pdata->chip[addr].is_present)
			continue;
		chips--;
		data->mcp[addr] = &data->chip[chips];
		status = mcp23s08_probe_one(spi, addr, type, base,
					    pdata->chip[addr].pullups);
		if (status < 0)
			goto fail;

		base += (type == MCP_TYPE_S17) ? 16 : 8;
	}
	data->ngpio = base - pdata->base;

	/* NOTE:  these chips have a relatively sane IRQ framework, with
	 * per-signal masking and level/edge triggering.  It's not yet
	 * handled here...
	 */

	if (pdata->setup) {
		status = pdata->setup(spi,
				pdata->base, data->ngpio,
				pdata->context);
		if (status < 0)
			dev_dbg(&spi->dev, "setup --> %d\n", status);
	}

	return 0;

fail:
	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
		int tmp;

		if (!data->mcp[addr])
			continue;
		tmp = gpiochip_remove(&data->mcp[addr]->chip);
		if (tmp < 0)
			dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
	}
	kfree(data);
	return status;
}

static int mcp23s08_remove(struct spi_device *spi)
{
	struct mcp23s08_driver_data	*data = spi_get_drvdata(spi);
	struct mcp23s08_platform_data	*pdata = spi->dev.platform_data;
	unsigned			addr;
	int				status = 0;

	if (pdata->teardown) {
		status = pdata->teardown(spi,
				pdata->base, data->ngpio,
				pdata->context);
		if (status < 0) {
			dev_err(&spi->dev, "%s --> %d\n", "teardown", status);
			return status;
		}
	}

	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
		int tmp;

		if (!data->mcp[addr])
			continue;

		tmp = gpiochip_remove(&data->mcp[addr]->chip);
		if (tmp < 0) {
			dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
			status = tmp;
		}
	}
	if (status == 0)
		kfree(data);
	return status;
}

static const struct spi_device_id mcp23s08_ids[] = {
	{ "mcp23s08", MCP_TYPE_S08 },
	{ "mcp23s17", MCP_TYPE_S17 },
	{ },
};
MODULE_DEVICE_TABLE(spi, mcp23s08_ids);

static struct spi_driver mcp23s08_driver = {
	.probe		= mcp23s08_probe,
	.remove		= mcp23s08_remove,
	.id_table	= mcp23s08_ids,
	.driver = {
		.name	= "mcp23s08",
		.owner	= THIS_MODULE,
	},
};

/*----------------------------------------------------------------------*/

static int __init mcp23s08_init(void)
{
	return spi_register_driver(&mcp23s08_driver);
}
/* register after spi postcore initcall and before
 * subsys initcalls that may rely on these GPIOs
 */
subsys_initcall(mcp23s08_init);

static void __exit mcp23s08_exit(void)
{
	spi_unregister_driver(&mcp23s08_driver);
}
module_exit(mcp23s08_exit);

MODULE_LICENSE("GPL");
Commit	Line	Data
e58b9e27 DB	1	/*
	2	* mcp23s08.c - SPI gpio expander driver
	3	*/
	4
	5	#include <linux/kernel.h>
	6	#include <linux/device.h>
	7	#include <linux/workqueue.h>
	8	#include <linux/mutex.h>
d120c17f	9	#include <linux/gpio.h>
e58b9e27 DB	10	#include <linux/spi/spi.h>
e58b9e27 DB	11	#include <linux/spi/mcp23s08.h>
5a0e3ad6	12	#include <linux/slab.h>
0b7bb77f	13	#include <asm/byteorder.h>
e58b9e27	14
0b7bb77f PK	15	/**
	16	* MCP types supported by driver
	17	*/
	18	#define MCP_TYPE_S08 0
	19	#define MCP_TYPE_S17 1
e58b9e27 DB	20
	21	/* Registers are all 8 bits wide.
	22	*
	23	* The mcp23s17 has twice as many bits, and can be configured to work
	24	* with either 16 bit registers or with two adjacent 8 bit banks.
	25	*
	26	* Also, there are I2C versions of both chips.
	27	*/
	28	#define MCP_IODIR 0x00 /* init/reset: all ones */
	29	#define MCP_IPOL 0x01
	30	#define MCP_GPINTEN 0x02
	31	#define MCP_DEFVAL 0x03
	32	#define MCP_INTCON 0x04
	33	#define MCP_IOCON 0x05
	34	# define IOCON_SEQOP (1 << 5)
	35	# define IOCON_HAEN (1 << 3)
	36	# define IOCON_ODR (1 << 2)
	37	# define IOCON_INTPOL (1 << 1)
	38	#define MCP_GPPU 0x06
	39	#define MCP_INTF 0x07
	40	#define MCP_INTCAP 0x08
	41	#define MCP_GPIO 0x09
	42	#define MCP_OLAT 0x0a
	43
0b7bb77f PK	44	struct mcp23s08;
	45
	46	struct mcp23s08_ops {
	47	int (read)(struct mcp23s08 mcp, unsigned reg);
	48	int (write)(struct mcp23s08 mcp, unsigned reg, unsigned val);
	49	int (read_regs)(struct mcp23s08 mcp, unsigned reg,
	50	u16 *vals, unsigned n);
	51	};
	52
e58b9e27 DB	53	struct mcp23s08 {
	54	struct spi_device *spi;
	55	u8 addr;
	56
0b7bb77f	57	u16 cache[11];
e58b9e27 DB	58	/* lock protects the cached values */
e58b9e27 DB	59	struct mutex lock;
e58b9e27 DB	60
	61	struct gpio_chip chip;
	62
	63	struct work_struct work;
0b7bb77f PK	64
0b7bb77f PK	65	const struct mcp23s08_ops *ops;
e58b9e27 DB	66	};
e58b9e27 DB	67
0b7bb77f	68	/* A given spi_device can represent up to eight mcp23sxx chips
8f1cc3b1 DB	69	* sharing the same chipselect but using different addresses
	70	* (e.g. chips #0 and #3 might be populated, but not #1 or $2).
	71	* Driver data holds all the per-chip data.
	72	*/
	73	struct mcp23s08_driver_data {
	74	unsigned ngpio;
0b7bb77f	75	struct mcp23s08 *mcp[8];
8f1cc3b1 DB	76	struct mcp23s08 chip[];
	77	};
	78
e58b9e27 DB	79	static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
	80	{
	81	u8 tx[2], rx[1];
	82	int status;
	83
	84	tx[0] = mcp->addr \| 0x01;
	85	tx[1] = reg;
	86	status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
	87	return (status < 0) ? status : rx[0];
	88	}
	89
0b7bb77f	90	static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
e58b9e27 DB	91	{
	92	u8 tx[3];
	93
	94	tx[0] = mcp->addr;
	95	tx[1] = reg;
	96	tx[2] = val;
	97	return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
	98	}
	99
	100	static int
0b7bb77f	101	mcp23s08_read_regs(struct mcp23s08 mcp, unsigned reg, u16 vals, unsigned n)
e58b9e27	102	{
0b7bb77f PK	103	u8 tx[2], *tmp;
0b7bb77f PK	104	int status;
e58b9e27 DB	105
	106	if ((n + reg) > sizeof mcp->cache)
	107	return -EINVAL;
	108	tx[0] = mcp->addr \| 0x01;
	109	tx[1] = reg;
0b7bb77f PK	110
	111	tmp = (u8 *)vals;
	112	status = spi_write_then_read(mcp->spi, tx, sizeof tx, tmp, n);
	113	if (status >= 0) {
	114	while (n--)
	115	vals[n] = tmp[n]; /* expand to 16bit */
	116	}
	117	return status;
	118	}
	119
	120	static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
	121	{
	122	u8 tx[2], rx[2];
	123	int status;
	124
	125	tx[0] = mcp->addr \| 0x01;
	126	tx[1] = reg << 1;
	127	status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
	128	return (status < 0) ? status : (rx[0] \| (rx[1] << 8));
	129	}
	130
	131	static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
	132	{
	133	u8 tx[4];
	134
	135	tx[0] = mcp->addr;
	136	tx[1] = reg << 1;
	137	tx[2] = val;
	138	tx[3] = val >> 8;
	139	return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
	140	}
	141
	142	static int
	143	mcp23s17_read_regs(struct mcp23s08 mcp, unsigned reg, u16 vals, unsigned n)
	144	{
	145	u8 tx[2];
	146	int status;
	147
	148	if ((n + reg) > sizeof mcp->cache)
	149	return -EINVAL;
	150	tx[0] = mcp->addr \| 0x01;
	151	tx[1] = reg << 1;
	152
	153	status = spi_write_then_read(mcp->spi, tx, sizeof tx,
	154	(u8 )vals, n 2);
	155	if (status >= 0) {
	156	while (n--)
	157	vals[n] = __le16_to_cpu((__le16)vals[n]);
	158	}
	159
	160	return status;
e58b9e27 DB	161	}
e58b9e27 DB	162
0b7bb77f PK	163	static const struct mcp23s08_ops mcp23s08_ops = {
	164	.read = mcp23s08_read,
	165	.write = mcp23s08_write,
	166	.read_regs = mcp23s08_read_regs,
	167	};
	168
	169	static const struct mcp23s08_ops mcp23s17_ops = {
	170	.read = mcp23s17_read,
	171	.write = mcp23s17_write,
	172	.read_regs = mcp23s17_read_regs,
	173	};
	174
	175
e58b9e27 DB	176	/----------------------------------------------------------------------/
	177
	178	static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
	179	{
	180	struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
	181	int status;
	182
	183	mutex_lock(&mcp->lock);
	184	mcp->cache[MCP_IODIR] \|= (1 << offset);
0b7bb77f	185	status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27 DB	186	mutex_unlock(&mcp->lock);
	187	return status;
	188	}
	189
	190	static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
	191	{
	192	struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
	193	int status;
	194
	195	mutex_lock(&mcp->lock);
	196
	197	/* REVISIT reading this clears any IRQ ... */
0b7bb77f	198	status = mcp->ops->read(mcp, MCP_GPIO);
e58b9e27 DB	199	if (status < 0)
	200	status = 0;
	201	else {
	202	mcp->cache[MCP_GPIO] = status;
	203	status = !!(status & (1 << offset));
	204	}
	205	mutex_unlock(&mcp->lock);
	206	return status;
	207	}
	208
	209	static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
	210	{
0b7bb77f	211	unsigned olat = mcp->cache[MCP_OLAT];
e58b9e27 DB	212
	213	if (value)
	214	olat \|= mask;
	215	else
	216	olat &= ~mask;
	217	mcp->cache[MCP_OLAT] = olat;
0b7bb77f	218	return mcp->ops->write(mcp, MCP_OLAT, olat);
e58b9e27 DB	219	}
	220
	221	static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
	222	{
	223	struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f	224	unsigned mask = 1 << offset;
e58b9e27 DB	225
	226	mutex_lock(&mcp->lock);
	227	__mcp23s08_set(mcp, mask, value);
	228	mutex_unlock(&mcp->lock);
	229	}
	230
	231	static int
	232	mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
	233	{
	234	struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f	235	unsigned mask = 1 << offset;
e58b9e27 DB	236	int status;
	237
	238	mutex_lock(&mcp->lock);
	239	status = __mcp23s08_set(mcp, mask, value);
	240	if (status == 0) {
	241	mcp->cache[MCP_IODIR] &= ~mask;
0b7bb77f	242	status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27 DB	243	}
	244	mutex_unlock(&mcp->lock);
	245	return status;
	246	}
	247
	248	/----------------------------------------------------------------------/
	249
	250	#ifdef CONFIG_DEBUG_FS
	251
	252	#include <linux/seq_file.h>
	253
	254	/*
	255	* This shows more info than the generic gpio dump code:
	256	* pullups, deglitching, open drain drive.
	257	*/
	258	static void mcp23s08_dbg_show(struct seq_file s, struct gpio_chip chip)
	259	{
	260	struct mcp23s08 *mcp;
	261	char bank;
1d1c1d9b	262	int t;
e58b9e27 DB	263	unsigned mask;
	264
	265	mcp = container_of(chip, struct mcp23s08, chip);
	266
	267	/* NOTE: we only handle one bank for now ... */
0b7bb77f	268	bank = '0' + ((mcp->addr >> 1) & 0x7);
e58b9e27 DB	269
e58b9e27 DB	270	mutex_lock(&mcp->lock);
0b7bb77f	271	t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27 DB	272	if (t < 0) {
	273	seq_printf(s, " I/O ERROR %d\n", t);
	274	goto done;
	275	}
	276
0b7bb77f	277	for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
e58b9e27 DB	278	const char *label;
	279
	280	label = gpiochip_is_requested(chip, t);
	281	if (!label)
	282	continue;
	283
	284	seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
	285	chip->base + t, bank, t, label,
	286	(mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
	287	(mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
	288	(mcp->cache[MCP_GPPU] & mask) ? " " : "up");
	289	/* NOTE: ignoring the irq-related registers */
	290	seq_printf(s, "\n");
	291	}
	292	done:
	293	mutex_unlock(&mcp->lock);
	294	}
	295
	296	#else
	297	#define mcp23s08_dbg_show NULL
	298	#endif
	299
	300	/----------------------------------------------------------------------/
	301
8f1cc3b1	302	static int mcp23s08_probe_one(struct spi_device *spi, unsigned addr,
0b7bb77f	303	unsigned type, unsigned base, unsigned pullups)
e58b9e27	304	{
8f1cc3b1 DB	305	struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
8f1cc3b1 DB	306	struct mcp23s08 *mcp = data->mcp[addr];
e58b9e27	307	int status;
e58b9e27	308
e58b9e27 DB	309	mutex_init(&mcp->lock);
	310
	311	mcp->spi = spi;
8f1cc3b1	312	mcp->addr = 0x40 \| (addr << 1);
e58b9e27	313
e58b9e27 DB	314	mcp->chip.direction_input = mcp23s08_direction_input;
	315	mcp->chip.get = mcp23s08_get;
	316	mcp->chip.direction_output = mcp23s08_direction_output;
	317	mcp->chip.set = mcp23s08_set;
	318	mcp->chip.dbg_show = mcp23s08_dbg_show;
	319
0b7bb77f PK	320	if (type == MCP_TYPE_S17) {
	321	mcp->ops = &mcp23s17_ops;
	322	mcp->chip.ngpio = 16;
	323	mcp->chip.label = "mcp23s17";
	324	} else {
	325	mcp->ops = &mcp23s08_ops;
	326	mcp->chip.ngpio = 8;
	327	mcp->chip.label = "mcp23s08";
	328	}
8f1cc3b1	329	mcp->chip.base = base;
e58b9e27	330	mcp->chip.can_sleep = 1;
d8f388d8	331	mcp->chip.dev = &spi->dev;
d72cbed0	332	mcp->chip.owner = THIS_MODULE;
e58b9e27	333
8f1cc3b1 DB	334	/* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
	335	* and MCP_IOCON.HAEN = 1, so we work with all chips.
	336	*/
0b7bb77f	337	status = mcp->ops->read(mcp, MCP_IOCON);
e58b9e27 DB	338	if (status < 0)
e58b9e27 DB	339	goto fail;
8f1cc3b1	340	if ((status & IOCON_SEQOP) \|\| !(status & IOCON_HAEN)) {
0b7bb77f PK	341	/* mcp23s17 has IOCON twice, make sure they are in sync */
	342	status &= ~(IOCON_SEQOP \| (IOCON_SEQOP << 8));
	343	status \|= IOCON_HAEN \| (IOCON_HAEN << 8);
	344	status = mcp->ops->write(mcp, MCP_IOCON, status);
e58b9e27 DB	345	if (status < 0)
	346	goto fail;
	347	}
	348
	349	/* configure ~100K pullups */
0b7bb77f	350	status = mcp->ops->write(mcp, MCP_GPPU, pullups);
e58b9e27 DB	351	if (status < 0)
	352	goto fail;
	353
0b7bb77f	354	status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27 DB	355	if (status < 0)
	356	goto fail;
	357
	358	/* disable inverter on input */
	359	if (mcp->cache[MCP_IPOL] != 0) {
	360	mcp->cache[MCP_IPOL] = 0;
0b7bb77f PK	361	status = mcp->ops->write(mcp, MCP_IPOL, 0);
	362	if (status < 0)
	363	goto fail;
e58b9e27 DB	364	}
	365
	366	/* disable irqs */
	367	if (mcp->cache[MCP_GPINTEN] != 0) {
	368	mcp->cache[MCP_GPINTEN] = 0;
0b7bb77f	369	status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
8f1cc3b1 DB	370	if (status < 0)
8f1cc3b1 DB	371	goto fail;
e58b9e27 DB	372	}
	373
	374	status = gpiochip_add(&mcp->chip);
8f1cc3b1 DB	375	fail:
	376	if (status < 0)
	377	dev_dbg(&spi->dev, "can't setup chip %d, --> %d\n",
	378	addr, status);
	379	return status;
	380	}
	381
	382	static int mcp23s08_probe(struct spi_device *spi)
	383	{
	384	struct mcp23s08_platform_data *pdata;
	385	unsigned addr;
	386	unsigned chips = 0;
	387	struct mcp23s08_driver_data *data;
0b7bb77f	388	int status, type;
8f1cc3b1 DB	389	unsigned base;
8f1cc3b1 DB	390
0b7bb77f PK	391	type = spi_get_device_id(spi)->driver_data;
0b7bb77f PK	392
8f1cc3b1	393	pdata = spi->dev.platform_data;
a342d215 BD	394	if (!pdata \|\| !gpio_is_valid(pdata->base)) {
	395	dev_dbg(&spi->dev, "invalid or missing platform data\n");
	396	return -EINVAL;
	397	}
8f1cc3b1	398
0b7bb77f	399	for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
8f1cc3b1 DB	400	if (!pdata->chip[addr].is_present)
	401	continue;
	402	chips++;
0b7bb77f PK	403	if ((type == MCP_TYPE_S08) && (addr > 3)) {
	404	dev_err(&spi->dev,
	405	"mcp23s08 only supports address 0..3\n");
	406	return -EINVAL;
	407	}
8f1cc3b1 DB	408	}
	409	if (!chips)
	410	return -ENODEV;
	411
	412	data = kzalloc(sizeof data + chips sizeof(struct mcp23s08),
	413	GFP_KERNEL);
	414	if (!data)
	415	return -ENOMEM;
	416	spi_set_drvdata(spi, data);
	417
	418	base = pdata->base;
0b7bb77f	419	for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
8f1cc3b1 DB	420	if (!pdata->chip[addr].is_present)
	421	continue;
	422	chips--;
	423	data->mcp[addr] = &data->chip[chips];
0b7bb77f PK	424	status = mcp23s08_probe_one(spi, addr, type, base,
0b7bb77f PK	425	pdata->chip[addr].pullups);
8f1cc3b1 DB	426	if (status < 0)
8f1cc3b1 DB	427	goto fail;
0b7bb77f PK	428
0b7bb77f PK	429	base += (type == MCP_TYPE_S17) ? 16 : 8;
8f1cc3b1 DB	430	}
8f1cc3b1 DB	431	data->ngpio = base - pdata->base;
e58b9e27 DB	432
	433	/* NOTE: these chips have a relatively sane IRQ framework, with
	434	* per-signal masking and level/edge triggering. It's not yet
	435	* handled here...
	436	*/
	437
	438	if (pdata->setup) {
8f1cc3b1 DB	439	status = pdata->setup(spi,
	440	pdata->base, data->ngpio,
	441	pdata->context);
e58b9e27 DB	442	if (status < 0)
	443	dev_dbg(&spi->dev, "setup --> %d\n", status);
	444	}
	445
	446	return 0;
	447
	448	fail:
0b7bb77f	449	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1 DB	450	int tmp;
	451
	452	if (!data->mcp[addr])
	453	continue;
	454	tmp = gpiochip_remove(&data->mcp[addr]->chip);
	455	if (tmp < 0)
	456	dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
	457	}
	458	kfree(data);
e58b9e27 DB	459	return status;
	460	}
	461
	462	static int mcp23s08_remove(struct spi_device *spi)
	463	{
8f1cc3b1	464	struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
e58b9e27	465	struct mcp23s08_platform_data *pdata = spi->dev.platform_data;
8f1cc3b1	466	unsigned addr;
e58b9e27 DB	467	int status = 0;
	468
	469	if (pdata->teardown) {
	470	status = pdata->teardown(spi,
8f1cc3b1	471	pdata->base, data->ngpio,
e58b9e27 DB	472	pdata->context);
	473	if (status < 0) {
	474	dev_err(&spi->dev, "%s --> %d\n", "teardown", status);
	475	return status;
	476	}
	477	}
	478
0b7bb77f	479	for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1 DB	480	int tmp;
	481
	482	if (!data->mcp[addr])
	483	continue;
	484
	485	tmp = gpiochip_remove(&data->mcp[addr]->chip);
	486	if (tmp < 0) {
	487	dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
	488	status = tmp;
	489	}
	490	}
e58b9e27	491	if (status == 0)
8f1cc3b1	492	kfree(data);
e58b9e27 DB	493	return status;
	494	}
	495
0b7bb77f PK	496	static const struct spi_device_id mcp23s08_ids[] = {
	497	{ "mcp23s08", MCP_TYPE_S08 },
	498	{ "mcp23s17", MCP_TYPE_S17 },
	499	{ },
	500	};
	501	MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
	502
e58b9e27 DB	503	static struct spi_driver mcp23s08_driver = {
	504	.probe = mcp23s08_probe,
	505	.remove = mcp23s08_remove,
0b7bb77f	506	.id_table = mcp23s08_ids,
e58b9e27 DB	507	.driver = {
	508	.name = "mcp23s08",
	509	.owner = THIS_MODULE,
	510	},
	511	};
	512
	513	/----------------------------------------------------------------------/
	514
	515	static int __init mcp23s08_init(void)
	516	{
	517	return spi_register_driver(&mcp23s08_driver);
	518	}
673c0c00 DB	519	/* register after spi postcore initcall and before
	520	* subsys initcalls that may rely on these GPIOs
	521	*/
	522	subsys_initcall(mcp23s08_init);
e58b9e27 DB	523
	524	static void __exit mcp23s08_exit(void)
	525	{
	526	spi_unregister_driver(&mcp23s08_driver);
	527	}
	528	module_exit(mcp23s08_exit);
	529
	530	MODULE_LICENSE("GPL");