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[GitHub/LineageOS/G12/android_hardware_amlogic_kernel-modules_media.git] / drivers / frame_provider / decoder / mpeg4 / vmpeg4_multi.c
CommitLineData
b9164398
NQ		 1/*
2 * drivers/amlogic/amports/vmpeg4.c
3 *
4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
e0614bf7 16 */
b9164398
NQ		 17
18#include <linux/kernel.h>
6fff1c64 19#include <linux/module.h>
b9164398
NQ		 20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/interrupt.h>
23#include <linux/timer.h>
24#include <linux/kfifo.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/amlogic/media/utils/amstream.h>
28#include <linux/amlogic/media/frame_sync/ptsserv.h>
29
30#include <linux/amlogic/media/vfm/vframe.h>
31#include <linux/amlogic/media/vfm/vframe_provider.h>
32#include <linux/amlogic/media/vfm/vframe_receiver.h>
33#include <linux/amlogic/media/canvas/canvas.h>
34#include <linux/amlogic/media/codec_mm/codec_mm.h>
87046a60 35#include <linux/amlogic/tee.h>
b9164398 36#include <linux/amlogic/media/utils/vdec_reg.h>
b9164398
NQ		 37#include <linux/amlogic/media/registers/register.h>
38#include "../../../stream_input/amports/amports_priv.h"
39
40#include "../utils/amvdec.h"
41#include "../utils/vdec_input.h"
42#include "../utils/vdec.h"
6fff1c64 43#include "../utils/firmware.h"
87046a60 44#include "../utils/decoder_mmu_box.h"
45#include "../utils/decoder_bmmu_box.h"
46#include <linux/amlogic/media/codec_mm/configs.h>
47#include "../utils/firmware.h"
b9164398 48
a093654a
TG		 49#include <trace/events/meson_atrace.h>
50
51
b9164398
NQ		 52#define DRIVER_NAME "ammvdec_mpeg4"
53#define MODULE_NAME "ammvdec_mpeg4"
54
613b67bf 55#define MEM_NAME "codec_mmpeg4"
b9164398
NQ		 56
57#define DEBUG_PTS
58
59#define NV21
60#define I_PICTURE 0
61#define P_PICTURE 1
62#define B_PICTURE 2
63
64#define ORI_BUFFER_START_ADDR 0x01000000
65#define DEFAULT_MEM_SIZE (32*SZ_1M)
66
67#define INTERLACE_FLAG 0x80
68#define TOP_FIELD_FIRST_FLAG 0x40
69
70/* protocol registers */
71#define MREG_REF0 AV_SCRATCH_1
72#define MREG_REF1 AV_SCRATCH_2
73#define MP4_PIC_RATIO AV_SCRATCH_5
74#define MP4_RATE AV_SCRATCH_3
75#define MP4_ERR_COUNT AV_SCRATCH_6
76#define MP4_PIC_WH AV_SCRATCH_7
77#define MREG_INPUT AV_SCRATCH_8
78#define MREG_BUFFEROUT AV_SCRATCH_9
79#define MP4_NOT_CODED_CNT AV_SCRATCH_A
80#define MP4_VOP_TIME_INC AV_SCRATCH_B
81#define MP4_OFFSET_REG AV_SCRATCH_C
82#define MP4_SYS_RATE AV_SCRATCH_E
83#define MEM_OFFSET_REG AV_SCRATCH_F
84
85#define PARC_FORBIDDEN 0
86#define PARC_SQUARE 1
87#define PARC_CIF 2
88#define PARC_10_11 3
89#define PARC_16_11 4
90#define PARC_40_33 5
91#define PARC_RESERVED 6
92/* values between 6 and 14 are reserved */
93#define PARC_EXTENDED 15
94
95#define VF_POOL_SIZE 16
96#define DECODE_BUFFER_NUM_MAX 4
97#define PUT_INTERVAL (HZ/100)
87046a60 98#define MAX_BMMU_BUFFER_NUM (DECODE_BUFFER_NUM_MAX + 1)
99#define WORKSPACE_SIZE (12*SZ_64K)
100static u32 buf_size = 32 * 1024 * 1024;
b9164398
NQ		 101
102#define CTX_LMEM_SWAP_OFFSET 0
103#define CTX_QUANT_MATRIX_OFFSET 0x800
104/* dcac buffer must align at 4k boundary */
105#define CTX_DCAC_BUF_OFFSET 0x1000
106#define CTX_DECBUF_OFFSET (0x0c0000 + 0x1000)
107
108#define RATE_DETECT_COUNT 5
109#define DURATION_UNIT 96000
110#define PTS_UNIT 90000
87046a60 111#define CHECK_INTERVAL (HZ/100)
b9164398
NQ		 112
113#define DUR2PTS(x) ((x) - ((x) >> 4))
114
8a9b0dfd 115#define MAX_MPEG4_SUPPORT_SIZE (1920*1088)
116
b9164398
NQ		 117#define DEC_RESULT_NONE 0
118#define DEC_RESULT_DONE 1
119#define DEC_RESULT_AGAIN 2
120#define DEC_RESULT_ERROR 3
87046a60 121#define DEC_RESULT_FORCE_EXIT 4
122#define DEC_RESULT_EOS 5
123#define DEC_DECODE_TIMEOUT 0x21
124#define DECODE_ID(hw) (hw_to_vdec(hw)->id)
125#define DECODE_STOP_POS AV_SCRATCH_K
126static u32 udebug_flag;
b9164398
NQ		 127
128static struct vframe_s *vmpeg_vf_peek(void *);
129static struct vframe_s *vmpeg_vf_get(void *);
130static void vmpeg_vf_put(struct vframe_s *, void *);
131static int vmpeg_vf_states(struct vframe_states *states, void *);
132static int vmpeg_event_cb(int type, void *data, void *private_data);
87046a60 133static int pre_decode_buf_level = 0x800;
134static int debug_enable;
135static unsigned int radr;
136static unsigned int rval;
137
138#define VMPEG4_DEV_NUM 9
139static unsigned int max_decode_instance_num = VMPEG4_DEV_NUM;
140static unsigned int max_process_time[VMPEG4_DEV_NUM];
141static unsigned int decode_timeout_val = 100;
142
143
144#undef pr_info
145#define pr_info printk
146unsigned int mpeg4_debug_mask = 0xff;
147
148#define PRINT_FLAG_ERROR 0x0
149#define PRINT_FLAG_RUN_FLOW 0X0001
150#define PRINT_FLAG_TIMEINFO 0x0002
151#define PRINT_FLAG_UCODE_DETAIL 0x0004
152#define PRINT_FLAG_VLD_DETAIL 0x0008
153#define PRINT_FLAG_DEC_DETAIL 0x0010
154#define PRINT_FLAG_BUFFER_DETAIL 0x0020
155#define PRINT_FLAG_RESTORE 0x0040
156#define PRINT_FRAME_NUM 0x0080
157#define PRINT_FLAG_FORCE_DONE 0x0100
158#define PRINT_FLAG_COUNTER 0X0200
159#define PRINT_FRAMEBASE_DATA 0x0400
160#define PRINT_FLAG_VDEC_STATUS 0x0800
161#define PRINT_FLAG_TIMEOUT_STATUS 0x1000
162
163int mmpeg4_debug_print(int index, int debug_flag, const char *fmt, ...)
164{
165 if (((debug_enable & debug_flag) &&
166 ((1 << index) & mpeg4_debug_mask))
167 || (debug_flag == PRINT_FLAG_ERROR)) {
168 unsigned char buf[512];
169 int len = 0;
170 va_list args;
171 va_start(args, fmt);
172 len = sprintf(buf, "%d: ", index);
173 vsnprintf(buf + len, 512-len, fmt, args);
174 pr_info("%s", buf);
175 va_end(args);
176 }
177 return 0;
178}
b9164398
NQ		 179
180struct vdec_mpeg4_hw_s {
181 spinlock_t lock;
182 struct platform_device *platform_dev;
87046a60 183 /* struct device *cma_dev; */
b9164398
NQ		 184
185 DECLARE_KFIFO(newframe_q, struct vframe_s *, VF_POOL_SIZE);
186 DECLARE_KFIFO(display_q, struct vframe_s *, VF_POOL_SIZE);
187 struct vframe_s vfpool[VF_POOL_SIZE];
188
189 s32 vfbuf_use[DECODE_BUFFER_NUM_MAX];
190 u32 frame_width;
191 u32 frame_height;
192 u32 frame_dur;
193 u32 frame_prog;
194
195 u32 ctx_valid;
196 u32 reg_vcop_ctrl_reg;
197 u32 reg_pic_head_info;
198 u32 reg_mpeg1_2_reg;
199 u32 reg_slice_qp;
200 u32 reg_mp4_pic_wh;
201 u32 reg_mp4_rate;
202 u32 reg_mb_info;
203 u32 reg_dc_ac_ctrl;
204 u32 reg_iqidct_control;
205 u32 reg_resync_marker_length;
206 u32 reg_rv_ai_mb_count;
87046a60 207 struct timer_list check_timer;
208 u32 decode_timeout_count;
209 u32 start_process_time;
210 u32 last_vld_level;
211 u8 init_flag;
212 u32 eos;
213 void *mm_blk_handle;
b9164398
NQ		 214
215 struct vframe_chunk_s *chunk;
216 u32 stat;
87046a60 217 unsigned long buf_start;
b9164398 218 u32 buf_size;
87046a60 219 /*
b9164398
NQ		 220 unsigned long cma_alloc_addr;
221 int cma_alloc_count;
87046a60 222 */
b9164398
NQ		 223 u32 vmpeg4_ratio;
224 u64 vmpeg4_ratio64;
225 u32 rate_detect;
226 u32 vmpeg4_rotation;
227 u32 total_frame;
228 u32 last_vop_time_inc;
229 u32 last_duration;
230 u32 last_anch_pts;
231 u32 vop_time_inc_since_last_anch;
232 u32 frame_num_since_last_anch;
233 u64 last_anch_pts_us64;
234
235 u32 pts_hit;
236 u32 pts_missed;
237 u32 pts_i_hit;
238 u32 pts_i_missed;
87046a60 239 u32 decoded_type[DECODE_BUFFER_NUM_MAX];
b9164398
NQ		 240 u32 buffer_info[DECODE_BUFFER_NUM_MAX];
241 u32 pts[DECODE_BUFFER_NUM_MAX];
242 u64 pts64[DECODE_BUFFER_NUM_MAX];
243 bool pts_valid[DECODE_BUFFER_NUM_MAX];
244 u32 canvas_spec[DECODE_BUFFER_NUM_MAX];
245#ifdef NV21
246 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][2];
247#else
248 struct canvas_config_s canvas_config[DECODE_BUFFER_NUM_MAX][3];
249#endif
250 struct dec_sysinfo vmpeg4_amstream_dec_info;
251
252 s32 refs[2];
253 int dec_result;
254 struct work_struct work;
255
256 void (*vdec_cb)(struct vdec_s *, void *);
257 void *vdec_cb_arg;
87046a60 258 u32 frame_num;
259 u32 put_num;
260 u32 sys_mp4_rate;
261 u32 run_count;
262 u32 not_run_ready;
263 u32 buffer_not_ready;
264 u32 input_empty;
265 u32 peek_num;
266 u32 get_num;
267 u32 first_i_frame_ready;
268 u32 drop_frame_count;
269 u32 timeout_flag;
270
6fff1c64 271 struct firmware_s *fw;
b9164398
NQ		 272};
273static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw);
274static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw);
275
276#define PROVIDER_NAME "vdec.mpeg4"
277
278/*
e0614bf7
ZZ		 279 *int query_video_status(int type, int *value);
280 */
b9164398
NQ		 281static const struct vframe_operations_s vf_provider_ops = {
282 .peek = vmpeg_vf_peek,
283 .get = vmpeg_vf_get,
284 .put = vmpeg_vf_put,
285 .event_cb = vmpeg_event_cb,
286 .vf_states = vmpeg_vf_states,
287};
288
289static unsigned char aspect_ratio_table[16] = {
290 PARC_FORBIDDEN,
291 PARC_SQUARE,
292 PARC_CIF,
293 PARC_10_11,
294 PARC_16_11,
295 PARC_40_33,
296 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
297 PARC_RESERVED, PARC_RESERVED, PARC_RESERVED, PARC_RESERVED,
298 PARC_RESERVED, PARC_EXTENDED
299};
300
87046a60 301static void reset_process_time(struct vdec_mpeg4_hw_s *hw);
b9164398
NQ		 302static int find_buffer(struct vdec_mpeg4_hw_s *hw)
303{
304 int i;
305
306 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
307 if (hw->vfbuf_use[i] == 0)
308 return i;
309 }
310
87046a60 311 return DECODE_BUFFER_NUM_MAX;
b9164398
NQ		 312}
313
314static int spec_to_index(struct vdec_mpeg4_hw_s *hw, u32 spec)
315{
316 int i;
317
318 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
319 if (hw->canvas_spec[i] == spec)
320 return i;
321 }
322
323 return -1;
324}
325
326static void set_frame_info(struct vdec_mpeg4_hw_s *hw, struct vframe_s *vf,
327 int buffer_index)
328{
329 int ar = 0;
330 unsigned int num = 0;
331 unsigned int den = 0;
e0614bf7 332 unsigned int pixel_ratio = READ_VREG(MP4_PIC_RATIO);
b9164398
NQ		 333
334 if (hw->vmpeg4_ratio64 != 0) {
335 num = hw->vmpeg4_ratio64>>32;
336 den = hw->vmpeg4_ratio64 & 0xffffffff;
337 } else {
338 num = hw->vmpeg4_ratio>>16;
339 den = hw->vmpeg4_ratio & 0xffff;
340
341 }
342 if ((num == 0) || (den == 0)) {
343 num = 1;
344 den = 1;
345 }
346
347 if (hw->vmpeg4_ratio == 0) {
348 vf->ratio_control |= (0x90 << DISP_RATIO_ASPECT_RATIO_BIT);
349 /* always stretch to 16:9 */
350 } else if (pixel_ratio > 0x0f) {
351 num = (pixel_ratio >> 8) *
352 hw->vmpeg4_amstream_dec_info.width * num;
353 ar = div_u64((pixel_ratio & 0xff) *
354 hw->vmpeg4_amstream_dec_info.height * den * 0x100ULL +
355 (num >> 1), num);
356 } else {
357 switch (aspect_ratio_table[pixel_ratio]) {
358 case 0:
359 num = hw->vmpeg4_amstream_dec_info.width * num;
360 ar = (hw->vmpeg4_amstream_dec_info.height * den *
361 0x100 + (num >> 1)) / num;
362 break;
363 case 1:
364 num = vf->width * num;
365 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
366 break;
367 case 2:
368 num = (vf->width * 12) * num;
369 ar = (vf->height * den * 0x100 * 11 +
370 ((num) >> 1)) / num;
371 break;
372 case 3:
373 num = (vf->width * 10) * num;
374 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
375 num;
376 break;
377 case 4:
378 num = (vf->width * 16) * num;
379 ar = (vf->height * den * 0x100 * 11 + (num >> 1)) /
380 num;
381 break;
382 case 5:
383 num = (vf->width * 40) * num;
384 ar = (vf->height * den * 0x100 * 33 + (num >> 1)) /
385 num;
386 break;
387 default:
388 num = vf->width * num;
389 ar = (vf->height * den * 0x100 + (num >> 1)) / num;
390 break;
391 }
392 }
393
394 ar = min(ar, DISP_RATIO_ASPECT_RATIO_MAX);
395
396 vf->signal_type = 0;
397 vf->type_original = vf->type;
398 vf->ratio_control = (ar << DISP_RATIO_ASPECT_RATIO_BIT);
399 vf->canvas0Addr = vf->canvas1Addr = -1;
400#ifdef NV21
401 vf->plane_num = 2;
402#else
403 vf->plane_num = 3;
404#endif
405 vf->canvas0_config[0] = hw->canvas_config[buffer_index][0];
406 vf->canvas0_config[1] = hw->canvas_config[buffer_index][1];
407#ifndef NV21
408 vf->canvas0_config[2] = hw->canvas_config[buffer_index][2];
409#endif
410 vf->canvas1_config[0] = hw->canvas_config[buffer_index][0];
411 vf->canvas1_config[1] = hw->canvas_config[buffer_index][1];
412#ifndef NV21
413 vf->canvas1_config[2] = hw->canvas_config[buffer_index][2];
414#endif
415}
416
417static inline void vmpeg4_save_hw_context(struct vdec_mpeg4_hw_s *hw)
418{
419 hw->reg_mpeg1_2_reg = READ_VREG(MPEG1_2_REG);
420 hw->reg_vcop_ctrl_reg = READ_VREG(VCOP_CTRL_REG);
421 hw->reg_pic_head_info = READ_VREG(PIC_HEAD_INFO);
422 hw->reg_slice_qp = READ_VREG(SLICE_QP);
423 hw->reg_mp4_pic_wh = READ_VREG(MP4_PIC_WH);
424 hw->reg_mp4_rate = READ_VREG(MP4_RATE);
425 hw->reg_mb_info = READ_VREG(MB_INFO);
426 hw->reg_dc_ac_ctrl = READ_VREG(DC_AC_CTRL);
427 hw->reg_iqidct_control = READ_VREG(IQIDCT_CONTROL);
428 hw->reg_resync_marker_length = READ_VREG(RESYNC_MARKER_LENGTH);
429 hw->reg_rv_ai_mb_count = READ_VREG(RV_AI_MB_COUNT);
430}
431
87046a60 432static irqreturn_t vmpeg4_isr_thread_fn(struct vdec_s *vdec, int irq)
b9164398
NQ		 433{
434 u32 reg;
435 struct vframe_s *vf = NULL;
436 u32 picture_type;
437 int index;
438 u32 pts, offset = 0;
439 bool pts_valid = false;
440 u64 pts_us64 = 0;
a8f62ee0 441 u32 frame_size;
b9164398
NQ		 442 u32 time_increment_resolution, fixed_vop_rate, vop_time_inc;
443 u32 repeat_cnt, duration = 3200;
444 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
87046a60 445 if (hw->eos)
446 return IRQ_HANDLED;
b9164398
NQ		 447
448 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
87046a60 449 if (READ_VREG(AV_SCRATCH_M) != 0 &&
450 (debug_enable & PRINT_FLAG_UCODE_DETAIL)) {
451 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_UCODE_DETAIL,
452 "dbg %x: %x, level %x, wp %x, rp %x, cnt %x\n",
453 READ_VREG(AV_SCRATCH_M), READ_VREG(AV_SCRATCH_N),
454 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
455 READ_VREG(VLD_MEM_VIFIFO_WP),
456 READ_VREG(VLD_MEM_VIFIFO_RP),
457 READ_VREG(VIFF_BIT_CNT));
458 WRITE_VREG(AV_SCRATCH_M, 0);
459 return IRQ_HANDLED;
460 }
b9164398
NQ		 461 reg = READ_VREG(MREG_BUFFEROUT);
462
463 time_increment_resolution = READ_VREG(MP4_RATE);
464 fixed_vop_rate = time_increment_resolution >> 16;
465 time_increment_resolution &= 0xffff;
87046a60 466 if (time_increment_resolution > 0 && fixed_vop_rate == 0)
467 hw->sys_mp4_rate = time_increment_resolution;
b9164398
NQ		 468 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
469 if ((fixed_vop_rate != 0) && (time_increment_resolution != 0)) {
470 /* fixed VOP rate */
471 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
87046a60 472 DURATION_UNIT / time_increment_resolution;
473 } else if (time_increment_resolution == 0
474 && hw->sys_mp4_rate > 0)
475 time_increment_resolution = hw->sys_mp4_rate;
b9164398 476 }
87046a60 477 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
478 "resolution=%d,fvop=%d,rate=%d\n",
479 time_increment_resolution, fixed_vop_rate,
480 hw->vmpeg4_amstream_dec_info.rate);
b9164398
NQ		 481
482 if (reg == 2) {
483 /* timeout when decoding next frame */
484
485 /* for frame based case, insufficient result may happen
e0614bf7 486 * at the beginning when only VOL head is available save
b9164398
NQ		 487 * HW context also, such as for the QTable from VCOP register
488 */
87046a60 489 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL,
490 "ammvdec_mpeg4: timeout\n");
491 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VLD_DETAIL,
492 "level=%x, vtl=%x,bcnt=%d\n",
493 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
494 READ_VREG(VLD_MEM_VIFIFO_CONTROL),
495 READ_VREG(VIFF_BIT_CNT));
496 if (input_frame_based(vdec)) {
b9164398 497 vmpeg4_save_hw_context(hw);
87046a60 498 hw->timeout_flag++;
499 } else {
b9164398
NQ		 500 hw->dec_result = DEC_RESULT_AGAIN;
501
502 schedule_work(&hw->work);
87046a60 503 }
b9164398 504 return IRQ_HANDLED;
a6c89e96 505 } else {
87046a60 506 reset_process_time(hw);
b9164398
NQ		 507 picture_type = (reg >> 3) & 7;
508 repeat_cnt = READ_VREG(MP4_NOT_CODED_CNT);
509 vop_time_inc = READ_VREG(MP4_VOP_TIME_INC);
510
511 index = spec_to_index(hw, READ_VREG(REC_CANVAS_ADDR));
512
513 if (index < 0) {
87046a60 514 mmpeg4_debug_print(DECODE_ID(hw), 0,
515 "invalid buffer index.");
b9164398
NQ		 516 hw->dec_result = DEC_RESULT_ERROR;
517
518 schedule_work(&hw->work);
519
520 return IRQ_HANDLED;
521 }
87046a60 522 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
523 "index=%d, used=%d cnt=%d, vopinc=%d\n",
524 index, hw->vfbuf_use[index], repeat_cnt, vop_time_inc);
b9164398
NQ		 525
526 hw->dec_result = DEC_RESULT_DONE;
527
b9164398
NQ		 528 if (hw->vmpeg4_amstream_dec_info.width == 0) {
529 hw->vmpeg4_amstream_dec_info.width =
530 READ_VREG(MP4_PIC_WH) >> 16;
531 }
b9164398
NQ		 532
533 if (hw->vmpeg4_amstream_dec_info.height == 0) {
534 hw->vmpeg4_amstream_dec_info.height =
535 READ_VREG(MP4_PIC_WH) & 0xffff;
536 }
87046a60 537
b9164398
NQ		 538 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
539 if (vop_time_inc < hw->last_vop_time_inc) {
540 duration = vop_time_inc +
541 time_increment_resolution -
542 hw->last_vop_time_inc;
543 } else {
544 duration = vop_time_inc -
545 hw->last_vop_time_inc;
546 }
547
548 if (duration == hw->last_duration) {
549 hw->rate_detect++;
87046a60 550 if ((hw->rate_detect >= RATE_DETECT_COUNT) &&
551 (time_increment_resolution != 0)) {
b9164398
NQ		 552 hw->vmpeg4_amstream_dec_info.rate =
553 duration * DURATION_UNIT /
554 time_increment_resolution;
555 duration =
556 hw->vmpeg4_amstream_dec_info.rate;
557 }
558 } else {
559 hw->rate_detect = 0;
560 hw->last_duration = duration;
561 }
562 } else {
563 duration = hw->vmpeg4_amstream_dec_info.rate;
564#if 0
565 pr_info("info rate = %d, ucode rate = 0x%x:0x%x\n",
566 hw->vmpeg4_amstream_dec_info.rate,
567 READ_VREG(MP4_RATE), vop_time_inc);
568#endif
569 }
570
87046a60 571 if ((I_PICTURE == picture_type) ||
572 (P_PICTURE == picture_type)) {
b9164398
NQ		 573 offset = READ_VREG(MP4_OFFSET_REG);
574 if (hw->chunk) {
575 hw->pts_valid[index] = hw->chunk->pts_valid;
576 hw->pts[index] = hw->chunk->pts;
577 hw->pts64[index] = hw->chunk->pts64;
578 } else {
579 if (pts_lookup_offset_us64
a8f62ee0
RZ		 580 (PTS_TYPE_VIDEO, offset, &pts,
581 &frame_size, 3000,
b9164398
NQ		 582 &pts_us64) == 0) {
583 hw->pts_valid[index] = true;
584 hw->pts[index] = pts;
585 hw->pts64[index] = pts_us64;
586 hw->pts_hit++;
587 } else {
588 hw->pts_valid[index] = false;
589 hw->pts_missed++;
590 }
591 }
87046a60 592 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
593 "I/P offset 0x%x, pts_valid %d pts=0x%x,index=%d,used=%d\n",
b9164398 594 offset, hw->pts_valid[index],
87046a60 595 hw->pts[index], index, hw->vfbuf_use[index]);
b9164398
NQ		 596 } else {
597 hw->pts_valid[index] = false;
598 hw->pts[index] = 0;
599 hw->pts64[index] = 0;
600 }
601
602 hw->buffer_info[index] = reg;
603 hw->vfbuf_use[index] = 0;
87046a60 604 hw->decoded_type[index] = picture_type;
605 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
606 "amvdec_mpeg4: decoded buffer %d, frame_type %s,pts=%x\n",
b9164398
NQ		 607 index,
608 (picture_type == I_PICTURE) ? "I" :
87046a60 609 (picture_type == P_PICTURE) ? "P" : "B",
610 hw->pts[index]);
b9164398
NQ		 611
612 /* Buffer management
613 * todo: add sequence-end flush
614 */
615 if ((picture_type == I_PICTURE) ||
616 (picture_type == P_PICTURE)) {
617 hw->vfbuf_use[index]++;
618
619 if (hw->refs[1] == -1) {
620 hw->refs[1] = index;
621 index = -1;
622 } else if (hw->refs[0] == -1) {
623 hw->refs[0] = hw->refs[1];
624 hw->refs[1] = index;
625 index = hw->refs[0];
626 } else {
627 hw->vfbuf_use[hw->refs[0]]--;
628 hw->refs[0] = hw->refs[1];
629 hw->refs[1] = index;
630 index = hw->refs[0];
631 }
632 } else {
633 /* if this is a B frame, then drop (depending on if
634 * there are two reference frames) or display
635 * immediately
636 */
637 if (hw->refs[1] == -1)
638 index = -1;
639 }
640
641 vmpeg4_save_hw_context(hw);
642
643 if (index < 0) {
644 schedule_work(&hw->work);
645 return IRQ_HANDLED;
646 }
647
648 reg = hw->buffer_info[index];
649 pts_valid = hw->pts_valid[index];
650 pts = hw->pts[index];
651 pts_us64 = hw->pts64[index];
652
87046a60 653 if ((hw->first_i_frame_ready == 0) &&
654 (I_PICTURE == hw->decoded_type[index]))
655 hw->first_i_frame_ready = 1;
656 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
657 "queued %d, pts = 0x%x, pts_valid=%d,index=%d,used=%d,type=%d,decode_type=%d\n",
658 index, pts, pts_valid, index, hw->vfbuf_use[index],
659 picture_type, hw->decoded_type[index]);
b9164398
NQ		 660
661 if (pts_valid) {
662 hw->last_anch_pts = pts;
663 hw->last_anch_pts_us64 = pts_us64;
664 hw->frame_num_since_last_anch = 0;
665 hw->vop_time_inc_since_last_anch = 0;
87046a60 666 } else if (input_stream_based(vdec)) {
b9164398
NQ		 667 pts = hw->last_anch_pts;
668 pts_us64 = hw->last_anch_pts_us64;
669
670 if ((time_increment_resolution != 0) &&
671 (fixed_vop_rate == 0) &&
672 (hw->vmpeg4_amstream_dec_info.rate == 0)) {
673 /* variable PTS rate */
674 /*bug on variable pts calc,
e0614bf7
ZZ		 675 *do as dixed vop first if we
676 *have rate setting before.
677 */
b9164398
NQ		 678 if (vop_time_inc > hw->last_vop_time_inc) {
679 duration = vop_time_inc -
680 hw->last_vop_time_inc;
681 } else {
682 duration = vop_time_inc +
683 time_increment_resolution -
684 hw->last_vop_time_inc;
685 }
686
687 hw->vop_time_inc_since_last_anch += duration;
688
689 pts += hw->vop_time_inc_since_last_anch *
690 PTS_UNIT / time_increment_resolution;
691 pts_us64 += (hw->vop_time_inc_since_last_anch *
692 PTS_UNIT / time_increment_resolution) *
693 100 / 9;
694
695 if (hw->vop_time_inc_since_last_anch >
696 (1 << 14)) {
697 /* avoid overflow */
698 hw->last_anch_pts = pts;
699 hw->last_anch_pts_us64 = pts_us64;
700 hw->vop_time_inc_since_last_anch = 0;
701 }
702 } else {
703 /* fixed VOP rate */
704 hw->frame_num_since_last_anch++;
705 pts += DUR2PTS(hw->frame_num_since_last_anch *
706 hw->vmpeg4_amstream_dec_info.rate);
707 pts_us64 += DUR2PTS(
708 hw->frame_num_since_last_anch *
709 hw->vmpeg4_amstream_dec_info.rate) *
710 100 / 9;
711
712 if (hw->frame_num_since_last_anch > (1 << 15)) {
713 /* avoid overflow */
714 hw->last_anch_pts = pts;
715 hw->last_anch_pts_us64 = pts_us64;
716 hw->frame_num_since_last_anch = 0;
717 }
718 }
719 }
720
721 if (reg & INTERLACE_FLAG) { /* interlace */
722 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
87046a60 723 mmpeg4_debug_print(DECODE_ID(hw), 0,
724 "fatal error, no available buffer slot.");
b9164398
NQ		 725 return IRQ_HANDLED;
726 }
727
728 vf->index = index;
729 vf->width = hw->vmpeg4_amstream_dec_info.width;
730 vf->height = hw->vmpeg4_amstream_dec_info.height;
731 vf->bufWidth = 1920;
732 vf->flag = 0;
733 vf->orientation = hw->vmpeg4_rotation;
734 vf->pts = pts;
735 vf->pts_us64 = pts_us64;
736 vf->duration = duration >> 1;
737 vf->duration_pulldown = 0;
738 vf->type = (reg & TOP_FIELD_FIRST_FLAG) ?
739 VIDTYPE_INTERLACE_TOP :
740 VIDTYPE_INTERLACE_BOTTOM;
741#ifdef NV21
742 vf->type |= VIDTYPE_VIU_NV21;
743#endif
744 set_frame_info(hw, vf, index);
745
746 hw->vfbuf_use[index]++;
87046a60 747 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
748 "pts0=%d,pts64=%lld,w%d,h%d,dur:%d\n",
749 vf->pts, vf->pts_us64,
750 vf->width, vf->height,
751 vf->duration);
752 if ((hw->first_i_frame_ready == 0)
753 && (picture_type != I_PICTURE)) {
754 hw->drop_frame_count++;
755 hw->vfbuf_use[index]--;
756
757 kfifo_put(&hw->newframe_q,
758 (const struct vframe_s *)vf);
759 } else {
760 kfifo_put(&hw->display_q,
761 (const struct vframe_s *)vf);
a093654a 762 ATRACE_COUNTER(MODULE_NAME, vf->pts);
87046a60 763 hw->frame_num++;
97fe3d16 764 vdec->vdec_fps_detec(vdec->id);
b9164398
NQ		 765 vf_notify_receiver(vdec->vf_provider_name,
766 VFRAME_EVENT_PROVIDER_VFRAME_READY,
767 NULL);
87046a60 768 }
b9164398 769 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
87046a60 770 mmpeg4_debug_print(DECODE_ID(hw), 0,
771 "fatal error, no available buffer slot.");
b9164398
NQ		 772 hw->dec_result = DEC_RESULT_ERROR;
773 schedule_work(&hw->work);
774 return IRQ_HANDLED;
775 }
776
777 vf->index = index;
778 vf->width = hw->vmpeg4_amstream_dec_info.width;
779 vf->height = hw->vmpeg4_amstream_dec_info.height;
780 vf->bufWidth = 1920;
781 vf->flag = 0;
782 vf->orientation = hw->vmpeg4_rotation;
783
784 vf->pts = 0;
785 vf->pts_us64 = 0;
786 vf->duration = duration >> 1;
787
788 vf->duration_pulldown = 0;
789 vf->type = (reg & TOP_FIELD_FIRST_FLAG) ?
790 VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
791#ifdef NV21
792 vf->type |= VIDTYPE_VIU_NV21;
793#endif
794 set_frame_info(hw, vf, index);
795
796 hw->vfbuf_use[index]++;
87046a60 797 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
798 "pts1=%d,pts64=%lld,w%d,h%d,dur:%d\n",
799 vf->pts, vf->pts_us64,
800 vf->width, vf->height,
801 vf->duration);
802 if ((hw->first_i_frame_ready == 0)
803 && (picture_type != I_PICTURE)) {
804 hw->drop_frame_count++;
805 hw->vfbuf_use[index]--;
806
807 kfifo_put(&hw->newframe_q,
808 (const struct vframe_s *)vf);
809 } else {
810 kfifo_put(&hw->display_q,
811 (const struct vframe_s *)vf);
a093654a 812 ATRACE_COUNTER(MODULE_NAME, vf->pts);
87046a60 813 hw->frame_num++;
97fe3d16 814 vdec->vdec_fps_detec(vdec->id);
b9164398
NQ		 815 vf_notify_receiver(vdec->vf_provider_name,
816 VFRAME_EVENT_PROVIDER_VFRAME_READY,
817 NULL);
87046a60 818 }
b9164398
NQ		 819 } else { /* progressive */
820 if (kfifo_get(&hw->newframe_q, &vf) == 0) {
87046a60 821 mmpeg4_debug_print(DECODE_ID(hw), 0,
822 "fatal error, no available buffer slot.");
b9164398
NQ		 823 return IRQ_HANDLED;
824 }
825
826 vf->index = index;
827 vf->width = hw->vmpeg4_amstream_dec_info.width;
828 vf->height = hw->vmpeg4_amstream_dec_info.height;
829 vf->bufWidth = 1920;
830 vf->flag = 0;
831 vf->orientation = hw->vmpeg4_rotation;
832 vf->pts = pts;
833 vf->pts_us64 = pts_us64;
834 vf->duration = duration;
835 vf->duration_pulldown = repeat_cnt * duration;
836#ifdef NV21
837 vf->type =
838 VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD |
839 VIDTYPE_VIU_NV21;
840#else
841 vf->type =
842 VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
843#endif
844 set_frame_info(hw, vf, index);
845
b9164398 846 hw->vfbuf_use[index]++;
87046a60 847 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEINFO,
848 "pts=%d,pts64=%lld,w%d,h%d,index=%d,used=%d,dur:%d, flag=%d, type=%d\n",
849 vf->pts, vf->pts_us64,
850 vf->width, vf->height,
851 index, hw->vfbuf_use[index],
852 vf->duration,
853 hw->timeout_flag, picture_type);
854 if ((hw->first_i_frame_ready == 0)
855 && (picture_type != I_PICTURE)) {
856 hw->drop_frame_count++;
857 hw->vfbuf_use[index]--;
858 hw->timeout_flag++;
859 kfifo_put(&hw->newframe_q,
860 (const struct vframe_s *)vf);
861 } else {
862 if (hw->timeout_flag > 2)
863 hw->timeout_flag = 2;
864 if (hw->timeout_flag && input_frame_based(vdec))
865 vf->duration = duration * (hw->timeout_flag + 1);
866 kfifo_put(&hw->display_q,
867 (const struct vframe_s *)vf);
a093654a 868 ATRACE_COUNTER(MODULE_NAME, vf->pts);
87046a60 869 hw->frame_num++;
870 hw->timeout_flag = 0;
97fe3d16 871 vdec->vdec_fps_detec(vdec->id);
87046a60 872 vf_notify_receiver(vdec->vf_provider_name,
873 VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
874 }
b9164398
NQ		 875 }
876
877 hw->total_frame += repeat_cnt + 1;
878 hw->last_vop_time_inc = vop_time_inc;
879
880 schedule_work(&hw->work);
881 }
87046a60 882 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
883 "%s:frame num:%d\n", __func__, hw->frame_num);
b9164398
NQ		 884
885 return IRQ_HANDLED;
886}
887
87046a60 888static irqreturn_t vmpeg4_isr(struct vdec_s *vdec, int irq)
889{
890 u32 time_increment_resolution, fixed_vop_rate;
891 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)(vdec->private);
892
893 if (hw->eos)
894 return IRQ_HANDLED;
895 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
896 time_increment_resolution = READ_VREG(MP4_RATE);
897 fixed_vop_rate = time_increment_resolution >> 16;
898 time_increment_resolution &= 0xffff;
899 if (time_increment_resolution > 0 && fixed_vop_rate == 0)
900 hw->sys_mp4_rate = time_increment_resolution;
901 if (hw->vmpeg4_amstream_dec_info.rate == 0) {
902 if ((fixed_vop_rate != 0) && (time_increment_resolution != 0)) {
903 hw->vmpeg4_amstream_dec_info.rate = fixed_vop_rate *
904 DURATION_UNIT /
905 time_increment_resolution;
906 } else if (time_increment_resolution == 0
907 && hw->sys_mp4_rate > 0)
908 time_increment_resolution = hw->sys_mp4_rate;
909 }
910 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_DEC_DETAIL,
911 "resolution=%d,fvop=%d,rate=%d\n",
912 time_increment_resolution, fixed_vop_rate,
913 hw->vmpeg4_amstream_dec_info.rate);
914 return IRQ_WAKE_THREAD;
915}
b9164398
NQ		 916static void vmpeg4_work(struct work_struct *work)
917{
918 struct vdec_mpeg4_hw_s *hw =
919 container_of(work, struct vdec_mpeg4_hw_s, work);
05afa03d 920 struct vdec_s *vdec = hw_to_vdec(hw);
b9164398
NQ		 921
922 /* finished decoding one frame or error,
923 * notify vdec core to switch context
924 */
87046a60 925 if (hw->dec_result != DEC_RESULT_DONE)
926 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
927 "mmpeg4: vmpeg_work,result=%d,status=%d\n",
928 hw->dec_result, hw_to_vdec(hw)->next_status);
b9164398
NQ		 929
930 if ((hw->dec_result == DEC_RESULT_DONE) ||
931 ((hw->chunk) &&
932 (input_frame_based(&(hw_to_vdec(hw))->input)))) {
933 if (!hw->ctx_valid)
934 hw->ctx_valid = 1;
935
936 vdec_vframe_dirty(hw_to_vdec(hw), hw->chunk);
87046a60 937 } else if (hw->dec_result == DEC_RESULT_AGAIN
938 && (hw_to_vdec(hw)->next_status !=
939 VDEC_STATUS_DISCONNECTED)) {
940 /*
941 stream base: stream buf empty or timeout
942 frame base: vdec_prepare_input fail
943 */
944 if (!vdec_has_more_input(hw_to_vdec(hw))) {
945 hw->dec_result = DEC_RESULT_EOS;
946 vdec_schedule_work(&hw->work);
947 /*pr_info("%s: return\n",
948 __func__);*/
949 return;
950 }
951 } else if (hw->dec_result == DEC_RESULT_FORCE_EXIT) {
952 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
953 "%s: force exit\n", __func__);
954 if (hw->stat & STAT_ISR_REG) {
955 amvdec_stop();
956 /*disable mbox interrupt */
957 WRITE_VREG(ASSIST_MBOX1_MASK, 0);
958 vdec_free_irq(VDEC_IRQ_1, (void *)hw);
959 hw->stat &= ~STAT_ISR_REG;
960 }
961 } else if (hw->dec_result == DEC_RESULT_EOS) {
962 /*pr_info("%s: end of stream\n",
963 __func__);*/
964 hw->eos = 1;
965 if (hw->stat & STAT_VDEC_RUN) {
966 amvdec_stop();
967 hw->stat &= ~STAT_VDEC_RUN;
968 }
969 vdec_vframe_dirty(hw_to_vdec(hw), hw->chunk);
970 vdec_clean_input(hw_to_vdec(hw));
971 }
972 if (hw->stat & STAT_VDEC_RUN) {
973 amvdec_stop();
974 hw->stat &= ~STAT_VDEC_RUN;
b9164398 975 }
87046a60 976 del_timer_sync(&hw->check_timer);
977 hw->stat &= ~STAT_TIMER_ARM;
b9164398
NQ		 978
979 /* mark itself has all HW resource released and input released */
05afa03d
PY		 980 if (vdec->parallel_dec == 1)
981 vdec_core_finish_run(hw_to_vdec(hw), CORE_MASK_VDEC_1);
982 else
983 vdec_core_finish_run(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
b9164398
NQ		 984
985 if (hw->vdec_cb)
986 hw->vdec_cb(hw_to_vdec(hw), hw->vdec_cb_arg);
987}
988
989static struct vframe_s *vmpeg_vf_peek(void *op_arg)
990{
991 struct vframe_s *vf;
992 struct vdec_s *vdec = op_arg;
993 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
994
995 if (!hw)
996 return NULL;
87046a60 997 hw->peek_num++;
b9164398
NQ		 998 if (kfifo_peek(&hw->display_q, &vf))
999 return vf;
1000
1001 return NULL;
1002}
1003
1004static struct vframe_s *vmpeg_vf_get(void *op_arg)
1005{
1006 struct vframe_s *vf;
1007 struct vdec_s *vdec = op_arg;
1008 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
87046a60 1009 hw->get_num++;
b9164398
NQ		 1010 if (kfifo_get(&hw->display_q, &vf))
1011 return vf;
1012
1013 return NULL;
1014}
1015
1016static void vmpeg_vf_put(struct vframe_s *vf, void *op_arg)
1017{
1018 struct vdec_s *vdec = op_arg;
1019 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1020
1021 hw->vfbuf_use[vf->index]--;
87046a60 1022 hw->put_num++;
1023 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FRAME_NUM,
1024 "%s:put num:%d\n",
1025 __func__, hw->put_num);
1026 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_BUFFER_DETAIL,
1027 "index=%d, used=%d\n",
1028 vf->index, hw->vfbuf_use[vf->index]);
b9164398
NQ		 1029 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1030}
1031
1032static int vmpeg_event_cb(int type, void *data, void *private_data)
1033{
1034 return 0;
1035}
1036
1037static int vmpeg_vf_states(struct vframe_states *states, void *op_arg)
1038{
1039 unsigned long flags;
1040 struct vdec_s *vdec = op_arg;
1041 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1042
1043 spin_lock_irqsave(&hw->lock, flags);
1044
1045 states->vf_pool_size = VF_POOL_SIZE;
1046 states->buf_free_num = kfifo_len(&hw->newframe_q);
1047 states->buf_avail_num = kfifo_len(&hw->display_q);
1048 states->buf_recycle_num = 0;
1049
1050 spin_unlock_irqrestore(&hw->lock, flags);
1051
1052 return 0;
1053}
1054
1055
fe96802b 1056static int dec_status(struct vdec_s *vdec, struct vdec_info *vstatus)
b9164398
NQ		 1057{
1058 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
70809fec 1059
9b670a2d 1060 if (!hw)
613b67bf 1061 return -1;
70809fec 1062
fe96802b
NQ		 1063 vstatus->frame_width = hw->vmpeg4_amstream_dec_info.width;
1064 vstatus->frame_height = hw->vmpeg4_amstream_dec_info.height;
b9164398 1065 if (0 != hw->vmpeg4_amstream_dec_info.rate)
fe96802b 1066 vstatus->frame_rate = DURATION_UNIT /
b9164398
NQ		 1067 hw->vmpeg4_amstream_dec_info.rate;
1068 else
fe96802b 1069 vstatus->frame_rate = DURATION_UNIT;
b9164398
NQ		 1070 vstatus->error_count = READ_VREG(MP4_ERR_COUNT);
1071 vstatus->status = hw->stat;
1072
1073 return 0;
1074}
1075
1076/****************************************/
1077static int vmpeg4_canvas_init(struct vdec_mpeg4_hw_s *hw)
1078{
87046a60 1079 int i, ret;
1080 u32 canvas_width, canvas_height;
b9164398
NQ		 1081 u32 decbuf_size, decbuf_y_size;
1082 struct vdec_s *vdec = hw_to_vdec(hw);
87046a60 1083 unsigned long decbuf_start;
1084
1085 if (buf_size <= 0x00400000) {
1086 /* SD only */
1087 canvas_width = 768;
1088 canvas_height = 576;
1089 decbuf_y_size = 0x80000;
1090 decbuf_size = 0x100000;
1091 } else {
1092 int w = hw->vmpeg4_amstream_dec_info.width;
1093 int h = hw->vmpeg4_amstream_dec_info.height;
1094 int align_w, align_h;
1095 int max, min;
1096 if (w == 0)
1097 w = 1920;
1098 if (h == 0)
1099 h = 1088;
1100 align_w = ALIGN(w, 64);
1101 align_h = ALIGN(h, 64);
1102 if (align_w > align_h) {
1103 max = align_w;
1104 min = align_h;
1105 } else {
1106 max = align_h;
1107 min = align_w;
1108 }
1109 /* HD & SD */
1110 if ((max > 1920 || min > 1088) &&
1111 ALIGN(align_w * align_h * 3/2, SZ_64K) * 9 <=
1112 buf_size) {
1113 canvas_width = align_w;
1114 canvas_height = align_h;
1115 decbuf_y_size =
1116 ALIGN(align_w * align_h, SZ_64K);
1117 decbuf_size =
1118 ALIGN(align_w * align_h * 3/2, SZ_64K);
1119 } else { /*1080p*/
1120 if (h > w) {
1121 canvas_width = 1088;
1122 canvas_height = 1920;
1123 } else {
1124 canvas_width = 1920;
1125 canvas_height = 1088;
1126 }
1127 decbuf_y_size = 0x200000;
1128 decbuf_size = 0x300000;
1129 }
1130 }
b9164398 1131
87046a60 1132 for (i = 0; i < MAX_BMMU_BUFFER_NUM; i++) {
1133
1134 unsigned canvas;
1135 if (i == (MAX_BMMU_BUFFER_NUM - 1))
1136 decbuf_size = WORKSPACE_SIZE;
1137 ret = decoder_bmmu_box_alloc_buf_phy(hw->mm_blk_handle, i,
1138 decbuf_size, DRIVER_NAME, &decbuf_start);
1139 if (ret < 0) {
1140 pr_err("mmu alloc failed! size 0x%d idx %d\n",
1141 decbuf_size, i);
1142 return ret;
1143 }
b9164398 1144
87046a60 1145 if (i == (MAX_BMMU_BUFFER_NUM - 1)) {
1146 hw->buf_start = decbuf_start;
1147 } else {
05afa03d
PY		 1148 if (vdec->parallel_dec == 1) {
1149 unsigned tmp;
1150 if (canvas_u(hw->canvas_spec[i]) == 0xff) {
1151 tmp =
1152 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1153 hw->canvas_spec[i] &= ~(0xffff << 8);
1154 hw->canvas_spec[i] |= tmp << 8;
1155 hw->canvas_spec[i] |= tmp << 16;
1156 }
1157 if (canvas_y(hw->canvas_spec[i]) == 0xff) {
1158 tmp =
1159 vdec->get_canvas_ex(CORE_MASK_VDEC_1, vdec->id);
1160 hw->canvas_spec[i] &= ~0xff;
1161 hw->canvas_spec[i] |= tmp;
1162 }
1163 canvas = hw->canvas_spec[i];
1164 } else {
1165 canvas = vdec->get_canvas(i, 2);
1166 hw->canvas_spec[i] = canvas;
1167 }
b9164398 1168
87046a60 1169 hw->canvas_config[i][0].phy_addr =
1170 decbuf_start;
1171 hw->canvas_config[i][0].width =
1172 canvas_width;
1173 hw->canvas_config[i][0].height =
1174 canvas_height;
1175 hw->canvas_config[i][0].block_mode =
1176 CANVAS_BLKMODE_32X32;
b9164398
NQ		 1177
1178 canvas_config_config(canvas_y(canvas),
1179 &hw->canvas_config[i][0]);
1180
87046a60 1181 hw->canvas_config[i][1].phy_addr =
1182 decbuf_start + decbuf_y_size;
1183 hw->canvas_config[i][1].width =
1184 canvas_width;
1185 hw->canvas_config[i][1].height =
1186 canvas_height / 2;
1187 hw->canvas_config[i][1].block_mode =
1188 CANVAS_BLKMODE_32X32;
b9164398
NQ		 1189
1190 canvas_config_config(canvas_u(canvas),
1191 &hw->canvas_config[i][1]);
87046a60 1192 }
1193 }
b9164398 1194
87046a60 1195 return 0;
1196}
1197static void vmpeg4_dump_state(struct vdec_s *vdec)
1198{
1199 struct vdec_mpeg4_hw_s *hw =
1200 (struct vdec_mpeg4_hw_s *)(vdec->private);
1201 u32 i;
1202 mmpeg4_debug_print(DECODE_ID(hw), 0,
1203 "====== %s\n", __func__);
1204 mmpeg4_debug_print(DECODE_ID(hw), 0,
1205 "width/height (%d/%d), i_fram:%d, buffer_not_ready %d\n",
1206 hw->vmpeg4_amstream_dec_info.width,
1207 hw->vmpeg4_amstream_dec_info.height,
1208 hw->first_i_frame_ready,
1209 hw->buffer_not_ready
1210 );
1211 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1212 mmpeg4_debug_print(DECODE_ID(hw), 0,
1213 "index %d, used %d\n", i, hw->vfbuf_use[i]);
1214 }
b9164398 1215
87046a60 1216 mmpeg4_debug_print(DECODE_ID(hw), 0,
1217 "is_framebase(%d), eos %d, state 0x%x, dec_result 0x%x dec_frm %d\n",
1218 input_frame_based(vdec),
1219 hw->eos,
1220 hw->stat,
1221 hw->dec_result,
1222 hw->frame_num
1223 );
1224 mmpeg4_debug_print(DECODE_ID(hw), 0,
1225 "is_framebase(%d), put_frm %d run %d not_run_ready %d input_empty %d,drop %d\n",
1226 input_frame_based(vdec),
1227 hw->put_num,
1228 hw->run_count,
1229 hw->not_run_ready,
1230 hw->input_empty,
1231 hw->drop_frame_count
1232 );
1233
1234 if (vf_get_receiver(vdec->vf_provider_name)) {
1235 enum receviver_start_e state =
1236 vf_notify_receiver(vdec->vf_provider_name,
1237 VFRAME_EVENT_PROVIDER_QUREY_STATE,
1238 NULL);
1239 mmpeg4_debug_print(DECODE_ID(hw), 0,
1240 "\nreceiver(%s) state %d\n",
1241 vdec->vf_provider_name,
1242 state);
1243 }
1244 mmpeg4_debug_print(DECODE_ID(hw), 0,
1245 "%s, newq(%d/%d), dispq(%d/%d) vf peek/get/put (%d/%d/%d)\n",
1246 __func__,
1247 kfifo_len(&hw->newframe_q),
1248 VF_POOL_SIZE,
1249 kfifo_len(&hw->display_q),
1250 VF_POOL_SIZE,
1251 hw->peek_num,
1252 hw->get_num,
1253 hw->put_num
1254 );
1255 mmpeg4_debug_print(DECODE_ID(hw), 0,
1256 "VIFF_BIT_CNT=0x%x\n",
1257 READ_VREG(VIFF_BIT_CNT));
1258 mmpeg4_debug_print(DECODE_ID(hw), 0,
1259 "VLD_MEM_VIFIFO_LEVEL=0x%x\n",
1260 READ_VREG(VLD_MEM_VIFIFO_LEVEL));
1261 mmpeg4_debug_print(DECODE_ID(hw), 0,
1262 "VLD_MEM_VIFIFO_WP=0x%x\n",
1263 READ_VREG(VLD_MEM_VIFIFO_WP));
1264 mmpeg4_debug_print(DECODE_ID(hw), 0,
1265 "VLD_MEM_VIFIFO_RP=0x%x\n",
1266 READ_VREG(VLD_MEM_VIFIFO_RP));
1267 mmpeg4_debug_print(DECODE_ID(hw), 0,
1268 "PARSER_VIDEO_RP=0x%x\n",
1269 READ_PARSER_REG(PARSER_VIDEO_RP));
1270 mmpeg4_debug_print(DECODE_ID(hw), 0,
1271 "PARSER_VIDEO_WP=0x%x\n",
1272 READ_PARSER_REG(PARSER_VIDEO_WP));
1273 if (input_frame_based(vdec) &&
1274 debug_enable & PRINT_FRAMEBASE_DATA
1275 ) {
1276 int jj;
1277 if (hw->chunk && hw->chunk->block &&
1278 hw->chunk->size > 0) {
7d2e7e17
NQ		 1279 u8 *data = NULL;
1280
1281 if (!hw->chunk->block->is_mapped)
1282 data = codec_mm_vmap(hw->chunk->block->start +
1283 hw->chunk->offset, hw->chunk->size);
1284 else
1285 data = ((u8 *)hw->chunk->block->start_virt) +
1286 hw->chunk->offset;
1287
87046a60 1288 mmpeg4_debug_print(DECODE_ID(hw), 0,
1289 "frame data size 0x%x\n",
1290 hw->chunk->size);
1291 for (jj = 0; jj < hw->chunk->size; jj++) {
1292 if ((jj & 0xf) == 0)
1293 mmpeg4_debug_print(DECODE_ID(hw),
1294 PRINT_FRAMEBASE_DATA,
1295 "%06x:", jj);
1296 mmpeg4_debug_print(DECODE_ID(hw),
1297 PRINT_FRAMEBASE_DATA,
1298 "%02x ", data[jj]);
1299 if (((jj + 1) & 0xf) == 0)
1300 mmpeg4_debug_print(DECODE_ID(hw),
1301 PRINT_FRAMEBASE_DATA,
1302 "\n");
1303 }
7d2e7e17
NQ		 1304
1305 if (!hw->chunk->block->is_mapped)
1306 codec_mm_unmap_phyaddr(data);
87046a60 1307 }
1308 }
1309}
b9164398 1310
87046a60 1311static void reset_process_time(struct vdec_mpeg4_hw_s *hw)
1312{
1313 if (hw->start_process_time) {
1314 unsigned process_time =
1315 1000 * (jiffies - hw->start_process_time) / HZ;
1316 hw->start_process_time = 0;
1317 if (process_time > max_process_time[DECODE_ID(hw)])
1318 max_process_time[DECODE_ID(hw)] = process_time;
1319 }
1320}
1321static void start_process_time(struct vdec_mpeg4_hw_s *hw)
1322{
1323 hw->decode_timeout_count = 2;
1324 hw->start_process_time = jiffies;
1325}
b9164398 1326
87046a60 1327static void timeout_process(struct vdec_mpeg4_hw_s *hw)
1328{
1329 if (hw->stat & STAT_VDEC_RUN) {
1330 amvdec_stop();
1331 hw->stat &= ~STAT_VDEC_RUN;
b9164398 1332 }
87046a60 1333 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_TIMEOUT_STATUS,
1334 "%s decoder timeout\n", __func__);
1335 reset_process_time(hw);
1336 hw->first_i_frame_ready = 0;
1337 hw->dec_result = DEC_RESULT_DONE;
1338 vdec_schedule_work(&hw->work);
1339}
b9164398 1340
87046a60 1341
1342static void check_timer_func(unsigned long arg)
1343{
1344 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)arg;
1345 struct vdec_s *vdec = hw_to_vdec(hw);
1346 unsigned int timeout_val = decode_timeout_val;
1347
1348 if (radr != 0) {
1349 if (rval != 0) {
1350 WRITE_VREG(radr, rval);
1351 pr_info("WRITE_VREG(%x,%x)\n", radr, rval);
1352 } else
1353 pr_info("READ_VREG(%x)=%x\n", radr, READ_VREG(radr));
1354 rval = 0;
1355 radr = 0;
1356 }
1357
1358 if (debug_enable == 0 &&
1359 (input_frame_based(vdec) ||
1360 (READ_VREG(VLD_MEM_VIFIFO_LEVEL) > 0x100)) &&
1361 (timeout_val > 0) &&
1362 (hw->start_process_time > 0) &&
1363 ((1000 * (jiffies - hw->start_process_time) / HZ)
1364 > timeout_val)) {
1365 if (hw->last_vld_level == READ_VREG(VLD_MEM_VIFIFO_LEVEL)) {
1366 if (hw->decode_timeout_count > 0)
1367 hw->decode_timeout_count--;
1368 if (hw->decode_timeout_count == 0)
1369 timeout_process(hw);
1370 }
1371 hw->last_vld_level = READ_VREG(VLD_MEM_VIFIFO_LEVEL);
1372 }
1373
1374 if (vdec->next_status == VDEC_STATUS_DISCONNECTED) {
1375 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1376 "vdec requested to be disconnected\n");
1377 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1378 vdec_schedule_work(&hw->work);
1379 return;
1380 }
1381
1382 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
b9164398
NQ		 1383}
1384
1385static int vmpeg4_hw_ctx_restore(struct vdec_mpeg4_hw_s *hw)
1386{
1387 int index;
1388
1389
1390 index = find_buffer(hw);
1391 if (index < 0)
1392 return -1;
1393
1394
1395 if (vmpeg4_canvas_init(hw) < 0)
1396 return -1;
1397
1398 /* prepare REF0 & REF1
1399 * points to the past two IP buffers
1400 * prepare REC_CANVAS_ADDR and ANC2_CANVAS_ADDR
1401 * points to the output buffer
1402 */
1403 if (hw->refs[0] == -1) {
1404 WRITE_VREG(MREG_REF0, (hw->refs[1] == -1) ? 0xffffffff :
1405 hw->canvas_spec[hw->refs[1]]);
1406 } else {
1407 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1408 hw->canvas_spec[hw->refs[0]]);
1409 }
1410 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1411 hw->canvas_spec[hw->refs[1]]);
1412
1413 WRITE_VREG(MREG_REF0, (hw->refs[0] == -1) ? 0xffffffff :
1414 hw->canvas_spec[hw->refs[0]]);
1415 WRITE_VREG(MREG_REF1, (hw->refs[1] == -1) ? 0xffffffff :
1416 hw->canvas_spec[hw->refs[1]]);
1417 WRITE_VREG(REC_CANVAS_ADDR, hw->canvas_spec[index]);
1418 WRITE_VREG(ANC2_CANVAS_ADDR, hw->canvas_spec[index]);
1419
87046a60 1420 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RESTORE,
1421 "restore ref0=0x%x, ref1=0x%x, rec=0x%x, ctx_valid=%d,index=%d\n",
b9164398
NQ		 1422 READ_VREG(MREG_REF0),
1423 READ_VREG(MREG_REF1),
1424 READ_VREG(REC_CANVAS_ADDR),
87046a60 1425 hw->ctx_valid, index);
b9164398
NQ		 1426
1427 /* notify ucode the buffer start address */
1428 WRITE_VREG(MEM_OFFSET_REG, hw->buf_start);
1429
1430 /* disable PSCALE for hardware sharing */
1431 WRITE_VREG(PSCALE_CTRL, 0);
1432
1433 WRITE_VREG(MREG_BUFFEROUT, 0);
1434
1435 /* clear mailbox interrupt */
1436 WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
1437
1438 /* enable mailbox interrupt */
1439 WRITE_VREG(ASSIST_MBOX1_MASK, 1);
1440
1441 /* clear repeat count */
1442 WRITE_VREG(MP4_NOT_CODED_CNT, 0);
1443
1444#ifdef NV21
1445 SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 17);
1446#endif
1447
1448#if 1/* /MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
1449 WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa);
1450#endif
1451
1452 WRITE_VREG(MP4_PIC_WH, (hw->ctx_valid) ?
1453 hw->reg_mp4_pic_wh :
1454 ((hw->vmpeg4_amstream_dec_info.width << 16) |
1455 hw->vmpeg4_amstream_dec_info.height));
1456 WRITE_VREG(MP4_SYS_RATE, hw->vmpeg4_amstream_dec_info.rate);
1457
1458 if (hw->ctx_valid) {
1459 WRITE_VREG(DC_AC_CTRL, hw->reg_dc_ac_ctrl);
1460 WRITE_VREG(IQIDCT_CONTROL, hw->reg_iqidct_control);
1461 WRITE_VREG(RESYNC_MARKER_LENGTH, hw->reg_resync_marker_length);
1462 WRITE_VREG(RV_AI_MB_COUNT, hw->reg_rv_ai_mb_count);
1463 }
1464 WRITE_VREG(MPEG1_2_REG, (hw->ctx_valid) ? hw->reg_mpeg1_2_reg : 1);
1465 WRITE_VREG(VCOP_CTRL_REG, hw->reg_vcop_ctrl_reg);
1466 WRITE_VREG(PIC_HEAD_INFO, hw->reg_pic_head_info);
1467 WRITE_VREG(SLICE_QP, hw->reg_slice_qp);
1468 WRITE_VREG(MB_INFO, hw->reg_mb_info);
1469
1470 if (hw->chunk) {
1471 /* frame based input */
1472 WRITE_VREG(MREG_INPUT, (hw->chunk->offset & 7) | (1<<7) |
1473 (hw->ctx_valid<<6));
1474 } else {
1475 /* stream based input */
1476 WRITE_VREG(MREG_INPUT, (hw->ctx_valid<<6));
1477 }
1478
1479 return 0;
1480}
1481
1482static void vmpeg4_local_init(struct vdec_mpeg4_hw_s *hw)
1483{
1484 int i;
1485
1486 hw->vmpeg4_ratio = hw->vmpeg4_amstream_dec_info.ratio;
1487
1488 hw->vmpeg4_ratio64 = hw->vmpeg4_amstream_dec_info.ratio64;
1489
1490 hw->vmpeg4_rotation =
1491 (((unsigned long) hw->vmpeg4_amstream_dec_info.param)
1492 >> 16) & 0xffff;
87046a60 1493 hw->sys_mp4_rate = hw->vmpeg4_amstream_dec_info.rate;
b9164398
NQ		 1494 hw->frame_width = hw->frame_height = hw->frame_dur = hw->frame_prog = 0;
1495
1496 hw->total_frame = 0;
1497
1498 hw->last_anch_pts = 0;
1499
1500 hw->last_anch_pts_us64 = 0;
1501
1502 hw->last_vop_time_inc = hw->last_duration = 0;
1503
1504 hw->vop_time_inc_since_last_anch = 0;
1505
1506 hw->frame_num_since_last_anch = 0;
87046a60 1507 hw->frame_num = 0;
1508 hw->put_num = 0;
1509 hw->run_count = 0;
1510 hw->not_run_ready = 0;
1511 hw->input_empty = 0;
1512 hw->peek_num = 0;
1513 hw->get_num = 0;
b9164398
NQ		 1514
1515 hw->pts_hit = hw->pts_missed = hw->pts_i_hit = hw->pts_i_missed = 0;
87046a60 1516 hw->refs[0] = -1;
1517 hw->refs[1] = -1;
1518 hw->first_i_frame_ready = 0;
1519 hw->drop_frame_count = 0;
1520 hw->buffer_not_ready = 0;
1521 hw->timeout_flag = 0;
b9164398
NQ		 1522
1523 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1524 hw->vfbuf_use[i] = 0;
1525
1526 INIT_KFIFO(hw->display_q);
1527 INIT_KFIFO(hw->newframe_q);
1528
1529 for (i = 0; i < VF_POOL_SIZE; i++) {
1530 const struct vframe_s *vf = &hw->vfpool[i];
e0614bf7 1531
b9164398
NQ		 1532 hw->vfpool[i].index = DECODE_BUFFER_NUM_MAX;
1533 kfifo_put(&hw->newframe_q, (const struct vframe_s *)vf);
1534 }
87046a60 1535 if (hw->mm_blk_handle) {
1536 decoder_bmmu_box_free(hw->mm_blk_handle);
1537 hw->mm_blk_handle = NULL;
1538 }
1539 hw->mm_blk_handle = decoder_bmmu_box_alloc_box(
1540 DRIVER_NAME,
1541 0,
1542 MAX_BMMU_BUFFER_NUM,
1543 4 + PAGE_SHIFT,
1544 CODEC_MM_FLAGS_CMA_CLEAR |
1545 CODEC_MM_FLAGS_FOR_VDECODER);
b9164398
NQ		 1546 INIT_WORK(&hw->work, vmpeg4_work);
1547}
1548
613b67bf 1549static s32 vmmpeg4_init(struct vdec_mpeg4_hw_s *hw)
b9164398
NQ		 1550{
1551 int trickmode_fffb = 0;
6fff1c64
NQ		 1552 int size = -1, fw_size = 0x1000 * 16;
1553 struct firmware_s *fw = NULL;
1554
1555 fw = vmalloc(sizeof(struct firmware_s) + fw_size);
1556 if (IS_ERR_OR_NULL(fw))
1557 return -ENOMEM;
1558
668e656d 1559 if (hw->vmpeg4_amstream_dec_info.format ==
6fff1c64 1560 VIDEO_DEC_FORMAT_MPEG4_5) {
87046a60 1561 size = get_firmware_data(VIDEO_DEC_MPEG4_5_MULTI, fw->data);
1562 strncpy(fw->name, "mmpeg4_mc_5", sizeof(fw->name));
6fff1c64
NQ		 1563 } else if (hw->vmpeg4_amstream_dec_info.format ==
1564 VIDEO_DEC_FORMAT_H263) {
87046a60 1565 size = get_firmware_data(VIDEO_DEC_H263_MULTI, fw->data);
1566 strncpy(fw->name, "mh263_mc", sizeof(fw->name));
8a9b0dfd 1567 } else
1568 pr_err("unsupport mpeg4 sub format %d\n",
1569 hw->vmpeg4_amstream_dec_info.format);
87046a60 1570 pr_info("mmpeg4 get fw %s, size %x\n", fw->name, size);
6fff1c64 1571 if (size < 0) {
87046a60 1572 pr_err("get firmware failed.");
6fff1c64
NQ		 1573 vfree(fw);
1574 return -1;
1575 }
1576
1577 fw->len = size;
1578 hw->fw = fw;
b9164398
NQ		 1579
1580 query_video_status(0, &trickmode_fffb);
1581
613b67bf 1582 pr_info("%s\n", __func__);
b9164398
NQ		 1583
1584 amvdec_enable();
1585
87046a60 1586 init_timer(&hw->check_timer);
1587 hw->check_timer.data = (unsigned long)hw;
1588 hw->check_timer.function = check_timer_func;
1589 hw->check_timer.expires = jiffies + CHECK_INTERVAL;
1590 hw->stat |= STAT_TIMER_ARM;
1591 hw->eos = 0;
1592 WRITE_VREG(DECODE_STOP_POS, udebug_flag);
1593
b9164398 1594 vmpeg4_local_init(hw);
87046a60 1595 wmb();
b9164398
NQ		 1596
1597 return 0;
1598}
1599
a6c89e96 1600static unsigned long run_ready(struct vdec_s *vdec, unsigned long mask)
b9164398
NQ		 1601{
1602 int index;
1603 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
87046a60 1604 if (hw->eos)
1605 return 0;
1606 if (vdec_stream_based(vdec) && (hw->init_flag == 0)
1607 && pre_decode_buf_level != 0) {
1608 u32 rp, wp, level;
1609
1610 rp = READ_PARSER_REG(PARSER_VIDEO_RP);
1611 wp = READ_PARSER_REG(PARSER_VIDEO_WP);
1612 if (wp < rp)
1613 level = vdec->input.size + wp - rp;
1614 else
1615 level = wp - rp;
1616 if (level < pre_decode_buf_level) {
1617 hw->not_run_ready++;
1618 return 0;
1619 }
1620 }
b9164398
NQ		 1621
1622 index = find_buffer(hw);
87046a60 1623 if (index >= DECODE_BUFFER_NUM_MAX) {
1624 hw->buffer_not_ready++;
1625 return 0;
1626 }
1627 hw->not_run_ready = 0;
1628 hw->buffer_not_ready = 0;
05afa03d
PY		 1629 if (vdec->parallel_dec == 1)
1630 return (unsigned long)(CORE_MASK_VDEC_1);
1631 else
1632 return (unsigned long)(CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
87046a60 1633}
1634
1635static unsigned char get_data_check_sum
1636 (struct vdec_mpeg4_hw_s *hw, int size)
1637{
1638 int jj;
1639 int sum = 0;
7d2e7e17
NQ		 1640 u8 *data = NULL;
1641
1642 if (!hw->chunk->block->is_mapped)
1643 data = codec_mm_vmap(hw->chunk->block->start +
1644 hw->chunk->offset, size);
1645 else
1646 data = ((u8 *)hw->chunk->block->start_virt) +
1647 hw->chunk->offset;
1648
87046a60 1649 for (jj = 0; jj < size; jj++)
1650 sum += data[jj];
7d2e7e17
NQ		 1651
1652 if (!hw->chunk->block->is_mapped)
1653 codec_mm_unmap_phyaddr(data);
87046a60 1654 return sum;
b9164398
NQ		 1655}
1656
a6c89e96
NQ		 1657static void run(struct vdec_s *vdec, unsigned long mask,
1658 void (*callback)(struct vdec_s *, void *), void *arg)
b9164398
NQ		 1659{
1660 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1661 int save_reg = READ_VREG(POWER_CTL_VLD);
87046a60 1662 int size, ret = 0;
b9164398 1663
87046a60 1664 hw->run_count++;
b9164398
NQ		 1665 /* reset everything except DOS_TOP[1] and APB_CBUS[0] */
1666 WRITE_VREG(DOS_SW_RESET0, 0xfffffff0);
1667 WRITE_VREG(DOS_SW_RESET0, 0);
1668 WRITE_VREG(POWER_CTL_VLD, save_reg);
1669
1670 hw->vdec_cb_arg = arg;
1671 hw->vdec_cb = callback;
87046a60 1672 vdec_reset_core(vdec);
1673 size = vdec_prepare_input(vdec, &hw->chunk);
1674 if (size < 0) {
1675 hw->input_empty++;
b9164398
NQ		 1676 hw->dec_result = DEC_RESULT_AGAIN;
1677 schedule_work(&hw->work);
b9164398
NQ		 1678 return;
1679 }
1680
87046a60 1681 if (input_frame_based(vdec)) {
7d2e7e17
NQ		 1682 u8 *data = NULL;
1683
1684 if (!hw->chunk->block->is_mapped)
1685 data = codec_mm_vmap(hw->chunk->block->start +
1686 hw->chunk->offset, size);
1687 else
1688 data = ((u8 *)hw->chunk->block->start_virt) +
1689 hw->chunk->offset;
1690
87046a60 1691 if (debug_enable & PRINT_FLAG_VDEC_STATUS
1692 ) {
1693 mmpeg4_debug_print(DECODE_ID(hw), 0,
1694 "%s: size 0x%x sum 0x%x %02x %02x %02x %02x %02x %02x .. %02x %02x %02x %02x\n",
1695 __func__, size, get_data_check_sum(hw, size),
1696 data[0], data[1], data[2], data[3],
1697 data[4], data[5], data[size - 4],
1698 data[size - 3], data[size - 2],
1699 data[size - 1]);
1700 }
1701 if (debug_enable & PRINT_FRAMEBASE_DATA
1702 ) {
1703 int jj;
7d2e7e17 1704
87046a60 1705 for (jj = 0; jj < size; jj++) {
1706 if ((jj & 0xf) == 0)
1707 mmpeg4_debug_print(DECODE_ID(hw),
1708 PRINT_FRAMEBASE_DATA,
1709 "%06x:", jj);
1710 mmpeg4_debug_print(DECODE_ID(hw),
1711 PRINT_FRAMEBASE_DATA,
1712 "%02x ", data[jj]);
1713 if (((jj + 1) & 0xf) == 0)
1714 mmpeg4_debug_print(DECODE_ID(hw),
1715 PRINT_FRAMEBASE_DATA,
1716 "\n");
1717 }
1718 }
b9164398 1719
7d2e7e17
NQ		 1720 if (!hw->chunk->block->is_mapped)
1721 codec_mm_unmap_phyaddr(data);
87046a60 1722 } else
1723 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_VDEC_STATUS,
1724 "%s: %x %x %x %x %x size 0x%x\n",
1725 __func__,
1726 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1727 READ_VREG(VLD_MEM_VIFIFO_WP),
1728 READ_VREG(VLD_MEM_VIFIFO_RP),
1729 READ_PARSER_REG(PARSER_VIDEO_RP),
1730 READ_PARSER_REG(PARSER_VIDEO_WP),
1731 size);
1732
1733 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_RUN_FLOW,
1734 "%s,%d, size=%d, %x %x %x %x %x\n",
1735 __func__, __LINE__, size,
1736 READ_VREG(VLD_MEM_VIFIFO_LEVEL),
1737 READ_VREG(VLD_MEM_VIFIFO_WP),
1738 READ_VREG(VLD_MEM_VIFIFO_RP),
1739 READ_PARSER_REG(PARSER_VIDEO_RP),
1740 READ_PARSER_REG(PARSER_VIDEO_WP));
b9164398
NQ		 1741
1742 hw->dec_result = DEC_RESULT_NONE;
158de7c4
HZ		 1743 if (vdec->mc_loaded) {
1744 /*firmware have load before,
1745 and not changes to another.
1746 ignore reload.
1747 */
1748 } else {
1749 ret = amvdec_vdec_loadmc_buf_ex(VFORMAT_MPEG4,hw->fw->name, vdec,
1750 hw->fw->data, hw->fw->len);
1751 if (ret < 0) {
1752 pr_err("[%d] %s: the %s fw loading failed, err: %x\n", vdec->id,
1753 hw->fw->name, tee_enabled() ? "TEE" : "local", ret);
1754 hw->dec_result = DEC_RESULT_FORCE_EXIT;
1755 schedule_work(&hw->work);
1756 return;
1757 }
1758 vdec->mc_loaded = 1;
1759 vdec->mc_type = VFORMAT_MPEG4;
b9164398 1760 }
b9164398
NQ		 1761 if (vmpeg4_hw_ctx_restore(hw) < 0) {
1762 hw->dec_result = DEC_RESULT_ERROR;
87046a60 1763 mmpeg4_debug_print(DECODE_ID(hw), 0,
1764 "amvdec_mpeg4: error HW context restore\n");
b9164398
NQ		 1765 schedule_work(&hw->work);
1766 return;
1767 }
87046a60 1768 hw->input_empty = 0;
1769 hw->last_vld_level = 0;
1770 start_process_time(hw);
1771 vdec_enable_input(vdec);
b9164398
NQ		 1772 /* wmb before ISR is handled */
1773 wmb();
1774
1775 amvdec_start();
87046a60 1776 hw->stat |= STAT_VDEC_RUN;
1777 mod_timer(&hw->check_timer, jiffies + CHECK_INTERVAL);
b9164398
NQ		 1778}
1779
87046a60 1780static int vmpeg4_stop(struct vdec_mpeg4_hw_s *hw)
1781{
1782 cancel_work_sync(&hw->work);
1783
1784 if (hw->mm_blk_handle) {
1785 decoder_bmmu_box_free(hw->mm_blk_handle);
1786 hw->mm_blk_handle = NULL;
1787 }
1788
1789 if (hw->stat & STAT_TIMER_ARM) {
1790 del_timer_sync(&hw->check_timer);
1791 hw->stat &= ~STAT_TIMER_ARM;
1792 }
1793
1794 if (hw->fw) {
1795 vfree(hw->fw);
1796 hw->fw = NULL;
1797 }
1798 return 0;
1799}
b9164398
NQ		 1800static void reset(struct vdec_s *vdec)
1801{
1802 struct vdec_mpeg4_hw_s *hw = (struct vdec_mpeg4_hw_s *)vdec->private;
1803
613b67bf 1804 pr_info("amvdec_mmpeg4: reset.\n");
b9164398
NQ		 1805
1806 vmpeg4_local_init(hw);
1807
1808 hw->ctx_valid = false;
1809}
1810
613b67bf 1811static int ammvdec_mpeg4_probe(struct platform_device *pdev)
b9164398
NQ		 1812{
1813 struct vdec_s *pdata = *(struct vdec_s **)pdev->dev.platform_data;
1814 struct vdec_mpeg4_hw_s *hw = NULL;
1815
613b67bf 1816 pr_info("%s [%d] probe start.\n", __func__, pdev->id);
b9164398
NQ		 1817
1818 if (pdata == NULL) {
613b67bf 1819 pr_err("%s memory resource undefined.\n", __func__);
b9164398
NQ		 1820 return -EFAULT;
1821 }
1822
613b67bf 1823 hw = vmalloc(sizeof(struct vdec_mpeg4_hw_s));
b9164398 1824 if (hw == NULL) {
87046a60 1825 pr_err("\namvdec_mpeg4 decoder driver alloc failed\n");
b9164398
NQ		 1826 return -ENOMEM;
1827 }
613b67bf 1828 memset(hw, 0, sizeof(struct vdec_mpeg4_hw_s));
b9164398
NQ		 1829
1830 pdata->private = hw;
1831 pdata->dec_status = dec_status;
1832 /* pdata->set_trickmode = set_trickmode; */
1833 pdata->run_ready = run_ready;
1834 pdata->run = run;
1835 pdata->reset = reset;
1836 pdata->irq_handler = vmpeg4_isr;
87046a60 1837 pdata->threaded_irq_handler = vmpeg4_isr_thread_fn;
1838 pdata->dump_state = vmpeg4_dump_state;
b9164398
NQ		 1839
1840 if (pdata->use_vfm_path)
1841 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
1842 VFM_DEC_PROVIDER_NAME);
1843 else
1844 snprintf(pdata->vf_provider_name, VDEC_PROVIDER_NAME_SIZE,
1845 PROVIDER_NAME ".%02x", pdev->id & 0xff);
1846
05afa03d
PY		 1847 if (pdata->parallel_dec == 1) {
1848 int i;
1849 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++)
1850 hw->canvas_spec[i] = 0xffffff;
1851 }
1852
87046a60 1853 vf_provider_init(&pdata->vframe_provider,
1854 pdata->vf_provider_name, &vf_provider_ops, pdata);
b9164398
NQ		 1855
1856 platform_set_drvdata(pdev, pdata);
b9164398 1857 hw->platform_dev = pdev;
b9164398 1858
87046a60 1859/*
1860 hw->cma_dev = pdata->cma_dev;
b9164398
NQ		 1861 hw->cma_alloc_count = PAGE_ALIGN(DEFAULT_MEM_SIZE) / PAGE_SIZE;
1862 hw->cma_alloc_addr = codec_mm_alloc_for_dma(MEM_NAME,
1863 hw->cma_alloc_count,
1864 4, CODEC_MM_FLAGS_FOR_VDECODER);
1865
1866 if (!hw->cma_alloc_addr) {
1867 pr_err("codec_mm alloc failed, request buf size 0x%lx\n",
1868 hw->cma_alloc_count * PAGE_SIZE);
1869 hw->cma_alloc_count = 0;
613b67bf
HZ		 1870 if (hw) {
1871 vfree((void *)hw);
1872 hw = NULL;
1873 }
b9164398
NQ		 1874 return -ENOMEM;
1875 }
1876 hw->buf_start = hw->cma_alloc_addr;
1877 hw->buf_size = DEFAULT_MEM_SIZE;
87046a60 1878*/
8a9b0dfd 1879 if (pdata->sys_info) {
b9164398 1880 hw->vmpeg4_amstream_dec_info = *pdata->sys_info;
8a9b0dfd 1881 if ((hw->vmpeg4_amstream_dec_info.height != 0) &&
1882 (hw->vmpeg4_amstream_dec_info.width >
1883 (MAX_MPEG4_SUPPORT_SIZE/hw->vmpeg4_amstream_dec_info.height))) {
1884 pr_info("ammvdec_mpeg4: oversize, unsupport: %d*%d\n",
1885 hw->vmpeg4_amstream_dec_info.width,
1886 hw->vmpeg4_amstream_dec_info.height);
1887 pdata->dec_status = NULL;
1888 vfree((void *)hw);
1889 hw = NULL;
1890 return -EFAULT;
1891 }
1892 }
87046a60 1893 mmpeg4_debug_print(DECODE_ID(hw), PRINT_FLAG_ERROR,
1894 "W:%d,H:%d,rate=%d\n",
1895 hw->vmpeg4_amstream_dec_info.width,
1896 hw->vmpeg4_amstream_dec_info.height,
1897 hw->vmpeg4_amstream_dec_info.rate);
1898 hw->vmpeg4_amstream_dec_info.height = 0;
1899 hw->vmpeg4_amstream_dec_info.width = 0;
1900
613b67bf
HZ		 1901 if (vmmpeg4_init(hw) < 0) {
1902 pr_err("%s init failed.\n", __func__);
87046a60 1903/*
613b67bf
HZ		 1904 if (hw->cma_alloc_addr) {
1905 codec_mm_free_for_dma(MEM_NAME, hw->cma_alloc_addr);
1906 hw->cma_alloc_count = 0;
1907 }
87046a60 1908*/
613b67bf
HZ		 1909 if (hw) {
1910 vfree((void *)hw);
1911 hw = NULL;
1912 }
9b670a2d 1913 pdata->dec_status = NULL;
b9164398
NQ		 1914 return -ENODEV;
1915 }
05afa03d
PY		 1916 if (pdata->parallel_dec == 1)
1917 vdec_core_request(pdata, CORE_MASK_VDEC_1);
1918 else {
1919 vdec_core_request(pdata, CORE_MASK_VDEC_1 | CORE_MASK_HEVC
a6c89e96 1920 | CORE_MASK_COMBINE);
05afa03d 1921 }
a6c89e96 1922
b9164398
NQ		 1923 return 0;
1924}
1925
613b67bf 1926static int ammvdec_mpeg4_remove(struct platform_device *pdev)
b9164398
NQ		 1927{
1928 struct vdec_mpeg4_hw_s *hw =
1929 (struct vdec_mpeg4_hw_s *)
1930 (((struct vdec_s *)(platform_get_drvdata(pdev)))->private);
05afa03d
PY		 1931 struct vdec_s *vdec = hw_to_vdec(hw);
1932 int i;
b9164398 1933
87046a60 1934 vmpeg4_stop(hw);
1935 /*
b9164398
NQ		 1936 if (hw->cma_alloc_addr) {
1937 pr_info("codec_mm release buffer 0x%lx\n", hw->cma_alloc_addr);
1938 codec_mm_free_for_dma(MEM_NAME, hw->cma_alloc_addr);
1939 hw->cma_alloc_count = 0;
1940 }
87046a60 1941 */
05afa03d
PY		 1942 if (vdec->parallel_dec == 1)
1943 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1);
1944 else
1945 vdec_core_release(hw_to_vdec(hw), CORE_MASK_VDEC_1 | CORE_MASK_HEVC);
87046a60 1946 vdec_set_status(hw_to_vdec(hw), VDEC_STATUS_DISCONNECTED);
b9164398 1947
05afa03d
PY		 1948 if (vdec->parallel_dec == 1) {
1949 for (i = 0; i < DECODE_BUFFER_NUM_MAX; i++) {
1950 vdec->free_canvas_ex(canvas_y(hw->canvas_spec[i]), vdec->id);
1951 vdec->free_canvas_ex(canvas_u(hw->canvas_spec[i]), vdec->id);
1952 }
1953 }
1954
b9164398
NQ		 1955 pr_info("pts hit %d, pts missed %d, i hit %d, missed %d\n", hw->pts_hit,
1956 hw->pts_missed, hw->pts_i_hit, hw->pts_i_missed);
1957 pr_info("total frame %d, rate %d\n", hw->total_frame,
1958 hw->vmpeg4_amstream_dec_info.rate);
87046a60 1959 vfree((void *)hw);
1960 hw = NULL;
b9164398
NQ		 1961
1962 return 0;
1963}
1964
1965/****************************************/
1966
613b67bf
HZ		 1967static struct platform_driver ammvdec_mpeg4_driver = {
1968 .probe = ammvdec_mpeg4_probe,
1969 .remove = ammvdec_mpeg4_remove,
b9164398
NQ		 1970#ifdef CONFIG_PM
1971 .suspend = amvdec_suspend,
1972 .resume = amvdec_resume,
1973#endif
1974 .driver = {
1975 .name = DRIVER_NAME,
1976 }
1977};
1978
1979static struct codec_profile_t amvdec_mpeg4_profile = {
1980 .name = "mmpeg4",
1981 .profile = ""
1982};
1983
613b67bf 1984static int __init ammvdec_mpeg4_driver_init_module(void)
b9164398 1985{
613b67bf 1986 pr_info("%s \n", __func__);
b9164398 1987
613b67bf
HZ		 1988 if (platform_driver_register(&ammvdec_mpeg4_driver)) {
1989 pr_err("failed to register ammvdec_mpeg4 driver\n");
b9164398
NQ		 1990 return -ENODEV;
1991 }
1992 vcodec_profile_register(&amvdec_mpeg4_profile);
1993 return 0;
1994}
1995
613b67bf 1996static void __exit ammvdec_mpeg4_driver_remove_module(void)
b9164398 1997{
613b67bf 1998 pr_info("ammvdec_mpeg4 module remove.\n");
b9164398 1999
613b67bf 2000 platform_driver_unregister(&ammvdec_mpeg4_driver);
b9164398
NQ		 2001}
2002
2003/****************************************/
87046a60 2004module_param(debug_enable, uint, 0664);
2005MODULE_PARM_DESC(debug_enable,
2006 "\n ammvdec_mpeg4 debug enable\n");
2007
2008module_param(radr, uint, 0664);
2009MODULE_PARM_DESC(radr, "\nradr\n");
2010
2011module_param(rval, uint, 0664);
2012MODULE_PARM_DESC(rval, "\nrval\n");
2013
2014module_param(decode_timeout_val, uint, 0664);
2015MODULE_PARM_DESC(decode_timeout_val, "\n ammvdec_mpeg4 decode_timeout_val\n");
2016
2017module_param_array(max_process_time, uint, &max_decode_instance_num, 0664);
2018
2019module_param(pre_decode_buf_level, int, 0664);
2020MODULE_PARM_DESC(pre_decode_buf_level,
2021 "\n ammvdec_ mpeg4 pre_decode_buf_level\n");
b9164398 2022
87046a60 2023module_param(udebug_flag, uint, 0664);
2024MODULE_PARM_DESC(udebug_flag, "\n ammvdec_mpeg4 udebug_flag\n");
613b67bf
HZ		 2025module_init(ammvdec_mpeg4_driver_init_module);
2026module_exit(ammvdec_mpeg4_driver_remove_module);
b9164398
NQ		 2027
2028MODULE_DESCRIPTION("AMLOGIC MPEG4 Video Decoder Driver");
2029MODULE_LICENSE("GPL");
2030MODULE_AUTHOR("Tim Yao <timyao@amlogic.com>");
2031