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[COMMON][9610] drivers : fix typec role swap
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / drivers / firmware / arm_scpi.c
CommitLineData
8cb7cf56
SH		 1/*
2 * System Control and Power Interface (SCPI) Message Protocol driver
3 *
4 * SCPI Message Protocol is used between the System Control Processor(SCP)
5 * and the Application Processors(AP). The Message Handling Unit(MHU)
6 * provides a mechanism for inter-processor communication between SCP's
7 * Cortex M3 and AP.
8 *
9 * SCP offers control and management of the core/cluster power states,
10 * various power domain DVFS including the core/cluster, certain system
11 * clocks configuration, thermal sensors and many others.
12 *
13 * Copyright (C) 2015 ARM Ltd.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms and conditions of the GNU General Public License,
17 * version 2, as published by the Free Software Foundation.
18 *
19 * This program is distributed in the hope it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 * more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program. If not, see <http://www.gnu.org/licenses/>.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/bitmap.h>
31#include <linux/device.h>
32#include <linux/err.h>
33#include <linux/export.h>
34#include <linux/io.h>
35#include <linux/kernel.h>
36#include <linux/list.h>
37#include <linux/mailbox_client.h>
38#include <linux/module.h>
39#include <linux/of_address.h>
40#include <linux/of_platform.h>
41#include <linux/printk.h>
45ca7df7 42#include <linux/pm_opp.h>
8cb7cf56
SH		 43#include <linux/scpi_protocol.h>
44#include <linux/slab.h>
45#include <linux/sort.h>
46#include <linux/spinlock.h>
47
48#define CMD_ID_SHIFT 0
49#define CMD_ID_MASK 0x7f
50#define CMD_TOKEN_ID_SHIFT 8
51#define CMD_TOKEN_ID_MASK 0xff
52#define CMD_DATA_SIZE_SHIFT 16
53#define CMD_DATA_SIZE_MASK 0x1ff
4dfe32d5
NA		 54#define CMD_LEGACY_DATA_SIZE_SHIFT 20
55#define CMD_LEGACY_DATA_SIZE_MASK 0x1ff
8cb7cf56
SH		 56#define PACK_SCPI_CMD(cmd_id, tx_sz) \
57 ((((cmd_id) & CMD_ID_MASK) << CMD_ID_SHIFT) | \
58 (((tx_sz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT))
59#define ADD_SCPI_TOKEN(cmd, token) \
60 ((cmd) |= (((token) & CMD_TOKEN_ID_MASK) << CMD_TOKEN_ID_SHIFT))
4dfe32d5
NA		 61#define PACK_LEGACY_SCPI_CMD(cmd_id, tx_sz) \
62 ((((cmd_id) & CMD_ID_MASK) << CMD_ID_SHIFT) | \
63 (((tx_sz) & CMD_LEGACY_DATA_SIZE_MASK) << CMD_LEGACY_DATA_SIZE_SHIFT))
8cb7cf56
SH		 64
65#define CMD_SIZE(cmd) (((cmd) >> CMD_DATA_SIZE_SHIFT) & CMD_DATA_SIZE_MASK)
4dfe32d5
NA		 66#define CMD_LEGACY_SIZE(cmd) (((cmd) >> CMD_LEGACY_DATA_SIZE_SHIFT) & \
67 CMD_LEGACY_DATA_SIZE_MASK)
8cb7cf56
SH		 68#define CMD_UNIQ_MASK (CMD_TOKEN_ID_MASK << CMD_TOKEN_ID_SHIFT | CMD_ID_MASK)
69#define CMD_XTRACT_UNIQ(cmd) ((cmd) & CMD_UNIQ_MASK)
70
71#define SCPI_SLOT 0
72
73#define MAX_DVFS_DOMAINS 8
bb789cd1 74#define MAX_DVFS_OPPS 16
8cb7cf56
SH		 75#define DVFS_LATENCY(hdr) (le32_to_cpu(hdr) >> 16)
76#define DVFS_OPP_COUNT(hdr) ((le32_to_cpu(hdr) >> 8) & 0xff)
77
78#define PROTOCOL_REV_MINOR_BITS 16
79#define PROTOCOL_REV_MINOR_MASK ((1U << PROTOCOL_REV_MINOR_BITS) - 1)
80#define PROTOCOL_REV_MAJOR(x) ((x) >> PROTOCOL_REV_MINOR_BITS)
81#define PROTOCOL_REV_MINOR(x) ((x) & PROTOCOL_REV_MINOR_MASK)
82
83#define FW_REV_MAJOR_BITS 24
84#define FW_REV_MINOR_BITS 16
85#define FW_REV_PATCH_MASK ((1U << FW_REV_MINOR_BITS) - 1)
86#define FW_REV_MINOR_MASK ((1U << FW_REV_MAJOR_BITS) - 1)
87#define FW_REV_MAJOR(x) ((x) >> FW_REV_MAJOR_BITS)
88#define FW_REV_MINOR(x) (((x) & FW_REV_MINOR_MASK) >> FW_REV_MINOR_BITS)
89#define FW_REV_PATCH(x) ((x) & FW_REV_PATCH_MASK)
90
3bdd8843 91#define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
8cb7cf56
SH		 92
93enum scpi_error_codes {
94 SCPI_SUCCESS = 0, /* Success */
95 SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */
96 SCPI_ERR_ALIGN = 2, /* Invalid alignment */
97 SCPI_ERR_SIZE = 3, /* Invalid size */
98 SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */
99 SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */
100 SCPI_ERR_RANGE = 6, /* Value out of range */
101 SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */
102 SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */
103 SCPI_ERR_PWRSTATE = 9, /* Invalid power state */
104 SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */
105 SCPI_ERR_DEVICE = 11, /* Device error */
106 SCPI_ERR_BUSY = 12, /* Device busy */
107 SCPI_ERR_MAX
108};
109
761d0efe 110/* SCPI Standard commands */
8cb7cf56
SH		 111enum scpi_std_cmd {
112 SCPI_CMD_INVALID = 0x00,
113 SCPI_CMD_SCPI_READY = 0x01,
114 SCPI_CMD_SCPI_CAPABILITIES = 0x02,
115 SCPI_CMD_SET_CSS_PWR_STATE = 0x03,
116 SCPI_CMD_GET_CSS_PWR_STATE = 0x04,
117 SCPI_CMD_SET_SYS_PWR_STATE = 0x05,
118 SCPI_CMD_SET_CPU_TIMER = 0x06,
119 SCPI_CMD_CANCEL_CPU_TIMER = 0x07,
120 SCPI_CMD_DVFS_CAPABILITIES = 0x08,
121 SCPI_CMD_GET_DVFS_INFO = 0x09,
122 SCPI_CMD_SET_DVFS = 0x0a,
123 SCPI_CMD_GET_DVFS = 0x0b,
124 SCPI_CMD_GET_DVFS_STAT = 0x0c,
125 SCPI_CMD_CLOCK_CAPABILITIES = 0x0d,
126 SCPI_CMD_GET_CLOCK_INFO = 0x0e,
127 SCPI_CMD_SET_CLOCK_VALUE = 0x0f,
128 SCPI_CMD_GET_CLOCK_VALUE = 0x10,
129 SCPI_CMD_PSU_CAPABILITIES = 0x11,
130 SCPI_CMD_GET_PSU_INFO = 0x12,
131 SCPI_CMD_SET_PSU = 0x13,
132 SCPI_CMD_GET_PSU = 0x14,
133 SCPI_CMD_SENSOR_CAPABILITIES = 0x15,
134 SCPI_CMD_SENSOR_INFO = 0x16,
135 SCPI_CMD_SENSOR_VALUE = 0x17,
136 SCPI_CMD_SENSOR_CFG_PERIODIC = 0x18,
137 SCPI_CMD_SENSOR_CFG_BOUNDS = 0x19,
138 SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1a,
139 SCPI_CMD_SET_DEVICE_PWR_STATE = 0x1b,
140 SCPI_CMD_GET_DEVICE_PWR_STATE = 0x1c,
141 SCPI_CMD_COUNT
142};
143
4dfe32d5
NA		 144/* SCPI Legacy Commands */
145enum legacy_scpi_std_cmd {
146 LEGACY_SCPI_CMD_INVALID = 0x00,
147 LEGACY_SCPI_CMD_SCPI_READY = 0x01,
148 LEGACY_SCPI_CMD_SCPI_CAPABILITIES = 0x02,
149 LEGACY_SCPI_CMD_EVENT = 0x03,
150 LEGACY_SCPI_CMD_SET_CSS_PWR_STATE = 0x04,
151 LEGACY_SCPI_CMD_GET_CSS_PWR_STATE = 0x05,
152 LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT = 0x06,
153 LEGACY_SCPI_CMD_GET_PWR_STATE_STAT = 0x07,
154 LEGACY_SCPI_CMD_SYS_PWR_STATE = 0x08,
155 LEGACY_SCPI_CMD_L2_READY = 0x09,
156 LEGACY_SCPI_CMD_SET_AP_TIMER = 0x0a,
157 LEGACY_SCPI_CMD_CANCEL_AP_TIME = 0x0b,
158 LEGACY_SCPI_CMD_DVFS_CAPABILITIES = 0x0c,
159 LEGACY_SCPI_CMD_GET_DVFS_INFO = 0x0d,
160 LEGACY_SCPI_CMD_SET_DVFS = 0x0e,
161 LEGACY_SCPI_CMD_GET_DVFS = 0x0f,
162 LEGACY_SCPI_CMD_GET_DVFS_STAT = 0x10,
163 LEGACY_SCPI_CMD_SET_RTC = 0x11,
164 LEGACY_SCPI_CMD_GET_RTC = 0x12,
165 LEGACY_SCPI_CMD_CLOCK_CAPABILITIES = 0x13,
166 LEGACY_SCPI_CMD_SET_CLOCK_INDEX = 0x14,
167 LEGACY_SCPI_CMD_SET_CLOCK_VALUE = 0x15,
168 LEGACY_SCPI_CMD_GET_CLOCK_VALUE = 0x16,
169 LEGACY_SCPI_CMD_PSU_CAPABILITIES = 0x17,
170 LEGACY_SCPI_CMD_SET_PSU = 0x18,
171 LEGACY_SCPI_CMD_GET_PSU = 0x19,
172 LEGACY_SCPI_CMD_SENSOR_CAPABILITIES = 0x1a,
173 LEGACY_SCPI_CMD_SENSOR_INFO = 0x1b,
174 LEGACY_SCPI_CMD_SENSOR_VALUE = 0x1c,
175 LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC = 0x1d,
176 LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS = 0x1e,
177 LEGACY_SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1f,
178 LEGACY_SCPI_CMD_COUNT
179};
180
181/* List all commands that are required to go through the high priority link */
182static int legacy_hpriority_cmds[] = {
183 LEGACY_SCPI_CMD_GET_CSS_PWR_STATE,
184 LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT,
185 LEGACY_SCPI_CMD_GET_PWR_STATE_STAT,
186 LEGACY_SCPI_CMD_SET_DVFS,
187 LEGACY_SCPI_CMD_GET_DVFS,
188 LEGACY_SCPI_CMD_SET_RTC,
189 LEGACY_SCPI_CMD_GET_RTC,
190 LEGACY_SCPI_CMD_SET_CLOCK_INDEX,
191 LEGACY_SCPI_CMD_SET_CLOCK_VALUE,
192 LEGACY_SCPI_CMD_GET_CLOCK_VALUE,
193 LEGACY_SCPI_CMD_SET_PSU,
194 LEGACY_SCPI_CMD_GET_PSU,
195 LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC,
196 LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS,
197};
198
199/* List all commands used by this driver, used as indexes */
761d0efe
SH		 200enum scpi_drv_cmds {
201 CMD_SCPI_CAPABILITIES = 0,
202 CMD_GET_CLOCK_INFO,
203 CMD_GET_CLOCK_VALUE,
204 CMD_SET_CLOCK_VALUE,
205 CMD_GET_DVFS,
206 CMD_SET_DVFS,
207 CMD_GET_DVFS_INFO,
208 CMD_SENSOR_CAPABILITIES,
209 CMD_SENSOR_INFO,
210 CMD_SENSOR_VALUE,
211 CMD_SET_DEVICE_PWR_STATE,
212 CMD_GET_DEVICE_PWR_STATE,
213 CMD_MAX_COUNT,
214};
215
216static int scpi_std_commands[CMD_MAX_COUNT] = {
217 SCPI_CMD_SCPI_CAPABILITIES,
218 SCPI_CMD_GET_CLOCK_INFO,
219 SCPI_CMD_GET_CLOCK_VALUE,
220 SCPI_CMD_SET_CLOCK_VALUE,
221 SCPI_CMD_GET_DVFS,
222 SCPI_CMD_SET_DVFS,
223 SCPI_CMD_GET_DVFS_INFO,
224 SCPI_CMD_SENSOR_CAPABILITIES,
225 SCPI_CMD_SENSOR_INFO,
226 SCPI_CMD_SENSOR_VALUE,
227 SCPI_CMD_SET_DEVICE_PWR_STATE,
228 SCPI_CMD_GET_DEVICE_PWR_STATE,
229};
230
4dfe32d5
NA		 231static int scpi_legacy_commands[CMD_MAX_COUNT] = {
232 LEGACY_SCPI_CMD_SCPI_CAPABILITIES,
233 -1, /* GET_CLOCK_INFO */
234 LEGACY_SCPI_CMD_GET_CLOCK_VALUE,
235 LEGACY_SCPI_CMD_SET_CLOCK_VALUE,
236 LEGACY_SCPI_CMD_GET_DVFS,
237 LEGACY_SCPI_CMD_SET_DVFS,
238 LEGACY_SCPI_CMD_GET_DVFS_INFO,
239 LEGACY_SCPI_CMD_SENSOR_CAPABILITIES,
240 LEGACY_SCPI_CMD_SENSOR_INFO,
241 LEGACY_SCPI_CMD_SENSOR_VALUE,
242 -1, /* SET_DEVICE_PWR_STATE */
243 -1, /* GET_DEVICE_PWR_STATE */
244};
245
8cb7cf56
SH		 246struct scpi_xfer {
247 u32 slot; /* has to be first element */
248 u32 cmd;
249 u32 status;
250 const void *tx_buf;
251 void *rx_buf;
252 unsigned int tx_len;
253 unsigned int rx_len;
254 struct list_head node;
255 struct completion done;
256};
257
258struct scpi_chan {
259 struct mbox_client cl;
260 struct mbox_chan *chan;
261 void __iomem *tx_payload;
262 void __iomem *rx_payload;
263 struct list_head rx_pending;
264 struct list_head xfers_list;
265 struct scpi_xfer *xfers;
266 spinlock_t rx_lock; /* locking for the rx pending list */
267 struct mutex xfers_lock;
268 u8 token;
269};
270
271struct scpi_drvinfo {
272 u32 protocol_version;
273 u32 firmware_version;
4dfe32d5 274 bool is_legacy;
8cb7cf56 275 int num_chans;
761d0efe 276 int *commands;
4dfe32d5 277 DECLARE_BITMAP(cmd_priority, LEGACY_SCPI_CMD_COUNT);
8cb7cf56
SH		 278 atomic_t next_chan;
279 struct scpi_ops *scpi_ops;
280 struct scpi_chan *channels;
281 struct scpi_dvfs_info *dvfs[MAX_DVFS_DOMAINS];
282};
283
284/*
285 * The SCP firmware only executes in little-endian mode, so any buffers
286 * shared through SCPI should have their contents converted to little-endian
287 */
288struct scpi_shared_mem {
289 __le32 command;
290 __le32 status;
291 u8 payload[0];
292} __packed;
293
4dfe32d5
NA		 294struct legacy_scpi_shared_mem {
295 __le32 status;
296 u8 payload[0];
297} __packed;
298
8cb7cf56
SH		 299struct scp_capabilities {
300 __le32 protocol_version;
301 __le32 event_version;
302 __le32 platform_version;
303 __le32 commands[4];
304} __packed;
305
306struct clk_get_info {
307 __le16 id;
308 __le16 flags;
309 __le32 min_rate;
310 __le32 max_rate;
311 u8 name[20];
312} __packed;
313
314struct clk_get_value {
315 __le32 rate;
316} __packed;
317
318struct clk_set_value {
319 __le16 id;
320 __le16 reserved;
321 __le32 rate;
322} __packed;
323
4dfe32d5
NA		 324struct legacy_clk_set_value {
325 __le32 rate;
326 __le16 id;
327 __le16 reserved;
328} __packed;
329
8cb7cf56
SH		 330struct dvfs_info {
331 __le32 header;
332 struct {
333 __le32 freq;
334 __le32 m_volt;
335 } opps[MAX_DVFS_OPPS];
336} __packed;
337
8cb7cf56
SH		 338struct dvfs_set {
339 u8 domain;
340 u8 index;
341} __packed;
342
38a1bdc9
PA		 343struct sensor_capabilities {
344 __le16 sensors;
345} __packed;
346
347struct _scpi_sensor_info {
348 __le16 sensor_id;
349 u8 class;
350 u8 trigger_type;
351 char name[20];
352};
353
354struct sensor_value {
2e874159
SH		 355 __le32 lo_val;
356 __le32 hi_val;
38a1bdc9
PA		 357} __packed;
358
37a441dc 359struct dev_pstate_set {
0d301768 360 __le16 dev_id;
37a441dc
SH		 361 u8 pstate;
362} __packed;
363
8cb7cf56
SH		 364static struct scpi_drvinfo *scpi_info;
365
366static int scpi_linux_errmap[SCPI_ERR_MAX] = {
367 /* better than switch case as long as return value is continuous */
368 0, /* SCPI_SUCCESS */
369 -EINVAL, /* SCPI_ERR_PARAM */
370 -ENOEXEC, /* SCPI_ERR_ALIGN */
371 -EMSGSIZE, /* SCPI_ERR_SIZE */
372 -EINVAL, /* SCPI_ERR_HANDLER */
373 -EACCES, /* SCPI_ERR_ACCESS */
374 -ERANGE, /* SCPI_ERR_RANGE */
375 -ETIMEDOUT, /* SCPI_ERR_TIMEOUT */
376 -ENOMEM, /* SCPI_ERR_NOMEM */
377 -EINVAL, /* SCPI_ERR_PWRSTATE */
378 -EOPNOTSUPP, /* SCPI_ERR_SUPPORT */
379 -EIO, /* SCPI_ERR_DEVICE */
380 -EBUSY, /* SCPI_ERR_BUSY */
381};
382
383static inline int scpi_to_linux_errno(int errno)
384{
385 if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
386 return scpi_linux_errmap[errno];
387 return -EIO;
388}
389
390static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd)
391{
392 unsigned long flags;
393 struct scpi_xfer *t, *match = NULL;
394
395 spin_lock_irqsave(&ch->rx_lock, flags);
396 if (list_empty(&ch->rx_pending)) {
397 spin_unlock_irqrestore(&ch->rx_lock, flags);
398 return;
399 }
400
4dfe32d5
NA		 401 /* Command type is not replied by the SCP Firmware in legacy Mode
402 * We should consider that command is the head of pending RX commands
403 * if the list is not empty. In TX only mode, the list would be empty.
404 */
405 if (scpi_info->is_legacy) {
406 match = list_first_entry(&ch->rx_pending, struct scpi_xfer,
407 node);
408 list_del(&match->node);
409 } else {
410 list_for_each_entry(t, &ch->rx_pending, node)
411 if (CMD_XTRACT_UNIQ(t->cmd) == CMD_XTRACT_UNIQ(cmd)) {
412 list_del(&t->node);
413 match = t;
414 break;
415 }
416 }
8cb7cf56
SH		 417 /* check if wait_for_completion is in progress or timed-out */
418 if (match && !completion_done(&match->done)) {
4dfe32d5
NA		 419 unsigned int len;
420
421 if (scpi_info->is_legacy) {
422 struct legacy_scpi_shared_mem *mem = ch->rx_payload;
423
424 /* RX Length is not replied by the legacy Firmware */
425 len = match->rx_len;
426
427 match->status = le32_to_cpu(mem->status);
428 memcpy_fromio(match->rx_buf, mem->payload, len);
429 } else {
430 struct scpi_shared_mem *mem = ch->rx_payload;
431
432 len = min(match->rx_len, CMD_SIZE(cmd));
433
434 match->status = le32_to_cpu(mem->status);
435 memcpy_fromio(match->rx_buf, mem->payload, len);
436 }
8cb7cf56 437
8cb7cf56
SH		 438 if (match->rx_len > len)
439 memset(match->rx_buf + len, 0, match->rx_len - len);
440 complete(&match->done);
441 }
442 spin_unlock_irqrestore(&ch->rx_lock, flags);
443}
444
445static void scpi_handle_remote_msg(struct mbox_client *c, void *msg)
446{
447 struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
448 struct scpi_shared_mem *mem = ch->rx_payload;
4dfe32d5
NA		 449 u32 cmd = 0;
450
451 if (!scpi_info->is_legacy)
452 cmd = le32_to_cpu(mem->command);
8cb7cf56
SH		 453
454 scpi_process_cmd(ch, cmd);
455}
456
457static void scpi_tx_prepare(struct mbox_client *c, void *msg)
458{
459 unsigned long flags;
460 struct scpi_xfer *t = msg;
461 struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
462 struct scpi_shared_mem *mem = (struct scpi_shared_mem *)ch->tx_payload;
463
4dfe32d5
NA		 464 if (t->tx_buf) {
465 if (scpi_info->is_legacy)
466 memcpy_toio(ch->tx_payload, t->tx_buf, t->tx_len);
467 else
468 memcpy_toio(mem->payload, t->tx_buf, t->tx_len);
469 }
470
8cb7cf56
SH		 471 if (t->rx_buf) {
472 if (!(++ch->token))
473 ++ch->token;
474 ADD_SCPI_TOKEN(t->cmd, ch->token);
475 spin_lock_irqsave(&ch->rx_lock, flags);
476 list_add_tail(&t->node, &ch->rx_pending);
477 spin_unlock_irqrestore(&ch->rx_lock, flags);
478 }
4dfe32d5
NA		 479
480 if (!scpi_info->is_legacy)
481 mem->command = cpu_to_le32(t->cmd);
8cb7cf56
SH		 482}
483
484static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch)
485{
486 struct scpi_xfer *t;
487
488 mutex_lock(&ch->xfers_lock);
489 if (list_empty(&ch->xfers_list)) {
490 mutex_unlock(&ch->xfers_lock);
491 return NULL;
492 }
493 t = list_first_entry(&ch->xfers_list, struct scpi_xfer, node);
494 list_del(&t->node);
495 mutex_unlock(&ch->xfers_lock);
496 return t;
497}
498
499static void put_scpi_xfer(struct scpi_xfer *t, struct scpi_chan *ch)
500{
501 mutex_lock(&ch->xfers_lock);
502 list_add_tail(&t->node, &ch->xfers_list);
503 mutex_unlock(&ch->xfers_lock);
504}
505
761d0efe 506static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len,
8cb7cf56
SH		 507 void *rx_buf, unsigned int rx_len)
508{
509 int ret;
510 u8 chan;
761d0efe 511 u8 cmd;
8cb7cf56
SH		 512 struct scpi_xfer *msg;
513 struct scpi_chan *scpi_chan;
514
761d0efe
SH		 515 if (scpi_info->commands[idx] < 0)
516 return -EOPNOTSUPP;
517
518 cmd = scpi_info->commands[idx];
519
4dfe32d5
NA		 520 if (scpi_info->is_legacy)
521 chan = test_bit(cmd, scpi_info->cmd_priority) ? 1 : 0;
522 else
523 chan = atomic_inc_return(&scpi_info->next_chan) %
524 scpi_info->num_chans;
8cb7cf56
SH		 525 scpi_chan = scpi_info->channels + chan;
526
527 msg = get_scpi_xfer(scpi_chan);
528 if (!msg)
529 return -ENOMEM;
530
4dfe32d5
NA		 531 if (scpi_info->is_legacy) {
532 msg->cmd = PACK_LEGACY_SCPI_CMD(cmd, tx_len);
533 msg->slot = msg->cmd;
534 } else {
535 msg->slot = BIT(SCPI_SLOT);
536 msg->cmd = PACK_SCPI_CMD(cmd, tx_len);
537 }
8cb7cf56
SH		 538 msg->tx_buf = tx_buf;
539 msg->tx_len = tx_len;
540 msg->rx_buf = rx_buf;
541 msg->rx_len = rx_len;
c511fa3f 542 reinit_completion(&msg->done);
8cb7cf56
SH		 543
544 ret = mbox_send_message(scpi_chan->chan, msg);
545 if (ret < 0 || !rx_buf)
546 goto out;
547
548 if (!wait_for_completion_timeout(&msg->done, MAX_RX_TIMEOUT))
549 ret = -ETIMEDOUT;
550 else
551 /* first status word */
dd9a1d69 552 ret = msg->status;
8cb7cf56
SH		 553out:
554 if (ret < 0 && rx_buf) /* remove entry from the list if timed-out */
555 scpi_process_cmd(scpi_chan, msg->cmd);
556
557 put_scpi_xfer(msg, scpi_chan);
558 /* SCPI error codes > 0, translate them to Linux scale*/
559 return ret > 0 ? scpi_to_linux_errno(ret) : ret;
560}
561
562static u32 scpi_get_version(void)
563{
564 return scpi_info->protocol_version;
565}
566
567static int
568scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max)
569{
570 int ret;
571 struct clk_get_info clk;
572 __le16 le_clk_id = cpu_to_le16(clk_id);
573
761d0efe 574 ret = scpi_send_message(CMD_GET_CLOCK_INFO, &le_clk_id,
8cb7cf56
SH		 575 sizeof(le_clk_id), &clk, sizeof(clk));
576 if (!ret) {
577 *min = le32_to_cpu(clk.min_rate);
578 *max = le32_to_cpu(clk.max_rate);
579 }
580 return ret;
581}
582
583static unsigned long scpi_clk_get_val(u16 clk_id)
584{
585 int ret;
586 struct clk_get_value clk;
587 __le16 le_clk_id = cpu_to_le16(clk_id);
588
761d0efe 589 ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id,
8cb7cf56 590 sizeof(le_clk_id), &clk, sizeof(clk));
761d0efe 591
8cb7cf56
SH		 592 return ret ? ret : le32_to_cpu(clk.rate);
593}
594
595static int scpi_clk_set_val(u16 clk_id, unsigned long rate)
596{
597 int stat;
598 struct clk_set_value clk = {
599 .id = cpu_to_le16(clk_id),
600 .rate = cpu_to_le32(rate)
601 };
602
761d0efe 603 return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),
8cb7cf56
SH		 604 &stat, sizeof(stat));
605}
606
4dfe32d5
NA		 607static int legacy_scpi_clk_set_val(u16 clk_id, unsigned long rate)
608{
609 int stat;
610 struct legacy_clk_set_value clk = {
611 .id = cpu_to_le16(clk_id),
612 .rate = cpu_to_le32(rate)
613 };
614
615 return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),
616 &stat, sizeof(stat));
617}
618
8cb7cf56
SH		 619static int scpi_dvfs_get_idx(u8 domain)
620{
621 int ret;
f9d91de0 622 u8 dvfs_idx;
8cb7cf56 623
761d0efe 624 ret = scpi_send_message(CMD_GET_DVFS, &domain, sizeof(domain),
f9d91de0 625 &dvfs_idx, sizeof(dvfs_idx));
761d0efe 626
f9d91de0 627 return ret ? ret : dvfs_idx;
8cb7cf56
SH		 628}
629
630static int scpi_dvfs_set_idx(u8 domain, u8 index)
631{
632 int stat;
633 struct dvfs_set dvfs = {domain, index};
634
761d0efe 635 return scpi_send_message(CMD_SET_DVFS, &dvfs, sizeof(dvfs),
8cb7cf56
SH		 636 &stat, sizeof(stat));
637}
638
639static int opp_cmp_func(const void *opp1, const void *opp2)
640{
641 const struct scpi_opp *t1 = opp1, *t2 = opp2;
642
643 return t1->freq - t2->freq;
644}
645
646static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
647{
648 struct scpi_dvfs_info *info;
649 struct scpi_opp *opp;
650 struct dvfs_info buf;
651 int ret, i;
652
653 if (domain >= MAX_DVFS_DOMAINS)
654 return ERR_PTR(-EINVAL);
655
656 if (scpi_info->dvfs[domain]) /* data already populated */
657 return scpi_info->dvfs[domain];
658
761d0efe 659 ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain),
8cb7cf56 660 &buf, sizeof(buf));
8cb7cf56
SH		 661 if (ret)
662 return ERR_PTR(ret);
663
664 info = kmalloc(sizeof(*info), GFP_KERNEL);
665 if (!info)
666 return ERR_PTR(-ENOMEM);
667
668 info->count = DVFS_OPP_COUNT(buf.header);
669 info->latency = DVFS_LATENCY(buf.header) * 1000; /* uS to nS */
670
671 info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL);
672 if (!info->opps) {
673 kfree(info);
674 return ERR_PTR(-ENOMEM);
675 }
676
677 for (i = 0, opp = info->opps; i < info->count; i++, opp++) {
678 opp->freq = le32_to_cpu(buf.opps[i].freq);
679 opp->m_volt = le32_to_cpu(buf.opps[i].m_volt);
680 }
681
682 sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL);
683
684 scpi_info->dvfs[domain] = info;
685 return info;
686}
687
45ca7df7
SH		 688static int scpi_dev_domain_id(struct device *dev)
689{
690 struct of_phandle_args clkspec;
691
692 if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells",
693 0, &clkspec))
694 return -EINVAL;
695
696 return clkspec.args[0];
697}
698
699static struct scpi_dvfs_info *scpi_dvfs_info(struct device *dev)
700{
701 int domain = scpi_dev_domain_id(dev);
702
703 if (domain < 0)
704 return ERR_PTR(domain);
705
706 return scpi_dvfs_get_info(domain);
707}
708
709static int scpi_dvfs_get_transition_latency(struct device *dev)
710{
711 struct scpi_dvfs_info *info = scpi_dvfs_info(dev);
712
713 if (IS_ERR(info))
714 return PTR_ERR(info);
715
716 if (!info->latency)
717 return 0;
718
719 return info->latency;
720}
721
722static int scpi_dvfs_add_opps_to_device(struct device *dev)
723{
724 int idx, ret;
725 struct scpi_opp *opp;
726 struct scpi_dvfs_info *info = scpi_dvfs_info(dev);
727
728 if (IS_ERR(info))
729 return PTR_ERR(info);
730
731 if (!info->opps)
732 return -EIO;
733
734 for (opp = info->opps, idx = 0; idx < info->count; idx++, opp++) {
735 ret = dev_pm_opp_add(dev, opp->freq, opp->m_volt * 1000);
736 if (ret) {
737 dev_warn(dev, "failed to add opp %uHz %umV\n",
738 opp->freq, opp->m_volt);
739 while (idx-- > 0)
740 dev_pm_opp_remove(dev, (--opp)->freq);
741 return ret;
742 }
743 }
744 return 0;
745}
746
38a1bdc9
PA		 747static int scpi_sensor_get_capability(u16 *sensors)
748{
749 struct sensor_capabilities cap_buf;
750 int ret;
751
761d0efe 752 ret = scpi_send_message(CMD_SENSOR_CAPABILITIES, NULL, 0, &cap_buf,
38a1bdc9
PA		 753 sizeof(cap_buf));
754 if (!ret)
755 *sensors = le16_to_cpu(cap_buf.sensors);
756
757 return ret;
758}
759
760static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info)
761{
762 __le16 id = cpu_to_le16(sensor_id);
763 struct _scpi_sensor_info _info;
764 int ret;
765
761d0efe 766 ret = scpi_send_message(CMD_SENSOR_INFO, &id, sizeof(id),
38a1bdc9
PA		 767 &_info, sizeof(_info));
768 if (!ret) {
769 memcpy(info, &_info, sizeof(*info));
770 info->sensor_id = le16_to_cpu(_info.sensor_id);
771 }
772
773 return ret;
774}
775
3678b98f 776static int scpi_sensor_get_value(u16 sensor, u64 *val)
38a1bdc9 777{
dd9a1d69 778 __le16 id = cpu_to_le16(sensor);
38a1bdc9
PA		 779 struct sensor_value buf;
780 int ret;
781
761d0efe 782 ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id),
38a1bdc9 783 &buf, sizeof(buf));
a766347b
MB		 784 if (ret)
785 return ret;
786
787 if (scpi_info->is_legacy)
788 /* only 32-bits supported, hi_val can be junk */
789 *val = le32_to_cpu(buf.lo_val);
790 else
2e874159
SH		 791 *val = (u64)le32_to_cpu(buf.hi_val) << 32 |
792 le32_to_cpu(buf.lo_val);
38a1bdc9 793
a766347b 794 return 0;
38a1bdc9
PA		 795}
796
37a441dc
SH		 797static int scpi_device_get_power_state(u16 dev_id)
798{
799 int ret;
800 u8 pstate;
801 __le16 id = cpu_to_le16(dev_id);
802
761d0efe 803 ret = scpi_send_message(CMD_GET_DEVICE_PWR_STATE, &id,
37a441dc
SH		 804 sizeof(id), &pstate, sizeof(pstate));
805 return ret ? ret : pstate;
806}
807
808static int scpi_device_set_power_state(u16 dev_id, u8 pstate)
809{
810 int stat;
811 struct dev_pstate_set dev_set = {
812 .dev_id = cpu_to_le16(dev_id),
813 .pstate = pstate,
814 };
815
761d0efe 816 return scpi_send_message(CMD_SET_DEVICE_PWR_STATE, &dev_set,
37a441dc
SH		 817 sizeof(dev_set), &stat, sizeof(stat));
818}
819
8cb7cf56
SH		 820static struct scpi_ops scpi_ops = {
821 .get_version = scpi_get_version,
822 .clk_get_range = scpi_clk_get_range,
823 .clk_get_val = scpi_clk_get_val,
824 .clk_set_val = scpi_clk_set_val,
825 .dvfs_get_idx = scpi_dvfs_get_idx,
826 .dvfs_set_idx = scpi_dvfs_set_idx,
827 .dvfs_get_info = scpi_dvfs_get_info,
45ca7df7
SH		 828 .device_domain_id = scpi_dev_domain_id,
829 .get_transition_latency = scpi_dvfs_get_transition_latency,
830 .add_opps_to_device = scpi_dvfs_add_opps_to_device,
38a1bdc9
PA		 831 .sensor_get_capability = scpi_sensor_get_capability,
832 .sensor_get_info = scpi_sensor_get_info,
833 .sensor_get_value = scpi_sensor_get_value,
37a441dc
SH		 834 .device_get_power_state = scpi_device_get_power_state,
835 .device_set_power_state = scpi_device_set_power_state,
8cb7cf56
SH		 836};
837
838struct scpi_ops *get_scpi_ops(void)
839{
840 return scpi_info ? scpi_info->scpi_ops : NULL;
841}
842EXPORT_SYMBOL_GPL(get_scpi_ops);
843
844static int scpi_init_versions(struct scpi_drvinfo *info)
845{
846 int ret;
847 struct scp_capabilities caps;
848
761d0efe 849 ret = scpi_send_message(CMD_SCPI_CAPABILITIES, NULL, 0,
8cb7cf56
SH		 850 &caps, sizeof(caps));
851 if (!ret) {
852 info->protocol_version = le32_to_cpu(caps.protocol_version);
853 info->firmware_version = le32_to_cpu(caps.platform_version);
854 }
abd3e805
NA		 855 /* Ignore error if not implemented */
856 if (scpi_info->is_legacy && ret == -EOPNOTSUPP)
857 return 0;
858
8cb7cf56
SH		 859 return ret;
860}
861
862static ssize_t protocol_version_show(struct device *dev,
863 struct device_attribute *attr, char *buf)
864{
865 struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
866
867 return sprintf(buf, "%d.%d\n",
868 PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
869 PROTOCOL_REV_MINOR(scpi_info->protocol_version));
870}
871static DEVICE_ATTR_RO(protocol_version);
872
873static ssize_t firmware_version_show(struct device *dev,
874 struct device_attribute *attr, char *buf)
875{
876 struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
877
878 return sprintf(buf, "%d.%d.%d\n",
879 FW_REV_MAJOR(scpi_info->firmware_version),
880 FW_REV_MINOR(scpi_info->firmware_version),
881 FW_REV_PATCH(scpi_info->firmware_version));
882}
883static DEVICE_ATTR_RO(firmware_version);
884
885static struct attribute *versions_attrs[] = {
886 &dev_attr_firmware_version.attr,
887 &dev_attr_protocol_version.attr,
888 NULL,
889};
890ATTRIBUTE_GROUPS(versions);
891
892static void
893scpi_free_channels(struct device *dev, struct scpi_chan *pchan, int count)
894{
895 int i;
896
897 for (i = 0; i < count && pchan->chan; i++, pchan++) {
898 mbox_free_channel(pchan->chan);
899 devm_kfree(dev, pchan->xfers);
900 devm_iounmap(dev, pchan->rx_payload);
901 }
902}
903
904static int scpi_remove(struct platform_device *pdev)
905{
906 int i;
907 struct device *dev = &pdev->dev;
908 struct scpi_drvinfo *info = platform_get_drvdata(pdev);
909
910 scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */
911
912 of_platform_depopulate(dev);
913 sysfs_remove_groups(&dev->kobj, versions_groups);
914 scpi_free_channels(dev, info->channels, info->num_chans);
915 platform_set_drvdata(pdev, NULL);
916
917 for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) {
918 kfree(info->dvfs[i]->opps);
919 kfree(info->dvfs[i]);
920 }
921 devm_kfree(dev, info->channels);
922 devm_kfree(dev, info);
923
924 return 0;
925}
926
927#define MAX_SCPI_XFERS 10
928static int scpi_alloc_xfer_list(struct device *dev, struct scpi_chan *ch)
929{
930 int i;
931 struct scpi_xfer *xfers;
932
933 xfers = devm_kzalloc(dev, MAX_SCPI_XFERS * sizeof(*xfers), GFP_KERNEL);
934 if (!xfers)
935 return -ENOMEM;
936
937 ch->xfers = xfers;
c511fa3f
AK		 938 for (i = 0; i < MAX_SCPI_XFERS; i++, xfers++) {
939 init_completion(&xfers->done);
8cb7cf56 940 list_add_tail(&xfers->node, &ch->xfers_list);
c511fa3f
AK		 941 }
942
8cb7cf56
SH		 943 return 0;
944}
945
8358c6b5
SH		 946static const struct of_device_id legacy_scpi_of_match[] = {
947 {.compatible = "arm,scpi-pre-1.0"},
948 {},
949};
950
8cb7cf56
SH		 951static int scpi_probe(struct platform_device *pdev)
952{
953 int count, idx, ret;
954 struct resource res;
955 struct scpi_chan *scpi_chan;
956 struct device *dev = &pdev->dev;
957 struct device_node *np = dev->of_node;
958
959 scpi_info = devm_kzalloc(dev, sizeof(*scpi_info), GFP_KERNEL);
960 if (!scpi_info)
961 return -ENOMEM;
962
8358c6b5
SH		 963 if (of_match_device(legacy_scpi_of_match, &pdev->dev))
964 scpi_info->is_legacy = true;
965
8cb7cf56
SH		 966 count = of_count_phandle_with_args(np, "mboxes", "#mbox-cells");
967 if (count < 0) {
9deee319 968 dev_err(dev, "no mboxes property in '%pOF'\n", np);
8cb7cf56
SH		 969 return -ENODEV;
970 }
971
972 scpi_chan = devm_kcalloc(dev, count, sizeof(*scpi_chan), GFP_KERNEL);
973 if (!scpi_chan)
974 return -ENOMEM;
975
976 for (idx = 0; idx < count; idx++) {
977 resource_size_t size;
978 struct scpi_chan *pchan = scpi_chan + idx;
979 struct mbox_client *cl = &pchan->cl;
980 struct device_node *shmem = of_parse_phandle(np, "shmem", idx);
981
b079bd55
PC		 982 ret = of_address_to_resource(shmem, 0, &res);
983 of_node_put(shmem);
984 if (ret) {
8cb7cf56 985 dev_err(dev, "failed to get SCPI payload mem resource\n");
8cb7cf56
SH		 986 goto err;
987 }
988
989 size = resource_size(&res);
990 pchan->rx_payload = devm_ioremap(dev, res.start, size);
991 if (!pchan->rx_payload) {
992 dev_err(dev, "failed to ioremap SCPI payload\n");
993 ret = -EADDRNOTAVAIL;
994 goto err;
995 }
996 pchan->tx_payload = pchan->rx_payload + (size >> 1);
997
998 cl->dev = dev;
999 cl->rx_callback = scpi_handle_remote_msg;
1000 cl->tx_prepare = scpi_tx_prepare;
1001 cl->tx_block = true;
3bdd8843 1002 cl->tx_tout = 20;
8cb7cf56
SH		 1003 cl->knows_txdone = false; /* controller can't ack */
1004
1005 INIT_LIST_HEAD(&pchan->rx_pending);
1006 INIT_LIST_HEAD(&pchan->xfers_list);
1007 spin_lock_init(&pchan->rx_lock);
1008 mutex_init(&pchan->xfers_lock);
1009
1010 ret = scpi_alloc_xfer_list(dev, pchan);
1011 if (!ret) {
1012 pchan->chan = mbox_request_channel(cl, idx);
1013 if (!IS_ERR(pchan->chan))
1014 continue;
1015 ret = PTR_ERR(pchan->chan);
1016 if (ret != -EPROBE_DEFER)
1017 dev_err(dev, "failed to get channel%d err %d\n",
1018 idx, ret);
1019 }
1020err:
1021 scpi_free_channels(dev, scpi_chan, idx);
1022 scpi_info = NULL;
1023 return ret;
1024 }
1025
1026 scpi_info->channels = scpi_chan;
1027 scpi_info->num_chans = count;
761d0efe
SH		 1028 scpi_info->commands = scpi_std_commands;
1029
8cb7cf56
SH		 1030 platform_set_drvdata(pdev, scpi_info);
1031
4dfe32d5
NA		 1032 if (scpi_info->is_legacy) {
1033 /* Replace with legacy variants */
1034 scpi_ops.clk_set_val = legacy_scpi_clk_set_val;
1035 scpi_info->commands = scpi_legacy_commands;
1036
1037 /* Fill priority bitmap */
1038 for (idx = 0; idx < ARRAY_SIZE(legacy_hpriority_cmds); idx++)
1039 set_bit(legacy_hpriority_cmds[idx],
1040 scpi_info->cmd_priority);
1041 }
1042
8cb7cf56
SH		 1043 ret = scpi_init_versions(scpi_info);
1044 if (ret) {
1045 dev_err(dev, "incorrect or no SCP firmware found\n");
1046 scpi_remove(pdev);
1047 return ret;
1048 }
1049
1050 _dev_info(dev, "SCP Protocol %d.%d Firmware %d.%d.%d version\n",
1051 PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
1052 PROTOCOL_REV_MINOR(scpi_info->protocol_version),
1053 FW_REV_MAJOR(scpi_info->firmware_version),
1054 FW_REV_MINOR(scpi_info->firmware_version),
1055 FW_REV_PATCH(scpi_info->firmware_version));
1056 scpi_info->scpi_ops = &scpi_ops;
1057
1058 ret = sysfs_create_groups(&dev->kobj, versions_groups);
1059 if (ret)
1060 dev_err(dev, "unable to create sysfs version group\n");
1061
1062 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1063}
1064
1065static const struct of_device_id scpi_of_match[] = {
1066 {.compatible = "arm,scpi"},
8358c6b5 1067 {.compatible = "arm,scpi-pre-1.0"},
8cb7cf56
SH		 1068 {},
1069};
1070
1071MODULE_DEVICE_TABLE(of, scpi_of_match);
1072
1073static struct platform_driver scpi_driver = {
1074 .driver = {
1075 .name = "scpi_protocol",
1076 .of_match_table = scpi_of_match,
1077 },
1078 .probe = scpi_probe,
1079 .remove = scpi_remove,
1080};
1081module_platform_driver(scpi_driver);
1082
1083MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
1084MODULE_DESCRIPTION("ARM SCPI mailbox protocol driver");
1085MODULE_LICENSE("GPL v2");