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da9bb1d2 AC |
1 | # |
2 | # EDAC Kconfig | |
4577ca55 | 3 | # Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com |
da9bb1d2 AC |
4 | # Licensed and distributed under the GPL |
5 | # | |
da9bb1d2 | 6 | |
751cb5e5 | 7 | menuconfig EDAC |
4577ca55 | 8 | bool "EDAC - error detection and reporting" |
e25df120 | 9 | depends on HAS_IOMEM |
4c6a1c13 | 10 | depends on X86 || PPC |
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11 | help |
12 | EDAC is designed to report errors in the core system. | |
13 | These are low-level errors that are reported in the CPU or | |
8cb2a398 DT |
14 | supporting chipset or other subsystems: |
15 | memory errors, cache errors, PCI errors, thermal throttling, etc.. | |
16 | If unsure, select 'Y'. | |
da9bb1d2 | 17 | |
57c432b5 TS |
18 | If this code is reporting problems on your system, please |
19 | see the EDAC project web pages for more information at: | |
20 | ||
21 | <http://bluesmoke.sourceforge.net/> | |
22 | ||
23 | and: | |
24 | ||
25 | <http://buttersideup.com/edacwiki> | |
26 | ||
27 | There is also a mailing list for the EDAC project, which can | |
28 | be found via the sourceforge page. | |
29 | ||
751cb5e5 | 30 | if EDAC |
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31 | |
32 | comment "Reporting subsystems" | |
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33 | |
34 | config EDAC_DEBUG | |
35 | bool "Debugging" | |
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36 | help |
37 | This turns on debugging information for the entire EDAC | |
38 | sub-system. You can insert module with "debug_level=x", current | |
39 | there're four debug levels (x=0,1,2,3 from low to high). | |
40 | Usually you should select 'N'. | |
41 | ||
cc18e3cd HM |
42 | config EDAC_DEBUG_VERBOSE |
43 | bool "More verbose debugging" | |
44 | depends on EDAC_DEBUG | |
45 | help | |
46 | This option makes debugging information more verbose. | |
47 | Source file name and line number where debugging message | |
48 | printed will be added to debugging message. | |
49 | ||
da9bb1d2 AC |
50 | config EDAC_MM_EDAC |
51 | tristate "Main Memory EDAC (Error Detection And Correction) reporting" | |
da9bb1d2 AC |
52 | default y |
53 | help | |
54 | Some systems are able to detect and correct errors in main | |
55 | memory. EDAC can report statistics on memory error | |
56 | detection and correction (EDAC - or commonly referred to ECC | |
57 | errors). EDAC will also try to decode where these errors | |
58 | occurred so that a particular failing memory module can be | |
59 | replaced. If unsure, select 'Y'. | |
60 | ||
61 | ||
62 | config EDAC_AMD76X | |
63 | tristate "AMD 76x (760, 762, 768)" | |
90cbc45b | 64 | depends on EDAC_MM_EDAC && PCI && X86_32 |
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65 | help |
66 | Support for error detection and correction on the AMD 76x | |
67 | series of chipsets used with the Athlon processor. | |
68 | ||
69 | config EDAC_E7XXX | |
70 | tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | |
39f1d8d3 | 71 | depends on EDAC_MM_EDAC && PCI && X86_32 |
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72 | help |
73 | Support for error detection and correction on the Intel | |
74 | E7205, E7500, E7501 and E7505 server chipsets. | |
75 | ||
76 | config EDAC_E752X | |
5135b797 | 77 | tristate "Intel e752x (e7520, e7525, e7320) and 3100" |
da960a6a | 78 | depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG |
da9bb1d2 AC |
79 | help |
80 | Support for error detection and correction on the Intel | |
81 | E7520, E7525, E7320 server chipsets. | |
82 | ||
5a2c675c TS |
83 | config EDAC_I82443BXGX |
84 | tristate "Intel 82443BX/GX (440BX/GX)" | |
85 | depends on EDAC_MM_EDAC && PCI && X86_32 | |
28f96eea | 86 | depends on BROKEN |
5a2c675c TS |
87 | help |
88 | Support for error detection and correction on the Intel | |
89 | 82443BX/GX memory controllers (440BX/GX chipsets). | |
90 | ||
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91 | config EDAC_I82875P |
92 | tristate "Intel 82875p (D82875P, E7210)" | |
39f1d8d3 | 93 | depends on EDAC_MM_EDAC && PCI && X86_32 |
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94 | help |
95 | Support for error detection and correction on the Intel | |
96 | DP82785P and E7210 server chipsets. | |
97 | ||
420390f0 RD |
98 | config EDAC_I82975X |
99 | tristate "Intel 82975x (D82975x)" | |
100 | depends on EDAC_MM_EDAC && PCI && X86 | |
101 | help | |
102 | Support for error detection and correction on the Intel | |
103 | DP82975x server chipsets. | |
104 | ||
535c6a53 JU |
105 | config EDAC_I3000 |
106 | tristate "Intel 3000/3010" | |
f5c0454c | 107 | depends on EDAC_MM_EDAC && PCI && X86 |
535c6a53 JU |
108 | help |
109 | Support for error detection and correction on the Intel | |
110 | 3000 and 3010 server chipsets. | |
111 | ||
df8bc08c HM |
112 | config EDAC_X38 |
113 | tristate "Intel X38" | |
114 | depends on EDAC_MM_EDAC && PCI && X86 | |
115 | help | |
116 | Support for error detection and correction on the Intel | |
117 | X38 server chipsets. | |
118 | ||
920c8df6 MCC |
119 | config EDAC_I5400 |
120 | tristate "Intel 5400 (Seaburg) chipsets" | |
121 | depends on EDAC_MM_EDAC && PCI && X86 | |
122 | help | |
123 | Support for error detection and correction the Intel | |
124 | i5400 MCH chipset (Seaburg). | |
125 | ||
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126 | config EDAC_I82860 |
127 | tristate "Intel 82860" | |
39f1d8d3 | 128 | depends on EDAC_MM_EDAC && PCI && X86_32 |
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129 | help |
130 | Support for error detection and correction on the Intel | |
131 | 82860 chipset. | |
132 | ||
133 | config EDAC_R82600 | |
134 | tristate "Radisys 82600 embedded chipset" | |
39f1d8d3 | 135 | depends on EDAC_MM_EDAC && PCI && X86_32 |
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136 | help |
137 | Support for error detection and correction on the Radisys | |
138 | 82600 embedded chipset. | |
139 | ||
eb60705a EW |
140 | config EDAC_I5000 |
141 | tristate "Intel Greencreek/Blackford chipset" | |
142 | depends on EDAC_MM_EDAC && X86 && PCI | |
143 | help | |
144 | Support for error detection and correction the Intel | |
145 | Greekcreek/Blackford chipsets. | |
146 | ||
8f421c59 AJ |
147 | config EDAC_I5100 |
148 | tristate "Intel San Clemente MCH" | |
149 | depends on EDAC_MM_EDAC && X86 && PCI | |
150 | help | |
151 | Support for error detection and correction the Intel | |
152 | San Clemente MCH. | |
153 | ||
a9a753d5 DJ |
154 | config EDAC_MPC85XX |
155 | tristate "Freescale MPC85xx" | |
156 | depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx | |
157 | help | |
158 | Support for error detection and correction on the Freescale | |
159 | MPC8560, MPC8540, MPC8548 | |
160 | ||
4f4aeeab DJ |
161 | config EDAC_MV64X60 |
162 | tristate "Marvell MV64x60" | |
163 | depends on EDAC_MM_EDAC && MV64X60 | |
164 | help | |
165 | Support for error detection and correction on the Marvell | |
166 | MV64360 and MV64460 chipsets. | |
167 | ||
7d8536fb EM |
168 | config EDAC_PASEMI |
169 | tristate "PA Semi PWRficient" | |
170 | depends on EDAC_MM_EDAC && PCI | |
ddcc3050 | 171 | depends on PPC_PASEMI |
7d8536fb EM |
172 | help |
173 | Support for error detection and correction on PA Semi | |
174 | PWRficient. | |
175 | ||
48764e41 BH |
176 | config EDAC_CELL |
177 | tristate "Cell Broadband Engine memory controller" | |
def434c2 | 178 | depends on EDAC_MM_EDAC && PPC_CELL_COMMON |
48764e41 BH |
179 | help |
180 | Support for error detection and correction on the | |
181 | Cell Broadband Engine internal memory controller | |
182 | on platform without a hypervisor | |
7d8536fb | 183 | |
dba7a77c GE |
184 | config EDAC_PPC4XX |
185 | tristate "PPC4xx IBM DDR2 Memory Controller" | |
186 | depends on EDAC_MM_EDAC && 4xx | |
187 | help | |
188 | This enables support for EDAC on the ECC memory used | |
189 | with the IBM DDR2 memory controller found in various | |
190 | PowerPC 4xx embedded processors such as the 405EX[r], | |
191 | 440SP, 440SPe, 460EX, 460GT and 460SX. | |
192 | ||
e8765584 HC |
193 | config EDAC_AMD8131 |
194 | tristate "AMD8131 HyperTransport PCI-X Tunnel" | |
195 | depends on EDAC_MM_EDAC && PCI | |
196 | help | |
197 | Support for error detection and correction on the | |
198 | AMD8131 HyperTransport PCI-X Tunnel chip. | |
199 | ||
751cb5e5 | 200 | endif # EDAC |