Commit | Line | Data |
---|---|---|
da9bb1d2 AC |
1 | # |
2 | # EDAC Kconfig | |
3 | # Copyright (c) 2003 Linux Networx | |
4 | # Licensed and distributed under the GPL | |
5 | # | |
da9bb1d2 | 6 | |
751cb5e5 | 7 | menuconfig EDAC |
b113a3f7 | 8 | bool "EDAC - error detection and reporting (EXPERIMENTAL)" |
e25df120 | 9 | depends on HAS_IOMEM |
b113a3f7 | 10 | depends on EXPERIMENTAL |
4c6a1c13 | 11 | depends on X86 || PPC |
da9bb1d2 AC |
12 | help |
13 | EDAC is designed to report errors in the core system. | |
14 | These are low-level errors that are reported in the CPU or | |
8cb2a398 DT |
15 | supporting chipset or other subsystems: |
16 | memory errors, cache errors, PCI errors, thermal throttling, etc.. | |
17 | If unsure, select 'Y'. | |
da9bb1d2 | 18 | |
57c432b5 TS |
19 | If this code is reporting problems on your system, please |
20 | see the EDAC project web pages for more information at: | |
21 | ||
22 | <http://bluesmoke.sourceforge.net/> | |
23 | ||
24 | and: | |
25 | ||
26 | <http://buttersideup.com/edacwiki> | |
27 | ||
28 | There is also a mailing list for the EDAC project, which can | |
29 | be found via the sourceforge page. | |
30 | ||
751cb5e5 | 31 | if EDAC |
da9bb1d2 AC |
32 | |
33 | comment "Reporting subsystems" | |
da9bb1d2 AC |
34 | |
35 | config EDAC_DEBUG | |
36 | bool "Debugging" | |
da9bb1d2 AC |
37 | help |
38 | This turns on debugging information for the entire EDAC | |
39 | sub-system. You can insert module with "debug_level=x", current | |
40 | there're four debug levels (x=0,1,2,3 from low to high). | |
41 | Usually you should select 'N'. | |
42 | ||
cc18e3cd HM |
43 | config EDAC_DEBUG_VERBOSE |
44 | bool "More verbose debugging" | |
45 | depends on EDAC_DEBUG | |
46 | help | |
47 | This option makes debugging information more verbose. | |
48 | Source file name and line number where debugging message | |
49 | printed will be added to debugging message. | |
50 | ||
da9bb1d2 AC |
51 | config EDAC_MM_EDAC |
52 | tristate "Main Memory EDAC (Error Detection And Correction) reporting" | |
da9bb1d2 AC |
53 | default y |
54 | help | |
55 | Some systems are able to detect and correct errors in main | |
56 | memory. EDAC can report statistics on memory error | |
57 | detection and correction (EDAC - or commonly referred to ECC | |
58 | errors). EDAC will also try to decode where these errors | |
59 | occurred so that a particular failing memory module can be | |
60 | replaced. If unsure, select 'Y'. | |
61 | ||
62 | ||
63 | config EDAC_AMD76X | |
64 | tristate "AMD 76x (760, 762, 768)" | |
90cbc45b | 65 | depends on EDAC_MM_EDAC && PCI && X86_32 |
da9bb1d2 AC |
66 | help |
67 | Support for error detection and correction on the AMD 76x | |
68 | series of chipsets used with the Athlon processor. | |
69 | ||
70 | config EDAC_E7XXX | |
71 | tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | |
39f1d8d3 | 72 | depends on EDAC_MM_EDAC && PCI && X86_32 |
da9bb1d2 AC |
73 | help |
74 | Support for error detection and correction on the Intel | |
75 | E7205, E7500, E7501 and E7505 server chipsets. | |
76 | ||
77 | config EDAC_E752X | |
5135b797 | 78 | tristate "Intel e752x (e7520, e7525, e7320) and 3100" |
da960a6a | 79 | depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG |
da9bb1d2 AC |
80 | help |
81 | Support for error detection and correction on the Intel | |
82 | E7520, E7525, E7320 server chipsets. | |
83 | ||
5a2c675c TS |
84 | config EDAC_I82443BXGX |
85 | tristate "Intel 82443BX/GX (440BX/GX)" | |
86 | depends on EDAC_MM_EDAC && PCI && X86_32 | |
28f96eea | 87 | depends on BROKEN |
5a2c675c TS |
88 | help |
89 | Support for error detection and correction on the Intel | |
90 | 82443BX/GX memory controllers (440BX/GX chipsets). | |
91 | ||
da9bb1d2 AC |
92 | config EDAC_I82875P |
93 | tristate "Intel 82875p (D82875P, E7210)" | |
39f1d8d3 | 94 | depends on EDAC_MM_EDAC && PCI && X86_32 |
da9bb1d2 AC |
95 | help |
96 | Support for error detection and correction on the Intel | |
97 | DP82785P and E7210 server chipsets. | |
98 | ||
420390f0 RD |
99 | config EDAC_I82975X |
100 | tristate "Intel 82975x (D82975x)" | |
101 | depends on EDAC_MM_EDAC && PCI && X86 | |
102 | help | |
103 | Support for error detection and correction on the Intel | |
104 | DP82975x server chipsets. | |
105 | ||
535c6a53 JU |
106 | config EDAC_I3000 |
107 | tristate "Intel 3000/3010" | |
f5c0454c | 108 | depends on EDAC_MM_EDAC && PCI && X86 |
535c6a53 JU |
109 | help |
110 | Support for error detection and correction on the Intel | |
111 | 3000 and 3010 server chipsets. | |
112 | ||
df8bc08c HM |
113 | config EDAC_X38 |
114 | tristate "Intel X38" | |
115 | depends on EDAC_MM_EDAC && PCI && X86 | |
116 | help | |
117 | Support for error detection and correction on the Intel | |
118 | X38 server chipsets. | |
119 | ||
920c8df6 MCC |
120 | config EDAC_I5400 |
121 | tristate "Intel 5400 (Seaburg) chipsets" | |
122 | depends on EDAC_MM_EDAC && PCI && X86 | |
123 | help | |
124 | Support for error detection and correction the Intel | |
125 | i5400 MCH chipset (Seaburg). | |
126 | ||
da9bb1d2 AC |
127 | config EDAC_I82860 |
128 | tristate "Intel 82860" | |
39f1d8d3 | 129 | depends on EDAC_MM_EDAC && PCI && X86_32 |
da9bb1d2 AC |
130 | help |
131 | Support for error detection and correction on the Intel | |
132 | 82860 chipset. | |
133 | ||
134 | config EDAC_R82600 | |
135 | tristate "Radisys 82600 embedded chipset" | |
39f1d8d3 | 136 | depends on EDAC_MM_EDAC && PCI && X86_32 |
da9bb1d2 AC |
137 | help |
138 | Support for error detection and correction on the Radisys | |
139 | 82600 embedded chipset. | |
140 | ||
eb60705a EW |
141 | config EDAC_I5000 |
142 | tristate "Intel Greencreek/Blackford chipset" | |
143 | depends on EDAC_MM_EDAC && X86 && PCI | |
144 | help | |
145 | Support for error detection and correction the Intel | |
146 | Greekcreek/Blackford chipsets. | |
147 | ||
8f421c59 AJ |
148 | config EDAC_I5100 |
149 | tristate "Intel San Clemente MCH" | |
150 | depends on EDAC_MM_EDAC && X86 && PCI | |
151 | help | |
152 | Support for error detection and correction the Intel | |
153 | San Clemente MCH. | |
154 | ||
a9a753d5 DJ |
155 | config EDAC_MPC85XX |
156 | tristate "Freescale MPC85xx" | |
157 | depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx | |
158 | help | |
159 | Support for error detection and correction on the Freescale | |
160 | MPC8560, MPC8540, MPC8548 | |
161 | ||
4f4aeeab DJ |
162 | config EDAC_MV64X60 |
163 | tristate "Marvell MV64x60" | |
164 | depends on EDAC_MM_EDAC && MV64X60 | |
165 | help | |
166 | Support for error detection and correction on the Marvell | |
167 | MV64360 and MV64460 chipsets. | |
168 | ||
7d8536fb EM |
169 | config EDAC_PASEMI |
170 | tristate "PA Semi PWRficient" | |
171 | depends on EDAC_MM_EDAC && PCI | |
ddcc3050 | 172 | depends on PPC_PASEMI |
7d8536fb EM |
173 | help |
174 | Support for error detection and correction on PA Semi | |
175 | PWRficient. | |
176 | ||
48764e41 BH |
177 | config EDAC_CELL |
178 | tristate "Cell Broadband Engine memory controller" | |
def434c2 | 179 | depends on EDAC_MM_EDAC && PPC_CELL_COMMON |
48764e41 BH |
180 | help |
181 | Support for error detection and correction on the | |
182 | Cell Broadband Engine internal memory controller | |
183 | on platform without a hypervisor | |
7d8536fb | 184 | |
751cb5e5 | 185 | endif # EDAC |