i7core_edac: return -ENODEV if no MC is found
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / edac / Kconfig
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1#
2# EDAC Kconfig
4577ca55 3# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
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4# Licensed and distributed under the GPL
5#
da9bb1d2 6
751cb5e5 7menuconfig EDAC
e24aca67 8 bool "EDAC (Error Detection And Correction) reporting"
e25df120 9 depends on HAS_IOMEM
5c770755 10 depends on X86 || PPC || TILE
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11 help
12 EDAC is designed to report errors in the core system.
13 These are low-level errors that are reported in the CPU or
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14 supporting chipset or other subsystems:
15 memory errors, cache errors, PCI errors, thermal throttling, etc..
16 If unsure, select 'Y'.
da9bb1d2 17
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18 If this code is reporting problems on your system, please
19 see the EDAC project web pages for more information at:
20
21 <http://bluesmoke.sourceforge.net/>
22
23 and:
24
25 <http://buttersideup.com/edacwiki>
26
27 There is also a mailing list for the EDAC project, which can
28 be found via the sourceforge page.
29
751cb5e5 30if EDAC
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31
32comment "Reporting subsystems"
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33
34config EDAC_DEBUG
35 bool "Debugging"
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36 help
37 This turns on debugging information for the entire EDAC
38 sub-system. You can insert module with "debug_level=x", current
39 there're four debug levels (x=0,1,2,3 from low to high).
40 Usually you should select 'N'.
41
9cdeb404 42config EDAC_DECODE_MCE
0d18b2e3 43 tristate "Decode MCEs in human-readable form (only on AMD for now)"
a9f729f0 44 depends on CPU_SUP_AMD && X86_MCE
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45 default y
46 ---help---
47 Enable this option if you want to decode Machine Check Exceptions
25985edc 48 occurring on your machine in human-readable form.
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49
50 You should definitely say Y here in case you want to decode MCEs
51 which occur really early upon boot, before the module infrastructure
52 has been initialized.
53
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54config EDAC_MCE_INJ
55 tristate "Simple MCE injection interface over /sysfs"
56 depends on EDAC_DECODE_MCE
57 default n
58 help
59 This is a simple interface to inject MCEs over /sysfs and test
60 the MCE decoding code in EDAC.
61
62 This is currently AMD-only.
63
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64config EDAC_MM_EDAC
65 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
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66 help
67 Some systems are able to detect and correct errors in main
68 memory. EDAC can report statistics on memory error
69 detection and correction (EDAC - or commonly referred to ECC
70 errors). EDAC will also try to decode where these errors
71 occurred so that a particular failing memory module can be
72 replaced. If unsure, select 'Y'.
73
7d6034d3 74config EDAC_AMD64
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75 tristate "AMD64 (Opteron, Athlon64) K8, F10h"
76 depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE
7d6034d3 77 help
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78 Support for error detection and correction of DRAM ECC errors on
79 the AMD64 families of memory controllers (K8 and F10h)
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80
81config EDAC_AMD64_ERROR_INJECTION
9cdeb404 82 bool "Sysfs HW Error injection facilities"
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83 depends on EDAC_AMD64
84 help
85 Recent Opterons (Family 10h and later) provide for Memory Error
86 Injection into the ECC detection circuits. The amd64_edac module
87 allows the operator/user to inject Uncorrectable and Correctable
88 errors into DRAM.
89
90 When enabled, in each of the respective memory controller directories
91 (/sys/devices/system/edac/mc/mcX), there are 3 input files:
92
93 - inject_section (0..3, 16-byte section of 64-byte cacheline),
94 - inject_word (0..8, 16-bit word of 16-byte section),
95 - inject_ecc_vector (hex ecc vector: select bits of inject word)
96
97 In addition, there are two control files, inject_read and inject_write,
98 which trigger the DRAM ECC Read and Write respectively.
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99
100config EDAC_AMD76X
101 tristate "AMD 76x (760, 762, 768)"
90cbc45b 102 depends on EDAC_MM_EDAC && PCI && X86_32
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103 help
104 Support for error detection and correction on the AMD 76x
105 series of chipsets used with the Athlon processor.
106
107config EDAC_E7XXX
108 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
39f1d8d3 109 depends on EDAC_MM_EDAC && PCI && X86_32
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110 help
111 Support for error detection and correction on the Intel
112 E7205, E7500, E7501 and E7505 server chipsets.
113
114config EDAC_E752X
5135b797 115 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
da960a6a 116 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
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117 help
118 Support for error detection and correction on the Intel
119 E7520, E7525, E7320 server chipsets.
120
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121config EDAC_I82443BXGX
122 tristate "Intel 82443BX/GX (440BX/GX)"
123 depends on EDAC_MM_EDAC && PCI && X86_32
28f96eea 124 depends on BROKEN
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125 help
126 Support for error detection and correction on the Intel
127 82443BX/GX memory controllers (440BX/GX chipsets).
128
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129config EDAC_I82875P
130 tristate "Intel 82875p (D82875P, E7210)"
39f1d8d3 131 depends on EDAC_MM_EDAC && PCI && X86_32
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132 help
133 Support for error detection and correction on the Intel
134 DP82785P and E7210 server chipsets.
135
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136config EDAC_I82975X
137 tristate "Intel 82975x (D82975x)"
138 depends on EDAC_MM_EDAC && PCI && X86
139 help
140 Support for error detection and correction on the Intel
141 DP82975x server chipsets.
142
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143config EDAC_I3000
144 tristate "Intel 3000/3010"
f5c0454c 145 depends on EDAC_MM_EDAC && PCI && X86
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146 help
147 Support for error detection and correction on the Intel
148 3000 and 3010 server chipsets.
149
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150config EDAC_I3200
151 tristate "Intel 3200"
152 depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
153 help
154 Support for error detection and correction on the Intel
155 3200 and 3210 server chipsets.
156
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157config EDAC_X38
158 tristate "Intel X38"
159 depends on EDAC_MM_EDAC && PCI && X86
160 help
161 Support for error detection and correction on the Intel
162 X38 server chipsets.
163
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164config EDAC_I5400
165 tristate "Intel 5400 (Seaburg) chipsets"
166 depends on EDAC_MM_EDAC && PCI && X86
167 help
168 Support for error detection and correction the Intel
169 i5400 MCH chipset (Seaburg).
170
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171config EDAC_I7CORE
172 tristate "Intel i7 Core (Nehalem) processors"
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173 depends on EDAC_MM_EDAC && PCI && X86
174 select EDAC_MCE
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175 help
176 Support for error detection and correction the Intel
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177 i7 Core (Nehalem) Integrated Memory Controller that exists on
178 newer processors like i7 Core, i7 Core Extreme, Xeon 35xx
179 and Xeon 55xx processors.
a0c36a1f 180
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181config EDAC_I82860
182 tristate "Intel 82860"
39f1d8d3 183 depends on EDAC_MM_EDAC && PCI && X86_32
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184 help
185 Support for error detection and correction on the Intel
186 82860 chipset.
187
188config EDAC_R82600
189 tristate "Radisys 82600 embedded chipset"
39f1d8d3 190 depends on EDAC_MM_EDAC && PCI && X86_32
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191 help
192 Support for error detection and correction on the Radisys
193 82600 embedded chipset.
194
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195config EDAC_I5000
196 tristate "Intel Greencreek/Blackford chipset"
197 depends on EDAC_MM_EDAC && X86 && PCI
198 help
199 Support for error detection and correction the Intel
200 Greekcreek/Blackford chipsets.
201
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202config EDAC_I5100
203 tristate "Intel San Clemente MCH"
204 depends on EDAC_MM_EDAC && X86 && PCI
205 help
206 Support for error detection and correction the Intel
207 San Clemente MCH.
208
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209config EDAC_I7300
210 tristate "Intel Clarksboro MCH"
211 depends on EDAC_MM_EDAC && X86 && PCI
212 help
213 Support for error detection and correction the Intel
214 Clarksboro MCH (Intel 7300 chipset).
215
a9a753d5 216config EDAC_MPC85XX
b4846251 217 tristate "Freescale MPC83xx / MPC85xx"
1cd8521e 218 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
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219 help
220 Support for error detection and correction on the Freescale
b4846251 221 MPC8349, MPC8560, MPC8540, MPC8548
a9a753d5 222
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223config EDAC_MV64X60
224 tristate "Marvell MV64x60"
225 depends on EDAC_MM_EDAC && MV64X60
226 help
227 Support for error detection and correction on the Marvell
228 MV64360 and MV64460 chipsets.
229
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230config EDAC_PASEMI
231 tristate "PA Semi PWRficient"
232 depends on EDAC_MM_EDAC && PCI
ddcc3050 233 depends on PPC_PASEMI
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234 help
235 Support for error detection and correction on PA Semi
236 PWRficient.
237
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238config EDAC_CELL
239 tristate "Cell Broadband Engine memory controller"
def434c2 240 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
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241 help
242 Support for error detection and correction on the
243 Cell Broadband Engine internal memory controller
244 on platform without a hypervisor
7d8536fb 245
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246config EDAC_PPC4XX
247 tristate "PPC4xx IBM DDR2 Memory Controller"
248 depends on EDAC_MM_EDAC && 4xx
249 help
250 This enables support for EDAC on the ECC memory used
251 with the IBM DDR2 memory controller found in various
252 PowerPC 4xx embedded processors such as the 405EX[r],
253 440SP, 440SPe, 460EX, 460GT and 460SX.
254
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255config EDAC_AMD8131
256 tristate "AMD8131 HyperTransport PCI-X Tunnel"
715fe7af 257 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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258 help
259 Support for error detection and correction on the
260 AMD8131 HyperTransport PCI-X Tunnel chip.
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261 Note, add more Kconfig dependency if it's adopted
262 on some machine other than Maple.
e8765584 263
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264config EDAC_AMD8111
265 tristate "AMD8111 HyperTransport I/O Hub"
715fe7af 266 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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267 help
268 Support for error detection and correction on the
269 AMD8111 HyperTransport I/O Hub chip.
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270 Note, add more Kconfig dependency if it's adopted
271 on some machine other than Maple.
58b4ce6f 272
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273config EDAC_CPC925
274 tristate "IBM CPC925 Memory Controller (PPC970FX)"
275 depends on EDAC_MM_EDAC && PPC64
276 help
277 Support for error detection and correction on the
278 IBM CPC925 Bridge and Memory Controller, which is
279 a companion chip to the PowerPC 970 family of
280 processors.
281
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282config EDAC_TILE
283 tristate "Tilera Memory Controller"
284 depends on EDAC_MM_EDAC && TILE
285 default y
286 help
287 Support for error detection and correction on the
288 Tilera memory controller.
289
751cb5e5 290endif # EDAC