EDAC: Export edac sysfs class to users.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / edac / Kconfig
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1#
2# EDAC Kconfig
4577ca55 3# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
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4# Licensed and distributed under the GPL
5#
da9bb1d2 6
751cb5e5 7menuconfig EDAC
e24aca67 8 bool "EDAC (Error Detection And Correction) reporting"
e25df120 9 depends on HAS_IOMEM
4c6a1c13 10 depends on X86 || PPC
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11 help
12 EDAC is designed to report errors in the core system.
13 These are low-level errors that are reported in the CPU or
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14 supporting chipset or other subsystems:
15 memory errors, cache errors, PCI errors, thermal throttling, etc..
16 If unsure, select 'Y'.
da9bb1d2 17
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18 If this code is reporting problems on your system, please
19 see the EDAC project web pages for more information at:
20
21 <http://bluesmoke.sourceforge.net/>
22
23 and:
24
25 <http://buttersideup.com/edacwiki>
26
27 There is also a mailing list for the EDAC project, which can
28 be found via the sourceforge page.
29
751cb5e5 30if EDAC
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31
32comment "Reporting subsystems"
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33
34config EDAC_DEBUG
35 bool "Debugging"
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36 help
37 This turns on debugging information for the entire EDAC
38 sub-system. You can insert module with "debug_level=x", current
39 there're four debug levels (x=0,1,2,3 from low to high).
40 Usually you should select 'N'.
41
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42 config EDAC_DECODE_MCE
43 tristate "Decode MCEs in human-readable form (only on AMD for now)"
44 depends on CPU_SUP_AMD && X86_MCE
45 default y
46 ---help---
47 Enable this option if you want to decode Machine Check Exceptions
48 occuring on your machine in human-readable form.
49
50 You should definitely say Y here in case you want to decode MCEs
51 which occur really early upon boot, before the module infrastructure
52 has been initialized.
53
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54config EDAC_MM_EDAC
55 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
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56 help
57 Some systems are able to detect and correct errors in main
58 memory. EDAC can report statistics on memory error
59 detection and correction (EDAC - or commonly referred to ECC
60 errors). EDAC will also try to decode where these errors
61 occurred so that a particular failing memory module can be
62 replaced. If unsure, select 'Y'.
63
696e409d 64config EDAC_MCE
963c5ba3 65 bool
696e409d 66
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67config EDAC_AMD64
68 tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h"
0d18b2e3 69 depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && EDAC_DECODE_MCE
7d6034d3 70 help
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71 Support for error detection and correction on the AMD 64
72 Families of Memory Controllers (K8, F10h and F11h)
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73
74config EDAC_AMD64_ERROR_INJECTION
75 bool "Sysfs Error Injection facilities"
76 depends on EDAC_AMD64
77 help
78 Recent Opterons (Family 10h and later) provide for Memory Error
79 Injection into the ECC detection circuits. The amd64_edac module
80 allows the operator/user to inject Uncorrectable and Correctable
81 errors into DRAM.
82
83 When enabled, in each of the respective memory controller directories
84 (/sys/devices/system/edac/mc/mcX), there are 3 input files:
85
86 - inject_section (0..3, 16-byte section of 64-byte cacheline),
87 - inject_word (0..8, 16-bit word of 16-byte section),
88 - inject_ecc_vector (hex ecc vector: select bits of inject word)
89
90 In addition, there are two control files, inject_read and inject_write,
91 which trigger the DRAM ECC Read and Write respectively.
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92
93config EDAC_AMD76X
94 tristate "AMD 76x (760, 762, 768)"
90cbc45b 95 depends on EDAC_MM_EDAC && PCI && X86_32
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96 help
97 Support for error detection and correction on the AMD 76x
98 series of chipsets used with the Athlon processor.
99
100config EDAC_E7XXX
101 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
39f1d8d3 102 depends on EDAC_MM_EDAC && PCI && X86_32
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103 help
104 Support for error detection and correction on the Intel
105 E7205, E7500, E7501 and E7505 server chipsets.
106
107config EDAC_E752X
5135b797 108 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
da960a6a 109 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
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110 help
111 Support for error detection and correction on the Intel
112 E7520, E7525, E7320 server chipsets.
113
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114config EDAC_I82443BXGX
115 tristate "Intel 82443BX/GX (440BX/GX)"
116 depends on EDAC_MM_EDAC && PCI && X86_32
28f96eea 117 depends on BROKEN
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118 help
119 Support for error detection and correction on the Intel
120 82443BX/GX memory controllers (440BX/GX chipsets).
121
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122config EDAC_I82875P
123 tristate "Intel 82875p (D82875P, E7210)"
39f1d8d3 124 depends on EDAC_MM_EDAC && PCI && X86_32
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125 help
126 Support for error detection and correction on the Intel
127 DP82785P and E7210 server chipsets.
128
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129config EDAC_I82975X
130 tristate "Intel 82975x (D82975x)"
131 depends on EDAC_MM_EDAC && PCI && X86
132 help
133 Support for error detection and correction on the Intel
134 DP82975x server chipsets.
135
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136config EDAC_I3000
137 tristate "Intel 3000/3010"
f5c0454c 138 depends on EDAC_MM_EDAC && PCI && X86
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139 help
140 Support for error detection and correction on the Intel
141 3000 and 3010 server chipsets.
142
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143config EDAC_I3200
144 tristate "Intel 3200"
145 depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
146 help
147 Support for error detection and correction on the Intel
148 3200 and 3210 server chipsets.
149
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150config EDAC_X38
151 tristate "Intel X38"
152 depends on EDAC_MM_EDAC && PCI && X86
153 help
154 Support for error detection and correction on the Intel
155 X38 server chipsets.
156
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157config EDAC_I5400
158 tristate "Intel 5400 (Seaburg) chipsets"
159 depends on EDAC_MM_EDAC && PCI && X86
160 help
161 Support for error detection and correction the Intel
162 i5400 MCH chipset (Seaburg).
163
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164config EDAC_I7CORE
165 tristate "Intel i7 Core (Nehalem) processors"
166 depends on EDAC_MM_EDAC && PCI && X86
696e409d 167 select EDAC_MCE
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168 help
169 Support for error detection and correction the Intel
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170 i7 Core (Nehalem) Integrated Memory Controller that exists on
171 newer processors like i7 Core, i7 Core Extreme, Xeon 35xx
172 and Xeon 55xx processors.
a0c36a1f 173
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174config EDAC_I82860
175 tristate "Intel 82860"
39f1d8d3 176 depends on EDAC_MM_EDAC && PCI && X86_32
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177 help
178 Support for error detection and correction on the Intel
179 82860 chipset.
180
181config EDAC_R82600
182 tristate "Radisys 82600 embedded chipset"
39f1d8d3 183 depends on EDAC_MM_EDAC && PCI && X86_32
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184 help
185 Support for error detection and correction on the Radisys
186 82600 embedded chipset.
187
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188config EDAC_I5000
189 tristate "Intel Greencreek/Blackford chipset"
190 depends on EDAC_MM_EDAC && X86 && PCI
191 help
192 Support for error detection and correction the Intel
193 Greekcreek/Blackford chipsets.
194
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195config EDAC_I5100
196 tristate "Intel San Clemente MCH"
197 depends on EDAC_MM_EDAC && X86 && PCI
198 help
199 Support for error detection and correction the Intel
200 San Clemente MCH.
201
a9a753d5 202config EDAC_MPC85XX
b4846251 203 tristate "Freescale MPC83xx / MPC85xx"
1cd8521e 204 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
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205 help
206 Support for error detection and correction on the Freescale
b4846251 207 MPC8349, MPC8560, MPC8540, MPC8548
a9a753d5 208
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209config EDAC_MV64X60
210 tristate "Marvell MV64x60"
211 depends on EDAC_MM_EDAC && MV64X60
212 help
213 Support for error detection and correction on the Marvell
214 MV64360 and MV64460 chipsets.
215
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216config EDAC_PASEMI
217 tristate "PA Semi PWRficient"
218 depends on EDAC_MM_EDAC && PCI
ddcc3050 219 depends on PPC_PASEMI
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220 help
221 Support for error detection and correction on PA Semi
222 PWRficient.
223
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224config EDAC_CELL
225 tristate "Cell Broadband Engine memory controller"
def434c2 226 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
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227 help
228 Support for error detection and correction on the
229 Cell Broadband Engine internal memory controller
230 on platform without a hypervisor
7d8536fb 231
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232config EDAC_PPC4XX
233 tristate "PPC4xx IBM DDR2 Memory Controller"
234 depends on EDAC_MM_EDAC && 4xx
235 help
236 This enables support for EDAC on the ECC memory used
237 with the IBM DDR2 memory controller found in various
238 PowerPC 4xx embedded processors such as the 405EX[r],
239 440SP, 440SPe, 460EX, 460GT and 460SX.
240
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241config EDAC_AMD8131
242 tristate "AMD8131 HyperTransport PCI-X Tunnel"
715fe7af 243 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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244 help
245 Support for error detection and correction on the
246 AMD8131 HyperTransport PCI-X Tunnel chip.
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247 Note, add more Kconfig dependency if it's adopted
248 on some machine other than Maple.
e8765584 249
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250config EDAC_AMD8111
251 tristate "AMD8111 HyperTransport I/O Hub"
715fe7af 252 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
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253 help
254 Support for error detection and correction on the
255 AMD8111 HyperTransport I/O Hub chip.
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256 Note, add more Kconfig dependency if it's adopted
257 on some machine other than Maple.
58b4ce6f 258
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259config EDAC_CPC925
260 tristate "IBM CPC925 Memory Controller (PPC970FX)"
261 depends on EDAC_MM_EDAC && PPC64
262 help
263 Support for error detection and correction on the
264 IBM CPC925 Bridge and Memory Controller, which is
265 a companion chip to the PowerPC 970 family of
266 processors.
267
751cb5e5 268endif # EDAC