[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / dma / Kconfig

#
# DMA engine configuration
#

menuconfig DMADEVICES
	bool "DMA Engine support"
	depends on HAS_DMA
	help
	  DMA engines can do asynchronous data transfers without
	  involving the host CPU.  Currently, this framework can be
	  used to offload memory copies in the network stack and
	  RAID operations in the MD driver.  This menu only presents
	  DMA Device drivers supported by the configured arch, it may
	  be empty in some cases.

if DMADEVICES

comment "DMA Devices"

config ASYNC_TX_DISABLE_CHANNEL_SWITCH
	bool

config INTEL_IOATDMA
	tristate "Intel I/OAT DMA support"
	depends on PCI && X86
	select DMA_ENGINE
	select DCA
	select ASYNC_TX_DISABLE_CHANNEL_SWITCH
	select ASYNC_TX_DISABLE_PQ_VAL_DMA
	select ASYNC_TX_DISABLE_XOR_VAL_DMA
	help
	  Enable support for the Intel(R) I/OAT DMA engine present
	  in recent Intel Xeon chipsets.

	  Say Y here if you have such a chipset.

	  If unsure, say N.

config INTEL_IOP_ADMA
	tristate "Intel IOP ADMA support"
	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
	select DMA_ENGINE
	help
	  Enable support for the Intel(R) IOP Series RAID engines.

config DW_DMAC
	tristate "Synopsys DesignWare AHB DMA support"
	depends on AVR32
	select DMA_ENGINE
	default y if CPU_AT32AP7000
	help
	  Support the Synopsys DesignWare AHB DMA controller.  This
	  can be integrated in chips such as the Atmel AT32ap7000.

config AT_HDMAC
	tristate "Atmel AHB DMA support"
	depends on ARCH_AT91SAM9RL
	select DMA_ENGINE
	help
	  Support the Atmel AHB DMA controller.  This can be integrated in
	  chips such as the Atmel AT91SAM9RL.

config FSL_DMA
	tristate "Freescale Elo and Elo Plus DMA support"
	depends on FSL_SOC
	select DMA_ENGINE
	---help---
	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
	  Elo Plus is the DMA controller on 85xx and 86xx parts.

config MV_XOR
	bool "Marvell XOR engine support"
	depends on PLAT_ORION
	select DMA_ENGINE
	---help---
	  Enable support for the Marvell XOR engine.

config MX3_IPU
	bool "MX3x Image Processing Unit support"
	depends on ARCH_MX3
	select DMA_ENGINE
	default y
	help
	  If you plan to use the Image Processing unit in the i.MX3x, say
	  Y here. If unsure, select Y.

config MX3_IPU_IRQS
	int "Number of dynamically mapped interrupts for IPU"
	depends on MX3_IPU
	range 2 137
	default 4
	help
	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
	  To avoid bloating the irq_desc[] array we allocate a sufficient
	  number of IRQ slots and map them dynamically to specific sources.

config TXX9_DMAC
	tristate "Toshiba TXx9 SoC DMA support"
	depends on MACH_TX49XX || MACH_TX39XX
	select DMA_ENGINE
	help
	  Support the TXx9 SoC internal DMA controller.  This can be
	  integrated in chips such as the Toshiba TX4927/38/39.

config SH_DMAE
	tristate "Renesas SuperH DMAC support"
	depends on SUPERH && SH_DMA
	depends on !SH_DMA_API
	select DMA_ENGINE
	help
	  Enable support for the Renesas SuperH DMA controllers.

config DMA_ENGINE
	bool

comment "DMA Clients"
	depends on DMA_ENGINE

config NET_DMA
	bool "Network: TCP receive copy offload"
	depends on DMA_ENGINE && NET
	default (INTEL_IOATDMA || FSL_DMA)
	help
	  This enables the use of DMA engines in the network stack to
	  offload receive copy-to-user operations, freeing CPU cycles.

	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
	  say N.

config ASYNC_TX_DMA
	bool "Async_tx: Offload support for the async_tx api"
	depends on DMA_ENGINE
	help
	  This allows the async_tx api to take advantage of offload engines for
	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
	  a dma engine that can perform raid operations and you have enabled
	  MD_RAID456 say Y.

	  If unsure, say N.

config DMATEST
	tristate "DMA Test client"
	depends on DMA_ENGINE
	help
	  Simple DMA test client. Say N unless you're debugging a
	  DMA Device driver.

endif
Commit	Line	Data
c13c8260 CL	1	#
	2	# DMA engine configuration
	3	#
	4
2ed6dc34	5	menuconfig DMADEVICES
6d4f5879	6	bool "DMA Engine support"
04ce9ab3	7	depends on HAS_DMA
2ed6dc34	8	help
6d4f5879 HS	9	DMA engines can do asynchronous data transfers without
	10	involving the host CPU. Currently, this framework can be
	11	used to offload memory copies in the network stack and
9c402f4e DW	12	RAID operations in the MD driver. This menu only presents
	13	DMA Device drivers supported by the configured arch, it may
	14	be empty in some cases.
2ed6dc34 SN	15
	16	if DMADEVICES
	17
	18	comment "DMA Devices"
	19
138f4c35 DW	20	config ASYNC_TX_DISABLE_CHANNEL_SWITCH
	21	bool
	22
2ed6dc34 SN	23	config INTEL_IOATDMA
	24	tristate "Intel I/OAT DMA support"
	25	depends on PCI && X86
	26	select DMA_ENGINE
	27	select DCA
138f4c35	28	select ASYNC_TX_DISABLE_CHANNEL_SWITCH
7b3cc2b1 DW	29	select ASYNC_TX_DISABLE_PQ_VAL_DMA
7b3cc2b1 DW	30	select ASYNC_TX_DISABLE_XOR_VAL_DMA
2ed6dc34 SN	31	help
	32	Enable support for the Intel(R) I/OAT DMA engine present
	33	in recent Intel Xeon chipsets.
	34
	35	Say Y here if you have such a chipset.
	36
	37	If unsure, say N.
	38
	39	config INTEL_IOP_ADMA
	40	tristate "Intel IOP ADMA support"
	41	depends on ARCH_IOP32X \|\| ARCH_IOP33X \|\| ARCH_IOP13XX
2ed6dc34 SN	42	select DMA_ENGINE
	43	help
	44	Enable support for the Intel(R) IOP Series RAID engines.
c13c8260	45
3bfb1d20 HS	46	config DW_DMAC
	47	tristate "Synopsys DesignWare AHB DMA support"
	48	depends on AVR32
	49	select DMA_ENGINE
	50	default y if CPU_AT32AP7000
	51	help
	52	Support the Synopsys DesignWare AHB DMA controller. This
	53	can be integrated in chips such as the Atmel AT32ap7000.
	54
dc78baa2 NF	55	config AT_HDMAC
	56	tristate "Atmel AHB DMA support"
	57	depends on ARCH_AT91SAM9RL
	58	select DMA_ENGINE
	59	help
	60	Support the Atmel AHB DMA controller. This can be integrated in
	61	chips such as the Atmel AT91SAM9RL.
	62
173acc7c	63	config FSL_DMA
77cd62e8 TT	64	tristate "Freescale Elo and Elo Plus DMA support"
77cd62e8 TT	65	depends on FSL_SOC
173acc7c ZW	66	select DMA_ENGINE
173acc7c ZW	67	---help---
77cd62e8 TT	68	Enable support for the Freescale Elo and Elo Plus DMA controllers.
	69	The Elo is the DMA controller on some 82xx and 83xx parts, and the
	70	Elo Plus is the DMA controller on 85xx and 86xx parts.
173acc7c	71
ff7b0479 SB	72	config MV_XOR
	73	bool "Marvell XOR engine support"
	74	depends on PLAT_ORION
ff7b0479 SB	75	select DMA_ENGINE
	76	---help---
	77	Enable support for the Marvell XOR engine.
	78
5296b56d GL	79	config MX3_IPU
	80	bool "MX3x Image Processing Unit support"
	81	depends on ARCH_MX3
	82	select DMA_ENGINE
	83	default y
	84	help
	85	If you plan to use the Image Processing unit in the i.MX3x, say
	86	Y here. If unsure, select Y.
	87
	88	config MX3_IPU_IRQS
	89	int "Number of dynamically mapped interrupts for IPU"
	90	depends on MX3_IPU
	91	range 2 137
	92	default 4
	93	help
	94	Out of 137 interrupt sources on i.MX31 IPU only very few are used.
	95	To avoid bloating the irq_desc[] array we allocate a sufficient
	96	number of IRQ slots and map them dynamically to specific sources.
	97
ea76f0b3 AN	98	config TXX9_DMAC
	99	tristate "Toshiba TXx9 SoC DMA support"
	100	depends on MACH_TX49XX \|\| MACH_TX39XX
	101	select DMA_ENGINE
	102	help
	103	Support the TXx9 SoC internal DMA controller. This can be
	104	integrated in chips such as the Toshiba TX4927/38/39.
	105
d8902adc NI	106	config SH_DMAE
	107	tristate "Renesas SuperH DMAC support"
	108	depends on SUPERH && SH_DMA
	109	depends on !SH_DMA_API
	110	select DMA_ENGINE
	111	help
	112	Enable support for the Renesas SuperH DMA controllers.
	113
c13c8260	114	config DMA_ENGINE
2ed6dc34	115	bool
c13c8260	116
db217334	117	comment "DMA Clients"
2ed6dc34	118	depends on DMA_ENGINE
db217334 CL	119
	120	config NET_DMA
	121	bool "Network: TCP receive copy offload"
	122	depends on DMA_ENGINE && NET
9c402f4e	123	default (INTEL_IOATDMA \|\| FSL_DMA)
2ed6dc34	124	help
db217334 CL	125	This enables the use of DMA engines in the network stack to
db217334 CL	126	offload receive copy-to-user operations, freeing CPU cycles.
9c402f4e DW	127
	128	Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
	129	say N.
db217334	130
729b5d1b DW	131	config ASYNC_TX_DMA
729b5d1b DW	132	bool "Async_tx: Offload support for the async_tx api"
9a8de639	133	depends on DMA_ENGINE
729b5d1b DW	134	help
	135	This allows the async_tx api to take advantage of offload engines for
	136	memcpy, memset, xor, and raid6 p+q operations. If your platform has
	137	a dma engine that can perform raid operations and you have enabled
	138	MD_RAID456 say Y.
	139
	140	If unsure, say N.
	141
4a776f0a HS	142	config DMATEST
	143	tristate "DMA Test client"
	144	depends on DMA_ENGINE
	145	help
	146	Simple DMA test client. Say N unless you're debugging a
	147	DMA Device driver.
	148
2ed6dc34	149	endif