Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Intel SpeedStep SMI driver. | |
3 | * | |
4 | * (C) 2003 Hiroshi Miura <miura@da-cha.org> | |
5 | * | |
6 | * Licensed under the terms of the GNU GPL License version 2. | |
7 | * | |
8 | */ | |
9 | ||
10 | ||
11 | /********************************************************************* | |
12 | * SPEEDSTEP - DEFINITIONS * | |
13 | *********************************************************************/ | |
14 | ||
15 | #include <linux/kernel.h> | |
32ee8c3e DJ |
16 | #include <linux/module.h> |
17 | #include <linux/moduleparam.h> | |
1da177e4 LT |
18 | #include <linux/init.h> |
19 | #include <linux/cpufreq.h> | |
1da177e4 | 20 | #include <linux/delay.h> |
bbfebd66 | 21 | #include <linux/io.h> |
1da177e4 | 22 | #include <asm/ist.h> |
fa8031ae | 23 | #include <asm/cpu_device_id.h> |
1da177e4 LT |
24 | |
25 | #include "speedstep-lib.h" | |
26 | ||
27 | /* speedstep system management interface port/command. | |
28 | * | |
29 | * These parameters are got from IST-SMI BIOS call. | |
30 | * If user gives it, these are used. | |
32ee8c3e | 31 | * |
1da177e4 | 32 | */ |
bbfebd66 DJ |
33 | static int smi_port; |
34 | static int smi_cmd; | |
35 | static unsigned int smi_sig; | |
1da177e4 LT |
36 | |
37 | /* info about the processor */ | |
1cce76c2 | 38 | static enum speedstep_processor speedstep_processor; |
1da177e4 | 39 | |
32ee8c3e DJ |
40 | /* |
41 | * There are only two frequency states for each processor. Values | |
1da177e4 LT |
42 | * are in kHz for the time being. |
43 | */ | |
44 | static struct cpufreq_frequency_table speedstep_freqs[] = { | |
32ee8c3e | 45 | {SPEEDSTEP_HIGH, 0}, |
1da177e4 LT |
46 | {SPEEDSTEP_LOW, 0}, |
47 | {0, CPUFREQ_TABLE_END}, | |
48 | }; | |
49 | ||
50 | #define GET_SPEEDSTEP_OWNER 0 | |
51 | #define GET_SPEEDSTEP_STATE 1 | |
52 | #define SET_SPEEDSTEP_STATE 2 | |
53 | #define GET_SPEEDSTEP_FREQS 4 | |
54 | ||
55 | /* how often shall the SMI call be tried if it failed, e.g. because | |
56 | * of DMA activity going on? */ | |
57 | #define SMI_TRIES 5 | |
58 | ||
1da177e4 LT |
59 | /** |
60 | * speedstep_smi_ownership | |
61 | */ | |
bbfebd66 | 62 | static int speedstep_smi_ownership(void) |
1da177e4 | 63 | { |
c6e8256a | 64 | u32 command, result, magic, dummy; |
1da177e4 LT |
65 | u32 function = GET_SPEEDSTEP_OWNER; |
66 | unsigned char magic_data[] = "Copyright (c) 1999 Intel Corporation"; | |
67 | ||
68 | command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff); | |
69 | magic = virt_to_phys(magic_data); | |
70 | ||
2d06d8c4 | 71 | pr_debug("trying to obtain ownership with command %x at port %x\n", |
bbfebd66 | 72 | command, smi_port); |
1da177e4 LT |
73 | |
74 | __asm__ __volatile__( | |
c6e8256a | 75 | "push %%ebp\n" |
1da177e4 | 76 | "out %%al, (%%dx)\n" |
c6e8256a | 77 | "pop %%ebp\n" |
bbfebd66 DJ |
78 | : "=D" (result), |
79 | "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy), | |
80 | "=S" (dummy) | |
f081a529 | 81 | : "a" (command), "b" (function), "c" (0), "d" (smi_port), |
bbfebd66 | 82 | "D" (0), "S" (magic) |
f081a529 | 83 | : "memory" |
1da177e4 LT |
84 | ); |
85 | ||
2d06d8c4 | 86 | pr_debug("result is %x\n", result); |
1da177e4 LT |
87 | |
88 | return result; | |
89 | } | |
90 | ||
91 | /** | |
92 | * speedstep_smi_get_freqs - get SpeedStep preferred & current freq. | |
93 | * @low: the low frequency value is placed here | |
94 | * @high: the high frequency value is placed here | |
95 | * | |
96 | * Only available on later SpeedStep-enabled systems, returns false results or | |
97 | * even hangs [cf. bugme.osdl.org # 1422] on earlier systems. Empirical testing | |
98 | * shows that the latter occurs if !(ist_info.event & 0xFFFF). | |
99 | */ | |
bbfebd66 | 100 | static int speedstep_smi_get_freqs(unsigned int *low, unsigned int *high) |
1da177e4 | 101 | { |
c6e8256a | 102 | u32 command, result = 0, edi, high_mhz, low_mhz, dummy; |
bbfebd66 | 103 | u32 state = 0; |
1da177e4 LT |
104 | u32 function = GET_SPEEDSTEP_FREQS; |
105 | ||
106 | if (!(ist_info.event & 0xFFFF)) { | |
2d06d8c4 | 107 | pr_debug("bug #1422 -- can't read freqs from BIOS\n"); |
1da177e4 LT |
108 | return -ENODEV; |
109 | } | |
110 | ||
111 | command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff); | |
112 | ||
2d06d8c4 | 113 | pr_debug("trying to determine frequencies with command %x at port %x\n", |
bbfebd66 | 114 | command, smi_port); |
1da177e4 | 115 | |
c6e8256a SD |
116 | __asm__ __volatile__( |
117 | "push %%ebp\n" | |
1da177e4 | 118 | "out %%al, (%%dx)\n" |
c6e8256a | 119 | "pop %%ebp" |
bbfebd66 DJ |
120 | : "=a" (result), |
121 | "=b" (high_mhz), | |
122 | "=c" (low_mhz), | |
123 | "=d" (state), "=D" (edi), "=S" (dummy) | |
124 | : "a" (command), | |
125 | "b" (function), | |
126 | "c" (state), | |
127 | "d" (smi_port), "S" (0), "D" (0) | |
1da177e4 LT |
128 | ); |
129 | ||
2d06d8c4 | 130 | pr_debug("result %x, low_freq %u, high_freq %u\n", |
bbfebd66 | 131 | result, low_mhz, high_mhz); |
1da177e4 LT |
132 | |
133 | /* abort if results are obviously incorrect... */ | |
134 | if ((high_mhz + low_mhz) < 600) | |
135 | return -EINVAL; | |
136 | ||
137 | *high = high_mhz * 1000; | |
138 | *low = low_mhz * 1000; | |
139 | ||
140 | return result; | |
32ee8c3e | 141 | } |
1da177e4 LT |
142 | |
143 | /** | |
144 | * speedstep_get_state - set the SpeedStep state | |
145 | * @state: processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) | |
146 | * | |
147 | */ | |
bbfebd66 | 148 | static int speedstep_get_state(void) |
1da177e4 | 149 | { |
bbfebd66 | 150 | u32 function = GET_SPEEDSTEP_STATE; |
c6e8256a | 151 | u32 result, state, edi, command, dummy; |
1da177e4 LT |
152 | |
153 | command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff); | |
154 | ||
2d06d8c4 | 155 | pr_debug("trying to determine current setting with command %x " |
bbfebd66 | 156 | "at port %x\n", command, smi_port); |
1da177e4 | 157 | |
c6e8256a SD |
158 | __asm__ __volatile__( |
159 | "push %%ebp\n" | |
1da177e4 | 160 | "out %%al, (%%dx)\n" |
c6e8256a | 161 | "pop %%ebp\n" |
bbfebd66 DJ |
162 | : "=a" (result), |
163 | "=b" (state), "=D" (edi), | |
164 | "=c" (dummy), "=d" (dummy), "=S" (dummy) | |
165 | : "a" (command), "b" (function), "c" (0), | |
166 | "d" (smi_port), "S" (0), "D" (0) | |
1da177e4 LT |
167 | ); |
168 | ||
2d06d8c4 | 169 | pr_debug("state is %x, result is %x\n", state, result); |
1da177e4 | 170 | |
bbfebd66 | 171 | return state & 1; |
1da177e4 LT |
172 | } |
173 | ||
174 | ||
175 | /** | |
176 | * speedstep_set_state - set the SpeedStep state | |
177 | * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) | |
178 | * | |
179 | */ | |
bbfebd66 | 180 | static void speedstep_set_state(unsigned int state) |
1da177e4 | 181 | { |
c6e8256a | 182 | unsigned int result = 0, command, new_state, dummy; |
1da177e4 | 183 | unsigned long flags; |
bbfebd66 | 184 | unsigned int function = SET_SPEEDSTEP_STATE; |
1da177e4 LT |
185 | unsigned int retry = 0; |
186 | ||
187 | if (state > 0x1) | |
188 | return; | |
189 | ||
190 | /* Disable IRQs */ | |
8dd242cd | 191 | preempt_disable(); |
1da177e4 LT |
192 | local_irq_save(flags); |
193 | ||
194 | command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff); | |
195 | ||
2d06d8c4 | 196 | pr_debug("trying to set frequency to state %u " |
bbfebd66 DJ |
197 | "with command %x at port %x\n", |
198 | state, command, smi_port); | |
1da177e4 LT |
199 | |
200 | do { | |
201 | if (retry) { | |
8dd242cd MP |
202 | /* |
203 | * We need to enable interrupts, otherwise the blockage | |
204 | * won't resolve. | |
205 | * | |
206 | * We disable preemption so that other processes don't | |
207 | * run. If other processes were running, they could | |
208 | * submit more DMA requests, making the blockage worse. | |
209 | */ | |
2d06d8c4 | 210 | pr_debug("retry %u, previous result %u, waiting...\n", |
bbfebd66 | 211 | retry, result); |
8dd242cd | 212 | local_irq_enable(); |
1da177e4 | 213 | mdelay(retry * 50); |
8dd242cd | 214 | local_irq_disable(); |
1da177e4 LT |
215 | } |
216 | retry++; | |
217 | __asm__ __volatile__( | |
c6e8256a | 218 | "push %%ebp\n" |
1da177e4 | 219 | "out %%al, (%%dx)\n" |
c6e8256a | 220 | "pop %%ebp" |
bbfebd66 DJ |
221 | : "=b" (new_state), "=D" (result), |
222 | "=c" (dummy), "=a" (dummy), | |
223 | "=d" (dummy), "=S" (dummy) | |
224 | : "a" (command), "b" (function), "c" (state), | |
225 | "d" (smi_port), "S" (0), "D" (0) | |
1da177e4 LT |
226 | ); |
227 | } while ((new_state != state) && (retry <= SMI_TRIES)); | |
228 | ||
229 | /* enable IRQs */ | |
230 | local_irq_restore(flags); | |
8dd242cd | 231 | preempt_enable(); |
1da177e4 | 232 | |
bbfebd66 | 233 | if (new_state == state) |
2d06d8c4 | 234 | pr_debug("change to %u MHz succeeded after %u tries " |
bbfebd66 DJ |
235 | "with result %u\n", |
236 | (speedstep_freqs[new_state].frequency / 1000), | |
237 | retry, result); | |
238 | else | |
239 | printk(KERN_ERR "cpufreq: change to state %u " | |
240 | "failed with new_state %u and result %u\n", | |
241 | state, new_state, result); | |
1da177e4 LT |
242 | |
243 | return; | |
244 | } | |
245 | ||
246 | ||
247 | /** | |
248 | * speedstep_target - set a new CPUFreq policy | |
249 | * @policy: new policy | |
250 | * @target_freq: new freq | |
32ee8c3e | 251 | * @relation: |
1da177e4 LT |
252 | * |
253 | * Sets a new CPUFreq policy/freq. | |
254 | */ | |
bbfebd66 | 255 | static int speedstep_target(struct cpufreq_policy *policy, |
1da177e4 LT |
256 | unsigned int target_freq, unsigned int relation) |
257 | { | |
258 | unsigned int newstate = 0; | |
259 | struct cpufreq_freqs freqs; | |
260 | ||
bbfebd66 DJ |
261 | if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], |
262 | target_freq, relation, &newstate)) | |
1da177e4 LT |
263 | return -EINVAL; |
264 | ||
265 | freqs.old = speedstep_freqs[speedstep_get_state()].frequency; | |
266 | freqs.new = speedstep_freqs[newstate].frequency; | |
1da177e4 LT |
267 | |
268 | if (freqs.old == freqs.new) | |
269 | return 0; | |
270 | ||
b43a7ffb | 271 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
1da177e4 | 272 | speedstep_set_state(newstate); |
b43a7ffb | 273 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
1da177e4 LT |
274 | |
275 | return 0; | |
276 | } | |
277 | ||
278 | ||
279 | /** | |
280 | * speedstep_verify - verifies a new CPUFreq policy | |
281 | * @policy: new policy | |
282 | * | |
283 | * Limit must be within speedstep_low_freq and speedstep_high_freq, with | |
284 | * at least one border included. | |
285 | */ | |
bbfebd66 | 286 | static int speedstep_verify(struct cpufreq_policy *policy) |
1da177e4 LT |
287 | { |
288 | return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]); | |
289 | } | |
290 | ||
291 | ||
292 | static int speedstep_cpu_init(struct cpufreq_policy *policy) | |
293 | { | |
294 | int result; | |
bbfebd66 DJ |
295 | unsigned int speed, state; |
296 | unsigned int *low, *high; | |
1da177e4 LT |
297 | |
298 | /* capability check */ | |
299 | if (policy->cpu != 0) | |
300 | return -ENODEV; | |
301 | ||
302 | result = speedstep_smi_ownership(); | |
303 | if (result) { | |
2d06d8c4 | 304 | pr_debug("fails in acquiring ownership of a SMI interface.\n"); |
1da177e4 LT |
305 | return -EINVAL; |
306 | } | |
307 | ||
308 | /* detect low and high frequency */ | |
bbfebd66 DJ |
309 | low = &speedstep_freqs[SPEEDSTEP_LOW].frequency; |
310 | high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency; | |
311 | ||
312 | result = speedstep_smi_get_freqs(low, high); | |
1da177e4 | 313 | if (result) { |
bbfebd66 DJ |
314 | /* fall back to speedstep_lib.c dection mechanism: |
315 | * try both states out */ | |
2d06d8c4 | 316 | pr_debug("could not detect low and high frequencies " |
bbfebd66 | 317 | "by SMI call.\n"); |
1da177e4 | 318 | result = speedstep_get_freqs(speedstep_processor, |
bbfebd66 | 319 | low, high, |
1a10760c | 320 | NULL, |
1da177e4 LT |
321 | &speedstep_set_state); |
322 | ||
323 | if (result) { | |
2d06d8c4 | 324 | pr_debug("could not detect two different speeds" |
bbfebd66 | 325 | " -- aborting.\n"); |
1da177e4 LT |
326 | return result; |
327 | } else | |
2d06d8c4 | 328 | pr_debug("workaround worked.\n"); |
1da177e4 LT |
329 | } |
330 | ||
331 | /* get current speed setting */ | |
332 | state = speedstep_get_state(); | |
333 | speed = speedstep_freqs[state].frequency; | |
334 | ||
2d06d8c4 | 335 | pr_debug("currently at %s speed setting - %i MHz\n", |
bbfebd66 DJ |
336 | (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) |
337 | ? "low" : "high", | |
1da177e4 LT |
338 | (speed / 1000)); |
339 | ||
340 | /* cpuinfo and default policy values */ | |
1da177e4 LT |
341 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; |
342 | policy->cur = speed; | |
343 | ||
344 | result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs); | |
345 | if (result) | |
bbfebd66 | 346 | return result; |
1da177e4 | 347 | |
32ee8c3e | 348 | cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu); |
1da177e4 LT |
349 | |
350 | return 0; | |
351 | } | |
352 | ||
353 | static int speedstep_cpu_exit(struct cpufreq_policy *policy) | |
354 | { | |
355 | cpufreq_frequency_table_put_attr(policy->cpu); | |
356 | return 0; | |
357 | } | |
358 | ||
359 | static unsigned int speedstep_get(unsigned int cpu) | |
360 | { | |
361 | if (cpu) | |
362 | return -ENODEV; | |
bbfebd66 | 363 | return speedstep_get_frequency(speedstep_processor); |
1da177e4 LT |
364 | } |
365 | ||
366 | ||
367 | static int speedstep_resume(struct cpufreq_policy *policy) | |
368 | { | |
369 | int result = speedstep_smi_ownership(); | |
370 | ||
371 | if (result) | |
2d06d8c4 | 372 | pr_debug("fails in re-acquiring ownership of a SMI interface.\n"); |
1da177e4 LT |
373 | |
374 | return result; | |
375 | } | |
376 | ||
bbfebd66 | 377 | static struct freq_attr *speedstep_attr[] = { |
1da177e4 LT |
378 | &cpufreq_freq_attr_scaling_available_freqs, |
379 | NULL, | |
380 | }; | |
381 | ||
221dee28 | 382 | static struct cpufreq_driver speedstep_driver = { |
1da177e4 | 383 | .name = "speedstep-smi", |
32ee8c3e DJ |
384 | .verify = speedstep_verify, |
385 | .target = speedstep_target, | |
1da177e4 LT |
386 | .init = speedstep_cpu_init, |
387 | .exit = speedstep_cpu_exit, | |
388 | .get = speedstep_get, | |
389 | .resume = speedstep_resume, | |
390 | .owner = THIS_MODULE, | |
391 | .attr = speedstep_attr, | |
392 | }; | |
393 | ||
fa8031ae AK |
394 | static const struct x86_cpu_id ss_smi_ids[] = { |
395 | { X86_VENDOR_INTEL, 6, 0xb, }, | |
396 | { X86_VENDOR_INTEL, 6, 0x8, }, | |
397 | { X86_VENDOR_INTEL, 15, 2 }, | |
398 | {} | |
399 | }; | |
400 | #if 0 | |
401 | /* Not auto loaded currently */ | |
402 | MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids); | |
403 | #endif | |
404 | ||
1da177e4 LT |
405 | /** |
406 | * speedstep_init - initializes the SpeedStep CPUFreq driver | |
407 | * | |
408 | * Initializes the SpeedStep support. Returns -ENODEV on unsupported | |
409 | * BIOS, -EINVAL on problems during initiatization, and zero on | |
410 | * success. | |
411 | */ | |
412 | static int __init speedstep_init(void) | |
413 | { | |
fa8031ae AK |
414 | if (!x86_match_cpu(ss_smi_ids)) |
415 | return -ENODEV; | |
416 | ||
1da177e4 LT |
417 | speedstep_processor = speedstep_detect_processor(); |
418 | ||
419 | switch (speedstep_processor) { | |
bbfebd66 DJ |
420 | case SPEEDSTEP_CPU_PIII_T: |
421 | case SPEEDSTEP_CPU_PIII_C: | |
422 | case SPEEDSTEP_CPU_PIII_C_EARLY: | |
1da177e4 LT |
423 | break; |
424 | default: | |
425 | speedstep_processor = 0; | |
426 | } | |
427 | ||
428 | if (!speedstep_processor) { | |
2d06d8c4 | 429 | pr_debug("No supported Intel CPU detected.\n"); |
1da177e4 LT |
430 | return -ENODEV; |
431 | } | |
432 | ||
2d06d8c4 DB |
433 | pr_debug("signature:0x%.8ulx, command:0x%.8ulx, " |
434 | "event:0x%.8ulx, perf_level:0x%.8ulx.\n", | |
bbfebd66 DJ |
435 | ist_info.signature, ist_info.command, |
436 | ist_info.event, ist_info.perf_level); | |
1da177e4 | 437 | |
32ee8c3e | 438 | /* Error if no IST-SMI BIOS or no PARM |
1da177e4 | 439 | sig= 'ISGE' aka 'Intel Speedstep Gate E' */ |
32ee8c3e | 440 | if ((ist_info.signature != 0x47534943) && ( |
1da177e4 LT |
441 | (smi_port == 0) || (smi_cmd == 0))) |
442 | return -ENODEV; | |
443 | ||
444 | if (smi_sig == 1) | |
445 | smi_sig = 0x47534943; | |
446 | else | |
447 | smi_sig = ist_info.signature; | |
448 | ||
449 | /* setup smi_port from MODLULE_PARM or BIOS */ | |
32ee8c3e | 450 | if ((smi_port > 0xff) || (smi_port < 0)) |
1da177e4 | 451 | return -EINVAL; |
32ee8c3e | 452 | else if (smi_port == 0) |
1da177e4 | 453 | smi_port = ist_info.command & 0xff; |
1da177e4 | 454 | |
32ee8c3e | 455 | if ((smi_cmd > 0xff) || (smi_cmd < 0)) |
1da177e4 | 456 | return -EINVAL; |
32ee8c3e | 457 | else if (smi_cmd == 0) |
1da177e4 | 458 | smi_cmd = (ist_info.command >> 16) & 0xff; |
1da177e4 LT |
459 | |
460 | return cpufreq_register_driver(&speedstep_driver); | |
461 | } | |
462 | ||
463 | ||
464 | /** | |
465 | * speedstep_exit - unregisters SpeedStep support | |
466 | * | |
467 | * Unregisters SpeedStep support. | |
468 | */ | |
469 | static void __exit speedstep_exit(void) | |
470 | { | |
471 | cpufreq_unregister_driver(&speedstep_driver); | |
472 | } | |
473 | ||
bbfebd66 DJ |
474 | module_param(smi_port, int, 0444); |
475 | module_param(smi_cmd, int, 0444); | |
476 | module_param(smi_sig, uint, 0444); | |
1da177e4 | 477 | |
bbfebd66 DJ |
478 | MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value " |
479 | "-- Intel's default setting is 0xb2"); | |
480 | MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value " | |
481 | "-- Intel's default setting is 0x82"); | |
482 | MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the " | |
483 | "SMI interface."); | |
1da177e4 | 484 | |
bbfebd66 DJ |
485 | MODULE_AUTHOR("Hiroshi Miura"); |
486 | MODULE_DESCRIPTION("Speedstep driver for IST applet SMI interface."); | |
487 | MODULE_LICENSE("GPL"); | |
1da177e4 LT |
488 | |
489 | module_init(speedstep_init); | |
490 | module_exit(speedstep_exit); |