cpufreq: OMAP: only supports OPP library
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / cpufreq / omap-cpufreq.c
CommitLineData
ec6bced6 1/*
ffe4f0f1 2 * CPU frequency scaling for OMAP using OPP information
ec6bced6
TL
3 *
4 * Copyright (C) 2005 Nokia Corporation
5 * Written by Tony Lindgren <tony@atomide.com>
6 *
7 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
8 *
731e0cc6
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9 * Copyright (C) 2007-2011 Texas Instruments, Inc.
10 * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
11 *
ec6bced6
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12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/sched.h>
19#include <linux/cpufreq.h>
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/err.h>
f8ce2547 23#include <linux/clk.h>
fced80c7 24#include <linux/io.h>
731e0cc6 25#include <linux/opp.h>
46c12216 26#include <linux/cpu.h>
ec6bced6 27
ec6bced6 28#include <asm/system.h>
731e0cc6 29#include <asm/smp_plat.h>
46c12216 30#include <asm/cpu.h>
ec6bced6 31
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32#include <plat/clock.h>
33#include <plat/omap-pm.h>
34#include <plat/common.h>
a7ca9d2b 35
731e0cc6 36#include <mach/hardware.h>
aeec2990 37
46c12216
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38#ifdef CONFIG_SMP
39struct lpj_info {
40 unsigned long ref;
41 unsigned int freq;
42};
43
44static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
45static struct lpj_info global_lpj_ref;
46#endif
47
731e0cc6 48static struct cpufreq_frequency_table *freq_table;
b8488fbe 49static struct clk *mpu_clk;
08ca3e3b 50static char *mpu_clk_name;
a820ffa8 51static struct device *mpu_dev;
b8488fbe 52
b0a330dc 53static int omap_verify_speed(struct cpufreq_policy *policy)
ec6bced6 54{
bf2a359d 55 if (!freq_table)
ec6bced6 56 return -EINVAL;
bf2a359d 57 return cpufreq_frequency_table_verify(policy, freq_table);
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58}
59
b0a330dc 60static unsigned int omap_getspeed(unsigned int cpu)
ec6bced6 61{
ec6bced6
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62 unsigned long rate;
63
46c12216 64 if (cpu >= NR_CPUS)
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65 return 0;
66
ec6bced6 67 rate = clk_get_rate(mpu_clk) / 1000;
ec6bced6
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68 return rate;
69}
70
71static int omap_target(struct cpufreq_policy *policy,
72 unsigned int target_freq,
73 unsigned int relation)
74{
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75 unsigned int i;
76 int ret = 0;
731e0cc6 77 struct cpufreq_freqs freqs;
ec6bced6 78
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79 if (!freq_table) {
80 dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
81 policy->cpu);
82 return -EINVAL;
83 }
84
85 ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
86 relation, &i);
87 if (ret) {
88 dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
89 __func__, policy->cpu, target_freq, ret);
90 return ret;
91 }
92 freqs.new = freq_table[i].frequency;
93 if (!freqs.new) {
94 dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
95 policy->cpu, target_freq);
96 return -EINVAL;
97 }
aeec2990 98
46c12216 99 freqs.old = omap_getspeed(policy->cpu);
46c12216 100 freqs.cpu = policy->cpu;
ec6bced6 101
022ac03b 102 if (freqs.old == freqs.new && policy->cur == freqs.new)
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103 return ret;
104
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105 /* notifiers */
106 for_each_cpu(i, policy->cpus) {
107 freqs.cpu = i;
108 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
109 }
731e0cc6 110
aeec2990 111#ifdef CONFIG_CPU_FREQ_DEBUG
731e0cc6 112 pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
aeec2990 113#endif
731e0cc6 114
aeec2990 115 ret = clk_set_rate(mpu_clk, freqs.new * 1000);
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116 freqs.new = omap_getspeed(policy->cpu);
117
118#ifdef CONFIG_SMP
119 /*
120 * Note that loops_per_jiffy is not updated on SMP systems in
121 * cpufreq driver. So, update the per-CPU loops_per_jiffy value
122 * on frequency transition. We need to update all dependent CPUs.
123 */
124 for_each_cpu(i, policy->cpus) {
125 struct lpj_info *lpj = &per_cpu(lpj_ref, i);
126 if (!lpj->freq) {
127 lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
128 lpj->freq = freqs.old;
129 }
130
131 per_cpu(cpu_data, i).loops_per_jiffy =
132 cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
133 }
731e0cc6 134
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135 /* And don't forget to adjust the global one */
136 if (!global_lpj_ref.freq) {
137 global_lpj_ref.ref = loops_per_jiffy;
138 global_lpj_ref.freq = freqs.old;
139 }
140 loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
141 freqs.new);
142#endif
143
144 /* notifiers */
145 for_each_cpu(i, policy->cpus) {
146 freqs.cpu = i;
147 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
148 }
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149
150 return ret;
151}
152
790ab7e9 153static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
ec6bced6 154{
aeec2990 155 int result = 0;
731e0cc6 156
08ca3e3b 157 mpu_clk = clk_get(NULL, mpu_clk_name);
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158 if (IS_ERR(mpu_clk))
159 return PTR_ERR(mpu_clk);
160
46c12216 161 if (policy->cpu >= NR_CPUS)
ec6bced6 162 return -EINVAL;
aeec2990 163
46c12216 164 policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
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165 result = opp_init_cpufreq_table(mpu_dev, &freq_table);
166
167 if (result) {
168 dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
169 __func__, policy->cpu, result);
170 return result;
aeec2990
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171 }
172
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173 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
174 if (!result)
175 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
176
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177 policy->min = policy->cpuinfo.min_freq;
178 policy->max = policy->cpuinfo.max_freq;
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179 policy->cur = omap_getspeed(policy->cpu);
180
181 /*
182 * On OMAP SMP configuartion, both processors share the voltage
183 * and clock. So both CPUs needs to be scaled together and hence
184 * needs software co-ordination. Use cpufreq affected_cpus
185 * interface to handle this scenario. Additional is_smp() check
186 * is to keep SMP_ON_UP build working.
187 */
188 if (is_smp()) {
189 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
ed8ce00c 190 cpumask_setall(policy->cpus);
46c12216 191 }
731e0cc6 192
aeec2990 193 /* FIXME: what's the actual transition time? */
b029839c 194 policy->cpuinfo.transition_latency = 300 * 1000;
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195
196 return 0;
197}
198
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199static int omap_cpu_exit(struct cpufreq_policy *policy)
200{
201 clk_put(mpu_clk);
202 return 0;
203}
204
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205static struct freq_attr *omap_cpufreq_attr[] = {
206 &cpufreq_freq_attr_scaling_available_freqs,
207 NULL,
208};
209
ec6bced6
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210static struct cpufreq_driver omap_driver = {
211 .flags = CPUFREQ_STICKY,
212 .verify = omap_verify_speed,
213 .target = omap_target,
214 .get = omap_getspeed,
215 .init = omap_cpu_init,
b8488fbe 216 .exit = omap_cpu_exit,
ec6bced6 217 .name = "omap",
aeec2990 218 .attr = omap_cpufreq_attr,
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219};
220
221static int __init omap_cpufreq_init(void)
222{
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223 if (cpu_is_omap24xx())
224 mpu_clk_name = "virt_prcm_set";
225 else if (cpu_is_omap34xx())
226 mpu_clk_name = "dpll1_ck";
227 else if (cpu_is_omap44xx())
228 mpu_clk_name = "dpll_mpu_ck";
229
230 if (!mpu_clk_name) {
231 pr_err("%s: unsupported Silicon?\n", __func__);
232 return -EINVAL;
233 }
a820ffa8
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234
235 mpu_dev = omap2_get_mpuss_device();
236 if (!mpu_dev) {
237 pr_warning("%s: unable to get the mpu device\n", __func__);
238 return -EINVAL;
239 }
240
ec6bced6
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241 return cpufreq_register_driver(&omap_driver);
242}
243
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244static void __exit omap_cpufreq_exit(void)
245{
246 cpufreq_unregister_driver(&omap_driver);
247}
aeec2990 248
731e0cc6
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249MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
250MODULE_LICENSE("GPL");
251module_init(omap_cpufreq_init);
252module_exit(omap_cpufreq_exit);