[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / clocksource / vt8500_timer.c

/*
 *  arch/arm/mach-vt8500/timer.c
 *
 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
 *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

/*
 * This file is copied and modified from the original timer.c provided by
 * Alexey Charkov. Minor changes have been made for Device Tree Support.
 */

#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/delay.h>
#include <asm/mach/time.h>

#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>

#define VT8500_TIMER_OFFSET	0x0100
#define VT8500_TIMER_HZ		3000000
#define TIMER_MATCH_VAL		0x0000
#define TIMER_COUNT_VAL		0x0010
#define TIMER_STATUS_VAL	0x0014
#define TIMER_IER_VAL		0x001c		/* interrupt enable */
#define TIMER_CTRL_VAL		0x0020
#define TIMER_AS_VAL		0x0024		/* access status */
#define TIMER_COUNT_R_ACTIVE	(1 << 5)	/* not ready for read */
#define TIMER_COUNT_W_ACTIVE	(1 << 4)	/* not ready for write */
#define TIMER_MATCH_W_ACTIVE	(1 << 0)	/* not ready for write */

#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)

#define MIN_OSCR_DELTA		16

static void __iomem *regbase;

static cycle_t vt8500_timer_read(struct clocksource *cs)
{
	int loops = msecs_to_loops(10);
	writel(3, regbase + TIMER_CTRL_VAL);
	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
						&& --loops)
		cpu_relax();
	return readl(regbase + TIMER_COUNT_VAL);
}

static struct clocksource clocksource = {
	.name           = "vt8500_timer",
	.rating         = 200,
	.read           = vt8500_timer_read,
	.mask           = CLOCKSOURCE_MASK(32),
	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,
};

static int vt8500_timer_set_next_event(unsigned long cycles,
				    struct clock_event_device *evt)
{
	int loops = msecs_to_loops(10);
	cycle_t alarm = clocksource.read(&clocksource) + cycles;
	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
						&& --loops)
		cpu_relax();
	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);

	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
		return -ETIME;

	writel(1, regbase + TIMER_IER_VAL);

	return 0;
}

static void vt8500_timer_set_mode(enum clock_event_mode mode,
			      struct clock_event_device *evt)
{
	switch (mode) {
	case CLOCK_EVT_MODE_RESUME:
	case CLOCK_EVT_MODE_PERIODIC:
		break;
	case CLOCK_EVT_MODE_ONESHOT:
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
		writel(readl(regbase + TIMER_CTRL_VAL) | 1,
			regbase + TIMER_CTRL_VAL);
		writel(0, regbase + TIMER_IER_VAL);
		break;
	}
}

static struct clock_event_device clockevent = {
	.name           = "vt8500_timer",
	.features       = CLOCK_EVT_FEAT_ONESHOT,
	.rating         = 200,
	.set_next_event = vt8500_timer_set_next_event,
	.set_mode       = vt8500_timer_set_mode,
};

static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = dev_id;
	writel(0xf, regbase + TIMER_STATUS_VAL);
	evt->event_handler(evt);

	return IRQ_HANDLED;
}

static struct irqaction irq = {
	.name    = "vt8500_timer",
	.flags   = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
	.handler = vt8500_timer_interrupt,
	.dev_id  = &clockevent,
};

static void __init vt8500_timer_init(struct device_node *np)
{
	int timer_irq;

	regbase = of_iomap(np, 0);
	if (!regbase) {
		pr_err("%s: Missing iobase description in Device Tree\n",
								__func__);
		of_node_put(np);
		return;
	}
	timer_irq = irq_of_parse_and_map(np, 0);
	if (!timer_irq) {
		pr_err("%s: Missing irq description in Device Tree\n",
								__func__);
		of_node_put(np);
		return;
	}

	writel(1, regbase + TIMER_CTRL_VAL);
	writel(0xf, regbase + TIMER_STATUS_VAL);
	writel(~0, regbase + TIMER_MATCH_VAL);

	if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
		pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
					__func__, clocksource.name);

	clockevent.cpumask = cpumask_of(0);

	if (setup_irq(timer_irq, &irq))
		pr_err("%s: setup_irq failed for %s\n", __func__,
							clockevent.name);
	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
					MIN_OSCR_DELTA * 2, 0xf0000000);
}

CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
Commit	Line	Data
21f47fbc	1	/*
83cc7690	2	* arch/arm/mach-vt8500/timer.c
21f47fbc	3	*
e9a91de7	4	* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
21f47fbc AC	5	* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
e9a91de7 TP	22	/*
	23	* This file is copied and modified from the original timer.c provided by
	24	* Alexey Charkov. Minor changes have been made for Device Tree Support.
	25	*/
	26
21f47fbc AC	27	#include <linux/io.h>
	28	#include <linux/irq.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/clocksource.h>
	31	#include <linux/clockchips.h>
	32	#include <linux/delay.h>
21f47fbc AC	33	#include <asm/mach/time.h>
21f47fbc AC	34
e9a91de7 TP	35	#include <linux/of.h>
	36	#include <linux/of_address.h>
	37	#include <linux/of_irq.h>
21f47fbc AC	38
21f47fbc AC	39	#define VT8500_TIMER_OFFSET 0x0100
e9a91de7	40	#define VT8500_TIMER_HZ 3000000
21f47fbc AC	41	#define TIMER_MATCH_VAL 0x0000
	42	#define TIMER_COUNT_VAL 0x0010
	43	#define TIMER_STATUS_VAL 0x0014
	44	#define TIMER_IER_VAL 0x001c /* interrupt enable */
	45	#define TIMER_CTRL_VAL 0x0020
	46	#define TIMER_AS_VAL 0x0024 /* access status */
	47	#define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
	48	#define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
	49	#define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
21f47fbc AC	50
	51	#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
	52
1644fe6c RV	53	#define MIN_OSCR_DELTA 16
1644fe6c RV	54
21f47fbc AC	55	static void __iomem *regbase;
	56
	57	static cycle_t vt8500_timer_read(struct clocksource *cs)
	58	{
	59	int loops = msecs_to_loops(10);
	60	writel(3, regbase + TIMER_CTRL_VAL);
	61	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
	62	&& --loops)
	63	cpu_relax();
	64	return readl(regbase + TIMER_COUNT_VAL);
	65	}
	66
e9a91de7	67	static struct clocksource clocksource = {
21f47fbc AC	68	.name = "vt8500_timer",
	69	.rating = 200,
	70	.read = vt8500_timer_read,
	71	.mask = CLOCKSOURCE_MASK(32),
	72	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	73	};
	74
	75	static int vt8500_timer_set_next_event(unsigned long cycles,
	76	struct clock_event_device *evt)
	77	{
	78	int loops = msecs_to_loops(10);
	79	cycle_t alarm = clocksource.read(&clocksource) + cycles;
	80	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
	81	&& --loops)
	82	cpu_relax();
	83	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
	84
1644fe6c	85	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
21f47fbc AC	86	return -ETIME;
	87
	88	writel(1, regbase + TIMER_IER_VAL);
	89
	90	return 0;
	91	}
	92
	93	static void vt8500_timer_set_mode(enum clock_event_mode mode,
	94	struct clock_event_device *evt)
	95	{
	96	switch (mode) {
	97	case CLOCK_EVT_MODE_RESUME:
	98	case CLOCK_EVT_MODE_PERIODIC:
	99	break;
	100	case CLOCK_EVT_MODE_ONESHOT:
	101	case CLOCK_EVT_MODE_UNUSED:
	102	case CLOCK_EVT_MODE_SHUTDOWN:
	103	writel(readl(regbase + TIMER_CTRL_VAL) \| 1,
	104	regbase + TIMER_CTRL_VAL);
	105	writel(0, regbase + TIMER_IER_VAL);
	106	break;
	107	}
	108	}
	109
e9a91de7	110	static struct clock_event_device clockevent = {
21f47fbc AC	111	.name = "vt8500_timer",
	112	.features = CLOCK_EVT_FEAT_ONESHOT,
	113	.rating = 200,
	114	.set_next_event = vt8500_timer_set_next_event,
	115	.set_mode = vt8500_timer_set_mode,
	116	};
	117
	118	static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
	119	{
	120	struct clock_event_device *evt = dev_id;
	121	writel(0xf, regbase + TIMER_STATUS_VAL);
	122	evt->event_handler(evt);
	123
	124	return IRQ_HANDLED;
	125	}
	126
e9a91de7	127	static struct irqaction irq = {
21f47fbc AC	128	.name = "vt8500_timer",
	129	.flags = IRQF_DISABLED \| IRQF_TIMER \| IRQF_IRQPOLL,
	130	.handler = vt8500_timer_interrupt,
	131	.dev_id = &clockevent,
	132	};
	133
effbfdd7	134	static void __init vt8500_timer_init(struct device_node *np)
21f47fbc	135	{
e9a91de7 TP	136	int timer_irq;
e9a91de7 TP	137
e9a91de7 TP	138	regbase = of_iomap(np, 0);
	139	if (!regbase) {
	140	pr_err("%s: Missing iobase description in Device Tree\n",
	141	__func__);
	142	of_node_put(np);
	143	return;
	144	}
	145	timer_irq = irq_of_parse_and_map(np, 0);
	146	if (!timer_irq) {
	147	pr_err("%s: Missing irq description in Device Tree\n",
	148	__func__);
	149	of_node_put(np);
	150	return;
	151	}
21f47fbc AC	152
	153	writel(1, regbase + TIMER_CTRL_VAL);
	154	writel(0xf, regbase + TIMER_STATUS_VAL);
	155	writel(~0, regbase + TIMER_MATCH_VAL);
	156
	157	if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
e9a91de7 TP	158	pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
e9a91de7 TP	159	__func__, clocksource.name);
21f47fbc	160
21f47fbc AC	161	clockevent.cpumask = cpumask_of(0);
21f47fbc AC	162
e9a91de7 TP	163	if (setup_irq(timer_irq, &irq))
	164	pr_err("%s: setup_irq failed for %s\n", __func__,
	165	clockevent.name);
838a2ae8	166	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
1644fe6c	167	MIN_OSCR_DELTA * 2, 0xf0000000);
21f47fbc AC	168	}
21f47fbc AC	169
3d5a9658	170	CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);