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proc tty: switch synclink_cs to ->proc_fops
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / stallion.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4
LT		 29#include <linux/module.h>
30#include <linux/slab.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/tty_flip.h>
34#include <linux/serial.h>
35#include <linux/cd1400.h>
36#include <linux/sc26198.h>
37#include <linux/comstats.h>
38#include <linux/stallion.h>
39#include <linux/ioport.h>
40#include <linux/init.h>
41#include <linux/smp_lock.h>
1da177e4
LT		 42#include <linux/device.h>
43#include <linux/delay.h>
843b568c 44#include <linux/ctype.h>
1da177e4
LT		 45
46#include <asm/io.h>
47#include <asm/uaccess.h>
48
1da177e4 49#include <linux/pci.h>
1da177e4
LT		 50
51/*****************************************************************************/
52
53/*
54 * Define different board types. Use the standard Stallion "assigned"
55 * board numbers. Boards supported in this driver are abbreviated as
56 * EIO = EasyIO and ECH = EasyConnection 8/32.
57 */
58#define BRD_EASYIO 20
59#define BRD_ECH 21
60#define BRD_ECHMC 22
61#define BRD_ECHPCI 26
62#define BRD_ECH64PCI 27
63#define BRD_EASYIOPCI 28
64
843b568c 65struct stlconf {
6b2c9457 66 unsigned int brdtype;
1da177e4
LT		 67 int ioaddr1;
68 int ioaddr2;
69 unsigned long memaddr;
70 int irq;
71 int irqtype;
1da177e4
LT		 72};
73
843b568c 74static unsigned int stl_nrbrds;
1da177e4
LT		 75
76/*****************************************************************************/
77
78/*
79 * Define some important driver characteristics. Device major numbers
80 * allocated as per Linux Device Registry.
81 */
82#ifndef STL_SIOMEMMAJOR
83#define STL_SIOMEMMAJOR 28
84#endif
85#ifndef STL_SERIALMAJOR
86#define STL_SERIALMAJOR 24
87#endif
88#ifndef STL_CALLOUTMAJOR
89#define STL_CALLOUTMAJOR 25
90#endif
91
92/*
93 * Set the TX buffer size. Bigger is better, but we don't want
94 * to chew too much memory with buffers!
95 */
96#define STL_TXBUFLOW 512
97#define STL_TXBUFSIZE 4096
98
99/*****************************************************************************/
100
101/*
102 * Define our local driver identity first. Set up stuff to deal with
103 * all the local structures required by a serial tty driver.
104 */
105static char *stl_drvtitle = "Stallion Multiport Serial Driver";
106static char *stl_drvname = "stallion";
107static char *stl_drvversion = "5.6.0";
108
109static struct tty_driver *stl_serial;
110
1da177e4
LT		 111/*
112 * Define a local default termios struct. All ports will be created
113 * with this termios initially. Basically all it defines is a raw port
114 * at 9600, 8 data bits, 1 stop bit.
115 */
606d099c 116static struct ktermios stl_deftermios = {
1da177e4
LT		 117 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
118 .c_cc = INIT_C_CC,
606d099c
AC		 119 .c_ispeed = 9600,
120 .c_ospeed = 9600,
1da177e4
LT		 121};
122
1da177e4
LT		 123/*
124 * Define global place to put buffer overflow characters.
125 */
126static char stl_unwanted[SC26198_RXFIFOSIZE];
127
128/*****************************************************************************/
129
79cfe7ab 130static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 131static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 132
31f35939
AC		 133static const struct tty_port_operations stl_port_ops;
134
1da177e4
LT		 135/*
136 * Per board state flags. Used with the state field of the board struct.
137 * Not really much here!
138 */
139#define BRD_FOUND 0x1
fc06b5cf
JS		 140#define STL_PROBED 0x2
141
1da177e4
LT		 142
143/*
144 * Define the port structure istate flags. These set of flags are
145 * modified at interrupt time - so setting and reseting them needs
146 * to be atomic. Use the bit clear/setting routines for this.
147 */
148#define ASYI_TXBUSY 1
149#define ASYI_TXLOW 2
ccfea3c9 150#define ASYI_TXFLOWED 3
1da177e4
LT		 151
152/*
153 * Define an array of board names as printable strings. Handy for
154 * referencing boards when printing trace and stuff.
155 */
156static char *stl_brdnames[] = {
615e4a71
JS		 157 NULL,
158 NULL,
159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
1da177e4
LT		 177 "EasyIO",
178 "EC8/32-AT",
179 "EC8/32-MC",
615e4a71
JS		 180 NULL,
181 NULL,
182 NULL,
1da177e4
LT		 183 "EC8/32-PCI",
184 "EC8/64-PCI",
185 "EasyIO-PCI",
186};
187
188/*****************************************************************************/
189
190/*
191 * Define some string labels for arguments passed from the module
192 * load line. These allow for easy board definitions, and easy
193 * modification of the io, memory and irq resoucres.
194 */
6b2c9457 195static unsigned int stl_nargs;
1da177e4
LT		 196static char *board0[4];
197static char *board1[4];
198static char *board2[4];
199static char *board3[4];
200
201static char **stl_brdsp[] = {
202 (char **) &board0,
203 (char **) &board1,
204 (char **) &board2,
205 (char **) &board3
206};
207
208/*
209 * Define a set of common board names, and types. This is used to
210 * parse any module arguments.
211 */
212
ca7ed0f2 213static struct {
1da177e4
LT		 214 char *name;
215 int type;
ca7ed0f2 216} stl_brdstr[] = {
1da177e4
LT		 217 { "easyio", BRD_EASYIO },
218 { "eio", BRD_EASYIO },
219 { "20", BRD_EASYIO },
220 { "ec8/32", BRD_ECH },
221 { "ec8/32-at", BRD_ECH },
222 { "ec8/32-isa", BRD_ECH },
223 { "ech", BRD_ECH },
224 { "echat", BRD_ECH },
225 { "21", BRD_ECH },
226 { "ec8/32-mc", BRD_ECHMC },
227 { "ec8/32-mca", BRD_ECHMC },
228 { "echmc", BRD_ECHMC },
229 { "echmca", BRD_ECHMC },
230 { "22", BRD_ECHMC },
231 { "ec8/32-pc", BRD_ECHPCI },
232 { "ec8/32-pci", BRD_ECHPCI },
233 { "26", BRD_ECHPCI },
234 { "ec8/64-pc", BRD_ECH64PCI },
235 { "ec8/64-pci", BRD_ECH64PCI },
236 { "ech-pci", BRD_ECH64PCI },
237 { "echpci", BRD_ECH64PCI },
238 { "echpc", BRD_ECH64PCI },
239 { "27", BRD_ECH64PCI },
240 { "easyio-pc", BRD_EASYIOPCI },
241 { "easyio-pci", BRD_EASYIOPCI },
242 { "eio-pci", BRD_EASYIOPCI },
243 { "eiopci", BRD_EASYIOPCI },
244 { "28", BRD_EASYIOPCI },
245};
246
247/*
248 * Define the module agruments.
249 */
1da177e4
LT		 250
251module_param_array(board0, charp, &stl_nargs, 0);
252MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
253module_param_array(board1, charp, &stl_nargs, 0);
254MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
255module_param_array(board2, charp, &stl_nargs, 0);
256MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
257module_param_array(board3, charp, &stl_nargs, 0);
258MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
259
260/*****************************************************************************/
261
262/*
263 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
264 * to the directly accessible io ports of these boards (not the uarts -
265 * they are in cd1400.h and sc26198.h).
266 */
267#define EIO_8PORTRS 0x04
268#define EIO_4PORTRS 0x05
269#define EIO_8PORTDI 0x00
270#define EIO_8PORTM 0x06
271#define EIO_MK3 0x03
272#define EIO_IDBITMASK 0x07
273
274#define EIO_BRDMASK 0xf0
275#define ID_BRD4 0x10
276#define ID_BRD8 0x20
277#define ID_BRD16 0x30
278
279#define EIO_INTRPEND 0x08
280#define EIO_INTEDGE 0x00
281#define EIO_INTLEVEL 0x08
282#define EIO_0WS 0x10
283
284#define ECH_ID 0xa0
285#define ECH_IDBITMASK 0xe0
286#define ECH_BRDENABLE 0x08
287#define ECH_BRDDISABLE 0x00
288#define ECH_INTENABLE 0x01
289#define ECH_INTDISABLE 0x00
290#define ECH_INTLEVEL 0x02
291#define ECH_INTEDGE 0x00
292#define ECH_INTRPEND 0x01
293#define ECH_BRDRESET 0x01
294
295#define ECHMC_INTENABLE 0x01
296#define ECHMC_BRDRESET 0x02
297
298#define ECH_PNLSTATUS 2
299#define ECH_PNL16PORT 0x20
300#define ECH_PNLIDMASK 0x07
301#define ECH_PNLXPID 0x40
302#define ECH_PNLINTRPEND 0x80
303
304#define ECH_ADDR2MASK 0x1e0
305
306/*
307 * Define the vector mapping bits for the programmable interrupt board
308 * hardware. These bits encode the interrupt for the board to use - it
309 * is software selectable (except the EIO-8M).
310 */
311static unsigned char stl_vecmap[] = {
312 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
313 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
314};
315
b65b5b59
AC		 316/*
317 * Lock ordering is that you may not take stallion_lock holding
318 * brd_lock.
319 */
320
321static spinlock_t brd_lock; /* Guard the board mapping */
322static spinlock_t stallion_lock; /* Guard the tty driver */
323
1da177e4
LT		 324/*
325 * Set up enable and disable macros for the ECH boards. They require
326 * the secondary io address space to be activated and deactivated.
327 * This way all ECH boards can share their secondary io region.
328 * If this is an ECH-PCI board then also need to set the page pointer
329 * to point to the correct page.
330 */
331#define BRDENABLE(brdnr,pagenr) \
332 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
333 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
334 stl_brds[(brdnr)]->ioctrl); \
335 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
336 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
337
338#define BRDDISABLE(brdnr) \
339 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
340 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
341 stl_brds[(brdnr)]->ioctrl);
342
343#define STL_CD1400MAXBAUD 230400
344#define STL_SC26198MAXBAUD 460800
345
346#define STL_BAUDBASE 115200
347#define STL_CLOSEDELAY (5 * HZ / 10)
348
349/*****************************************************************************/
350
1da177e4
LT		 351/*
352 * Define the Stallion PCI vendor and device IDs.
353 */
354#ifndef PCI_VENDOR_ID_STALLION
355#define PCI_VENDOR_ID_STALLION 0x124d
356#endif
357#ifndef PCI_DEVICE_ID_ECHPCI832
358#define PCI_DEVICE_ID_ECHPCI832 0x0000
359#endif
360#ifndef PCI_DEVICE_ID_ECHPCI864
361#define PCI_DEVICE_ID_ECHPCI864 0x0002
362#endif
363#ifndef PCI_DEVICE_ID_EIOPCI
364#define PCI_DEVICE_ID_EIOPCI 0x0003
365#endif
366
367/*
368 * Define structure to hold all Stallion PCI boards.
369 */
1da177e4 370
b1b84fe0
JS		 371static struct pci_device_id stl_pcibrds[] = {
372 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
373 .driver_data = BRD_ECH64PCI },
374 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
375 .driver_data = BRD_EASYIOPCI },
376 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
377 .driver_data = BRD_ECHPCI },
378 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
379 .driver_data = BRD_ECHPCI },
380 { }
381};
382MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 383
384/*****************************************************************************/
385
386/*
387 * Define macros to extract a brd/port number from a minor number.
388 */
389#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
390#define MINOR2PORT(min) ((min) & 0x3f)
391
392/*
393 * Define a baud rate table that converts termios baud rate selector
394 * into the actual baud rate value. All baud rate calculations are
395 * based on the actual baud rate required.
396 */
397static unsigned int stl_baudrates[] = {
398 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
399 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
400};
401
1da177e4
LT		 402/*****************************************************************************/
403
404/*
405 * Declare all those functions in this driver!
406 */
407
1da177e4 408static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 409static int stl_brdinit(struct stlbrd *brdp);
d18a750f 410static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 411static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 412
1da177e4
LT		 413/*
414 * CD1400 uart specific handling functions.
415 */
ca7ed0f2
JS		 416static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
417static int stl_cd1400getreg(struct stlport *portp, int regnr);
418static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
420static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 421static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 422static int stl_cd1400getsignals(struct stlport *portp);
423static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
424static void stl_cd1400ccrwait(struct stlport *portp);
425static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
426static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
427static void stl_cd1400disableintrs(struct stlport *portp);
428static void stl_cd1400sendbreak(struct stlport *portp, int len);
429static void stl_cd1400flowctrl(struct stlport *portp, int state);
430static void stl_cd1400sendflow(struct stlport *portp, int state);
431static void stl_cd1400flush(struct stlport *portp);
432static int stl_cd1400datastate(struct stlport *portp);
433static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
434static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
435static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
436static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
437static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
438
439static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 440
441/*
442 * SC26198 uart specific handling functions.
443 */
ca7ed0f2
JS		 444static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
445static int stl_sc26198getreg(struct stlport *portp, int regnr);
446static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
448static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
449static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 450static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 451static int stl_sc26198getsignals(struct stlport *portp);
452static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
453static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
454static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
455static void stl_sc26198disableintrs(struct stlport *portp);
456static void stl_sc26198sendbreak(struct stlport *portp, int len);
457static void stl_sc26198flowctrl(struct stlport *portp, int state);
458static void stl_sc26198sendflow(struct stlport *portp, int state);
459static void stl_sc26198flush(struct stlport *portp);
460static int stl_sc26198datastate(struct stlport *portp);
461static void stl_sc26198wait(struct stlport *portp);
462static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
463static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
464static void stl_sc26198txisr(struct stlport *port);
465static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
466static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
467static void stl_sc26198rxbadchars(struct stlport *portp);
468static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 469
470/*****************************************************************************/
471
472/*
473 * Generic UART support structure.
474 */
475typedef struct uart {
ca7ed0f2
JS		 476 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
477 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 478 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 479 int (*getsignals)(struct stlport *portp);
480 void (*setsignals)(struct stlport *portp, int dtr, int rts);
481 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
482 void (*startrxtx)(struct stlport *portp, int rx, int tx);
483 void (*disableintrs)(struct stlport *portp);
484 void (*sendbreak)(struct stlport *portp, int len);
485 void (*flowctrl)(struct stlport *portp, int state);
486 void (*sendflow)(struct stlport *portp, int state);
487 void (*flush)(struct stlport *portp);
488 int (*datastate)(struct stlport *portp);
489 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 490} uart_t;
491
492/*
493 * Define some macros to make calling these functions nice and clean.
494 */
495#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
496#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
497#define stl_setport (* ((uart_t *) portp->uartp)->setport)
498#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
499#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
500#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
501#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
502#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
503#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
504#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
505#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
506#define stl_flush (* ((uart_t *) portp->uartp)->flush)
507#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
508
509/*****************************************************************************/
510
511/*
512 * CD1400 UART specific data initialization.
513 */
514static uart_t stl_cd1400uart = {
515 stl_cd1400panelinit,
516 stl_cd1400portinit,
517 stl_cd1400setport,
518 stl_cd1400getsignals,
519 stl_cd1400setsignals,
520 stl_cd1400enablerxtx,
521 stl_cd1400startrxtx,
522 stl_cd1400disableintrs,
523 stl_cd1400sendbreak,
524 stl_cd1400flowctrl,
525 stl_cd1400sendflow,
526 stl_cd1400flush,
527 stl_cd1400datastate,
528 stl_cd1400eiointr
529};
530
531/*
532 * Define the offsets within the register bank of a cd1400 based panel.
533 * These io address offsets are common to the EasyIO board as well.
534 */
535#define EREG_ADDR 0
536#define EREG_DATA 4
537#define EREG_RXACK 5
538#define EREG_TXACK 6
539#define EREG_MDACK 7
540
541#define EREG_BANKSIZE 8
542
543#define CD1400_CLK 25000000
544#define CD1400_CLK8M 20000000
545
546/*
547 * Define the cd1400 baud rate clocks. These are used when calculating
548 * what clock and divisor to use for the required baud rate. Also
549 * define the maximum baud rate allowed, and the default base baud.
550 */
551static int stl_cd1400clkdivs[] = {
552 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
553};
554
555/*****************************************************************************/
556
557/*
558 * SC26198 UART specific data initization.
559 */
560static uart_t stl_sc26198uart = {
561 stl_sc26198panelinit,
562 stl_sc26198portinit,
563 stl_sc26198setport,
564 stl_sc26198getsignals,
565 stl_sc26198setsignals,
566 stl_sc26198enablerxtx,
567 stl_sc26198startrxtx,
568 stl_sc26198disableintrs,
569 stl_sc26198sendbreak,
570 stl_sc26198flowctrl,
571 stl_sc26198sendflow,
572 stl_sc26198flush,
573 stl_sc26198datastate,
574 stl_sc26198intr
575};
576
577/*
578 * Define the offsets within the register bank of a sc26198 based panel.
579 */
580#define XP_DATA 0
581#define XP_ADDR 1
582#define XP_MODID 2
583#define XP_STATUS 2
584#define XP_IACK 3
585
586#define XP_BANKSIZE 4
587
588/*
589 * Define the sc26198 baud rate table. Offsets within the table
590 * represent the actual baud rate selector of sc26198 registers.
591 */
592static unsigned int sc26198_baudtable[] = {
593 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
594 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
595 230400, 460800, 921600
596};
597
fe971071 598#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 599
600/*****************************************************************************/
601
602/*
603 * Define the driver info for a user level control device. Used mainly
604 * to get at port stats - only not using the port device itself.
605 */
62322d25 606static const struct file_operations stl_fsiomem = {
1da177e4
LT		 607 .owner = THIS_MODULE,
608 .ioctl = stl_memioctl,
609};
610
ca8eca68 611static struct class *stallion_class;
1da177e4 612
ccfea3c9
JS		 613static void stl_cd_change(struct stlport *portp)
614{
615 unsigned int oldsigs = portp->sigs;
d18a750f 616 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 617
d18a750f 618 if (!tty)
ccfea3c9
JS		 619 return;
620
621 portp->sigs = stl_getsignals(portp);
622
623 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 624 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 625
626 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 627 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 628 tty_hangup(tty);
629 tty_kref_put(tty);
ccfea3c9
JS		 630}
631
1da177e4
LT		 632/*
633 * Check for any arguments passed in on the module load command line.
634 */
635
1da177e4
LT		 636/*****************************************************************************/
637
1da177e4
LT		 638/*
639 * Parse the supplied argument string, into the board conf struct.
640 */
641
40e82652 642static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 643{
644 char *sp;
6b2c9457 645 unsigned int i;
1da177e4 646
a0564e14 647 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 648
615e4a71 649 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 650 return 0;
1da177e4 651
c62429d9 652 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 653 *sp = tolower(*sp);
1da177e4 654
c62429d9 655 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 656 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
657 break;
c62429d9 658
fe971071 659 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 660 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 661 return 0;
1da177e4
LT		 662 }
663
664 confp->brdtype = stl_brdstr[i].type;
665
666 i = 1;
615e4a71 667 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 668 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 669 i++;
670 if (confp->brdtype == BRD_ECH) {
615e4a71 671 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 672 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 673 i++;
674 }
615e4a71 675 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 676 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 677 return 1;
1da177e4
LT		 678}
679
680/*****************************************************************************/
681
1da177e4
LT		 682/*
683 * Allocate a new board structure. Fill out the basic info in it.
684 */
685
ca7ed0f2 686static struct stlbrd *stl_allocbrd(void)
1da177e4 687{
ca7ed0f2 688 struct stlbrd *brdp;
1da177e4 689
ca7ed0f2 690 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 691 if (!brdp) {
b65b5b59 692 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 693 sizeof(struct stlbrd));
b0b4ed72 694 return NULL;
1da177e4
LT		 695 }
696
1da177e4 697 brdp->magic = STL_BOARDMAGIC;
014c2544 698 return brdp;
1da177e4
LT		 699}
700
701/*****************************************************************************/
702
703static int stl_open(struct tty_struct *tty, struct file *filp)
704{
ca7ed0f2
JS		 705 struct stlport *portp;
706 struct stlbrd *brdp;
4350f3ff 707 struct tty_port *port;
6b2c9457 708 unsigned int minordev, brdnr, panelnr;
4350f3ff 709 int portnr;
1da177e4 710
a0564e14 711 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 712
713 minordev = tty->index;
714 brdnr = MINOR2BRD(minordev);
715 if (brdnr >= stl_nrbrds)
014c2544 716 return -ENODEV;
1da177e4 717 brdp = stl_brds[brdnr];
615e4a71 718 if (brdp == NULL)
014c2544 719 return -ENODEV;
4350f3ff 720
1da177e4 721 minordev = MINOR2PORT(minordev);
c62429d9 722 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 723 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 724 break;
725 if (minordev < brdp->panels[panelnr]->nrports) {
726 portnr = minordev;
727 break;
728 }
729 minordev -= brdp->panels[panelnr]->nrports;
730 }
731 if (portnr < 0)
014c2544 732 return -ENODEV;
1da177e4
LT		 733
734 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 735 if (portp == NULL)
014c2544 736 return -ENODEV;
4350f3ff 737 port = &portp->port;
1da177e4
LT		 738
739/*
740 * On the first open of the device setup the port hardware, and
741 * initialize the per port data structure.
742 */
4350f3ff 743 tty_port_tty_set(port, tty);
1da177e4 744 tty->driver_data = portp;
4350f3ff 745 port->count++;
1da177e4 746
4350f3ff 747 if ((port->flags & ASYNC_INITIALIZED) == 0) {
b0b4ed72
TK		 748 if (!portp->tx.buf) {
749 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
750 if (!portp->tx.buf)
014c2544 751 return -ENOMEM;
1da177e4
LT		 752 portp->tx.head = portp->tx.buf;
753 portp->tx.tail = portp->tx.buf;
754 }
755 stl_setport(portp, tty->termios);
756 portp->sigs = stl_getsignals(portp);
757 stl_setsignals(portp, 1, 1);
758 stl_enablerxtx(portp, 1, 1);
759 stl_startrxtx(portp, 1, 0);
760 clear_bit(TTY_IO_ERROR, &tty->flags);
4350f3ff 761 port->flags |= ASYNC_INITIALIZED;
1da177e4 762 }
4350f3ff 763 return tty_port_block_til_ready(port, tty, filp);
1da177e4
LT		 764}
765
766/*****************************************************************************/
767
31f35939
AC		 768static int stl_carrier_raised(struct tty_port *port)
769{
770 struct stlport *portp = container_of(port, struct stlport, port);
771 return (portp->sigs & TIOCM_CD) ? 1 : 0;
772}
773
4350f3ff 774static void stl_raise_dtr_rts(struct tty_port *port)
1da177e4 775{
4350f3ff
AC		 776 struct stlport *portp = container_of(port, struct stlport, port);
777 /* Takes brd_lock internally */
778 stl_setsignals(portp, 1, 1);
1da177e4
LT		 779}
780
781/*****************************************************************************/
782
96b066b8
JS		 783static void stl_flushbuffer(struct tty_struct *tty)
784{
785 struct stlport *portp;
786
787 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
788
96b066b8
JS		 789 portp = tty->driver_data;
790 if (portp == NULL)
791 return;
792
793 stl_flush(portp);
794 tty_wakeup(tty);
795}
796
797/*****************************************************************************/
798
799static void stl_waituntilsent(struct tty_struct *tty, int timeout)
800{
801 struct stlport *portp;
802 unsigned long tend;
803
804 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
805
96b066b8
JS		 806 portp = tty->driver_data;
807 if (portp == NULL)
808 return;
809
810 if (timeout == 0)
811 timeout = HZ;
812 tend = jiffies + timeout;
813
978e595f 814 lock_kernel();
96b066b8
JS		 815 while (stl_datastate(portp)) {
816 if (signal_pending(current))
817 break;
818 msleep_interruptible(20);
819 if (time_after_eq(jiffies, tend))
820 break;
821 }
978e595f 822 unlock_kernel();
96b066b8
JS		 823}
824
825/*****************************************************************************/
826
1da177e4
LT		 827static void stl_close(struct tty_struct *tty, struct file *filp)
828{
ca7ed0f2 829 struct stlport *portp;
4350f3ff 830 struct tty_port *port;
1da177e4
LT		 831 unsigned long flags;
832
a0564e14 833 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4
LT		 834
835 portp = tty->driver_data;
a6614999
AC		 836 BUG_ON(portp == NULL);
837
4350f3ff 838 port = &portp->port;
1da177e4 839
a6614999 840 if (tty_port_close_start(port, tty, filp) == 0)
1da177e4 841 return;
1da177e4
LT		 842/*
843 * May want to wait for any data to drain before closing. The BUSY
844 * flag keeps track of whether we are still sending or not - it is
845 * very accurate for the cd1400, not quite so for the sc26198.
846 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
847 */
1da177e4
LT		 848 stl_waituntilsent(tty, (HZ / 2));
849
4350f3ff 850 spin_lock_irqsave(&port->lock, flags);
f8ae4764 851 portp->port.flags &= ~ASYNC_INITIALIZED;
4350f3ff 852 spin_unlock_irqrestore(&port->lock, flags);
b65b5b59 853
1da177e4
LT		 854 stl_disableintrs(portp);
855 if (tty->termios->c_cflag & HUPCL)
856 stl_setsignals(portp, 0, 0);
857 stl_enablerxtx(portp, 0, 0);
858 stl_flushbuffer(tty);
859 portp->istate = 0;
615e4a71 860 if (portp->tx.buf != NULL) {
1da177e4 861 kfree(portp->tx.buf);
615e4a71
JS		 862 portp->tx.buf = NULL;
863 portp->tx.head = NULL;
864 portp->tx.tail = NULL;
1da177e4 865 }
1da177e4 866
a6614999 867 tty_port_close_end(port, tty);
4350f3ff 868 tty_port_tty_set(port, NULL);
1da177e4
LT		 869}
870
871/*****************************************************************************/
872
873/*
874 * Write routine. Take data and stuff it in to the TX ring queue.
875 * If transmit interrupts are not running then start them.
876 */
877
878static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
879{
ca7ed0f2 880 struct stlport *portp;
1da177e4
LT		 881 unsigned int len, stlen;
882 unsigned char *chbuf;
883 char *head, *tail;
884
a0564e14 885 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 886
1da177e4 887 portp = tty->driver_data;
615e4a71 888 if (portp == NULL)
014c2544 889 return 0;
615e4a71 890 if (portp->tx.buf == NULL)
014c2544 891 return 0;
1da177e4
LT		 892
893/*
894 * If copying direct from user space we must cater for page faults,
895 * causing us to "sleep" here for a while. To handle this copy in all
896 * the data we need now, into a local buffer. Then when we got it all
897 * copy it into the TX buffer.
898 */
899 chbuf = (unsigned char *) buf;
900
901 head = portp->tx.head;
902 tail = portp->tx.tail;
903 if (head >= tail) {
904 len = STL_TXBUFSIZE - (head - tail) - 1;
905 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
906 } else {
907 len = tail - head - 1;
908 stlen = len;
909 }
910
843b568c 911 len = min(len, (unsigned int)count);
1da177e4
LT		 912 count = 0;
913 while (len > 0) {
843b568c 914 stlen = min(len, stlen);
1da177e4
LT		 915 memcpy(head, chbuf, stlen);
916 len -= stlen;
917 chbuf += stlen;
918 count += stlen;
919 head += stlen;
920 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
921 head = portp->tx.buf;
922 stlen = tail - head;
923 }
924 }
925 portp->tx.head = head;
926
927 clear_bit(ASYI_TXLOW, &portp->istate);
928 stl_startrxtx(portp, -1, 1);
929
014c2544 930 return count;
1da177e4
LT		 931}
932
933/*****************************************************************************/
934
4a561222 935static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 936{
ca7ed0f2 937 struct stlport *portp;
1da177e4
LT		 938 unsigned int len;
939 char *head, *tail;
940
a0564e14 941 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 942
1da177e4 943 portp = tty->driver_data;
615e4a71 944 if (portp == NULL)
4a561222 945 return -EINVAL;
615e4a71 946 if (portp->tx.buf == NULL)
4a561222 947 return -EINVAL;
1da177e4
LT		 948
949 head = portp->tx.head;
950 tail = portp->tx.tail;
951
952 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
953 len--;
954
955 if (len > 0) {
956 *head++ = ch;
957 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
958 head = portp->tx.buf;
959 }
960 portp->tx.head = head;
4a561222 961 return 0;
1da177e4
LT		 962}
963
964/*****************************************************************************/
965
966/*
967 * If there are any characters in the buffer then make sure that TX
968 * interrupts are on and get'em out. Normally used after the putchar
969 * routine has been called.
970 */
971
972static void stl_flushchars(struct tty_struct *tty)
973{
ca7ed0f2 974 struct stlport *portp;
1da177e4 975
a0564e14 976 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 977
1da177e4 978 portp = tty->driver_data;
615e4a71 979 if (portp == NULL)
1da177e4 980 return;
615e4a71 981 if (portp->tx.buf == NULL)
1da177e4
LT		 982 return;
983
1da177e4
LT		 984 stl_startrxtx(portp, -1, 1);
985}
986
987/*****************************************************************************/
988
989static int stl_writeroom(struct tty_struct *tty)
990{
ca7ed0f2 991 struct stlport *portp;
1da177e4
LT		 992 char *head, *tail;
993
a0564e14 994 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 995
1da177e4 996 portp = tty->driver_data;
615e4a71 997 if (portp == NULL)
014c2544 998 return 0;
615e4a71 999 if (portp->tx.buf == NULL)
014c2544 1000 return 0;
1da177e4
LT		 1001
1002 head = portp->tx.head;
1003 tail = portp->tx.tail;
c62429d9 1004 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 1005}
1006
1007/*****************************************************************************/
1008
1009/*
1010 * Return number of chars in the TX buffer. Normally we would just
1011 * calculate the number of chars in the buffer and return that, but if
1012 * the buffer is empty and TX interrupts are still on then we return
1013 * that the buffer still has 1 char in it. This way whoever called us
1014 * will not think that ALL chars have drained - since the UART still
1015 * must have some chars in it (we are busy after all).
1016 */
1017
1018static int stl_charsinbuffer(struct tty_struct *tty)
1019{
ca7ed0f2 1020 struct stlport *portp;
1da177e4
LT		 1021 unsigned int size;
1022 char *head, *tail;
1023
a0564e14 1024 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1025
1da177e4 1026 portp = tty->driver_data;
615e4a71 1027 if (portp == NULL)
014c2544 1028 return 0;
615e4a71 1029 if (portp->tx.buf == NULL)
014c2544 1030 return 0;
1da177e4
LT		 1031
1032 head = portp->tx.head;
1033 tail = portp->tx.tail;
1034 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1035 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1036 size = 1;
014c2544 1037 return size;
1da177e4
LT		 1038}
1039
1040/*****************************************************************************/
1041
1042/*
1043 * Generate the serial struct info.
1044 */
1045
ca7ed0f2 1046static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1047{
1048 struct serial_struct sio;
ca7ed0f2 1049 struct stlbrd *brdp;
1da177e4 1050
a0564e14 1051 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1052
1053 memset(&sio, 0, sizeof(struct serial_struct));
1054 sio.line = portp->portnr;
1055 sio.port = portp->ioaddr;
f8ae4764 1056 sio.flags = portp->port.flags;
1da177e4
LT		 1057 sio.baud_base = portp->baud_base;
1058 sio.close_delay = portp->close_delay;
1059 sio.closing_wait = portp->closing_wait;
1060 sio.custom_divisor = portp->custom_divisor;
1061 sio.hub6 = 0;
1062 if (portp->uartp == &stl_cd1400uart) {
1063 sio.type = PORT_CIRRUS;
1064 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1065 } else {
1066 sio.type = PORT_UNKNOWN;
1067 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1068 }
1069
1070 brdp = stl_brds[portp->brdnr];
615e4a71 1071 if (brdp != NULL)
1da177e4
LT		 1072 sio.irq = brdp->irq;
1073
1074 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1075}
1076
1077/*****************************************************************************/
1078
1079/*
1080 * Set port according to the serial struct info.
1081 * At this point we do not do any auto-configure stuff, so we will
1082 * just quietly ignore any requests to change irq, etc.
1083 */
1084
d18a750f 1085static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1086{
d18a750f 1087 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1088 struct serial_struct sio;
1089
a0564e14 1090 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1091
1092 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1093 return -EFAULT;
1094 if (!capable(CAP_SYS_ADMIN)) {
1095 if ((sio.baud_base != portp->baud_base) ||
1096 (sio.close_delay != portp->close_delay) ||
1097 ((sio.flags & ~ASYNC_USR_MASK) !=
f8ae4764 1098 (portp->port.flags & ~ASYNC_USR_MASK)))
014c2544 1099 return -EPERM;
1da177e4
LT		 1100 }
1101
f8ae4764 1102 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1103 (sio.flags & ASYNC_USR_MASK);
1104 portp->baud_base = sio.baud_base;
1105 portp->close_delay = sio.close_delay;
1106 portp->closing_wait = sio.closing_wait;
1107 portp->custom_divisor = sio.custom_divisor;
d18a750f 1108 stl_setport(portp, tty->termios);
014c2544 1109 return 0;
1da177e4
LT		 1110}
1111
1112/*****************************************************************************/
1113
1114static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1115{
ca7ed0f2 1116 struct stlport *portp;
1da177e4 1117
1da177e4 1118 portp = tty->driver_data;
615e4a71 1119 if (portp == NULL)
014c2544 1120 return -ENODEV;
1da177e4 1121 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1122 return -EIO;
1da177e4
LT		 1123
1124 return stl_getsignals(portp);
1125}
1126
1127static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1128 unsigned int set, unsigned int clear)
1129{
ca7ed0f2 1130 struct stlport *portp;
1da177e4
LT		 1131 int rts = -1, dtr = -1;
1132
1da177e4 1133 portp = tty->driver_data;
615e4a71 1134 if (portp == NULL)
014c2544 1135 return -ENODEV;
1da177e4 1136 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1137 return -EIO;
1da177e4
LT		 1138
1139 if (set & TIOCM_RTS)
1140 rts = 1;
1141 if (set & TIOCM_DTR)
1142 dtr = 1;
1143 if (clear & TIOCM_RTS)
1144 rts = 0;
1145 if (clear & TIOCM_DTR)
1146 dtr = 0;
1147
1148 stl_setsignals(portp, dtr, rts);
1149 return 0;
1150}
1151
1152static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1153{
ca7ed0f2 1154 struct stlport *portp;
1da177e4
LT		 1155 int rc;
1156 void __user *argp = (void __user *)arg;
1157
a0564e14
JS		 1158 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1159 arg);
1da177e4 1160
1da177e4 1161 portp = tty->driver_data;
615e4a71 1162 if (portp == NULL)
014c2544 1163 return -ENODEV;
1da177e4
LT		 1164
1165 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1166 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1167 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1168 return -EIO;
1da177e4
LT		 1169
1170 rc = 0;
1171
f433c65b
AC		 1172 lock_kernel();
1173
1da177e4 1174 switch (cmd) {
1da177e4
LT		 1175 case TIOCGSERIAL:
1176 rc = stl_getserial(portp, argp);
1177 break;
1178 case TIOCSSERIAL:
d18a750f 1179 rc = stl_setserial(tty, argp);
1da177e4
LT		 1180 break;
1181 case COM_GETPORTSTATS:
d18a750f 1182 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1183 break;
1184 case COM_CLRPORTSTATS:
1185 rc = stl_clrportstats(portp, argp);
1186 break;
1187 case TIOCSERCONFIG:
1188 case TIOCSERGWILD:
1189 case TIOCSERSWILD:
1190 case TIOCSERGETLSR:
1191 case TIOCSERGSTRUCT:
1192 case TIOCSERGETMULTI:
1193 case TIOCSERSETMULTI:
1194 default:
1195 rc = -ENOIOCTLCMD;
1196 break;
1197 }
f433c65b 1198 unlock_kernel();
014c2544 1199 return rc;
1da177e4
LT		 1200}
1201
1202/*****************************************************************************/
1203
96b066b8
JS		 1204/*
1205 * Start the transmitter again. Just turn TX interrupts back on.
1206 */
1207
1208static void stl_start(struct tty_struct *tty)
1209{
1210 struct stlport *portp;
1211
1212 pr_debug("stl_start(tty=%p)\n", tty);
1213
96b066b8
JS		 1214 portp = tty->driver_data;
1215 if (portp == NULL)
1216 return;
1217 stl_startrxtx(portp, -1, 1);
1218}
1219
1220/*****************************************************************************/
1221
606d099c 1222static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1223{
ca7ed0f2 1224 struct stlport *portp;
606d099c 1225 struct ktermios *tiosp;
1da177e4 1226
a0564e14 1227 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1228
1da177e4 1229 portp = tty->driver_data;
615e4a71 1230 if (portp == NULL)
1da177e4
LT		 1231 return;
1232
1233 tiosp = tty->termios;
1234 if ((tiosp->c_cflag == old->c_cflag) &&
1235 (tiosp->c_iflag == old->c_iflag))
1236 return;
1237
1238 stl_setport(portp, tiosp);
1239 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1240 -1);
1241 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1242 tty->hw_stopped = 0;
1243 stl_start(tty);
1244 }
1245 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1246 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1247}
1248
1249/*****************************************************************************/
1250
1251/*
1252 * Attempt to flow control who ever is sending us data. Based on termios
1253 * settings use software or/and hardware flow control.
1254 */
1255
1256static void stl_throttle(struct tty_struct *tty)
1257{
ca7ed0f2 1258 struct stlport *portp;
1da177e4 1259
a0564e14 1260 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1261
1da177e4 1262 portp = tty->driver_data;
615e4a71 1263 if (portp == NULL)
1da177e4
LT		 1264 return;
1265 stl_flowctrl(portp, 0);
1266}
1267
1268/*****************************************************************************/
1269
1270/*
1271 * Unflow control the device sending us data...
1272 */
1273
1274static void stl_unthrottle(struct tty_struct *tty)
1275{
ca7ed0f2 1276 struct stlport *portp;
1da177e4 1277
a0564e14 1278 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1279
1da177e4 1280 portp = tty->driver_data;
615e4a71 1281 if (portp == NULL)
1da177e4
LT		 1282 return;
1283 stl_flowctrl(portp, 1);
1284}
1285
1286/*****************************************************************************/
1287
1288/*
1289 * Stop the transmitter. Basically to do this we will just turn TX
1290 * interrupts off.
1291 */
1292
1293static void stl_stop(struct tty_struct *tty)
1294{
ca7ed0f2 1295 struct stlport *portp;
1da177e4 1296
a0564e14 1297 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1298
1da177e4 1299 portp = tty->driver_data;
615e4a71 1300 if (portp == NULL)
1da177e4
LT		 1301 return;
1302 stl_startrxtx(portp, -1, 0);
1303}
1304
1305/*****************************************************************************/
1306
1da177e4
LT		 1307/*
1308 * Hangup this port. This is pretty much like closing the port, only
1309 * a little more brutal. No waiting for data to drain. Shutdown the
1310 * port and maybe drop signals.
1311 */
1312
1313static void stl_hangup(struct tty_struct *tty)
1314{
ca7ed0f2 1315 struct stlport *portp;
4350f3ff
AC		 1316 struct tty_port *port;
1317 unsigned long flags;
1da177e4 1318
a0564e14 1319 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1320
1da177e4 1321 portp = tty->driver_data;
615e4a71 1322 if (portp == NULL)
1da177e4 1323 return;
4350f3ff
AC		 1324 port = &portp->port;
1325
1326 spin_lock_irqsave(&port->lock, flags);
1327 port->flags &= ~ASYNC_INITIALIZED;
1328 spin_unlock_irqrestore(&port->lock, flags);
1da177e4 1329
1da177e4
LT		 1330 stl_disableintrs(portp);
1331 if (tty->termios->c_cflag & HUPCL)
1332 stl_setsignals(portp, 0, 0);
1333 stl_enablerxtx(portp, 0, 0);
1334 stl_flushbuffer(tty);
1335 portp->istate = 0;
1336 set_bit(TTY_IO_ERROR, &tty->flags);
615e4a71 1337 if (portp->tx.buf != NULL) {
1da177e4 1338 kfree(portp->tx.buf);
615e4a71
JS		 1339 portp->tx.buf = NULL;
1340 portp->tx.head = NULL;
1341 portp->tx.tail = NULL;
1da177e4 1342 }
4350f3ff 1343 tty_port_hangup(port);
1da177e4
LT		 1344}
1345
1346/*****************************************************************************/
1347
4a561222 1348static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1349{
ca7ed0f2 1350 struct stlport *portp;
1da177e4 1351
a0564e14 1352 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1353
1da177e4 1354 portp = tty->driver_data;
615e4a71 1355 if (portp == NULL)
4a561222 1356 return -EINVAL;
1da177e4
LT		 1357
1358 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1359 return 0;
1da177e4
LT		 1360}
1361
1362/*****************************************************************************/
1363
1da177e4
LT		 1364static void stl_sendxchar(struct tty_struct *tty, char ch)
1365{
ca7ed0f2 1366 struct stlport *portp;
1da177e4 1367
a0564e14 1368 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1369
1da177e4 1370 portp = tty->driver_data;
615e4a71 1371 if (portp == NULL)
1da177e4
LT		 1372 return;
1373
1374 if (ch == STOP_CHAR(tty))
1375 stl_sendflow(portp, 0);
1376 else if (ch == START_CHAR(tty))
1377 stl_sendflow(portp, 1);
1378 else
1379 stl_putchar(tty, ch);
1380}
1381
1382/*****************************************************************************/
1383
1384#define MAXLINE 80
1385
1386/*
1387 * Format info for a specified port. The line is deliberately limited
1388 * to 80 characters. (If it is too long it will be truncated, if too
1389 * short then padded with spaces).
1390 */
1391
ca7ed0f2 1392static int stl_portinfo(struct stlport *portp, int portnr, char *pos)
1da177e4
LT		 1393{
1394 char *sp;
1395 int sigs, cnt;
1396
1397 sp = pos;
1398 sp += sprintf(sp, "%d: uart:%s tx:%d rx:%d",
1399 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1400 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1401
1402 if (portp->stats.rxframing)
1403 sp += sprintf(sp, " fe:%d", (int) portp->stats.rxframing);
1404 if (portp->stats.rxparity)
1405 sp += sprintf(sp, " pe:%d", (int) portp->stats.rxparity);
1406 if (portp->stats.rxbreaks)
1407 sp += sprintf(sp, " brk:%d", (int) portp->stats.rxbreaks);
1408 if (portp->stats.rxoverrun)
1409 sp += sprintf(sp, " oe:%d", (int) portp->stats.rxoverrun);
1410
1411 sigs = stl_getsignals(portp);
1412 cnt = sprintf(sp, "%s%s%s%s%s ",
1413 (sigs & TIOCM_RTS) ? "|RTS" : "",
1414 (sigs & TIOCM_CTS) ? "|CTS" : "",
1415 (sigs & TIOCM_DTR) ? "|DTR" : "",
1416 (sigs & TIOCM_CD) ? "|DCD" : "",
1417 (sigs & TIOCM_DSR) ? "|DSR" : "");
1418 *sp = ' ';
1419 sp += cnt;
1420
c62429d9 1421 for (cnt = sp - pos; cnt < (MAXLINE - 1); cnt++)
1da177e4
LT		 1422 *sp++ = ' ';
1423 if (cnt >= MAXLINE)
1424 pos[(MAXLINE - 2)] = '+';
1425 pos[(MAXLINE - 1)] = '\n';
1426
014c2544 1427 return MAXLINE;
1da177e4
LT		 1428}
1429
1430/*****************************************************************************/
1431
1432/*
1433 * Port info, read from the /proc file system.
1434 */
1435
1436static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data)
1437{
ca7ed0f2
JS		 1438 struct stlbrd *brdp;
1439 struct stlpanel *panelp;
1440 struct stlport *portp;
6b2c9457
JS		 1441 unsigned int brdnr, panelnr, portnr;
1442 int totalport, curoff, maxoff;
1da177e4
LT		 1443 char *pos;
1444
a0564e14
JS		 1445 pr_debug("stl_readproc(page=%p,start=%p,off=%lx,count=%d,eof=%p,"
1446 "data=%p\n", page, start, off, count, eof, data);
1da177e4
LT		 1447
1448 pos = page;
1449 totalport = 0;
1450 curoff = 0;
1451
1452 if (off == 0) {
1453 pos += sprintf(pos, "%s: version %s", stl_drvtitle,
1454 stl_drvversion);
1455 while (pos < (page + MAXLINE - 1))
1456 *pos++ = ' ';
1457 *pos++ = '\n';
1458 }
1459 curoff = MAXLINE;
1460
1461/*
1462 * We scan through for each board, panel and port. The offset is
1463 * calculated on the fly, and irrelevant ports are skipped.
1464 */
c62429d9 1465 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1466 brdp = stl_brds[brdnr];
615e4a71 1467 if (brdp == NULL)
1da177e4
LT		 1468 continue;
1469 if (brdp->state == 0)
1470 continue;
1471
1472 maxoff = curoff + (brdp->nrports * MAXLINE);
1473 if (off >= maxoff) {
1474 curoff = maxoff;
1475 continue;
1476 }
1477
1478 totalport = brdnr * STL_MAXPORTS;
c62429d9 1479 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1480 panelp = brdp->panels[panelnr];
615e4a71 1481 if (panelp == NULL)
1da177e4
LT		 1482 continue;
1483
1484 maxoff = curoff + (panelp->nrports * MAXLINE);
1485 if (off >= maxoff) {
1486 curoff = maxoff;
1487 totalport += panelp->nrports;
1488 continue;
1489 }
1490
c62429d9 1491 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1492 totalport++) {
1493 portp = panelp->ports[portnr];
615e4a71 1494 if (portp == NULL)
1da177e4
LT		 1495 continue;
1496 if (off >= (curoff += MAXLINE))
1497 continue;
1498 if ((pos - page + MAXLINE) > count)
1499 goto stl_readdone;
1500 pos += stl_portinfo(portp, totalport, pos);
1501 }
1502 }
1503 }
1504
1505 *eof = 1;
1506
1507stl_readdone:
1508 *start = page;
c62429d9 1509 return pos - page;
1da177e4
LT		 1510}
1511
1512/*****************************************************************************/
1513
1514/*
1515 * All board interrupts are vectored through here first. This code then
1516 * calls off to the approrpriate board interrupt handlers.
1517 */
1518
7d12e780 1519static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1520{
ca7ed0f2 1521 struct stlbrd *brdp = dev_id;
1da177e4 1522
a6f97b29 1523 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1524
1525 return IRQ_RETVAL((* brdp->isr)(brdp));
1526}
1527
1528/*****************************************************************************/
1529
1530/*
1531 * Interrupt service routine for EasyIO board types.
1532 */
1533
ca7ed0f2 1534static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1535{
ca7ed0f2 1536 struct stlpanel *panelp;
1da177e4
LT		 1537 unsigned int iobase;
1538 int handled = 0;
1539
b65b5b59 1540 spin_lock(&brd_lock);
1da177e4
LT		 1541 panelp = brdp->panels[0];
1542 iobase = panelp->iobase;
1543 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1544 handled = 1;
1545 (* panelp->isr)(panelp, iobase);
1546 }
b65b5b59 1547 spin_unlock(&brd_lock);
1da177e4
LT		 1548 return handled;
1549}
1550
1551/*****************************************************************************/
1552
1553/*
1554 * Interrupt service routine for ECH-AT board types.
1555 */
1556
ca7ed0f2 1557static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1558{
ca7ed0f2 1559 struct stlpanel *panelp;
6b2c9457 1560 unsigned int ioaddr, bnknr;
1da177e4
LT		 1561 int handled = 0;
1562
1563 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1564
1565 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1566 handled = 1;
c62429d9 1567 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1568 ioaddr = brdp->bnkstataddr[bnknr];
1569 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1570 panelp = brdp->bnk2panel[bnknr];
1571 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1572 }
1573 }
1574 }
1575
1576 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1577
1578 return handled;
1579}
1580
1581/*****************************************************************************/
1582
1583/*
1584 * Interrupt service routine for ECH-MCA board types.
1585 */
1586
ca7ed0f2 1587static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1588{
ca7ed0f2 1589 struct stlpanel *panelp;
6b2c9457 1590 unsigned int ioaddr, bnknr;
1da177e4
LT		 1591 int handled = 0;
1592
1593 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1594 handled = 1;
c62429d9 1595 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1596 ioaddr = brdp->bnkstataddr[bnknr];
1597 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1598 panelp = brdp->bnk2panel[bnknr];
1599 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1600 }
1601 }
1602 }
1603 return handled;
1604}
1605
1606/*****************************************************************************/
1607
1608/*
1609 * Interrupt service routine for ECH-PCI board types.
1610 */
1611
ca7ed0f2 1612static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1613{
ca7ed0f2 1614 struct stlpanel *panelp;
6b2c9457 1615 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1616 int handled = 0;
1617
1618 while (1) {
1619 recheck = 0;
c62429d9 1620 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1621 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1622 ioaddr = brdp->bnkstataddr[bnknr];
1623 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1624 panelp = brdp->bnk2panel[bnknr];
1625 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1626 recheck++;
1627 handled = 1;
1628 }
1629 }
1630 if (! recheck)
1631 break;
1632 }
1633 return handled;
1634}
1635
1636/*****************************************************************************/
1637
1638/*
1639 * Interrupt service routine for ECH-8/64-PCI board types.
1640 */
1641
ca7ed0f2 1642static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1643{
ca7ed0f2 1644 struct stlpanel *panelp;
6b2c9457 1645 unsigned int ioaddr, bnknr;
1da177e4
LT		 1646 int handled = 0;
1647
1648 while (inb(brdp->ioctrl) & 0x1) {
1649 handled = 1;
c62429d9 1650 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1651 ioaddr = brdp->bnkstataddr[bnknr];
1652 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1653 panelp = brdp->bnk2panel[bnknr];
1654 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1655 }
1656 }
1657 }
1658
1659 return handled;
1660}
1661
1662/*****************************************************************************/
1663
1da177e4
LT		 1664/*
1665 * Initialize all the ports on a panel.
1666 */
1667
705c1862 1668static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1669{
6b2c9457
JS		 1670 struct stlport *portp;
1671 unsigned int i;
1672 int chipmask;
1da177e4 1673
a0564e14 1674 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1675
1676 chipmask = stl_panelinit(brdp, panelp);
1677
1678/*
1679 * All UART's are initialized (if found!). Now go through and setup
1680 * each ports data structures.
1681 */
c62429d9 1682 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1683 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1684 if (!portp) {
1da177e4 1685 printk("STALLION: failed to allocate memory "
ca7ed0f2 1686 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1687 break;
1688 }
d18a750f 1689 tty_port_init(&portp->port);
31f35939 1690 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1691 portp->magic = STL_PORTMAGIC;
1692 portp->portnr = i;
1693 portp->brdnr = panelp->brdnr;
1694 portp->panelnr = panelp->panelnr;
1695 portp->uartp = panelp->uartp;
1696 portp->clk = brdp->clk;
1697 portp->baud_base = STL_BAUDBASE;
1698 portp->close_delay = STL_CLOSEDELAY;
1699 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1700 init_waitqueue_head(&portp->port.open_wait);
1701 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1702 portp->stats.brd = portp->brdnr;
1703 portp->stats.panel = portp->panelnr;
1704 portp->stats.port = portp->portnr;
1705 panelp->ports[i] = portp;
1706 stl_portinit(brdp, panelp, portp);
1707 }
1708
c62429d9 1709 return 0;
1da177e4
LT		 1710}
1711
3b85b341
JS		 1712static void stl_cleanup_panels(struct stlbrd *brdp)
1713{
1714 struct stlpanel *panelp;
1715 struct stlport *portp;
1716 unsigned int j, k;
d18a750f 1717 struct tty_struct *tty;
3b85b341
JS		 1718
1719 for (j = 0; j < STL_MAXPANELS; j++) {
1720 panelp = brdp->panels[j];
1721 if (panelp == NULL)
1722 continue;
1723 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1724 portp = panelp->ports[k];
1725 if (portp == NULL)
1726 continue;
d18a750f
AC		 1727 tty = tty_port_tty_get(&portp->port);
1728 if (tty != NULL) {
1729 stl_hangup(tty);
1730 tty_kref_put(tty);
1731 }
3b85b341
JS		 1732 kfree(portp->tx.buf);
1733 kfree(portp);
1734 }
1735 kfree(panelp);
1736 }
1737}
1738
1da177e4
LT		 1739/*****************************************************************************/
1740
1741/*
1742 * Try to find and initialize an EasyIO board.
1743 */
1744
705c1862 1745static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1746{
ca7ed0f2 1747 struct stlpanel *panelp;
1da177e4
LT		 1748 unsigned int status;
1749 char *name;
3b85b341 1750 int retval;
1da177e4 1751
a0564e14 1752 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1753
1754 brdp->ioctrl = brdp->ioaddr1 + 1;
1755 brdp->iostatus = brdp->ioaddr1 + 2;
1756
1757 status = inb(brdp->iostatus);
1758 if ((status & EIO_IDBITMASK) == EIO_MK3)
1759 brdp->ioctrl++;
1760
1761/*
1762 * Handle board specific stuff now. The real difference is PCI
1763 * or not PCI.
1764 */
1765 if (brdp->brdtype == BRD_EASYIOPCI) {
1766 brdp->iosize1 = 0x80;
1767 brdp->iosize2 = 0x80;
1768 name = "serial(EIO-PCI)";
1769 outb(0x41, (brdp->ioaddr2 + 0x4c));
1770 } else {
1771 brdp->iosize1 = 8;
1772 name = "serial(EIO)";
1773 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1774 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1775 printk("STALLION: invalid irq=%d for brd=%d\n",
1776 brdp->irq, brdp->brdnr);
3b85b341
JS		 1777 retval = -EINVAL;
1778 goto err;
1da177e4
LT		 1779 }
1780 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1781 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1782 brdp->ioctrl);
1783 }
1784
3b85b341 1785 retval = -EBUSY;
1da177e4
LT		 1786 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1787 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1788 "%x conflicts with another device\n", brdp->brdnr,
1789 brdp->ioaddr1);
3b85b341 1790 goto err;
1da177e4
LT		 1791 }
1792
1793 if (brdp->iosize2 > 0)
1794 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1795 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1796 "address %x conflicts with another device\n",
1797 brdp->brdnr, brdp->ioaddr2);
1798 printk(KERN_WARNING "STALLION: Warning, also "
1799 "releasing board %d I/O address %x \n",
1800 brdp->brdnr, brdp->ioaddr1);
3b85b341 1801 goto err_rel1;
1da177e4
LT		 1802 }
1803
1804/*
1805 * Everything looks OK, so let's go ahead and probe for the hardware.
1806 */
1807 brdp->clk = CD1400_CLK;
1808 brdp->isr = stl_eiointr;
1809
3b85b341 1810 retval = -ENODEV;
1da177e4
LT		 1811 switch (status & EIO_IDBITMASK) {
1812 case EIO_8PORTM:
1813 brdp->clk = CD1400_CLK8M;
1814 /* fall thru */
1815 case EIO_8PORTRS:
1816 case EIO_8PORTDI:
1817 brdp->nrports = 8;
1818 break;
1819 case EIO_4PORTRS:
1820 brdp->nrports = 4;
1821 break;
1822 case EIO_MK3:
1823 switch (status & EIO_BRDMASK) {
1824 case ID_BRD4:
1825 brdp->nrports = 4;
1826 break;
1827 case ID_BRD8:
1828 brdp->nrports = 8;
1829 break;
1830 case ID_BRD16:
1831 brdp->nrports = 16;
1832 break;
1833 default:
3b85b341 1834 goto err_rel2;
1da177e4
LT		 1835 }
1836 break;
1837 default:
3b85b341 1838 goto err_rel2;
1da177e4
LT		 1839 }
1840
1841/*
1842 * We have verified that the board is actually present, so now we
1843 * can complete the setup.
1844 */
1845
ca7ed0f2 1846 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1847 if (!panelp) {
1da177e4 1848 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1849 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1850 retval = -ENOMEM;
1851 goto err_rel2;
1da177e4 1852 }
1da177e4
LT		 1853
1854 panelp->magic = STL_PANELMAGIC;
1855 panelp->brdnr = brdp->brdnr;
1856 panelp->panelnr = 0;
1857 panelp->nrports = brdp->nrports;
1858 panelp->iobase = brdp->ioaddr1;
1859 panelp->hwid = status;
1860 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1861 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1862 panelp->isr = stl_sc26198intr;
1863 } else {
615e4a71 1864 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1865 panelp->isr = stl_cd1400eiointr;
1866 }
1867
1868 brdp->panels[0] = panelp;
1869 brdp->nrpanels = 1;
1870 brdp->state |= BRD_FOUND;
1871 brdp->hwid = status;
0f2ed4c6 1872 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1873 printk("STALLION: failed to register interrupt "
1874 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1875 retval = -ENODEV;
1876 goto err_fr;
1da177e4 1877 }
3b85b341
JS		 1878
1879 return 0;
1880err_fr:
1881 stl_cleanup_panels(brdp);
1882err_rel2:
1883 if (brdp->iosize2 > 0)
1884 release_region(brdp->ioaddr2, brdp->iosize2);
1885err_rel1:
1886 release_region(brdp->ioaddr1, brdp->iosize1);
1887err:
1888 return retval;
1da177e4
LT		 1889}
1890
1891/*****************************************************************************/
1892
1893/*
1894 * Try to find an ECH board and initialize it. This code is capable of
1895 * dealing with all types of ECH board.
1896 */
1897
705c1862 1898static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1899{
ca7ed0f2 1900 struct stlpanel *panelp;
6b2c9457
JS		 1901 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1902 int retval;
1da177e4
LT		 1903 char *name;
1904
a0564e14 1905 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1906
1907 status = 0;
1908 conflict = 0;
1909
1910/*
1911 * Set up the initial board register contents for boards. This varies a
1912 * bit between the different board types. So we need to handle each
1913 * separately. Also do a check that the supplied IRQ is good.
1914 */
1915 switch (brdp->brdtype) {
1916
1917 case BRD_ECH:
1918 brdp->isr = stl_echatintr;
1919 brdp->ioctrl = brdp->ioaddr1 + 1;
1920 brdp->iostatus = brdp->ioaddr1 + 1;
1921 status = inb(brdp->iostatus);
3b85b341
JS		 1922 if ((status & ECH_IDBITMASK) != ECH_ID) {
1923 retval = -ENODEV;
1924 goto err;
1925 }
1da177e4
LT		 1926 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1927 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1928 printk("STALLION: invalid irq=%d for brd=%d\n",
1929 brdp->irq, brdp->brdnr);
3b85b341
JS		 1930 retval = -EINVAL;
1931 goto err;
1da177e4
LT		 1932 }
1933 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1934 status |= (stl_vecmap[brdp->irq] << 1);
1935 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1936 brdp->ioctrlval = ECH_INTENABLE |
1937 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1938 for (i = 0; i < 10; i++)
1da177e4
LT		 1939 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1940 brdp->iosize1 = 2;
1941 brdp->iosize2 = 32;
1942 name = "serial(EC8/32)";
1943 outb(status, brdp->ioaddr1);
1944 break;
1945
1946 case BRD_ECHMC:
1947 brdp->isr = stl_echmcaintr;
1948 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1949 brdp->iostatus = brdp->ioctrl;
1950 status = inb(brdp->iostatus);
3b85b341
JS		 1951 if ((status & ECH_IDBITMASK) != ECH_ID) {
1952 retval = -ENODEV;
1953 goto err;
1954 }
1da177e4
LT		 1955 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1956 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1957 printk("STALLION: invalid irq=%d for brd=%d\n",
1958 brdp->irq, brdp->brdnr);
3b85b341
JS		 1959 retval = -EINVAL;
1960 goto err;
1da177e4
LT		 1961 }
1962 outb(ECHMC_BRDRESET, brdp->ioctrl);
1963 outb(ECHMC_INTENABLE, brdp->ioctrl);
1964 brdp->iosize1 = 64;
1965 name = "serial(EC8/32-MC)";
1966 break;
1967
1968 case BRD_ECHPCI:
1969 brdp->isr = stl_echpciintr;
1970 brdp->ioctrl = brdp->ioaddr1 + 2;
1971 brdp->iosize1 = 4;
1972 brdp->iosize2 = 8;
1973 name = "serial(EC8/32-PCI)";
1974 break;
1975
1976 case BRD_ECH64PCI:
1977 brdp->isr = stl_echpci64intr;
1978 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1979 outb(0x43, (brdp->ioaddr1 + 0x4c));
1980 brdp->iosize1 = 0x80;
1981 brdp->iosize2 = 0x80;
1982 name = "serial(EC8/64-PCI)";
1983 break;
1984
1985 default:
1986 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1987 retval = -EINVAL;
1988 goto err;
1da177e4
LT		 1989 }
1990
1991/*
1992 * Check boards for possible IO address conflicts and return fail status
1993 * if an IO conflict found.
1994 */
3b85b341 1995 retval = -EBUSY;
1da177e4
LT		 1996 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1997 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1998 "%x conflicts with another device\n", brdp->brdnr,
1999 brdp->ioaddr1);
3b85b341 2000 goto err;
1da177e4
LT		 2001 }
2002
2003 if (brdp->iosize2 > 0)
2004 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
2005 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
2006 "address %x conflicts with another device\n",
2007 brdp->brdnr, brdp->ioaddr2);
2008 printk(KERN_WARNING "STALLION: Warning, also "
2009 "releasing board %d I/O address %x \n",
2010 brdp->brdnr, brdp->ioaddr1);
3b85b341 2011 goto err_rel1;
1da177e4
LT		 2012 }
2013
2014/*
2015 * Scan through the secondary io address space looking for panels.
2016 * As we find'em allocate and initialize panel structures for each.
2017 */
2018 brdp->clk = CD1400_CLK;
2019 brdp->hwid = status;
2020
2021 ioaddr = brdp->ioaddr2;
2022 banknr = 0;
2023 panelnr = 0;
2024 nxtid = 0;
2025
c62429d9 2026 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 2027 if (brdp->brdtype == BRD_ECHPCI) {
2028 outb(nxtid, brdp->ioctrl);
2029 ioaddr = brdp->ioaddr2;
2030 }
2031 status = inb(ioaddr + ECH_PNLSTATUS);
2032 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 2033 break;
ca7ed0f2 2034 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2035 if (!panelp) {
1da177e4 2036 printk("STALLION: failed to allocate memory "
ca7ed0f2 2037 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 2038 retval = -ENOMEM;
3b85b341 2039 goto err_fr;
1da177e4 2040 }
1da177e4
LT		 2041 panelp->magic = STL_PANELMAGIC;
2042 panelp->brdnr = brdp->brdnr;
2043 panelp->panelnr = panelnr;
2044 panelp->iobase = ioaddr;
2045 panelp->pagenr = nxtid;
2046 panelp->hwid = status;
2047 brdp->bnk2panel[banknr] = panelp;
2048 brdp->bnkpageaddr[banknr] = nxtid;
2049 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2050
2051 if (status & ECH_PNLXPID) {
615e4a71 2052 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2053 panelp->isr = stl_sc26198intr;
2054 if (status & ECH_PNL16PORT) {
2055 panelp->nrports = 16;
2056 brdp->bnk2panel[banknr] = panelp;
2057 brdp->bnkpageaddr[banknr] = nxtid;
2058 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2059 ECH_PNLSTATUS;
c62429d9 2060 } else
1da177e4 2061 panelp->nrports = 8;
1da177e4 2062 } else {
615e4a71 2063 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2064 panelp->isr = stl_cd1400echintr;
2065 if (status & ECH_PNL16PORT) {
2066 panelp->nrports = 16;
2067 panelp->ackmask = 0x80;
2068 if (brdp->brdtype != BRD_ECHPCI)
2069 ioaddr += EREG_BANKSIZE;
2070 brdp->bnk2panel[banknr] = panelp;
2071 brdp->bnkpageaddr[banknr] = ++nxtid;
2072 brdp->bnkstataddr[banknr++] = ioaddr +
2073 ECH_PNLSTATUS;
2074 } else {
2075 panelp->nrports = 8;
2076 panelp->ackmask = 0xc0;
2077 }
2078 }
2079
2080 nxtid++;
2081 ioaddr += EREG_BANKSIZE;
2082 brdp->nrports += panelp->nrports;
2083 brdp->panels[panelnr++] = panelp;
2084 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2085 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2086 retval = -EINVAL;
3b85b341 2087 goto err_fr;
49277b1c 2088 }
1da177e4
LT		 2089 }
2090
2091 brdp->nrpanels = panelnr;
2092 brdp->nrbnks = banknr;
2093 if (brdp->brdtype == BRD_ECH)
2094 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2095
2096 brdp->state |= BRD_FOUND;
0f2ed4c6 2097 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2098 printk("STALLION: failed to register interrupt "
2099 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2100 retval = -ENODEV;
2101 goto err_fr;
1da177e4
LT		 2102 }
2103
3b85b341
JS		 2104 return 0;
2105err_fr:
2106 stl_cleanup_panels(brdp);
2107 if (brdp->iosize2 > 0)
2108 release_region(brdp->ioaddr2, brdp->iosize2);
2109err_rel1:
2110 release_region(brdp->ioaddr1, brdp->iosize1);
2111err:
2112 return retval;
1da177e4
LT		 2113}
2114
2115/*****************************************************************************/
2116
2117/*
2118 * Initialize and configure the specified board.
2119 * Scan through all the boards in the configuration and see what we
2120 * can find. Handle EIO and the ECH boards a little differently here
2121 * since the initial search and setup is very different.
2122 */
2123
705c1862 2124static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2125{
3b85b341 2126 int i, retval;
1da177e4 2127
a0564e14 2128 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2129
2130 switch (brdp->brdtype) {
2131 case BRD_EASYIO:
2132 case BRD_EASYIOPCI:
3b85b341
JS		 2133 retval = stl_initeio(brdp);
2134 if (retval)
2135 goto err;
1da177e4
LT		 2136 break;
2137 case BRD_ECH:
2138 case BRD_ECHMC:
2139 case BRD_ECHPCI:
2140 case BRD_ECH64PCI:
3b85b341
JS		 2141 retval = stl_initech(brdp);
2142 if (retval)
2143 goto err;
1da177e4
LT		 2144 break;
2145 default:
2146 printk("STALLION: board=%d is unknown board type=%d\n",
2147 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2148 retval = -ENODEV;
2149 goto err;
1da177e4
LT		 2150 }
2151
1da177e4
LT		 2152 if ((brdp->state & BRD_FOUND) == 0) {
2153 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2154 stl_brdnames[brdp->brdtype], brdp->brdnr,
2155 brdp->ioaddr1, brdp->irq);
3b85b341 2156 goto err_free;
1da177e4
LT		 2157 }
2158
c62429d9 2159 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2160 if (brdp->panels[i] != NULL)
1da177e4
LT		 2161 stl_initports(brdp, brdp->panels[i]);
2162
2163 printk("STALLION: %s found, board=%d io=%x irq=%d "
2164 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2165 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2166 brdp->nrports);
3b85b341
JS		 2167
2168 return 0;
2169err_free:
2170 free_irq(brdp->irq, brdp);
2171
2172 stl_cleanup_panels(brdp);
2173
2174 release_region(brdp->ioaddr1, brdp->iosize1);
2175 if (brdp->iosize2 > 0)
2176 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2177err:
2178 return retval;
1da177e4
LT		 2179}
2180
2181/*****************************************************************************/
2182
2183/*
2184 * Find the next available board number that is free.
2185 */
2186
705c1862 2187static int __devinit stl_getbrdnr(void)
1da177e4 2188{
6b2c9457 2189 unsigned int i;
1da177e4 2190
c62429d9 2191 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2192 if (stl_brds[i] == NULL) {
1da177e4
LT		 2193 if (i >= stl_nrbrds)
2194 stl_nrbrds = i + 1;
c62429d9 2195 return i;
1da177e4 2196 }
c62429d9
JS		 2197
2198 return -1;
1da177e4
LT		 2199}
2200
b1b84fe0 2201/*****************************************************************************/
1da177e4
LT		 2202/*
2203 * We have a Stallion board. Allocate a board structure and
2204 * initialize it. Read its IO and IRQ resources from PCI
2205 * configuration space.
2206 */
2207
b1b84fe0
JS		 2208static int __devinit stl_pciprobe(struct pci_dev *pdev,
2209 const struct pci_device_id *ent)
1da177e4 2210{
b1b84fe0 2211 struct stlbrd *brdp;
aeaccfe4 2212 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2213 int brdnr, retval = -ENODEV;
1da177e4 2214
b1b84fe0 2215 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2216 goto err;
b1b84fe0 2217
3b85b341
JS		 2218 retval = pci_enable_device(pdev);
2219 if (retval)
2220 goto err;
2221 brdp = stl_allocbrd();
2222 if (brdp == NULL) {
2223 retval = -ENOMEM;
2224 goto err;
2225 }
79cfe7ab 2226 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2227 brdnr = stl_getbrdnr();
2228 if (brdnr < 0) {
fefaf9a7 2229 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2230 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2231 mutex_unlock(&stl_brdslock);
49277b1c 2232 retval = -ENODEV;
3b85b341 2233 goto err_fr;
1da177e4 2234 }
6b2c9457 2235 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2236 stl_brds[brdp->brdnr] = brdp;
2237 mutex_unlock(&stl_brdslock);
2238
1da177e4 2239 brdp->brdtype = brdtype;
fc06b5cf 2240 brdp->state |= STL_PROBED;
1da177e4 2241
1da177e4
LT		 2242/*
2243 * We have all resources from the board, so let's setup the actual
2244 * board structure now.
2245 */
2246 switch (brdtype) {
2247 case BRD_ECHPCI:
b1b84fe0
JS		 2248 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2249 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2250 break;
2251 case BRD_ECH64PCI:
b1b84fe0
JS		 2252 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2253 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2254 break;
2255 case BRD_EASYIOPCI:
b1b84fe0
JS		 2256 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2257 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2258 break;
2259 default:
fefaf9a7 2260 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2261 break;
2262 }
2263
b1b84fe0 2264 brdp->irq = pdev->irq;
3b85b341
JS		 2265 retval = stl_brdinit(brdp);
2266 if (retval)
79cfe7ab 2267 goto err_null;
1da177e4 2268
b1b84fe0
JS		 2269 pci_set_drvdata(pdev, brdp);
2270
aeaccfe4
JS		 2271 for (i = 0; i < brdp->nrports; i++)
2272 tty_register_device(stl_serial,
2273 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2274
3b85b341 2275 return 0;
79cfe7ab
JS		 2276err_null:
2277 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2278err_fr:
2279 kfree(brdp);
2280err:
2281 return retval;
1da177e4
LT		 2282}
2283
b1b84fe0 2284static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2285{
b1b84fe0 2286 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2287 unsigned int i;
1da177e4 2288
b1b84fe0 2289 free_irq(brdp->irq, brdp);
1da177e4 2290
b1b84fe0 2291 stl_cleanup_panels(brdp);
1da177e4 2292
b1b84fe0
JS		 2293 release_region(brdp->ioaddr1, brdp->iosize1);
2294 if (brdp->iosize2 > 0)
2295 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2296
aeaccfe4
JS		 2297 for (i = 0; i < brdp->nrports; i++)
2298 tty_unregister_device(stl_serial,
2299 brdp->brdnr * STL_MAXPORTS + i);
2300
b1b84fe0
JS		 2301 stl_brds[brdp->brdnr] = NULL;
2302 kfree(brdp);
1da177e4
LT		 2303}
2304
b1b84fe0
JS		 2305static struct pci_driver stl_pcidriver = {
2306 .name = "stallion",
2307 .id_table = stl_pcibrds,
2308 .probe = stl_pciprobe,
2309 .remove = __devexit_p(stl_pciremove)
2310};
1da177e4
LT		 2311
2312/*****************************************************************************/
2313
1da177e4
LT		 2314/*
2315 * Return the board stats structure to user app.
2316 */
2317
2318static int stl_getbrdstats(combrd_t __user *bp)
2319{
6b2c9457 2320 combrd_t stl_brdstats;
ca7ed0f2
JS		 2321 struct stlbrd *brdp;
2322 struct stlpanel *panelp;
6b2c9457 2323 unsigned int i;
1da177e4
LT		 2324
2325 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2326 return -EFAULT;
2327 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2328 return -ENODEV;
1da177e4 2329 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2330 if (brdp == NULL)
c62429d9 2331 return -ENODEV;
1da177e4
LT		 2332
2333 memset(&stl_brdstats, 0, sizeof(combrd_t));
2334 stl_brdstats.brd = brdp->brdnr;
2335 stl_brdstats.type = brdp->brdtype;
2336 stl_brdstats.hwid = brdp->hwid;
2337 stl_brdstats.state = brdp->state;
2338 stl_brdstats.ioaddr = brdp->ioaddr1;
2339 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2340 stl_brdstats.irq = brdp->irq;
2341 stl_brdstats.nrpanels = brdp->nrpanels;
2342 stl_brdstats.nrports = brdp->nrports;
c62429d9 2343 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2344 panelp = brdp->panels[i];
2345 stl_brdstats.panels[i].panel = i;
2346 stl_brdstats.panels[i].hwid = panelp->hwid;
2347 stl_brdstats.panels[i].nrports = panelp->nrports;
2348 }
2349
2350 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2351}
2352
2353/*****************************************************************************/
2354
2355/*
2356 * Resolve the referenced port number into a port struct pointer.
2357 */
2358
ca7ed0f2 2359static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2360{
ca7ed0f2
JS		 2361 struct stlbrd *brdp;
2362 struct stlpanel *panelp;
1da177e4 2363
c62429d9
JS		 2364 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2365 return NULL;
1da177e4 2366 brdp = stl_brds[brdnr];
615e4a71 2367 if (brdp == NULL)
c62429d9 2368 return NULL;
6b2c9457 2369 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2370 return NULL;
1da177e4 2371 panelp = brdp->panels[panelnr];
615e4a71 2372 if (panelp == NULL)
c62429d9 2373 return NULL;
6b2c9457 2374 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2375 return NULL;
2376 return panelp->ports[portnr];
1da177e4
LT		 2377}
2378
2379/*****************************************************************************/
2380
2381/*
2382 * Return the port stats structure to user app. A NULL port struct
2383 * pointer passed in means that we need to find out from the app
2384 * what port to get stats for (used through board control device).
2385 */
2386
d18a750f 2387static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2388{
6b2c9457 2389 comstats_t stl_comstats;
1da177e4
LT		 2390 unsigned char *head, *tail;
2391 unsigned long flags;
2392
2393 if (!portp) {
2394 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2395 return -EFAULT;
2396 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2397 stl_comstats.port);
615e4a71 2398 if (portp == NULL)
c62429d9 2399 return -ENODEV;
1da177e4
LT		 2400 }
2401
2402 portp->stats.state = portp->istate;
f8ae4764 2403 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2404 portp->stats.hwid = portp->hwid;
2405
2406 portp->stats.ttystate = 0;
2407 portp->stats.cflags = 0;
2408 portp->stats.iflags = 0;
2409 portp->stats.oflags = 0;
2410 portp->stats.lflags = 0;
2411 portp->stats.rxbuffered = 0;
2412
b65b5b59 2413 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2414 if (tty != NULL && portp->port.tty == tty) {
2415 portp->stats.ttystate = tty->flags;
2416 /* No longer available as a statistic */
2417 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2418 if (tty->termios != NULL) {
2419 portp->stats.cflags = tty->termios->c_cflag;
2420 portp->stats.iflags = tty->termios->c_iflag;
2421 portp->stats.oflags = tty->termios->c_oflag;
2422 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2423 }
d18a750f 2424 }
b65b5b59 2425 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2426
2427 head = portp->tx.head;
2428 tail = portp->tx.tail;
c62429d9
JS		 2429 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2430 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2431
2432 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2433
2434 return copy_to_user(cp, &portp->stats,
2435 sizeof(comstats_t)) ? -EFAULT : 0;
2436}
2437
2438/*****************************************************************************/
2439
2440/*
2441 * Clear the port stats structure. We also return it zeroed out...
2442 */
2443
ca7ed0f2 2444static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2445{
6b2c9457
JS		 2446 comstats_t stl_comstats;
2447
1da177e4
LT		 2448 if (!portp) {
2449 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2450 return -EFAULT;
2451 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2452 stl_comstats.port);
615e4a71 2453 if (portp == NULL)
c62429d9 2454 return -ENODEV;
1da177e4
LT		 2455 }
2456
2457 memset(&portp->stats, 0, sizeof(comstats_t));
2458 portp->stats.brd = portp->brdnr;
2459 portp->stats.panel = portp->panelnr;
2460 portp->stats.port = portp->portnr;
2461 return copy_to_user(cp, &portp->stats,
2462 sizeof(comstats_t)) ? -EFAULT : 0;
2463}
2464
2465/*****************************************************************************/
2466
2467/*
2468 * Return the entire driver ports structure to a user app.
2469 */
2470
ca7ed0f2 2471static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2472{
6b2c9457 2473 struct stlport stl_dummyport;
ca7ed0f2 2474 struct stlport *portp;
1da177e4 2475
ca7ed0f2 2476 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2477 return -EFAULT;
2478 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2479 stl_dummyport.portnr);
2480 if (!portp)
2481 return -ENODEV;
ca7ed0f2 2482 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2483}
2484
2485/*****************************************************************************/
2486
2487/*
2488 * Return the entire driver board structure to a user app.
2489 */
2490
ca7ed0f2 2491static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2492{
6b2c9457 2493 struct stlbrd stl_dummybrd;
ca7ed0f2 2494 struct stlbrd *brdp;
1da177e4 2495
ca7ed0f2 2496 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2497 return -EFAULT;
6b2c9457 2498 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2499 return -ENODEV;
2500 brdp = stl_brds[stl_dummybrd.brdnr];
2501 if (!brdp)
c62429d9 2502 return -ENODEV;
ca7ed0f2 2503 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2504}
2505
2506/*****************************************************************************/
2507
2508/*
2509 * The "staliomem" device is also required to do some special operations
2510 * on the board and/or ports. In this driver it is mostly used for stats
2511 * collection.
2512 */
2513
2514static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
2515{
2516 int brdnr, rc;
2517 void __user *argp = (void __user *)arg;
2518
a0564e14 2519 pr_debug("stl_memioctl(ip=%p,fp=%p,cmd=%x,arg=%lx)\n", ip, fp, cmd,arg);
1da177e4
LT		 2520
2521 brdnr = iminor(ip);
2522 if (brdnr >= STL_MAXBRDS)
c62429d9 2523 return -ENODEV;
1da177e4
LT		 2524 rc = 0;
2525
2526 switch (cmd) {
2527 case COM_GETPORTSTATS:
d18a750f 2528 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2529 break;
2530 case COM_CLRPORTSTATS:
2531 rc = stl_clrportstats(NULL, argp);
2532 break;
2533 case COM_GETBRDSTATS:
2534 rc = stl_getbrdstats(argp);
2535 break;
2536 case COM_READPORT:
2537 rc = stl_getportstruct(argp);
2538 break;
2539 case COM_READBOARD:
2540 rc = stl_getbrdstruct(argp);
2541 break;
2542 default:
2543 rc = -ENOIOCTLCMD;
2544 break;
2545 }
2546
c62429d9 2547 return rc;
1da177e4
LT		 2548}
2549
b68e31d0 2550static const struct tty_operations stl_ops = {
1da177e4
LT		 2551 .open = stl_open,
2552 .close = stl_close,
2553 .write = stl_write,
2554 .put_char = stl_putchar,
2555 .flush_chars = stl_flushchars,
2556 .write_room = stl_writeroom,
2557 .chars_in_buffer = stl_charsinbuffer,
2558 .ioctl = stl_ioctl,
2559 .set_termios = stl_settermios,
2560 .throttle = stl_throttle,
2561 .unthrottle = stl_unthrottle,
2562 .stop = stl_stop,
2563 .start = stl_start,
2564 .hangup = stl_hangup,
2565 .flush_buffer = stl_flushbuffer,
2566 .break_ctl = stl_breakctl,
2567 .wait_until_sent = stl_waituntilsent,
2568 .send_xchar = stl_sendxchar,
2569 .read_proc = stl_readproc,
2570 .tiocmget = stl_tiocmget,
2571 .tiocmset = stl_tiocmset,
2572};
2573
31f35939
AC		 2574static const struct tty_port_operations stl_port_ops = {
2575 .carrier_raised = stl_carrier_raised,
4350f3ff 2576 .raise_dtr_rts = stl_raise_dtr_rts,
31f35939
AC		 2577};
2578
1da177e4
LT		 2579/*****************************************************************************/
2580/* CD1400 HARDWARE FUNCTIONS */
2581/*****************************************************************************/
2582
2583/*
2584 * These functions get/set/update the registers of the cd1400 UARTs.
2585 * Access to the cd1400 registers is via an address/data io port pair.
2586 * (Maybe should make this inline...)
2587 */
2588
ca7ed0f2 2589static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2590{
2591 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2592 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2593}
2594
ca7ed0f2 2595static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2596{
c62429d9 2597 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2598 outb(value, portp->ioaddr + EREG_DATA);
2599}
2600
ca7ed0f2 2601static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2602{
c62429d9 2603 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2604 if (inb(portp->ioaddr + EREG_DATA) != value) {
2605 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2606 return 1;
1da177e4 2607 }
014c2544 2608 return 0;
1da177e4
LT		 2609}
2610
2611/*****************************************************************************/
2612
2613/*
2614 * Inbitialize the UARTs in a panel. We don't care what sort of board
2615 * these ports are on - since the port io registers are almost
2616 * identical when dealing with ports.
2617 */
2618
ca7ed0f2 2619static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2620{
2621 unsigned int gfrcr;
2622 int chipmask, i, j;
2623 int nrchips, uartaddr, ioaddr;
b65b5b59 2624 unsigned long flags;
1da177e4 2625
a0564e14 2626 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2627
b65b5b59 2628 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2629 BRDENABLE(panelp->brdnr, panelp->pagenr);
2630
2631/*
2632 * Check that each chip is present and started up OK.
2633 */
2634 chipmask = 0;
2635 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2636 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2637 if (brdp->brdtype == BRD_ECHPCI) {
2638 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2639 ioaddr = panelp->iobase;
c62429d9 2640 } else
1da177e4 2641 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2642 uartaddr = (i & 0x01) ? 0x080 : 0;
2643 outb((GFRCR + uartaddr), ioaddr);
2644 outb(0, (ioaddr + EREG_DATA));
2645 outb((CCR + uartaddr), ioaddr);
2646 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2647 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2648 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2649 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2650 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2651 break;
c62429d9 2652
1da177e4
LT		 2653 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2654 printk("STALLION: cd1400 not responding, "
2655 "brd=%d panel=%d chip=%d\n",
2656 panelp->brdnr, panelp->panelnr, i);
2657 continue;
2658 }
2659 chipmask |= (0x1 << i);
2660 outb((PPR + uartaddr), ioaddr);
2661 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2662 }
2663
2664 BRDDISABLE(panelp->brdnr);
b65b5b59 2665 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2666 return chipmask;
1da177e4
LT		 2667}
2668
2669/*****************************************************************************/
2670
2671/*
2672 * Initialize hardware specific port registers.
2673 */
2674
ca7ed0f2 2675static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2676{
b65b5b59 2677 unsigned long flags;
a0564e14
JS		 2678 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2679 panelp, portp);
1da177e4 2680
615e4a71
JS		 2681 if ((brdp == NULL) || (panelp == NULL) ||
2682 (portp == NULL))
1da177e4
LT		 2683 return;
2684
b65b5b59 2685 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2686 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2687 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2688 portp->uartaddr = (portp->portnr & 0x04) << 5;
2689 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2690
2691 BRDENABLE(portp->brdnr, portp->pagenr);
2692 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2693 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2694 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2695 BRDDISABLE(portp->brdnr);
b65b5b59 2696 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2697}
2698
2699/*****************************************************************************/
2700
2701/*
2702 * Wait for the command register to be ready. We will poll this,
2703 * since it won't usually take too long to be ready.
2704 */
2705
ca7ed0f2 2706static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2707{
2708 int i;
2709
c62429d9
JS		 2710 for (i = 0; i < CCR_MAXWAIT; i++)
2711 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2712 return;
1da177e4
LT		 2713
2714 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2715 portp->portnr, portp->panelnr, portp->brdnr);
2716}
2717
2718/*****************************************************************************/
2719
2720/*
2721 * Set up the cd1400 registers for a port based on the termios port
2722 * settings.
2723 */
2724
606d099c 2725static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2726{
ca7ed0f2 2727 struct stlbrd *brdp;
1da177e4
LT		 2728 unsigned long flags;
2729 unsigned int clkdiv, baudrate;
2730 unsigned char cor1, cor2, cor3;
2731 unsigned char cor4, cor5, ccr;
2732 unsigned char srer, sreron, sreroff;
2733 unsigned char mcor1, mcor2, rtpr;
2734 unsigned char clk, div;
2735
2736 cor1 = 0;
2737 cor2 = 0;
2738 cor3 = 0;
2739 cor4 = 0;
2740 cor5 = 0;
2741 ccr = 0;
2742 rtpr = 0;
2743 clk = 0;
2744 div = 0;
2745 mcor1 = 0;
2746 mcor2 = 0;
2747 sreron = 0;
2748 sreroff = 0;
2749
2750 brdp = stl_brds[portp->brdnr];
615e4a71 2751 if (brdp == NULL)
1da177e4
LT		 2752 return;
2753
2754/*
2755 * Set up the RX char ignore mask with those RX error types we
2756 * can ignore. We can get the cd1400 to help us out a little here,
2757 * it will ignore parity errors and breaks for us.
2758 */
2759 portp->rxignoremsk = 0;
2760 if (tiosp->c_iflag & IGNPAR) {
2761 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2762 cor1 |= COR1_PARIGNORE;
2763 }
2764 if (tiosp->c_iflag & IGNBRK) {
2765 portp->rxignoremsk |= ST_BREAK;
2766 cor4 |= COR4_IGNBRK;
2767 }
2768
2769 portp->rxmarkmsk = ST_OVERRUN;
2770 if (tiosp->c_iflag & (INPCK | PARMRK))
2771 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2772 if (tiosp->c_iflag & BRKINT)
2773 portp->rxmarkmsk |= ST_BREAK;
2774
2775/*
2776 * Go through the char size, parity and stop bits and set all the
2777 * option register appropriately.
2778 */
2779 switch (tiosp->c_cflag & CSIZE) {
2780 case CS5:
2781 cor1 |= COR1_CHL5;
2782 break;
2783 case CS6:
2784 cor1 |= COR1_CHL6;
2785 break;
2786 case CS7:
2787 cor1 |= COR1_CHL7;
2788 break;
2789 default:
2790 cor1 |= COR1_CHL8;
2791 break;
2792 }
2793
2794 if (tiosp->c_cflag & CSTOPB)
2795 cor1 |= COR1_STOP2;
2796 else
2797 cor1 |= COR1_STOP1;
2798
2799 if (tiosp->c_cflag & PARENB) {
2800 if (tiosp->c_cflag & PARODD)
2801 cor1 |= (COR1_PARENB | COR1_PARODD);
2802 else
2803 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2804 } else {
2805 cor1 |= COR1_PARNONE;
2806 }
2807
2808/*
2809 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2810 * space for hardware flow control and the like. This should be set to
2811 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2812 * really be based on VTIME.
2813 */
2814 cor3 |= FIFO_RXTHRESHOLD;
2815 rtpr = 2;
2816
2817/*
2818 * Calculate the baud rate timers. For now we will just assume that
2819 * the input and output baud are the same. Could have used a baud
2820 * table here, but this way we can generate virtually any baud rate
2821 * we like!
2822 */
2823 baudrate = tiosp->c_cflag & CBAUD;
2824 if (baudrate & CBAUDEX) {
2825 baudrate &= ~CBAUDEX;
2826 if ((baudrate < 1) || (baudrate > 4))
2827 tiosp->c_cflag &= ~CBAUDEX;
2828 else
2829 baudrate += 15;
2830 }
2831 baudrate = stl_baudrates[baudrate];
2832 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2833 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2834 baudrate = 57600;
f8ae4764 2835 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2836 baudrate = 115200;
f8ae4764 2837 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2838 baudrate = 230400;
f8ae4764 2839 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2840 baudrate = 460800;
f8ae4764 2841 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2842 baudrate = (portp->baud_base / portp->custom_divisor);
2843 }
2844 if (baudrate > STL_CD1400MAXBAUD)
2845 baudrate = STL_CD1400MAXBAUD;
2846
2847 if (baudrate > 0) {
c62429d9
JS		 2848 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2849 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2850 if (clkdiv < 0x100)
2851 break;
2852 }
2853 div = (unsigned char) clkdiv;
2854 }
2855
2856/*
2857 * Check what form of modem signaling is required and set it up.
2858 */
2859 if ((tiosp->c_cflag & CLOCAL) == 0) {
2860 mcor1 |= MCOR1_DCD;
2861 mcor2 |= MCOR2_DCD;
2862 sreron |= SRER_MODEM;
f8ae4764 2863 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2864 } else
f8ae4764 2865 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2866
2867/*
2868 * Setup cd1400 enhanced modes if we can. In particular we want to
2869 * handle as much of the flow control as possible automatically. As
2870 * well as saving a few CPU cycles it will also greatly improve flow
2871 * control reliability.
2872 */
2873 if (tiosp->c_iflag & IXON) {
2874 cor2 |= COR2_TXIBE;
2875 cor3 |= COR3_SCD12;
2876 if (tiosp->c_iflag & IXANY)
2877 cor2 |= COR2_IXM;
2878 }
2879
2880 if (tiosp->c_cflag & CRTSCTS) {
2881 cor2 |= COR2_CTSAE;
2882 mcor1 |= FIFO_RTSTHRESHOLD;
2883 }
2884
2885/*
2886 * All cd1400 register values calculated so go through and set
2887 * them all up.
2888 */
2889
a0564e14 2890 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2891 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2892 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2893 cor1, cor2, cor3, cor4, cor5);
a0564e14 2894 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2895 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2896 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2897 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2898 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2899 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2900
b65b5b59 2901 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2902 BRDENABLE(portp->brdnr, portp->pagenr);
2903 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2904 srer = stl_cd1400getreg(portp, SRER);
2905 stl_cd1400setreg(portp, SRER, 0);
2906 if (stl_cd1400updatereg(portp, COR1, cor1))
2907 ccr = 1;
2908 if (stl_cd1400updatereg(portp, COR2, cor2))
2909 ccr = 1;
2910 if (stl_cd1400updatereg(portp, COR3, cor3))
2911 ccr = 1;
2912 if (ccr) {
2913 stl_cd1400ccrwait(portp);
2914 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2915 }
2916 stl_cd1400setreg(portp, COR4, cor4);
2917 stl_cd1400setreg(portp, COR5, cor5);
2918 stl_cd1400setreg(portp, MCOR1, mcor1);
2919 stl_cd1400setreg(portp, MCOR2, mcor2);
2920 if (baudrate > 0) {
2921 stl_cd1400setreg(portp, TCOR, clk);
2922 stl_cd1400setreg(portp, TBPR, div);
2923 stl_cd1400setreg(portp, RCOR, clk);
2924 stl_cd1400setreg(portp, RBPR, div);
2925 }
2926 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2927 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2928 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2929 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2930 stl_cd1400setreg(portp, RTPR, rtpr);
2931 mcor1 = stl_cd1400getreg(portp, MSVR1);
2932 if (mcor1 & MSVR1_DCD)
2933 portp->sigs |= TIOCM_CD;
2934 else
2935 portp->sigs &= ~TIOCM_CD;
2936 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2937 BRDDISABLE(portp->brdnr);
b65b5b59 2938 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2939}
2940
2941/*****************************************************************************/
2942
2943/*
2944 * Set the state of the DTR and RTS signals.
2945 */
2946
ca7ed0f2 2947static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2948{
2949 unsigned char msvr1, msvr2;
2950 unsigned long flags;
2951
a0564e14
JS		 2952 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2953 portp, dtr, rts);
1da177e4
LT		 2954
2955 msvr1 = 0;
2956 msvr2 = 0;
2957 if (dtr > 0)
2958 msvr1 = MSVR1_DTR;
2959 if (rts > 0)
2960 msvr2 = MSVR2_RTS;
2961
b65b5b59 2962 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2963 BRDENABLE(portp->brdnr, portp->pagenr);
2964 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2965 if (rts >= 0)
2966 stl_cd1400setreg(portp, MSVR2, msvr2);
2967 if (dtr >= 0)
2968 stl_cd1400setreg(portp, MSVR1, msvr1);
2969 BRDDISABLE(portp->brdnr);
b65b5b59 2970 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2971}
2972
2973/*****************************************************************************/
2974
2975/*
2976 * Return the state of the signals.
2977 */
2978
ca7ed0f2 2979static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2980{
2981 unsigned char msvr1, msvr2;
2982 unsigned long flags;
2983 int sigs;
2984
a0564e14 2985 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2986
b65b5b59 2987 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2988 BRDENABLE(portp->brdnr, portp->pagenr);
2989 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2990 msvr1 = stl_cd1400getreg(portp, MSVR1);
2991 msvr2 = stl_cd1400getreg(portp, MSVR2);
2992 BRDDISABLE(portp->brdnr);
b65b5b59 2993 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2994
2995 sigs = 0;
2996 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2997 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2998 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2999 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3000#if 0
3001 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3002 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3003#else
3004 sigs |= TIOCM_DSR;
3005#endif
014c2544 3006 return sigs;
1da177e4
LT		 3007}
3008
3009/*****************************************************************************/
3010
3011/*
3012 * Enable/Disable the Transmitter and/or Receiver.
3013 */
3014
ca7ed0f2 3015static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3016{
3017 unsigned char ccr;
3018 unsigned long flags;
3019
a0564e14
JS		 3020 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
3021
1da177e4
LT		 3022 ccr = 0;
3023
3024 if (tx == 0)
3025 ccr |= CCR_TXDISABLE;
3026 else if (tx > 0)
3027 ccr |= CCR_TXENABLE;
3028 if (rx == 0)
3029 ccr |= CCR_RXDISABLE;
3030 else if (rx > 0)
3031 ccr |= CCR_RXENABLE;
3032
b65b5b59 3033 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3034 BRDENABLE(portp->brdnr, portp->pagenr);
3035 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3036 stl_cd1400ccrwait(portp);
3037 stl_cd1400setreg(portp, CCR, ccr);
3038 stl_cd1400ccrwait(portp);
3039 BRDDISABLE(portp->brdnr);
b65b5b59 3040 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3041}
3042
3043/*****************************************************************************/
3044
3045/*
3046 * Start/stop the Transmitter and/or Receiver.
3047 */
3048
ca7ed0f2 3049static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3050{
3051 unsigned char sreron, sreroff;
3052 unsigned long flags;
3053
a0564e14 3054 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3055
3056 sreron = 0;
3057 sreroff = 0;
3058 if (tx == 0)
3059 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3060 else if (tx == 1)
3061 sreron |= SRER_TXDATA;
3062 else if (tx >= 2)
3063 sreron |= SRER_TXEMPTY;
3064 if (rx == 0)
3065 sreroff |= SRER_RXDATA;
3066 else if (rx > 0)
3067 sreron |= SRER_RXDATA;
3068
b65b5b59 3069 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3070 BRDENABLE(portp->brdnr, portp->pagenr);
3071 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3072 stl_cd1400setreg(portp, SRER,
3073 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3074 BRDDISABLE(portp->brdnr);
3075 if (tx > 0)
3076 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3077 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3078}
3079
3080/*****************************************************************************/
3081
3082/*
3083 * Disable all interrupts from this port.
3084 */
3085
ca7ed0f2 3086static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3087{
3088 unsigned long flags;
3089
a0564e14
JS		 3090 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3091
b65b5b59 3092 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3093 BRDENABLE(portp->brdnr, portp->pagenr);
3094 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3095 stl_cd1400setreg(portp, SRER, 0);
3096 BRDDISABLE(portp->brdnr);
b65b5b59 3097 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3098}
3099
3100/*****************************************************************************/
3101
ca7ed0f2 3102static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3103{
3104 unsigned long flags;
3105
a0564e14 3106 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3107
b65b5b59 3108 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3109 BRDENABLE(portp->brdnr, portp->pagenr);
3110 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3111 stl_cd1400setreg(portp, SRER,
3112 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3113 SRER_TXEMPTY));
3114 BRDDISABLE(portp->brdnr);
3115 portp->brklen = len;
3116 if (len == 1)
3117 portp->stats.txbreaks++;
b65b5b59 3118 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3119}
3120
3121/*****************************************************************************/
3122
3123/*
3124 * Take flow control actions...
3125 */
3126
ca7ed0f2 3127static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3128{
3129 struct tty_struct *tty;
3130 unsigned long flags;
3131
a0564e14 3132 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3133
615e4a71 3134 if (portp == NULL)
1da177e4 3135 return;
d18a750f 3136 tty = tty_port_tty_get(&portp->port);
615e4a71 3137 if (tty == NULL)
1da177e4
LT		 3138 return;
3139
b65b5b59 3140 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3141 BRDENABLE(portp->brdnr, portp->pagenr);
3142 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3143
3144 if (state) {
3145 if (tty->termios->c_iflag & IXOFF) {
3146 stl_cd1400ccrwait(portp);
3147 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3148 portp->stats.rxxon++;
3149 stl_cd1400ccrwait(portp);
3150 }
3151/*
3152 * Question: should we return RTS to what it was before? It may
3153 * have been set by an ioctl... Suppose not, since if you have
3154 * hardware flow control set then it is pretty silly to go and
3155 * set the RTS line by hand.
3156 */
3157 if (tty->termios->c_cflag & CRTSCTS) {
3158 stl_cd1400setreg(portp, MCOR1,
3159 (stl_cd1400getreg(portp, MCOR1) |
3160 FIFO_RTSTHRESHOLD));
3161 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3162 portp->stats.rxrtson++;
3163 }
3164 } else {
3165 if (tty->termios->c_iflag & IXOFF) {
3166 stl_cd1400ccrwait(portp);
3167 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3168 portp->stats.rxxoff++;
3169 stl_cd1400ccrwait(portp);
3170 }
3171 if (tty->termios->c_cflag & CRTSCTS) {
3172 stl_cd1400setreg(portp, MCOR1,
3173 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3174 stl_cd1400setreg(portp, MSVR2, 0);
3175 portp->stats.rxrtsoff++;
3176 }
3177 }
3178
3179 BRDDISABLE(portp->brdnr);
b65b5b59 3180 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3181 tty_kref_put(tty);
1da177e4
LT		 3182}
3183
3184/*****************************************************************************/
3185
3186/*
3187 * Send a flow control character...
3188 */
3189
ca7ed0f2 3190static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3191{
3192 struct tty_struct *tty;
3193 unsigned long flags;
3194
a0564e14 3195 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3196
615e4a71 3197 if (portp == NULL)
1da177e4 3198 return;
d18a750f 3199 tty = tty_port_tty_get(&portp->port);
615e4a71 3200 if (tty == NULL)
1da177e4
LT		 3201 return;
3202
b65b5b59 3203 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3204 BRDENABLE(portp->brdnr, portp->pagenr);
3205 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3206 if (state) {
3207 stl_cd1400ccrwait(portp);
3208 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3209 portp->stats.rxxon++;
3210 stl_cd1400ccrwait(portp);
3211 } else {
3212 stl_cd1400ccrwait(portp);
3213 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3214 portp->stats.rxxoff++;
3215 stl_cd1400ccrwait(portp);
3216 }
3217 BRDDISABLE(portp->brdnr);
b65b5b59 3218 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3219 tty_kref_put(tty);
1da177e4
LT		 3220}
3221
3222/*****************************************************************************/
3223
ca7ed0f2 3224static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3225{
3226 unsigned long flags;
3227
a0564e14 3228 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3229
615e4a71 3230 if (portp == NULL)
1da177e4
LT		 3231 return;
3232
b65b5b59 3233 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3234 BRDENABLE(portp->brdnr, portp->pagenr);
3235 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3236 stl_cd1400ccrwait(portp);
3237 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3238 stl_cd1400ccrwait(portp);
3239 portp->tx.tail = portp->tx.head;
3240 BRDDISABLE(portp->brdnr);
b65b5b59 3241 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3242}
3243
3244/*****************************************************************************/
3245
3246/*
3247 * Return the current state of data flow on this port. This is only
3248 * really interresting when determining if data has fully completed
3249 * transmission or not... This is easy for the cd1400, it accurately
3250 * maintains the busy port flag.
3251 */
3252
ca7ed0f2 3253static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3254{
a0564e14 3255 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3256
615e4a71 3257 if (portp == NULL)
014c2544 3258 return 0;
1da177e4 3259
014c2544 3260 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3261}
3262
3263/*****************************************************************************/
3264
3265/*
3266 * Interrupt service routine for cd1400 EasyIO boards.
3267 */
3268
ca7ed0f2 3269static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3270{
3271 unsigned char svrtype;
3272
a0564e14 3273 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3274
b65b5b59 3275 spin_lock(&brd_lock);
1da177e4
LT		 3276 outb(SVRR, iobase);
3277 svrtype = inb(iobase + EREG_DATA);
3278 if (panelp->nrports > 4) {
3279 outb((SVRR + 0x80), iobase);
3280 svrtype |= inb(iobase + EREG_DATA);
3281 }
3282
3283 if (svrtype & SVRR_RX)
3284 stl_cd1400rxisr(panelp, iobase);
3285 else if (svrtype & SVRR_TX)
3286 stl_cd1400txisr(panelp, iobase);
3287 else if (svrtype & SVRR_MDM)
3288 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3289
3290 spin_unlock(&brd_lock);
1da177e4
LT		 3291}
3292
3293/*****************************************************************************/
3294
3295/*
3296 * Interrupt service routine for cd1400 panels.
3297 */
3298
ca7ed0f2 3299static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3300{
3301 unsigned char svrtype;
3302
a0564e14 3303 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3304
3305 outb(SVRR, iobase);
3306 svrtype = inb(iobase + EREG_DATA);
3307 outb((SVRR + 0x80), iobase);
3308 svrtype |= inb(iobase + EREG_DATA);
3309 if (svrtype & SVRR_RX)
3310 stl_cd1400rxisr(panelp, iobase);
3311 else if (svrtype & SVRR_TX)
3312 stl_cd1400txisr(panelp, iobase);
3313 else if (svrtype & SVRR_MDM)
3314 stl_cd1400mdmisr(panelp, iobase);
3315}
3316
3317
3318/*****************************************************************************/
3319
3320/*
3321 * Unfortunately we need to handle breaks in the TX data stream, since
3322 * this is the only way to generate them on the cd1400.
3323 */
3324
60be4810 3325static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3326{
3327 if (portp->brklen == 1) {
3328 outb((COR2 + portp->uartaddr), ioaddr);
3329 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3330 (ioaddr + EREG_DATA));
3331 outb((TDR + portp->uartaddr), ioaddr);
3332 outb(ETC_CMD, (ioaddr + EREG_DATA));
3333 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3334 outb((SRER + portp->uartaddr), ioaddr);
3335 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3336 (ioaddr + EREG_DATA));
014c2544 3337 return 1;
1da177e4
LT		 3338 } else if (portp->brklen > 1) {
3339 outb((TDR + portp->uartaddr), ioaddr);
3340 outb(ETC_CMD, (ioaddr + EREG_DATA));
3341 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3342 portp->brklen = -1;
014c2544 3343 return 1;
1da177e4
LT		 3344 } else {
3345 outb((COR2 + portp->uartaddr), ioaddr);
3346 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3347 (ioaddr + EREG_DATA));
3348 portp->brklen = 0;
3349 }
014c2544 3350 return 0;
1da177e4
LT		 3351}
3352
3353/*****************************************************************************/
3354
3355/*
3356 * Transmit interrupt handler. This has gotta be fast! Handling TX
3357 * chars is pretty simple, stuff as many as possible from the TX buffer
3358 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3359 * are embedded as commands in the data stream. Oh no, had to use a goto!
3360 * This could be optimized more, will do when I get time...
3361 * In practice it is possible that interrupts are enabled but that the
3362 * port has been hung up. Need to handle not having any TX buffer here,
3363 * this is done by using the side effect that head and tail will also
3364 * be NULL if the buffer has been freed.
3365 */
3366
ca7ed0f2 3367static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3368{
ca7ed0f2 3369 struct stlport *portp;
1da177e4
LT		 3370 int len, stlen;
3371 char *head, *tail;
3372 unsigned char ioack, srer;
d18a750f 3373 struct tty_struct *tty;
1da177e4 3374
a0564e14 3375 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3376
3377 ioack = inb(ioaddr + EREG_TXACK);
3378 if (((ioack & panelp->ackmask) != 0) ||
3379 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3380 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3381 return;
3382 }
3383 portp = panelp->ports[(ioack >> 3)];
3384
3385/*
3386 * Unfortunately we need to handle breaks in the data stream, since
3387 * this is the only way to generate them on the cd1400. Do it now if
3388 * a break is to be sent.
3389 */
3390 if (portp->brklen != 0)
3391 if (stl_cd1400breakisr(portp, ioaddr))
3392 goto stl_txalldone;
3393
3394 head = portp->tx.head;
3395 tail = portp->tx.tail;
3396 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3397 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3398 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3399 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3400 tty = tty_port_tty_get(&portp->port);
3401 if (tty) {
3402 tty_wakeup(tty);
3403 tty_kref_put(tty);
3404 }
1da177e4
LT		 3405 }
3406
3407 if (len == 0) {
3408 outb((SRER + portp->uartaddr), ioaddr);
3409 srer = inb(ioaddr + EREG_DATA);
3410 if (srer & SRER_TXDATA) {
3411 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3412 } else {
3413 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3414 clear_bit(ASYI_TXBUSY, &portp->istate);
3415 }
3416 outb(srer, (ioaddr + EREG_DATA));
3417 } else {
843b568c 3418 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3419 portp->stats.txtotal += len;
319fe7c3
JS		 3420 stlen = min_t(unsigned int, len,
3421 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3422 outb((TDR + portp->uartaddr), ioaddr);
3423 outsb((ioaddr + EREG_DATA), tail, stlen);
3424 len -= stlen;
3425 tail += stlen;
3426 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3427 tail = portp->tx.buf;
3428 if (len > 0) {
3429 outsb((ioaddr + EREG_DATA), tail, len);
3430 tail += len;
3431 }
3432 portp->tx.tail = tail;
3433 }
3434
3435stl_txalldone:
3436 outb((EOSRR + portp->uartaddr), ioaddr);
3437 outb(0, (ioaddr + EREG_DATA));
3438}
3439
3440/*****************************************************************************/
3441
3442/*
3443 * Receive character interrupt handler. Determine if we have good chars
3444 * or bad chars and then process appropriately. Good chars are easy
3445 * just shove the lot into the RX buffer and set all status byte to 0.
3446 * If a bad RX char then process as required. This routine needs to be
3447 * fast! In practice it is possible that we get an interrupt on a port
3448 * that is closed. This can happen on hangups - since they completely
3449 * shutdown a port not in user context. Need to handle this case.
3450 */
3451
ca7ed0f2 3452static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3453{
ca7ed0f2 3454 struct stlport *portp;
1da177e4
LT		 3455 struct tty_struct *tty;
3456 unsigned int ioack, len, buflen;
3457 unsigned char status;
3458 char ch;
3459
a0564e14 3460 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3461
3462 ioack = inb(ioaddr + EREG_RXACK);
3463 if ((ioack & panelp->ackmask) != 0) {
3464 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3465 return;
3466 }
3467 portp = panelp->ports[(ioack >> 3)];
d18a750f 3468 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3469
3470 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3471 outb((RDCR + portp->uartaddr), ioaddr);
3472 len = inb(ioaddr + EREG_DATA);
33f0f88f 3473 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3474 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3475 outb((RDSR + portp->uartaddr), ioaddr);
3476 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3477 portp->stats.rxlost += len;
3478 portp->stats.rxtotal += len;
3479 } else {
843b568c 3480 len = min(len, buflen);
1da177e4 3481 if (len > 0) {
33f0f88f 3482 unsigned char *ptr;
1da177e4 3483 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3484 tty_prepare_flip_string(tty, &ptr, len);
3485 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3486 tty_schedule_flip(tty);
3487 portp->stats.rxtotal += len;
3488 }
3489 }
3490 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3491 outb((RDSR + portp->uartaddr), ioaddr);
3492 status = inb(ioaddr + EREG_DATA);
3493 ch = inb(ioaddr + EREG_DATA);
3494 if (status & ST_PARITY)
3495 portp->stats.rxparity++;
3496 if (status & ST_FRAMING)
3497 portp->stats.rxframing++;
3498 if (status & ST_OVERRUN)
3499 portp->stats.rxoverrun++;
3500 if (status & ST_BREAK)
3501 portp->stats.rxbreaks++;
3502 if (status & ST_SCHARMASK) {
3503 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3504 portp->stats.txxon++;
3505 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3506 portp->stats.txxoff++;
3507 goto stl_rxalldone;
3508 }
33f0f88f 3509 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3510 if (portp->rxmarkmsk & status) {
3511 if (status & ST_BREAK) {
3512 status = TTY_BREAK;
f8ae4764 3513 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3514 do_SAK(tty);
3515 BRDENABLE(portp->brdnr, portp->pagenr);
3516 }
c62429d9 3517 } else if (status & ST_PARITY)
1da177e4 3518 status = TTY_PARITY;
c62429d9 3519 else if (status & ST_FRAMING)
1da177e4 3520 status = TTY_FRAME;
c62429d9 3521 else if(status & ST_OVERRUN)
1da177e4 3522 status = TTY_OVERRUN;
c62429d9 3523 else
1da177e4 3524 status = 0;
c62429d9 3525 } else
1da177e4 3526 status = 0;
33f0f88f
AC		 3527 tty_insert_flip_char(tty, ch, status);
3528 tty_schedule_flip(tty);
1da177e4
LT		 3529 }
3530 } else {
3531 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3532 tty_kref_put(tty);
1da177e4
LT		 3533 return;
3534 }
3535
3536stl_rxalldone:
d18a750f 3537 tty_kref_put(tty);
1da177e4
LT		 3538 outb((EOSRR + portp->uartaddr), ioaddr);
3539 outb(0, (ioaddr + EREG_DATA));
3540}
3541
3542/*****************************************************************************/
3543
3544/*
3545 * Modem interrupt handler. The is called when the modem signal line
3546 * (DCD) has changed state. Leave most of the work to the off-level
3547 * processing routine.
3548 */
3549
ca7ed0f2 3550static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3551{
ca7ed0f2 3552 struct stlport *portp;
1da177e4
LT		 3553 unsigned int ioack;
3554 unsigned char misr;
3555
a0564e14 3556 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3557
3558 ioack = inb(ioaddr + EREG_MDACK);
3559 if (((ioack & panelp->ackmask) != 0) ||
3560 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3561 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3562 return;
3563 }
3564 portp = panelp->ports[(ioack >> 3)];
3565
3566 outb((MISR + portp->uartaddr), ioaddr);
3567 misr = inb(ioaddr + EREG_DATA);
3568 if (misr & MISR_DCD) {
ccfea3c9 3569 stl_cd_change(portp);
1da177e4
LT		 3570 portp->stats.modem++;
3571 }
3572
3573 outb((EOSRR + portp->uartaddr), ioaddr);
3574 outb(0, (ioaddr + EREG_DATA));
3575}
3576
3577/*****************************************************************************/
3578/* SC26198 HARDWARE FUNCTIONS */
3579/*****************************************************************************/
3580
3581/*
3582 * These functions get/set/update the registers of the sc26198 UARTs.
3583 * Access to the sc26198 registers is via an address/data io port pair.
3584 * (Maybe should make this inline...)
3585 */
3586
ca7ed0f2 3587static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3588{
3589 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3590 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3591}
3592
ca7ed0f2 3593static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3594{
3595 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3596 outb(value, (portp->ioaddr + XP_DATA));
3597}
3598
ca7ed0f2 3599static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3600{
3601 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3602 if (inb(portp->ioaddr + XP_DATA) != value) {
3603 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3604 return 1;
1da177e4 3605 }
014c2544 3606 return 0;
1da177e4
LT		 3607}
3608
3609/*****************************************************************************/
3610
3611/*
3612 * Functions to get and set the sc26198 global registers.
3613 */
3614
ca7ed0f2 3615static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3616{
3617 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3618 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3619}
3620
3621#if 0
ca7ed0f2 3622static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3623{
3624 outb(regnr, (portp->ioaddr + XP_ADDR));
3625 outb(value, (portp->ioaddr + XP_DATA));
3626}
3627#endif
3628
3629/*****************************************************************************/
3630
3631/*
3632 * Inbitialize the UARTs in a panel. We don't care what sort of board
3633 * these ports are on - since the port io registers are almost
3634 * identical when dealing with ports.
3635 */
3636
ca7ed0f2 3637static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3638{
3639 int chipmask, i;
3640 int nrchips, ioaddr;
3641
a0564e14 3642 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3643
3644 BRDENABLE(panelp->brdnr, panelp->pagenr);
3645
3646/*
3647 * Check that each chip is present and started up OK.
3648 */
3649 chipmask = 0;
3650 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3651 if (brdp->brdtype == BRD_ECHPCI)
3652 outb(panelp->pagenr, brdp->ioctrl);
3653
c62429d9 3654 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3655 ioaddr = panelp->iobase + (i * 4);
3656 outb(SCCR, (ioaddr + XP_ADDR));
3657 outb(CR_RESETALL, (ioaddr + XP_DATA));
3658 outb(TSTR, (ioaddr + XP_ADDR));
3659 if (inb(ioaddr + XP_DATA) != 0) {
3660 printk("STALLION: sc26198 not responding, "
3661 "brd=%d panel=%d chip=%d\n",
3662 panelp->brdnr, panelp->panelnr, i);
3663 continue;
3664 }
3665 chipmask |= (0x1 << i);
3666 outb(GCCR, (ioaddr + XP_ADDR));
3667 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3668 outb(WDTRCR, (ioaddr + XP_ADDR));
3669 outb(0xff, (ioaddr + XP_DATA));
3670 }
3671
3672 BRDDISABLE(panelp->brdnr);
014c2544 3673 return chipmask;
1da177e4
LT		 3674}
3675
3676/*****************************************************************************/
3677
3678/*
3679 * Initialize hardware specific port registers.
3680 */
3681
ca7ed0f2 3682static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3683{
a0564e14
JS		 3684 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3685 panelp, portp);
1da177e4 3686
615e4a71
JS		 3687 if ((brdp == NULL) || (panelp == NULL) ||
3688 (portp == NULL))
1da177e4
LT		 3689 return;
3690
3691 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3692 portp->uartaddr = (portp->portnr & 0x07) << 4;
3693 portp->pagenr = panelp->pagenr;
3694 portp->hwid = 0x1;
3695
3696 BRDENABLE(portp->brdnr, portp->pagenr);
3697 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3698 BRDDISABLE(portp->brdnr);
3699}
3700
3701/*****************************************************************************/
3702
3703/*
3704 * Set up the sc26198 registers for a port based on the termios port
3705 * settings.
3706 */
3707
606d099c 3708static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3709{
ca7ed0f2 3710 struct stlbrd *brdp;
1da177e4
LT		 3711 unsigned long flags;
3712 unsigned int baudrate;
3713 unsigned char mr0, mr1, mr2, clk;
3714 unsigned char imron, imroff, iopr, ipr;
3715
3716 mr0 = 0;
3717 mr1 = 0;
3718 mr2 = 0;
3719 clk = 0;
3720 iopr = 0;
3721 imron = 0;
3722 imroff = 0;
3723
3724 brdp = stl_brds[portp->brdnr];
615e4a71 3725 if (brdp == NULL)
1da177e4
LT		 3726 return;
3727
3728/*
3729 * Set up the RX char ignore mask with those RX error types we
3730 * can ignore.
3731 */
3732 portp->rxignoremsk = 0;
3733 if (tiosp->c_iflag & IGNPAR)
3734 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3735 SR_RXOVERRUN);
3736 if (tiosp->c_iflag & IGNBRK)
3737 portp->rxignoremsk |= SR_RXBREAK;
3738
3739 portp->rxmarkmsk = SR_RXOVERRUN;
3740 if (tiosp->c_iflag & (INPCK | PARMRK))
3741 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3742 if (tiosp->c_iflag & BRKINT)
3743 portp->rxmarkmsk |= SR_RXBREAK;
3744
3745/*
3746 * Go through the char size, parity and stop bits and set all the
3747 * option register appropriately.
3748 */
3749 switch (tiosp->c_cflag & CSIZE) {
3750 case CS5:
3751 mr1 |= MR1_CS5;
3752 break;
3753 case CS6:
3754 mr1 |= MR1_CS6;
3755 break;
3756 case CS7:
3757 mr1 |= MR1_CS7;
3758 break;
3759 default:
3760 mr1 |= MR1_CS8;
3761 break;
3762 }
3763
3764 if (tiosp->c_cflag & CSTOPB)
3765 mr2 |= MR2_STOP2;
3766 else
3767 mr2 |= MR2_STOP1;
3768
3769 if (tiosp->c_cflag & PARENB) {
3770 if (tiosp->c_cflag & PARODD)
3771 mr1 |= (MR1_PARENB | MR1_PARODD);
3772 else
3773 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3774 } else
1da177e4 3775 mr1 |= MR1_PARNONE;
1da177e4
LT		 3776
3777 mr1 |= MR1_ERRBLOCK;
3778
3779/*
3780 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3781 * space for hardware flow control and the like. This should be set to
3782 * VMIN.
3783 */
3784 mr2 |= MR2_RXFIFOHALF;
3785
3786/*
3787 * Calculate the baud rate timers. For now we will just assume that
3788 * the input and output baud are the same. The sc26198 has a fixed
3789 * baud rate table, so only discrete baud rates possible.
3790 */
3791 baudrate = tiosp->c_cflag & CBAUD;
3792 if (baudrate & CBAUDEX) {
3793 baudrate &= ~CBAUDEX;
3794 if ((baudrate < 1) || (baudrate > 4))
3795 tiosp->c_cflag &= ~CBAUDEX;
3796 else
3797 baudrate += 15;
3798 }
3799 baudrate = stl_baudrates[baudrate];
3800 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3801 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3802 baudrate = 57600;
f8ae4764 3803 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3804 baudrate = 115200;
f8ae4764 3805 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3806 baudrate = 230400;
f8ae4764 3807 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3808 baudrate = 460800;
f8ae4764 3809 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3810 baudrate = (portp->baud_base / portp->custom_divisor);
3811 }
3812 if (baudrate > STL_SC26198MAXBAUD)
3813 baudrate = STL_SC26198MAXBAUD;
3814
c62429d9
JS		 3815 if (baudrate > 0)
3816 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3817 if (baudrate <= sc26198_baudtable[clk])
3818 break;
1da177e4
LT		 3819
3820/*
3821 * Check what form of modem signaling is required and set it up.
3822 */
3823 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3824 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3825 } else {
3826 iopr |= IOPR_DCDCOS;
3827 imron |= IR_IOPORT;
f8ae4764 3828 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3829 }
3830
3831/*
3832 * Setup sc26198 enhanced modes if we can. In particular we want to
3833 * handle as much of the flow control as possible automatically. As
3834 * well as saving a few CPU cycles it will also greatly improve flow
3835 * control reliability.
3836 */
3837 if (tiosp->c_iflag & IXON) {
3838 mr0 |= MR0_SWFTX | MR0_SWFT;
3839 imron |= IR_XONXOFF;
c62429d9 3840 } else
1da177e4 3841 imroff |= IR_XONXOFF;
c62429d9 3842
1da177e4
LT		 3843 if (tiosp->c_iflag & IXOFF)
3844 mr0 |= MR0_SWFRX;
3845
3846 if (tiosp->c_cflag & CRTSCTS) {
3847 mr2 |= MR2_AUTOCTS;
3848 mr1 |= MR1_AUTORTS;
3849 }
3850
3851/*
3852 * All sc26198 register values calculated so go through and set
3853 * them all up.
3854 */
3855
a0564e14 3856 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3857 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3858 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3859 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3860 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3861 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3862 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3863
b65b5b59 3864 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3865 BRDENABLE(portp->brdnr, portp->pagenr);
3866 stl_sc26198setreg(portp, IMR, 0);
3867 stl_sc26198updatereg(portp, MR0, mr0);
3868 stl_sc26198updatereg(portp, MR1, mr1);
3869 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3870 stl_sc26198updatereg(portp, MR2, mr2);
3871 stl_sc26198updatereg(portp, IOPIOR,
3872 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3873
3874 if (baudrate > 0) {
3875 stl_sc26198setreg(portp, TXCSR, clk);
3876 stl_sc26198setreg(portp, RXCSR, clk);
3877 }
3878
3879 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3880 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3881
3882 ipr = stl_sc26198getreg(portp, IPR);
3883 if (ipr & IPR_DCD)
3884 portp->sigs &= ~TIOCM_CD;
3885 else
3886 portp->sigs |= TIOCM_CD;
3887
3888 portp->imr = (portp->imr & ~imroff) | imron;
3889 stl_sc26198setreg(portp, IMR, portp->imr);
3890 BRDDISABLE(portp->brdnr);
b65b5b59 3891 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3892}
3893
3894/*****************************************************************************/
3895
3896/*
3897 * Set the state of the DTR and RTS signals.
3898 */
3899
ca7ed0f2 3900static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3901{
3902 unsigned char iopioron, iopioroff;
3903 unsigned long flags;
3904
a0564e14
JS		 3905 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3906 dtr, rts);
1da177e4
LT		 3907
3908 iopioron = 0;
3909 iopioroff = 0;
3910 if (dtr == 0)
3911 iopioroff |= IPR_DTR;
3912 else if (dtr > 0)
3913 iopioron |= IPR_DTR;
3914 if (rts == 0)
3915 iopioroff |= IPR_RTS;
3916 else if (rts > 0)
3917 iopioron |= IPR_RTS;
3918
b65b5b59 3919 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3920 BRDENABLE(portp->brdnr, portp->pagenr);
3921 stl_sc26198setreg(portp, IOPIOR,
3922 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3923 BRDDISABLE(portp->brdnr);
b65b5b59 3924 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3925}
3926
3927/*****************************************************************************/
3928
3929/*
3930 * Return the state of the signals.
3931 */
3932
ca7ed0f2 3933static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3934{
3935 unsigned char ipr;
3936 unsigned long flags;
3937 int sigs;
3938
a0564e14 3939 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3940
b65b5b59 3941 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3942 BRDENABLE(portp->brdnr, portp->pagenr);
3943 ipr = stl_sc26198getreg(portp, IPR);
3944 BRDDISABLE(portp->brdnr);
b65b5b59 3945 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3946
3947 sigs = 0;
3948 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3949 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3950 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3951 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3952 sigs |= TIOCM_DSR;
014c2544 3953 return sigs;
1da177e4
LT		 3954}
3955
3956/*****************************************************************************/
3957
3958/*
3959 * Enable/Disable the Transmitter and/or Receiver.
3960 */
3961
ca7ed0f2 3962static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3963{
3964 unsigned char ccr;
3965 unsigned long flags;
3966
a0564e14 3967 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3968
3969 ccr = portp->crenable;
3970 if (tx == 0)
3971 ccr &= ~CR_TXENABLE;
3972 else if (tx > 0)
3973 ccr |= CR_TXENABLE;
3974 if (rx == 0)
3975 ccr &= ~CR_RXENABLE;
3976 else if (rx > 0)
3977 ccr |= CR_RXENABLE;
3978
b65b5b59 3979 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3980 BRDENABLE(portp->brdnr, portp->pagenr);
3981 stl_sc26198setreg(portp, SCCR, ccr);
3982 BRDDISABLE(portp->brdnr);
3983 portp->crenable = ccr;
b65b5b59 3984 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3985}
3986
3987/*****************************************************************************/
3988
3989/*
3990 * Start/stop the Transmitter and/or Receiver.
3991 */
3992
ca7ed0f2 3993static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3994{
3995 unsigned char imr;
3996 unsigned long flags;
3997
a0564e14 3998 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3999
4000 imr = portp->imr;
4001 if (tx == 0)
4002 imr &= ~IR_TXRDY;
4003 else if (tx == 1)
4004 imr |= IR_TXRDY;
4005 if (rx == 0)
4006 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4007 else if (rx > 0)
4008 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4009
b65b5b59 4010 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4011 BRDENABLE(portp->brdnr, portp->pagenr);
4012 stl_sc26198setreg(portp, IMR, imr);
4013 BRDDISABLE(portp->brdnr);
4014 portp->imr = imr;
4015 if (tx > 0)
4016 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 4017 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4018}
4019
4020/*****************************************************************************/
4021
4022/*
4023 * Disable all interrupts from this port.
4024 */
4025
ca7ed0f2 4026static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 4027{
4028 unsigned long flags;
4029
a0564e14 4030 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 4031
b65b5b59 4032 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4033 BRDENABLE(portp->brdnr, portp->pagenr);
4034 portp->imr = 0;
4035 stl_sc26198setreg(portp, IMR, 0);
4036 BRDDISABLE(portp->brdnr);
b65b5b59 4037 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4038}
4039
4040/*****************************************************************************/
4041
ca7ed0f2 4042static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 4043{
4044 unsigned long flags;
4045
a0564e14 4046 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 4047
b65b5b59 4048 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4049 BRDENABLE(portp->brdnr, portp->pagenr);
4050 if (len == 1) {
4051 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4052 portp->stats.txbreaks++;
c62429d9 4053 } else
1da177e4 4054 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 4055
1da177e4 4056 BRDDISABLE(portp->brdnr);
b65b5b59 4057 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4058}
4059
4060/*****************************************************************************/
4061
4062/*
4063 * Take flow control actions...
4064 */
4065
ca7ed0f2 4066static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4067{
4068 struct tty_struct *tty;
4069 unsigned long flags;
4070 unsigned char mr0;
4071
a0564e14 4072 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4073
615e4a71 4074 if (portp == NULL)
1da177e4 4075 return;
d18a750f 4076 tty = tty_port_tty_get(&portp->port);
615e4a71 4077 if (tty == NULL)
1da177e4
LT		 4078 return;
4079
b65b5b59 4080 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4081 BRDENABLE(portp->brdnr, portp->pagenr);
4082
4083 if (state) {
4084 if (tty->termios->c_iflag & IXOFF) {
4085 mr0 = stl_sc26198getreg(portp, MR0);
4086 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4087 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4088 mr0 |= MR0_SWFRX;
4089 portp->stats.rxxon++;
4090 stl_sc26198wait(portp);
4091 stl_sc26198setreg(portp, MR0, mr0);
4092 }
4093/*
4094 * Question: should we return RTS to what it was before? It may
4095 * have been set by an ioctl... Suppose not, since if you have
4096 * hardware flow control set then it is pretty silly to go and
4097 * set the RTS line by hand.
4098 */
4099 if (tty->termios->c_cflag & CRTSCTS) {
4100 stl_sc26198setreg(portp, MR1,
4101 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4102 stl_sc26198setreg(portp, IOPIOR,
4103 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4104 portp->stats.rxrtson++;
4105 }
4106 } else {
4107 if (tty->termios->c_iflag & IXOFF) {
4108 mr0 = stl_sc26198getreg(portp, MR0);
4109 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4110 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4111 mr0 &= ~MR0_SWFRX;
4112 portp->stats.rxxoff++;
4113 stl_sc26198wait(portp);
4114 stl_sc26198setreg(portp, MR0, mr0);
4115 }
4116 if (tty->termios->c_cflag & CRTSCTS) {
4117 stl_sc26198setreg(portp, MR1,
4118 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4119 stl_sc26198setreg(portp, IOPIOR,
4120 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4121 portp->stats.rxrtsoff++;
4122 }
4123 }
4124
4125 BRDDISABLE(portp->brdnr);
b65b5b59 4126 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4127 tty_kref_put(tty);
1da177e4
LT		 4128}
4129
4130/*****************************************************************************/
4131
4132/*
4133 * Send a flow control character.
4134 */
4135
ca7ed0f2 4136static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4137{
4138 struct tty_struct *tty;
4139 unsigned long flags;
4140 unsigned char mr0;
4141
a0564e14 4142 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4143
615e4a71 4144 if (portp == NULL)
1da177e4 4145 return;
d18a750f 4146 tty = tty_port_tty_get(&portp->port);
615e4a71 4147 if (tty == NULL)
1da177e4
LT		 4148 return;
4149
b65b5b59 4150 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4151 BRDENABLE(portp->brdnr, portp->pagenr);
4152 if (state) {
4153 mr0 = stl_sc26198getreg(portp, MR0);
4154 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4155 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4156 mr0 |= MR0_SWFRX;
4157 portp->stats.rxxon++;
4158 stl_sc26198wait(portp);
4159 stl_sc26198setreg(portp, MR0, mr0);
4160 } else {
4161 mr0 = stl_sc26198getreg(portp, MR0);
4162 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4163 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4164 mr0 &= ~MR0_SWFRX;
4165 portp->stats.rxxoff++;
4166 stl_sc26198wait(portp);
4167 stl_sc26198setreg(portp, MR0, mr0);
4168 }
4169 BRDDISABLE(portp->brdnr);
b65b5b59 4170 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4171 tty_kref_put(tty);
1da177e4
LT		 4172}
4173
4174/*****************************************************************************/
4175
ca7ed0f2 4176static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4177{
4178 unsigned long flags;
4179
a0564e14 4180 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4181
615e4a71 4182 if (portp == NULL)
1da177e4
LT		 4183 return;
4184
b65b5b59 4185 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4186 BRDENABLE(portp->brdnr, portp->pagenr);
4187 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4188 stl_sc26198setreg(portp, SCCR, portp->crenable);
4189 BRDDISABLE(portp->brdnr);
4190 portp->tx.tail = portp->tx.head;
b65b5b59 4191 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4192}
4193
4194/*****************************************************************************/
4195
4196/*
4197 * Return the current state of data flow on this port. This is only
4198 * really interresting when determining if data has fully completed
4199 * transmission or not... The sc26198 interrupt scheme cannot
4200 * determine when all data has actually drained, so we need to
4201 * check the port statusy register to be sure.
4202 */
4203
ca7ed0f2 4204static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4205{
4206 unsigned long flags;
4207 unsigned char sr;
4208
a0564e14 4209 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4210
615e4a71 4211 if (portp == NULL)
014c2544 4212 return 0;
1da177e4 4213 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4214 return 1;
1da177e4 4215
b65b5b59 4216 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4217 BRDENABLE(portp->brdnr, portp->pagenr);
4218 sr = stl_sc26198getreg(portp, SR);
4219 BRDDISABLE(portp->brdnr);
b65b5b59 4220 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4221
014c2544 4222 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4223}
4224
4225/*****************************************************************************/
4226
4227/*
4228 * Delay for a small amount of time, to give the sc26198 a chance
4229 * to process a command...
4230 */
4231
ca7ed0f2 4232static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4233{
4234 int i;
4235
a0564e14 4236 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4237
615e4a71 4238 if (portp == NULL)
1da177e4
LT		 4239 return;
4240
c62429d9 4241 for (i = 0; i < 20; i++)
1da177e4
LT		 4242 stl_sc26198getglobreg(portp, TSTR);
4243}
4244
4245/*****************************************************************************/
4246
4247/*
4248 * If we are TX flow controlled and in IXANY mode then we may
4249 * need to unflow control here. We gotta do this because of the
4250 * automatic flow control modes of the sc26198.
4251 */
4252
60be4810 4253static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4254{
4255 unsigned char mr0;
4256
4257 mr0 = stl_sc26198getreg(portp, MR0);
4258 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4259 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4260 stl_sc26198wait(portp);
4261 stl_sc26198setreg(portp, MR0, mr0);
4262 clear_bit(ASYI_TXFLOWED, &portp->istate);
4263}
4264
4265/*****************************************************************************/
4266
4267/*
4268 * Interrupt service routine for sc26198 panels.
4269 */
4270
ca7ed0f2 4271static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4272{
ca7ed0f2 4273 struct stlport *portp;
1da177e4
LT		 4274 unsigned int iack;
4275
b65b5b59
AC		 4276 spin_lock(&brd_lock);
4277
1da177e4
LT		 4278/*
4279 * Work around bug in sc26198 chip... Cannot have A6 address
4280 * line of UART high, else iack will be returned as 0.
4281 */
4282 outb(0, (iobase + 1));
4283
4284 iack = inb(iobase + XP_IACK);
4285 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4286
4287 if (iack & IVR_RXDATA)
4288 stl_sc26198rxisr(portp, iack);
4289 else if (iack & IVR_TXDATA)
4290 stl_sc26198txisr(portp);
4291 else
4292 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4293
4294 spin_unlock(&brd_lock);
1da177e4
LT		 4295}
4296
4297/*****************************************************************************/
4298
4299/*
4300 * Transmit interrupt handler. This has gotta be fast! Handling TX
4301 * chars is pretty simple, stuff as many as possible from the TX buffer
4302 * into the sc26198 FIFO.
4303 * In practice it is possible that interrupts are enabled but that the
4304 * port has been hung up. Need to handle not having any TX buffer here,
4305 * this is done by using the side effect that head and tail will also
4306 * be NULL if the buffer has been freed.
4307 */
4308
ca7ed0f2 4309static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4310{
d18a750f 4311 struct tty_struct *tty;
1da177e4
LT		 4312 unsigned int ioaddr;
4313 unsigned char mr0;
4314 int len, stlen;
4315 char *head, *tail;
4316
a0564e14 4317 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4318
4319 ioaddr = portp->ioaddr;
4320 head = portp->tx.head;
4321 tail = portp->tx.tail;
4322 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4323 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4324 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4325 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4326 tty = tty_port_tty_get(&portp->port);
4327 if (tty) {
4328 tty_wakeup(tty);
4329 tty_kref_put(tty);
4330 }
1da177e4
LT		 4331 }
4332
4333 if (len == 0) {
4334 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4335 mr0 = inb(ioaddr + XP_DATA);
4336 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4337 portp->imr &= ~IR_TXRDY;
4338 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4339 outb(portp->imr, (ioaddr + XP_DATA));
4340 clear_bit(ASYI_TXBUSY, &portp->istate);
4341 } else {
4342 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4343 outb(mr0, (ioaddr + XP_DATA));
4344 }
4345 } else {
843b568c 4346 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4347 portp->stats.txtotal += len;
319fe7c3
JS		 4348 stlen = min_t(unsigned int, len,
4349 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4350 outb(GTXFIFO, (ioaddr + XP_ADDR));
4351 outsb((ioaddr + XP_DATA), tail, stlen);
4352 len -= stlen;
4353 tail += stlen;
4354 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4355 tail = portp->tx.buf;
4356 if (len > 0) {
4357 outsb((ioaddr + XP_DATA), tail, len);
4358 tail += len;
4359 }
4360 portp->tx.tail = tail;
4361 }
4362}
4363
4364/*****************************************************************************/
4365
4366/*
4367 * Receive character interrupt handler. Determine if we have good chars
4368 * or bad chars and then process appropriately. Good chars are easy
4369 * just shove the lot into the RX buffer and set all status byte to 0.
4370 * If a bad RX char then process as required. This routine needs to be
4371 * fast! In practice it is possible that we get an interrupt on a port
4372 * that is closed. This can happen on hangups - since they completely
4373 * shutdown a port not in user context. Need to handle this case.
4374 */
4375
ca7ed0f2 4376static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4377{
4378 struct tty_struct *tty;
4379 unsigned int len, buflen, ioaddr;
4380
a0564e14 4381 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4382
d18a750f 4383 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4384 ioaddr = portp->ioaddr;
4385 outb(GIBCR, (ioaddr + XP_ADDR));
4386 len = inb(ioaddr + XP_DATA) + 1;
4387
4388 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4389 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4390 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4391 outb(GRXFIFO, (ioaddr + XP_ADDR));
4392 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4393 portp->stats.rxlost += len;
4394 portp->stats.rxtotal += len;
4395 } else {
843b568c 4396 len = min(len, buflen);
1da177e4 4397 if (len > 0) {
33f0f88f 4398 unsigned char *ptr;
1da177e4 4399 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4400 tty_prepare_flip_string(tty, &ptr, len);
4401 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4402 tty_schedule_flip(tty);
4403 portp->stats.rxtotal += len;
4404 }
4405 }
4406 } else {
4407 stl_sc26198rxbadchars(portp);
4408 }
4409
4410/*
4411 * If we are TX flow controlled and in IXANY mode then we may need
4412 * to unflow control here. We gotta do this because of the automatic
4413 * flow control modes of the sc26198.
4414 */
4415 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4416 if ((tty != NULL) &&
4417 (tty->termios != NULL) &&
1da177e4
LT		 4418 (tty->termios->c_iflag & IXANY)) {
4419 stl_sc26198txunflow(portp, tty);
4420 }
4421 }
d18a750f 4422 tty_kref_put(tty);
1da177e4
LT		 4423}
4424
4425/*****************************************************************************/
4426
4427/*
4428 * Process an RX bad character.
4429 */
4430
60be4810 4431static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4432{
4433 struct tty_struct *tty;
4434 unsigned int ioaddr;
4435
d18a750f 4436 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4437 ioaddr = portp->ioaddr;
4438
4439 if (status & SR_RXPARITY)
4440 portp->stats.rxparity++;
4441 if (status & SR_RXFRAMING)
4442 portp->stats.rxframing++;
4443 if (status & SR_RXOVERRUN)
4444 portp->stats.rxoverrun++;
4445 if (status & SR_RXBREAK)
4446 portp->stats.rxbreaks++;
4447
615e4a71 4448 if ((tty != NULL) &&
1da177e4
LT		 4449 ((portp->rxignoremsk & status) == 0)) {
4450 if (portp->rxmarkmsk & status) {
4451 if (status & SR_RXBREAK) {
4452 status = TTY_BREAK;
f8ae4764 4453 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4454 do_SAK(tty);
4455 BRDENABLE(portp->brdnr, portp->pagenr);
4456 }
c62429d9 4457 } else if (status & SR_RXPARITY)
1da177e4 4458 status = TTY_PARITY;
c62429d9 4459 else if (status & SR_RXFRAMING)
1da177e4 4460 status = TTY_FRAME;
c62429d9 4461 else if(status & SR_RXOVERRUN)
1da177e4 4462 status = TTY_OVERRUN;
c62429d9 4463 else
1da177e4 4464 status = 0;
c62429d9 4465 } else
1da177e4 4466 status = 0;
1da177e4 4467
33f0f88f
AC		 4468 tty_insert_flip_char(tty, ch, status);
4469 tty_schedule_flip(tty);
1da177e4
LT		 4470
4471 if (status == 0)
4472 portp->stats.rxtotal++;
4473 }
d18a750f 4474 tty_kref_put(tty);
1da177e4
LT		 4475}
4476
4477/*****************************************************************************/
4478
4479/*
4480 * Process all characters in the RX FIFO of the UART. Check all char
4481 * status bytes as well, and process as required. We need to check
4482 * all bytes in the FIFO, in case some more enter the FIFO while we
4483 * are here. To get the exact character error type we need to switch
4484 * into CHAR error mode (that is why we need to make sure we empty
4485 * the FIFO).
4486 */
4487
ca7ed0f2 4488static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4489{
4490 unsigned char status, mr1;
4491 char ch;
4492
4493/*
4494 * To get the precise error type for each character we must switch
4495 * back into CHAR error mode.
4496 */
4497 mr1 = stl_sc26198getreg(portp, MR1);
4498 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4499
4500 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4501 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4502 ch = stl_sc26198getreg(portp, RXFIFO);
4503 stl_sc26198rxbadch(portp, status, ch);
4504 }
4505
4506/*
4507 * To get correct interrupt class we must switch back into BLOCK
4508 * error mode.
4509 */
4510 stl_sc26198setreg(portp, MR1, mr1);
4511}
4512
4513/*****************************************************************************/
4514
4515/*
4516 * Other interrupt handler. This includes modem signals, flow
4517 * control actions, etc. Most stuff is left to off-level interrupt
4518 * processing time.
4519 */
4520
ca7ed0f2 4521static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4522{
4523 unsigned char cir, ipr, xisr;
4524
a0564e14 4525 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4526
4527 cir = stl_sc26198getglobreg(portp, CIR);
4528
4529 switch (cir & CIR_SUBTYPEMASK) {
4530 case CIR_SUBCOS:
4531 ipr = stl_sc26198getreg(portp, IPR);
4532 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4533 stl_cd_change(portp);
1da177e4
LT		 4534 portp->stats.modem++;
4535 }
4536 break;
4537 case CIR_SUBXONXOFF:
4538 xisr = stl_sc26198getreg(portp, XISR);
4539 if (xisr & XISR_RXXONGOT) {
4540 set_bit(ASYI_TXFLOWED, &portp->istate);
4541 portp->stats.txxoff++;
4542 }
4543 if (xisr & XISR_RXXOFFGOT) {
4544 clear_bit(ASYI_TXFLOWED, &portp->istate);
4545 portp->stats.txxon++;
4546 }
4547 break;
4548 case CIR_SUBBREAK:
4549 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4550 stl_sc26198rxbadchars(portp);
4551 break;
4552 default:
4553 break;
4554 }
4555}
4556
fc06b5cf
JS		 4557static void stl_free_isabrds(void)
4558{
4559 struct stlbrd *brdp;
4560 unsigned int i;
4561
4562 for (i = 0; i < stl_nrbrds; i++) {
4563 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4564 continue;
4565
4566 free_irq(brdp->irq, brdp);
4567
4568 stl_cleanup_panels(brdp);
4569
4570 release_region(brdp->ioaddr1, brdp->iosize1);
4571 if (brdp->iosize2 > 0)
4572 release_region(brdp->ioaddr2, brdp->iosize2);
4573
4574 kfree(brdp);
4575 stl_brds[i] = NULL;
4576 }
4577}
4578
23b85a15
JS		 4579/*
4580 * Loadable module initialization stuff.
4581 */
4582static int __init stallion_module_init(void)
4583{
843b568c
JS		 4584 struct stlbrd *brdp;
4585 struct stlconf conf;
aeaccfe4 4586 unsigned int i, j;
fc06b5cf 4587 int retval;
23b85a15
JS		 4588
4589 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4590
4591 spin_lock_init(&stallion_lock);
4592 spin_lock_init(&brd_lock);
4593
e415109f
JS		 4594 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4595 if (!stl_serial) {
4596 retval = -ENOMEM;
4597 goto err;
4598 }
4599
4600 stl_serial->owner = THIS_MODULE;
4601 stl_serial->driver_name = stl_drvname;
4602 stl_serial->name = "ttyE";
4603 stl_serial->major = STL_SERIALMAJOR;
4604 stl_serial->minor_start = 0;
4605 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4606 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4607 stl_serial->init_termios = stl_deftermios;
4608 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4609 tty_set_operations(stl_serial, &stl_ops);
4610
4611 retval = tty_register_driver(stl_serial);
4612 if (retval) {
4613 printk("STALLION: failed to register serial driver\n");
4614 goto err_frtty;
4615 }
4616
843b568c
JS		 4617/*
4618 * Find any dynamically supported boards. That is via module load
4619 * line options.
4620 */
4621 for (i = stl_nrbrds; i < stl_nargs; i++) {
4622 memset(&conf, 0, sizeof(conf));
4623 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4624 continue;
4625 if ((brdp = stl_allocbrd()) == NULL)
4626 continue;
4627 brdp->brdnr = i;
4628 brdp->brdtype = conf.brdtype;
4629 brdp->ioaddr1 = conf.ioaddr1;
4630 brdp->ioaddr2 = conf.ioaddr2;
4631 brdp->irq = conf.irq;
4632 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4633 stl_brds[brdp->brdnr] = brdp;
4634 if (stl_brdinit(brdp)) {
4635 stl_brds[brdp->brdnr] = NULL;
843b568c 4636 kfree(brdp);
b08b5ad9 4637 } else {
aeaccfe4
JS		 4638 for (j = 0; j < brdp->nrports; j++)
4639 tty_register_device(stl_serial,
4640 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4641 stl_nrbrds = i + 1;
79cfe7ab 4642 }
843b568c 4643 }
23b85a15 4644
79cfe7ab 4645 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4646 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4647 if (retval && stl_nrbrds == 0) {
4648 printk(KERN_ERR "STALLION: can't register pci driver\n");
4649 goto err_unrtty;
fc06b5cf 4650 }
23b85a15
JS		 4651
4652/*
4653 * Set up a character driver for per board stuff. This is mainly used
4654 * to do stats ioctls on the ports.
4655 */
4656 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4657 printk("STALLION: failed to register serial board device\n");
4658
4659 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4660 if (IS_ERR(stallion_class))
4661 printk("STALLION: failed to create class\n");
23b85a15 4662 for (i = 0; i < 4; i++)
03457cd4
GKH		 4663 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4664 NULL, "staliomem%d", i);
23b85a15 4665
23b85a15 4666 return 0;
e415109f
JS		 4667err_unrtty:
4668 tty_unregister_driver(stl_serial);
4669err_frtty:
fc06b5cf 4670 put_tty_driver(stl_serial);
b1b84fe0
JS		 4671err:
4672 return retval;
23b85a15
JS		 4673}
4674
4675static void __exit stallion_module_exit(void)
4676{
aeaccfe4
JS		 4677 struct stlbrd *brdp;
4678 unsigned int i, j;
23b85a15
JS		 4679
4680 pr_debug("cleanup_module()\n");
4681
4682 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4683 stl_drvversion);
4684
4685/*
4686 * Free up all allocated resources used by the ports. This includes
4687 * memory and interrupts. As part of this process we will also do
4688 * a hangup on every open port - to try to flush out any processes
4689 * hanging onto ports.
4690 */
aeaccfe4
JS		 4691 for (i = 0; i < stl_nrbrds; i++) {
4692 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4693 continue;
4694 for (j = 0; j < brdp->nrports; j++)
4695 tty_unregister_device(stl_serial,
4696 brdp->brdnr * STL_MAXPORTS + j);
4697 }
fc06b5cf 4698
23b85a15 4699 for (i = 0; i < 4; i++)
07c015e7 4700 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4701 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4702 class_destroy(stallion_class);
4703
b1b84fe0
JS		 4704 pci_unregister_driver(&stl_pcidriver);
4705
fc06b5cf 4706 stl_free_isabrds();
e415109f
JS		 4707
4708 tty_unregister_driver(stl_serial);
4709 put_tty_driver(stl_serial);
23b85a15
JS		 4710}
4711
4712module_init(stallion_module_init);
4713module_exit(stallion_module_exit);
4714
4715MODULE_AUTHOR("Greg Ungerer");
4716MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4717MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)