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ALSA: usb-audio: support partially write-protected UAC2 controls
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / stallion.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4 29#include <linux/module.h>
d43c36dc 30#include <linux/sched.h>
1da177e4
LT		 31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
8561c44c 36#include <linux/seq_file.h>
1da177e4
LT		 37#include <linux/cd1400.h>
38#include <linux/sc26198.h>
39#include <linux/comstats.h>
40#include <linux/stallion.h>
41#include <linux/ioport.h>
42#include <linux/init.h>
43#include <linux/smp_lock.h>
1da177e4
LT		 44#include <linux/device.h>
45#include <linux/delay.h>
843b568c 46#include <linux/ctype.h>
1da177e4
LT		 47
48#include <asm/io.h>
49#include <asm/uaccess.h>
50
1da177e4 51#include <linux/pci.h>
1da177e4
LT		 52
53/*****************************************************************************/
54
55/*
56 * Define different board types. Use the standard Stallion "assigned"
57 * board numbers. Boards supported in this driver are abbreviated as
58 * EIO = EasyIO and ECH = EasyConnection 8/32.
59 */
60#define BRD_EASYIO 20
61#define BRD_ECH 21
62#define BRD_ECHMC 22
63#define BRD_ECHPCI 26
64#define BRD_ECH64PCI 27
65#define BRD_EASYIOPCI 28
66
843b568c 67struct stlconf {
6b2c9457 68 unsigned int brdtype;
1da177e4
LT		 69 int ioaddr1;
70 int ioaddr2;
71 unsigned long memaddr;
72 int irq;
73 int irqtype;
1da177e4
LT		 74};
75
843b568c 76static unsigned int stl_nrbrds;
1da177e4
LT		 77
78/*****************************************************************************/
79
80/*
81 * Define some important driver characteristics. Device major numbers
82 * allocated as per Linux Device Registry.
83 */
84#ifndef STL_SIOMEMMAJOR
85#define STL_SIOMEMMAJOR 28
86#endif
87#ifndef STL_SERIALMAJOR
88#define STL_SERIALMAJOR 24
89#endif
90#ifndef STL_CALLOUTMAJOR
91#define STL_CALLOUTMAJOR 25
92#endif
93
94/*
95 * Set the TX buffer size. Bigger is better, but we don't want
96 * to chew too much memory with buffers!
97 */
98#define STL_TXBUFLOW 512
99#define STL_TXBUFSIZE 4096
100
101/*****************************************************************************/
102
103/*
104 * Define our local driver identity first. Set up stuff to deal with
105 * all the local structures required by a serial tty driver.
106 */
107static char *stl_drvtitle = "Stallion Multiport Serial Driver";
108static char *stl_drvname = "stallion";
109static char *stl_drvversion = "5.6.0";
110
111static struct tty_driver *stl_serial;
112
1da177e4
LT		 113/*
114 * Define a local default termios struct. All ports will be created
115 * with this termios initially. Basically all it defines is a raw port
116 * at 9600, 8 data bits, 1 stop bit.
117 */
606d099c 118static struct ktermios stl_deftermios = {
1da177e4
LT		 119 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
120 .c_cc = INIT_C_CC,
606d099c
AC		 121 .c_ispeed = 9600,
122 .c_ospeed = 9600,
1da177e4
LT		 123};
124
1da177e4
LT		 125/*
126 * Define global place to put buffer overflow characters.
127 */
128static char stl_unwanted[SC26198_RXFIFOSIZE];
129
130/*****************************************************************************/
131
79cfe7ab 132static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 133static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 134
31f35939
AC		 135static const struct tty_port_operations stl_port_ops;
136
1da177e4
LT		 137/*
138 * Per board state flags. Used with the state field of the board struct.
139 * Not really much here!
140 */
141#define BRD_FOUND 0x1
fc06b5cf
JS		 142#define STL_PROBED 0x2
143
1da177e4
LT		 144
145/*
146 * Define the port structure istate flags. These set of flags are
147 * modified at interrupt time - so setting and reseting them needs
148 * to be atomic. Use the bit clear/setting routines for this.
149 */
150#define ASYI_TXBUSY 1
151#define ASYI_TXLOW 2
ccfea3c9 152#define ASYI_TXFLOWED 3
1da177e4
LT		 153
154/*
155 * Define an array of board names as printable strings. Handy for
156 * referencing boards when printing trace and stuff.
157 */
158static char *stl_brdnames[] = {
615e4a71
JS		 159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
178 NULL,
1da177e4
LT		 179 "EasyIO",
180 "EC8/32-AT",
181 "EC8/32-MC",
615e4a71
JS		 182 NULL,
183 NULL,
184 NULL,
1da177e4
LT		 185 "EC8/32-PCI",
186 "EC8/64-PCI",
187 "EasyIO-PCI",
188};
189
190/*****************************************************************************/
191
192/*
193 * Define some string labels for arguments passed from the module
194 * load line. These allow for easy board definitions, and easy
195 * modification of the io, memory and irq resoucres.
196 */
6b2c9457 197static unsigned int stl_nargs;
1da177e4
LT		 198static char *board0[4];
199static char *board1[4];
200static char *board2[4];
201static char *board3[4];
202
203static char **stl_brdsp[] = {
204 (char **) &board0,
205 (char **) &board1,
206 (char **) &board2,
207 (char **) &board3
208};
209
210/*
211 * Define a set of common board names, and types. This is used to
212 * parse any module arguments.
213 */
214
ca7ed0f2 215static struct {
1da177e4
LT		 216 char *name;
217 int type;
ca7ed0f2 218} stl_brdstr[] = {
1da177e4
LT		 219 { "easyio", BRD_EASYIO },
220 { "eio", BRD_EASYIO },
221 { "20", BRD_EASYIO },
222 { "ec8/32", BRD_ECH },
223 { "ec8/32-at", BRD_ECH },
224 { "ec8/32-isa", BRD_ECH },
225 { "ech", BRD_ECH },
226 { "echat", BRD_ECH },
227 { "21", BRD_ECH },
228 { "ec8/32-mc", BRD_ECHMC },
229 { "ec8/32-mca", BRD_ECHMC },
230 { "echmc", BRD_ECHMC },
231 { "echmca", BRD_ECHMC },
232 { "22", BRD_ECHMC },
233 { "ec8/32-pc", BRD_ECHPCI },
234 { "ec8/32-pci", BRD_ECHPCI },
235 { "26", BRD_ECHPCI },
236 { "ec8/64-pc", BRD_ECH64PCI },
237 { "ec8/64-pci", BRD_ECH64PCI },
238 { "ech-pci", BRD_ECH64PCI },
239 { "echpci", BRD_ECH64PCI },
240 { "echpc", BRD_ECH64PCI },
241 { "27", BRD_ECH64PCI },
242 { "easyio-pc", BRD_EASYIOPCI },
243 { "easyio-pci", BRD_EASYIOPCI },
244 { "eio-pci", BRD_EASYIOPCI },
245 { "eiopci", BRD_EASYIOPCI },
246 { "28", BRD_EASYIOPCI },
247};
248
249/*
250 * Define the module agruments.
251 */
1da177e4
LT		 252
253module_param_array(board0, charp, &stl_nargs, 0);
254MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
255module_param_array(board1, charp, &stl_nargs, 0);
256MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
257module_param_array(board2, charp, &stl_nargs, 0);
258MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
259module_param_array(board3, charp, &stl_nargs, 0);
260MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
261
262/*****************************************************************************/
263
264/*
265 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
266 * to the directly accessible io ports of these boards (not the uarts -
267 * they are in cd1400.h and sc26198.h).
268 */
269#define EIO_8PORTRS 0x04
270#define EIO_4PORTRS 0x05
271#define EIO_8PORTDI 0x00
272#define EIO_8PORTM 0x06
273#define EIO_MK3 0x03
274#define EIO_IDBITMASK 0x07
275
276#define EIO_BRDMASK 0xf0
277#define ID_BRD4 0x10
278#define ID_BRD8 0x20
279#define ID_BRD16 0x30
280
281#define EIO_INTRPEND 0x08
282#define EIO_INTEDGE 0x00
283#define EIO_INTLEVEL 0x08
284#define EIO_0WS 0x10
285
286#define ECH_ID 0xa0
287#define ECH_IDBITMASK 0xe0
288#define ECH_BRDENABLE 0x08
289#define ECH_BRDDISABLE 0x00
290#define ECH_INTENABLE 0x01
291#define ECH_INTDISABLE 0x00
292#define ECH_INTLEVEL 0x02
293#define ECH_INTEDGE 0x00
294#define ECH_INTRPEND 0x01
295#define ECH_BRDRESET 0x01
296
297#define ECHMC_INTENABLE 0x01
298#define ECHMC_BRDRESET 0x02
299
300#define ECH_PNLSTATUS 2
301#define ECH_PNL16PORT 0x20
302#define ECH_PNLIDMASK 0x07
303#define ECH_PNLXPID 0x40
304#define ECH_PNLINTRPEND 0x80
305
306#define ECH_ADDR2MASK 0x1e0
307
308/*
309 * Define the vector mapping bits for the programmable interrupt board
310 * hardware. These bits encode the interrupt for the board to use - it
311 * is software selectable (except the EIO-8M).
312 */
313static unsigned char stl_vecmap[] = {
314 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
315 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
316};
317
b65b5b59
AC		 318/*
319 * Lock ordering is that you may not take stallion_lock holding
320 * brd_lock.
321 */
322
323static spinlock_t brd_lock; /* Guard the board mapping */
324static spinlock_t stallion_lock; /* Guard the tty driver */
325
1da177e4
LT		 326/*
327 * Set up enable and disable macros for the ECH boards. They require
328 * the secondary io address space to be activated and deactivated.
329 * This way all ECH boards can share their secondary io region.
330 * If this is an ECH-PCI board then also need to set the page pointer
331 * to point to the correct page.
332 */
333#define BRDENABLE(brdnr,pagenr) \
334 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
335 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
336 stl_brds[(brdnr)]->ioctrl); \
337 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
338 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
339
340#define BRDDISABLE(brdnr) \
341 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
342 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
343 stl_brds[(brdnr)]->ioctrl);
344
345#define STL_CD1400MAXBAUD 230400
346#define STL_SC26198MAXBAUD 460800
347
348#define STL_BAUDBASE 115200
349#define STL_CLOSEDELAY (5 * HZ / 10)
350
351/*****************************************************************************/
352
1da177e4
LT		 353/*
354 * Define the Stallion PCI vendor and device IDs.
355 */
356#ifndef PCI_VENDOR_ID_STALLION
357#define PCI_VENDOR_ID_STALLION 0x124d
358#endif
359#ifndef PCI_DEVICE_ID_ECHPCI832
360#define PCI_DEVICE_ID_ECHPCI832 0x0000
361#endif
362#ifndef PCI_DEVICE_ID_ECHPCI864
363#define PCI_DEVICE_ID_ECHPCI864 0x0002
364#endif
365#ifndef PCI_DEVICE_ID_EIOPCI
366#define PCI_DEVICE_ID_EIOPCI 0x0003
367#endif
368
369/*
370 * Define structure to hold all Stallion PCI boards.
371 */
1da177e4 372
b1b84fe0
JS		 373static struct pci_device_id stl_pcibrds[] = {
374 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
375 .driver_data = BRD_ECH64PCI },
376 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
377 .driver_data = BRD_EASYIOPCI },
378 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
379 .driver_data = BRD_ECHPCI },
380 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
381 .driver_data = BRD_ECHPCI },
382 { }
383};
384MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 385
386/*****************************************************************************/
387
388/*
389 * Define macros to extract a brd/port number from a minor number.
390 */
391#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
392#define MINOR2PORT(min) ((min) & 0x3f)
393
394/*
395 * Define a baud rate table that converts termios baud rate selector
396 * into the actual baud rate value. All baud rate calculations are
397 * based on the actual baud rate required.
398 */
399static unsigned int stl_baudrates[] = {
400 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
401 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
402};
403
1da177e4
LT		 404/*****************************************************************************/
405
406/*
407 * Declare all those functions in this driver!
408 */
409
894cb917 410static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 411static int stl_brdinit(struct stlbrd *brdp);
d18a750f 412static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 413static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 414
1da177e4
LT		 415/*
416 * CD1400 uart specific handling functions.
417 */
ca7ed0f2
JS		 418static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400getreg(struct stlport *portp, int regnr);
420static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
421static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
422static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 423static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 424static int stl_cd1400getsignals(struct stlport *portp);
425static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
426static void stl_cd1400ccrwait(struct stlport *portp);
427static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
428static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
429static void stl_cd1400disableintrs(struct stlport *portp);
430static void stl_cd1400sendbreak(struct stlport *portp, int len);
431static void stl_cd1400flowctrl(struct stlport *portp, int state);
432static void stl_cd1400sendflow(struct stlport *portp, int state);
433static void stl_cd1400flush(struct stlport *portp);
434static int stl_cd1400datastate(struct stlport *portp);
435static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
436static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
437static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
438static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
439static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
440
441static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 442
443/*
444 * SC26198 uart specific handling functions.
445 */
ca7ed0f2
JS		 446static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getreg(struct stlport *portp, int regnr);
448static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
449static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
450static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
451static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 452static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 453static int stl_sc26198getsignals(struct stlport *portp);
454static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
455static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
456static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
457static void stl_sc26198disableintrs(struct stlport *portp);
458static void stl_sc26198sendbreak(struct stlport *portp, int len);
459static void stl_sc26198flowctrl(struct stlport *portp, int state);
460static void stl_sc26198sendflow(struct stlport *portp, int state);
461static void stl_sc26198flush(struct stlport *portp);
462static int stl_sc26198datastate(struct stlport *portp);
463static void stl_sc26198wait(struct stlport *portp);
464static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
465static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
466static void stl_sc26198txisr(struct stlport *port);
467static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
468static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
469static void stl_sc26198rxbadchars(struct stlport *portp);
470static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 471
472/*****************************************************************************/
473
474/*
475 * Generic UART support structure.
476 */
477typedef struct uart {
ca7ed0f2
JS		 478 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
479 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 480 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 481 int (*getsignals)(struct stlport *portp);
482 void (*setsignals)(struct stlport *portp, int dtr, int rts);
483 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
484 void (*startrxtx)(struct stlport *portp, int rx, int tx);
485 void (*disableintrs)(struct stlport *portp);
486 void (*sendbreak)(struct stlport *portp, int len);
487 void (*flowctrl)(struct stlport *portp, int state);
488 void (*sendflow)(struct stlport *portp, int state);
489 void (*flush)(struct stlport *portp);
490 int (*datastate)(struct stlport *portp);
491 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 492} uart_t;
493
494/*
495 * Define some macros to make calling these functions nice and clean.
496 */
497#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
498#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
499#define stl_setport (* ((uart_t *) portp->uartp)->setport)
500#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
501#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
502#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
503#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
504#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
505#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
506#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
507#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
508#define stl_flush (* ((uart_t *) portp->uartp)->flush)
509#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
510
511/*****************************************************************************/
512
513/*
514 * CD1400 UART specific data initialization.
515 */
516static uart_t stl_cd1400uart = {
517 stl_cd1400panelinit,
518 stl_cd1400portinit,
519 stl_cd1400setport,
520 stl_cd1400getsignals,
521 stl_cd1400setsignals,
522 stl_cd1400enablerxtx,
523 stl_cd1400startrxtx,
524 stl_cd1400disableintrs,
525 stl_cd1400sendbreak,
526 stl_cd1400flowctrl,
527 stl_cd1400sendflow,
528 stl_cd1400flush,
529 stl_cd1400datastate,
530 stl_cd1400eiointr
531};
532
533/*
534 * Define the offsets within the register bank of a cd1400 based panel.
535 * These io address offsets are common to the EasyIO board as well.
536 */
537#define EREG_ADDR 0
538#define EREG_DATA 4
539#define EREG_RXACK 5
540#define EREG_TXACK 6
541#define EREG_MDACK 7
542
543#define EREG_BANKSIZE 8
544
545#define CD1400_CLK 25000000
546#define CD1400_CLK8M 20000000
547
548/*
549 * Define the cd1400 baud rate clocks. These are used when calculating
550 * what clock and divisor to use for the required baud rate. Also
551 * define the maximum baud rate allowed, and the default base baud.
552 */
553static int stl_cd1400clkdivs[] = {
554 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
555};
556
557/*****************************************************************************/
558
559/*
560 * SC26198 UART specific data initization.
561 */
562static uart_t stl_sc26198uart = {
563 stl_sc26198panelinit,
564 stl_sc26198portinit,
565 stl_sc26198setport,
566 stl_sc26198getsignals,
567 stl_sc26198setsignals,
568 stl_sc26198enablerxtx,
569 stl_sc26198startrxtx,
570 stl_sc26198disableintrs,
571 stl_sc26198sendbreak,
572 stl_sc26198flowctrl,
573 stl_sc26198sendflow,
574 stl_sc26198flush,
575 stl_sc26198datastate,
576 stl_sc26198intr
577};
578
579/*
580 * Define the offsets within the register bank of a sc26198 based panel.
581 */
582#define XP_DATA 0
583#define XP_ADDR 1
584#define XP_MODID 2
585#define XP_STATUS 2
586#define XP_IACK 3
587
588#define XP_BANKSIZE 4
589
590/*
591 * Define the sc26198 baud rate table. Offsets within the table
592 * represent the actual baud rate selector of sc26198 registers.
593 */
594static unsigned int sc26198_baudtable[] = {
595 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
596 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
597 230400, 460800, 921600
598};
599
fe971071 600#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 601
602/*****************************************************************************/
603
604/*
605 * Define the driver info for a user level control device. Used mainly
606 * to get at port stats - only not using the port device itself.
607 */
62322d25 608static const struct file_operations stl_fsiomem = {
1da177e4 609 .owner = THIS_MODULE,
894cb917 610 .unlocked_ioctl = stl_memioctl,
1da177e4
LT		 611};
612
ca8eca68 613static struct class *stallion_class;
1da177e4 614
ccfea3c9
JS		 615static void stl_cd_change(struct stlport *portp)
616{
617 unsigned int oldsigs = portp->sigs;
d18a750f 618 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 619
d18a750f 620 if (!tty)
ccfea3c9
JS		 621 return;
622
623 portp->sigs = stl_getsignals(portp);
624
625 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 626 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 627
628 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 629 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 630 tty_hangup(tty);
631 tty_kref_put(tty);
ccfea3c9
JS		 632}
633
1da177e4
LT		 634/*
635 * Check for any arguments passed in on the module load command line.
636 */
637
1da177e4
LT		 638/*****************************************************************************/
639
1da177e4
LT		 640/*
641 * Parse the supplied argument string, into the board conf struct.
642 */
643
40e82652 644static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 645{
646 char *sp;
6b2c9457 647 unsigned int i;
1da177e4 648
a0564e14 649 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 650
615e4a71 651 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 652 return 0;
1da177e4 653
c62429d9 654 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 655 *sp = tolower(*sp);
1da177e4 656
c62429d9 657 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 658 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
659 break;
c62429d9 660
fe971071 661 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 662 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 663 return 0;
1da177e4
LT		 664 }
665
666 confp->brdtype = stl_brdstr[i].type;
667
668 i = 1;
615e4a71 669 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 670 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 671 i++;
672 if (confp->brdtype == BRD_ECH) {
615e4a71 673 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 674 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 675 i++;
676 }
615e4a71 677 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 678 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 679 return 1;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
1da177e4
LT		 684/*
685 * Allocate a new board structure. Fill out the basic info in it.
686 */
687
ca7ed0f2 688static struct stlbrd *stl_allocbrd(void)
1da177e4 689{
ca7ed0f2 690 struct stlbrd *brdp;
1da177e4 691
ca7ed0f2 692 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 693 if (!brdp) {
b65b5b59 694 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 695 sizeof(struct stlbrd));
b0b4ed72 696 return NULL;
1da177e4
LT		 697 }
698
1da177e4 699 brdp->magic = STL_BOARDMAGIC;
014c2544 700 return brdp;
1da177e4
LT		 701}
702
703/*****************************************************************************/
704
047e9658
AC		 705static int stl_activate(struct tty_port *port, struct tty_struct *tty)
706{
707 struct stlport *portp = container_of(port, struct stlport, port);
708 if (!portp->tx.buf) {
709 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
710 if (!portp->tx.buf)
711 return -ENOMEM;
712 portp->tx.head = portp->tx.buf;
713 portp->tx.tail = portp->tx.buf;
714 }
715 stl_setport(portp, tty->termios);
716 portp->sigs = stl_getsignals(portp);
717 stl_setsignals(portp, 1, 1);
718 stl_enablerxtx(portp, 1, 1);
719 stl_startrxtx(portp, 1, 0);
720 return 0;
721}
722
1da177e4
LT		 723static int stl_open(struct tty_struct *tty, struct file *filp)
724{
ca7ed0f2
JS		 725 struct stlport *portp;
726 struct stlbrd *brdp;
6b2c9457 727 unsigned int minordev, brdnr, panelnr;
4350f3ff 728 int portnr;
1da177e4 729
a0564e14 730 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 731
732 minordev = tty->index;
733 brdnr = MINOR2BRD(minordev);
734 if (brdnr >= stl_nrbrds)
014c2544 735 return -ENODEV;
1da177e4 736 brdp = stl_brds[brdnr];
615e4a71 737 if (brdp == NULL)
014c2544 738 return -ENODEV;
4350f3ff 739
1da177e4 740 minordev = MINOR2PORT(minordev);
c62429d9 741 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 742 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 743 break;
744 if (minordev < brdp->panels[panelnr]->nrports) {
745 portnr = minordev;
746 break;
747 }
748 minordev -= brdp->panels[panelnr]->nrports;
749 }
750 if (portnr < 0)
014c2544 751 return -ENODEV;
1da177e4
LT		 752
753 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 754 if (portp == NULL)
014c2544 755 return -ENODEV;
a2d1e351
AC		 756
757 tty->driver_data = portp;
047e9658 758 return tty_port_open(&portp->port, tty, filp);
1da177e4 759
1da177e4
LT		 760}
761
762/*****************************************************************************/
763
31f35939
AC		 764static int stl_carrier_raised(struct tty_port *port)
765{
766 struct stlport *portp = container_of(port, struct stlport, port);
767 return (portp->sigs & TIOCM_CD) ? 1 : 0;
768}
769
fcc8ac18 770static void stl_dtr_rts(struct tty_port *port, int on)
1da177e4 771{
4350f3ff
AC		 772 struct stlport *portp = container_of(port, struct stlport, port);
773 /* Takes brd_lock internally */
fcc8ac18 774 stl_setsignals(portp, on, on);
1da177e4
LT		 775}
776
777/*****************************************************************************/
778
96b066b8
JS		 779static void stl_flushbuffer(struct tty_struct *tty)
780{
781 struct stlport *portp;
782
783 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
784
96b066b8
JS		 785 portp = tty->driver_data;
786 if (portp == NULL)
787 return;
788
789 stl_flush(portp);
790 tty_wakeup(tty);
791}
792
793/*****************************************************************************/
794
795static void stl_waituntilsent(struct tty_struct *tty, int timeout)
796{
797 struct stlport *portp;
798 unsigned long tend;
799
800 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
801
96b066b8
JS		 802 portp = tty->driver_data;
803 if (portp == NULL)
804 return;
805
806 if (timeout == 0)
807 timeout = HZ;
808 tend = jiffies + timeout;
809
978e595f 810 lock_kernel();
96b066b8
JS		 811 while (stl_datastate(portp)) {
812 if (signal_pending(current))
813 break;
814 msleep_interruptible(20);
815 if (time_after_eq(jiffies, tend))
816 break;
817 }
978e595f 818 unlock_kernel();
96b066b8
JS		 819}
820
821/*****************************************************************************/
822
047e9658 823static void stl_shutdown(struct tty_port *port)
1da177e4 824{
047e9658 825 struct stlport *portp = container_of(port, struct stlport, port);
1da177e4 826 stl_disableintrs(portp);
1da177e4 827 stl_enablerxtx(portp, 0, 0);
047e9658 828 stl_flush(portp);
1da177e4 829 portp->istate = 0;
615e4a71 830 if (portp->tx.buf != NULL) {
1da177e4 831 kfree(portp->tx.buf);
615e4a71
JS		 832 portp->tx.buf = NULL;
833 portp->tx.head = NULL;
834 portp->tx.tail = NULL;
1da177e4 835 }
047e9658
AC		 836}
837
838static void stl_close(struct tty_struct *tty, struct file *filp)
839{
840 struct stlport*portp;
841 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4 842
047e9658 843 portp = tty->driver_data;
a2d1e351
AC		 844 if(portp == NULL)
845 return;
047e9658 846 tty_port_close(&portp->port, tty, filp);
1da177e4
LT		 847}
848
849/*****************************************************************************/
850
851/*
852 * Write routine. Take data and stuff it in to the TX ring queue.
853 * If transmit interrupts are not running then start them.
854 */
855
856static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
857{
ca7ed0f2 858 struct stlport *portp;
1da177e4
LT		 859 unsigned int len, stlen;
860 unsigned char *chbuf;
861 char *head, *tail;
862
a0564e14 863 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 864
1da177e4 865 portp = tty->driver_data;
615e4a71 866 if (portp == NULL)
014c2544 867 return 0;
615e4a71 868 if (portp->tx.buf == NULL)
014c2544 869 return 0;
1da177e4
LT		 870
871/*
872 * If copying direct from user space we must cater for page faults,
873 * causing us to "sleep" here for a while. To handle this copy in all
874 * the data we need now, into a local buffer. Then when we got it all
875 * copy it into the TX buffer.
876 */
877 chbuf = (unsigned char *) buf;
878
879 head = portp->tx.head;
880 tail = portp->tx.tail;
881 if (head >= tail) {
882 len = STL_TXBUFSIZE - (head - tail) - 1;
883 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
884 } else {
885 len = tail - head - 1;
886 stlen = len;
887 }
888
843b568c 889 len = min(len, (unsigned int)count);
1da177e4
LT		 890 count = 0;
891 while (len > 0) {
843b568c 892 stlen = min(len, stlen);
1da177e4
LT		 893 memcpy(head, chbuf, stlen);
894 len -= stlen;
895 chbuf += stlen;
896 count += stlen;
897 head += stlen;
898 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
899 head = portp->tx.buf;
900 stlen = tail - head;
901 }
902 }
903 portp->tx.head = head;
904
905 clear_bit(ASYI_TXLOW, &portp->istate);
906 stl_startrxtx(portp, -1, 1);
907
014c2544 908 return count;
1da177e4
LT		 909}
910
911/*****************************************************************************/
912
4a561222 913static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 914{
ca7ed0f2 915 struct stlport *portp;
1da177e4
LT		 916 unsigned int len;
917 char *head, *tail;
918
a0564e14 919 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 920
1da177e4 921 portp = tty->driver_data;
615e4a71 922 if (portp == NULL)
4a561222 923 return -EINVAL;
615e4a71 924 if (portp->tx.buf == NULL)
4a561222 925 return -EINVAL;
1da177e4
LT		 926
927 head = portp->tx.head;
928 tail = portp->tx.tail;
929
930 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
931 len--;
932
933 if (len > 0) {
934 *head++ = ch;
935 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
936 head = portp->tx.buf;
937 }
938 portp->tx.head = head;
4a561222 939 return 0;
1da177e4
LT		 940}
941
942/*****************************************************************************/
943
944/*
945 * If there are any characters in the buffer then make sure that TX
946 * interrupts are on and get'em out. Normally used after the putchar
947 * routine has been called.
948 */
949
950static void stl_flushchars(struct tty_struct *tty)
951{
ca7ed0f2 952 struct stlport *portp;
1da177e4 953
a0564e14 954 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 955
1da177e4 956 portp = tty->driver_data;
615e4a71 957 if (portp == NULL)
1da177e4 958 return;
615e4a71 959 if (portp->tx.buf == NULL)
1da177e4
LT		 960 return;
961
1da177e4
LT		 962 stl_startrxtx(portp, -1, 1);
963}
964
965/*****************************************************************************/
966
967static int stl_writeroom(struct tty_struct *tty)
968{
ca7ed0f2 969 struct stlport *portp;
1da177e4
LT		 970 char *head, *tail;
971
a0564e14 972 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 973
1da177e4 974 portp = tty->driver_data;
615e4a71 975 if (portp == NULL)
014c2544 976 return 0;
615e4a71 977 if (portp->tx.buf == NULL)
014c2544 978 return 0;
1da177e4
LT		 979
980 head = portp->tx.head;
981 tail = portp->tx.tail;
c62429d9 982 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 983}
984
985/*****************************************************************************/
986
987/*
988 * Return number of chars in the TX buffer. Normally we would just
989 * calculate the number of chars in the buffer and return that, but if
990 * the buffer is empty and TX interrupts are still on then we return
991 * that the buffer still has 1 char in it. This way whoever called us
992 * will not think that ALL chars have drained - since the UART still
993 * must have some chars in it (we are busy after all).
994 */
995
996static int stl_charsinbuffer(struct tty_struct *tty)
997{
ca7ed0f2 998 struct stlport *portp;
1da177e4
LT		 999 unsigned int size;
1000 char *head, *tail;
1001
a0564e14 1002 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1003
1da177e4 1004 portp = tty->driver_data;
615e4a71 1005 if (portp == NULL)
014c2544 1006 return 0;
615e4a71 1007 if (portp->tx.buf == NULL)
014c2544 1008 return 0;
1da177e4
LT		 1009
1010 head = portp->tx.head;
1011 tail = portp->tx.tail;
1012 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1013 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1014 size = 1;
014c2544 1015 return size;
1da177e4
LT		 1016}
1017
1018/*****************************************************************************/
1019
1020/*
1021 * Generate the serial struct info.
1022 */
1023
ca7ed0f2 1024static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1025{
1026 struct serial_struct sio;
ca7ed0f2 1027 struct stlbrd *brdp;
1da177e4 1028
a0564e14 1029 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1030
1031 memset(&sio, 0, sizeof(struct serial_struct));
1032 sio.line = portp->portnr;
1033 sio.port = portp->ioaddr;
f8ae4764 1034 sio.flags = portp->port.flags;
1da177e4
LT		 1035 sio.baud_base = portp->baud_base;
1036 sio.close_delay = portp->close_delay;
1037 sio.closing_wait = portp->closing_wait;
1038 sio.custom_divisor = portp->custom_divisor;
1039 sio.hub6 = 0;
1040 if (portp->uartp == &stl_cd1400uart) {
1041 sio.type = PORT_CIRRUS;
1042 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1043 } else {
1044 sio.type = PORT_UNKNOWN;
1045 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1046 }
1047
1048 brdp = stl_brds[portp->brdnr];
615e4a71 1049 if (brdp != NULL)
1da177e4
LT		 1050 sio.irq = brdp->irq;
1051
1052 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1053}
1054
1055/*****************************************************************************/
1056
1057/*
1058 * Set port according to the serial struct info.
1059 * At this point we do not do any auto-configure stuff, so we will
1060 * just quietly ignore any requests to change irq, etc.
1061 */
1062
d18a750f 1063static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1064{
d18a750f 1065 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1066 struct serial_struct sio;
1067
a0564e14 1068 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1069
1070 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1071 return -EFAULT;
1072 if (!capable(CAP_SYS_ADMIN)) {
1073 if ((sio.baud_base != portp->baud_base) ||
1074 (sio.close_delay != portp->close_delay) ||
1075 ((sio.flags & ~ASYNC_USR_MASK) !=
f8ae4764 1076 (portp->port.flags & ~ASYNC_USR_MASK)))
014c2544 1077 return -EPERM;
1da177e4
LT		 1078 }
1079
f8ae4764 1080 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1081 (sio.flags & ASYNC_USR_MASK);
1082 portp->baud_base = sio.baud_base;
1083 portp->close_delay = sio.close_delay;
1084 portp->closing_wait = sio.closing_wait;
1085 portp->custom_divisor = sio.custom_divisor;
d18a750f 1086 stl_setport(portp, tty->termios);
014c2544 1087 return 0;
1da177e4
LT		 1088}
1089
1090/*****************************************************************************/
1091
1092static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1093{
ca7ed0f2 1094 struct stlport *portp;
1da177e4 1095
1da177e4 1096 portp = tty->driver_data;
615e4a71 1097 if (portp == NULL)
014c2544 1098 return -ENODEV;
1da177e4 1099 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1100 return -EIO;
1da177e4
LT		 1101
1102 return stl_getsignals(portp);
1103}
1104
1105static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1106 unsigned int set, unsigned int clear)
1107{
ca7ed0f2 1108 struct stlport *portp;
1da177e4
LT		 1109 int rts = -1, dtr = -1;
1110
1da177e4 1111 portp = tty->driver_data;
615e4a71 1112 if (portp == NULL)
014c2544 1113 return -ENODEV;
1da177e4 1114 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1115 return -EIO;
1da177e4
LT		 1116
1117 if (set & TIOCM_RTS)
1118 rts = 1;
1119 if (set & TIOCM_DTR)
1120 dtr = 1;
1121 if (clear & TIOCM_RTS)
1122 rts = 0;
1123 if (clear & TIOCM_DTR)
1124 dtr = 0;
1125
1126 stl_setsignals(portp, dtr, rts);
1127 return 0;
1128}
1129
1130static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1131{
ca7ed0f2 1132 struct stlport *portp;
1da177e4
LT		 1133 int rc;
1134 void __user *argp = (void __user *)arg;
1135
a0564e14
JS		 1136 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1137 arg);
1da177e4 1138
1da177e4 1139 portp = tty->driver_data;
615e4a71 1140 if (portp == NULL)
014c2544 1141 return -ENODEV;
1da177e4
LT		 1142
1143 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1144 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1145 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1146 return -EIO;
1da177e4
LT		 1147
1148 rc = 0;
1149
f433c65b
AC		 1150 lock_kernel();
1151
1da177e4 1152 switch (cmd) {
1da177e4
LT		 1153 case TIOCGSERIAL:
1154 rc = stl_getserial(portp, argp);
1155 break;
1156 case TIOCSSERIAL:
d18a750f 1157 rc = stl_setserial(tty, argp);
1da177e4
LT		 1158 break;
1159 case COM_GETPORTSTATS:
d18a750f 1160 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1161 break;
1162 case COM_CLRPORTSTATS:
1163 rc = stl_clrportstats(portp, argp);
1164 break;
1165 case TIOCSERCONFIG:
1166 case TIOCSERGWILD:
1167 case TIOCSERSWILD:
1168 case TIOCSERGETLSR:
1169 case TIOCSERGSTRUCT:
1170 case TIOCSERGETMULTI:
1171 case TIOCSERSETMULTI:
1172 default:
1173 rc = -ENOIOCTLCMD;
1174 break;
1175 }
f433c65b 1176 unlock_kernel();
014c2544 1177 return rc;
1da177e4
LT		 1178}
1179
1180/*****************************************************************************/
1181
96b066b8
JS		 1182/*
1183 * Start the transmitter again. Just turn TX interrupts back on.
1184 */
1185
1186static void stl_start(struct tty_struct *tty)
1187{
1188 struct stlport *portp;
1189
1190 pr_debug("stl_start(tty=%p)\n", tty);
1191
96b066b8
JS		 1192 portp = tty->driver_data;
1193 if (portp == NULL)
1194 return;
1195 stl_startrxtx(portp, -1, 1);
1196}
1197
1198/*****************************************************************************/
1199
606d099c 1200static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1201{
ca7ed0f2 1202 struct stlport *portp;
606d099c 1203 struct ktermios *tiosp;
1da177e4 1204
a0564e14 1205 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1206
1da177e4 1207 portp = tty->driver_data;
615e4a71 1208 if (portp == NULL)
1da177e4
LT		 1209 return;
1210
1211 tiosp = tty->termios;
1212 if ((tiosp->c_cflag == old->c_cflag) &&
1213 (tiosp->c_iflag == old->c_iflag))
1214 return;
1215
1216 stl_setport(portp, tiosp);
1217 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1218 -1);
1219 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1220 tty->hw_stopped = 0;
1221 stl_start(tty);
1222 }
1223 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1224 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1225}
1226
1227/*****************************************************************************/
1228
1229/*
1230 * Attempt to flow control who ever is sending us data. Based on termios
1231 * settings use software or/and hardware flow control.
1232 */
1233
1234static void stl_throttle(struct tty_struct *tty)
1235{
ca7ed0f2 1236 struct stlport *portp;
1da177e4 1237
a0564e14 1238 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1239
1da177e4 1240 portp = tty->driver_data;
615e4a71 1241 if (portp == NULL)
1da177e4
LT		 1242 return;
1243 stl_flowctrl(portp, 0);
1244}
1245
1246/*****************************************************************************/
1247
1248/*
1249 * Unflow control the device sending us data...
1250 */
1251
1252static void stl_unthrottle(struct tty_struct *tty)
1253{
ca7ed0f2 1254 struct stlport *portp;
1da177e4 1255
a0564e14 1256 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1257
1da177e4 1258 portp = tty->driver_data;
615e4a71 1259 if (portp == NULL)
1da177e4
LT		 1260 return;
1261 stl_flowctrl(portp, 1);
1262}
1263
1264/*****************************************************************************/
1265
1266/*
1267 * Stop the transmitter. Basically to do this we will just turn TX
1268 * interrupts off.
1269 */
1270
1271static void stl_stop(struct tty_struct *tty)
1272{
ca7ed0f2 1273 struct stlport *portp;
1da177e4 1274
a0564e14 1275 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1276
1da177e4 1277 portp = tty->driver_data;
615e4a71 1278 if (portp == NULL)
1da177e4
LT		 1279 return;
1280 stl_startrxtx(portp, -1, 0);
1281}
1282
1283/*****************************************************************************/
1284
1da177e4
LT		 1285/*
1286 * Hangup this port. This is pretty much like closing the port, only
1287 * a little more brutal. No waiting for data to drain. Shutdown the
1288 * port and maybe drop signals.
1289 */
1290
1291static void stl_hangup(struct tty_struct *tty)
1292{
047e9658 1293 struct stlport *portp = tty->driver_data;
a0564e14 1294 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1295
615e4a71 1296 if (portp == NULL)
1da177e4 1297 return;
047e9658 1298 tty_port_hangup(&portp->port);
1da177e4
LT		 1299}
1300
1301/*****************************************************************************/
1302
4a561222 1303static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1304{
ca7ed0f2 1305 struct stlport *portp;
1da177e4 1306
a0564e14 1307 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1308
1da177e4 1309 portp = tty->driver_data;
615e4a71 1310 if (portp == NULL)
4a561222 1311 return -EINVAL;
1da177e4
LT		 1312
1313 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1314 return 0;
1da177e4
LT		 1315}
1316
1317/*****************************************************************************/
1318
1da177e4
LT		 1319static void stl_sendxchar(struct tty_struct *tty, char ch)
1320{
ca7ed0f2 1321 struct stlport *portp;
1da177e4 1322
a0564e14 1323 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1324
1da177e4 1325 portp = tty->driver_data;
615e4a71 1326 if (portp == NULL)
1da177e4
LT		 1327 return;
1328
1329 if (ch == STOP_CHAR(tty))
1330 stl_sendflow(portp, 0);
1331 else if (ch == START_CHAR(tty))
1332 stl_sendflow(portp, 1);
1333 else
1334 stl_putchar(tty, ch);
1335}
1336
8561c44c 1337static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr)
1da177e4 1338{
8561c44c
AD		 1339 int sigs;
1340 char sep;
1da177e4 1341
8561c44c 1342 seq_printf(m, "%d: uart:%s tx:%d rx:%d",
1da177e4
LT		 1343 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1344 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1345
1346 if (portp->stats.rxframing)
8561c44c 1347 seq_printf(m, " fe:%d", (int) portp->stats.rxframing);
1da177e4 1348 if (portp->stats.rxparity)
8561c44c 1349 seq_printf(m, " pe:%d", (int) portp->stats.rxparity);
1da177e4 1350 if (portp->stats.rxbreaks)
8561c44c 1351 seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks);
1da177e4 1352 if (portp->stats.rxoverrun)
8561c44c 1353 seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun);
1da177e4
LT		 1354
1355 sigs = stl_getsignals(portp);
8561c44c
AD		 1356 sep = ' ';
1357 if (sigs & TIOCM_RTS) {
1358 seq_printf(m, "%c%s", sep, "RTS");
1359 sep = '|';
1360 }
1361 if (sigs & TIOCM_CTS) {
1362 seq_printf(m, "%c%s", sep, "CTS");
1363 sep = '|';
1364 }
1365 if (sigs & TIOCM_DTR) {
1366 seq_printf(m, "%c%s", sep, "DTR");
1367 sep = '|';
1368 }
1369 if (sigs & TIOCM_CD) {
1370 seq_printf(m, "%c%s", sep, "DCD");
1371 sep = '|';
1372 }
1373 if (sigs & TIOCM_DSR) {
1374 seq_printf(m, "%c%s", sep, "DSR");
1375 sep = '|';
1376 }
1377 seq_putc(m, '\n');
1da177e4
LT		 1378}
1379
1380/*****************************************************************************/
1381
1382/*
1383 * Port info, read from the /proc file system.
1384 */
1385
8561c44c 1386static int stl_proc_show(struct seq_file *m, void *v)
1da177e4 1387{
ca7ed0f2
JS		 1388 struct stlbrd *brdp;
1389 struct stlpanel *panelp;
1390 struct stlport *portp;
6b2c9457 1391 unsigned int brdnr, panelnr, portnr;
8561c44c 1392 int totalport;
1da177e4 1393
1da177e4 1394 totalport = 0;
8561c44c
AD		 1395
1396 seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion);
1da177e4
LT		 1397
1398/*
1399 * We scan through for each board, panel and port. The offset is
1400 * calculated on the fly, and irrelevant ports are skipped.
1401 */
c62429d9 1402 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1403 brdp = stl_brds[brdnr];
615e4a71 1404 if (brdp == NULL)
1da177e4
LT		 1405 continue;
1406 if (brdp->state == 0)
1407 continue;
1408
1da177e4 1409 totalport = brdnr * STL_MAXPORTS;
c62429d9 1410 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1411 panelp = brdp->panels[panelnr];
615e4a71 1412 if (panelp == NULL)
1da177e4
LT		 1413 continue;
1414
c62429d9 1415 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1416 totalport++) {
1417 portp = panelp->ports[portnr];
615e4a71 1418 if (portp == NULL)
1da177e4 1419 continue;
8561c44c 1420 stl_portinfo(m, portp, totalport);
1da177e4
LT		 1421 }
1422 }
1423 }
8561c44c
AD		 1424 return 0;
1425}
1da177e4 1426
8561c44c
AD		 1427static int stl_proc_open(struct inode *inode, struct file *file)
1428{
1429 return single_open(file, stl_proc_show, NULL);
1da177e4
LT		 1430}
1431
8561c44c
AD		 1432static const struct file_operations stl_proc_fops = {
1433 .owner = THIS_MODULE,
1434 .open = stl_proc_open,
1435 .read = seq_read,
1436 .llseek = seq_lseek,
1437 .release = single_release,
1438};
1439
1da177e4
LT		 1440/*****************************************************************************/
1441
1442/*
1443 * All board interrupts are vectored through here first. This code then
1444 * calls off to the approrpriate board interrupt handlers.
1445 */
1446
7d12e780 1447static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1448{
ca7ed0f2 1449 struct stlbrd *brdp = dev_id;
1da177e4 1450
a6f97b29 1451 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1452
1453 return IRQ_RETVAL((* brdp->isr)(brdp));
1454}
1455
1456/*****************************************************************************/
1457
1458/*
1459 * Interrupt service routine for EasyIO board types.
1460 */
1461
ca7ed0f2 1462static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1463{
ca7ed0f2 1464 struct stlpanel *panelp;
1da177e4
LT		 1465 unsigned int iobase;
1466 int handled = 0;
1467
b65b5b59 1468 spin_lock(&brd_lock);
1da177e4
LT		 1469 panelp = brdp->panels[0];
1470 iobase = panelp->iobase;
1471 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1472 handled = 1;
1473 (* panelp->isr)(panelp, iobase);
1474 }
b65b5b59 1475 spin_unlock(&brd_lock);
1da177e4
LT		 1476 return handled;
1477}
1478
1479/*****************************************************************************/
1480
1481/*
1482 * Interrupt service routine for ECH-AT board types.
1483 */
1484
ca7ed0f2 1485static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1486{
ca7ed0f2 1487 struct stlpanel *panelp;
6b2c9457 1488 unsigned int ioaddr, bnknr;
1da177e4
LT		 1489 int handled = 0;
1490
1491 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1492
1493 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1494 handled = 1;
c62429d9 1495 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1496 ioaddr = brdp->bnkstataddr[bnknr];
1497 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1498 panelp = brdp->bnk2panel[bnknr];
1499 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1500 }
1501 }
1502 }
1503
1504 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1505
1506 return handled;
1507}
1508
1509/*****************************************************************************/
1510
1511/*
1512 * Interrupt service routine for ECH-MCA board types.
1513 */
1514
ca7ed0f2 1515static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1516{
ca7ed0f2 1517 struct stlpanel *panelp;
6b2c9457 1518 unsigned int ioaddr, bnknr;
1da177e4
LT		 1519 int handled = 0;
1520
1521 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1522 handled = 1;
c62429d9 1523 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1524 ioaddr = brdp->bnkstataddr[bnknr];
1525 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1526 panelp = brdp->bnk2panel[bnknr];
1527 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1528 }
1529 }
1530 }
1531 return handled;
1532}
1533
1534/*****************************************************************************/
1535
1536/*
1537 * Interrupt service routine for ECH-PCI board types.
1538 */
1539
ca7ed0f2 1540static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1541{
ca7ed0f2 1542 struct stlpanel *panelp;
6b2c9457 1543 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1544 int handled = 0;
1545
1546 while (1) {
1547 recheck = 0;
c62429d9 1548 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1549 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1550 ioaddr = brdp->bnkstataddr[bnknr];
1551 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1552 panelp = brdp->bnk2panel[bnknr];
1553 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1554 recheck++;
1555 handled = 1;
1556 }
1557 }
1558 if (! recheck)
1559 break;
1560 }
1561 return handled;
1562}
1563
1564/*****************************************************************************/
1565
1566/*
1567 * Interrupt service routine for ECH-8/64-PCI board types.
1568 */
1569
ca7ed0f2 1570static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1571{
ca7ed0f2 1572 struct stlpanel *panelp;
6b2c9457 1573 unsigned int ioaddr, bnknr;
1da177e4
LT		 1574 int handled = 0;
1575
1576 while (inb(brdp->ioctrl) & 0x1) {
1577 handled = 1;
c62429d9 1578 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1579 ioaddr = brdp->bnkstataddr[bnknr];
1580 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1581 panelp = brdp->bnk2panel[bnknr];
1582 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1583 }
1584 }
1585 }
1586
1587 return handled;
1588}
1589
1590/*****************************************************************************/
1591
1da177e4
LT		 1592/*
1593 * Initialize all the ports on a panel.
1594 */
1595
705c1862 1596static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1597{
6b2c9457
JS		 1598 struct stlport *portp;
1599 unsigned int i;
1600 int chipmask;
1da177e4 1601
a0564e14 1602 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1603
1604 chipmask = stl_panelinit(brdp, panelp);
1605
1606/*
1607 * All UART's are initialized (if found!). Now go through and setup
1608 * each ports data structures.
1609 */
c62429d9 1610 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1611 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1612 if (!portp) {
1da177e4 1613 printk("STALLION: failed to allocate memory "
ca7ed0f2 1614 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1615 break;
1616 }
d18a750f 1617 tty_port_init(&portp->port);
31f35939 1618 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1619 portp->magic = STL_PORTMAGIC;
1620 portp->portnr = i;
1621 portp->brdnr = panelp->brdnr;
1622 portp->panelnr = panelp->panelnr;
1623 portp->uartp = panelp->uartp;
1624 portp->clk = brdp->clk;
1625 portp->baud_base = STL_BAUDBASE;
1626 portp->close_delay = STL_CLOSEDELAY;
1627 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1628 init_waitqueue_head(&portp->port.open_wait);
1629 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1630 portp->stats.brd = portp->brdnr;
1631 portp->stats.panel = portp->panelnr;
1632 portp->stats.port = portp->portnr;
1633 panelp->ports[i] = portp;
1634 stl_portinit(brdp, panelp, portp);
1635 }
1636
c62429d9 1637 return 0;
1da177e4
LT		 1638}
1639
3b85b341
JS		 1640static void stl_cleanup_panels(struct stlbrd *brdp)
1641{
1642 struct stlpanel *panelp;
1643 struct stlport *portp;
1644 unsigned int j, k;
d18a750f 1645 struct tty_struct *tty;
3b85b341
JS		 1646
1647 for (j = 0; j < STL_MAXPANELS; j++) {
1648 panelp = brdp->panels[j];
1649 if (panelp == NULL)
1650 continue;
1651 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1652 portp = panelp->ports[k];
1653 if (portp == NULL)
1654 continue;
d18a750f
AC		 1655 tty = tty_port_tty_get(&portp->port);
1656 if (tty != NULL) {
1657 stl_hangup(tty);
1658 tty_kref_put(tty);
1659 }
3b85b341
JS		 1660 kfree(portp->tx.buf);
1661 kfree(portp);
1662 }
1663 kfree(panelp);
1664 }
1665}
1666
1da177e4
LT		 1667/*****************************************************************************/
1668
1669/*
1670 * Try to find and initialize an EasyIO board.
1671 */
1672
705c1862 1673static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1674{
ca7ed0f2 1675 struct stlpanel *panelp;
1da177e4
LT		 1676 unsigned int status;
1677 char *name;
3b85b341 1678 int retval;
1da177e4 1679
a0564e14 1680 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1681
1682 brdp->ioctrl = brdp->ioaddr1 + 1;
1683 brdp->iostatus = brdp->ioaddr1 + 2;
1684
1685 status = inb(brdp->iostatus);
1686 if ((status & EIO_IDBITMASK) == EIO_MK3)
1687 brdp->ioctrl++;
1688
1689/*
1690 * Handle board specific stuff now. The real difference is PCI
1691 * or not PCI.
1692 */
1693 if (brdp->brdtype == BRD_EASYIOPCI) {
1694 brdp->iosize1 = 0x80;
1695 brdp->iosize2 = 0x80;
1696 name = "serial(EIO-PCI)";
1697 outb(0x41, (brdp->ioaddr2 + 0x4c));
1698 } else {
1699 brdp->iosize1 = 8;
1700 name = "serial(EIO)";
1701 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1702 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1703 printk("STALLION: invalid irq=%d for brd=%d\n",
1704 brdp->irq, brdp->brdnr);
3b85b341
JS		 1705 retval = -EINVAL;
1706 goto err;
1da177e4
LT		 1707 }
1708 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1709 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1710 brdp->ioctrl);
1711 }
1712
3b85b341 1713 retval = -EBUSY;
1da177e4
LT		 1714 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1715 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1716 "%x conflicts with another device\n", brdp->brdnr,
1717 brdp->ioaddr1);
3b85b341 1718 goto err;
1da177e4
LT		 1719 }
1720
1721 if (brdp->iosize2 > 0)
1722 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1723 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1724 "address %x conflicts with another device\n",
1725 brdp->brdnr, brdp->ioaddr2);
1726 printk(KERN_WARNING "STALLION: Warning, also "
1727 "releasing board %d I/O address %x \n",
1728 brdp->brdnr, brdp->ioaddr1);
3b85b341 1729 goto err_rel1;
1da177e4
LT		 1730 }
1731
1732/*
1733 * Everything looks OK, so let's go ahead and probe for the hardware.
1734 */
1735 brdp->clk = CD1400_CLK;
1736 brdp->isr = stl_eiointr;
1737
3b85b341 1738 retval = -ENODEV;
1da177e4
LT		 1739 switch (status & EIO_IDBITMASK) {
1740 case EIO_8PORTM:
1741 brdp->clk = CD1400_CLK8M;
1742 /* fall thru */
1743 case EIO_8PORTRS:
1744 case EIO_8PORTDI:
1745 brdp->nrports = 8;
1746 break;
1747 case EIO_4PORTRS:
1748 brdp->nrports = 4;
1749 break;
1750 case EIO_MK3:
1751 switch (status & EIO_BRDMASK) {
1752 case ID_BRD4:
1753 brdp->nrports = 4;
1754 break;
1755 case ID_BRD8:
1756 brdp->nrports = 8;
1757 break;
1758 case ID_BRD16:
1759 brdp->nrports = 16;
1760 break;
1761 default:
3b85b341 1762 goto err_rel2;
1da177e4
LT		 1763 }
1764 break;
1765 default:
3b85b341 1766 goto err_rel2;
1da177e4
LT		 1767 }
1768
1769/*
1770 * We have verified that the board is actually present, so now we
1771 * can complete the setup.
1772 */
1773
ca7ed0f2 1774 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1775 if (!panelp) {
1da177e4 1776 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1777 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1778 retval = -ENOMEM;
1779 goto err_rel2;
1da177e4 1780 }
1da177e4
LT		 1781
1782 panelp->magic = STL_PANELMAGIC;
1783 panelp->brdnr = brdp->brdnr;
1784 panelp->panelnr = 0;
1785 panelp->nrports = brdp->nrports;
1786 panelp->iobase = brdp->ioaddr1;
1787 panelp->hwid = status;
1788 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1789 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1790 panelp->isr = stl_sc26198intr;
1791 } else {
615e4a71 1792 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1793 panelp->isr = stl_cd1400eiointr;
1794 }
1795
1796 brdp->panels[0] = panelp;
1797 brdp->nrpanels = 1;
1798 brdp->state |= BRD_FOUND;
1799 brdp->hwid = status;
0f2ed4c6 1800 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1801 printk("STALLION: failed to register interrupt "
1802 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1803 retval = -ENODEV;
1804 goto err_fr;
1da177e4 1805 }
3b85b341
JS		 1806
1807 return 0;
1808err_fr:
1809 stl_cleanup_panels(brdp);
1810err_rel2:
1811 if (brdp->iosize2 > 0)
1812 release_region(brdp->ioaddr2, brdp->iosize2);
1813err_rel1:
1814 release_region(brdp->ioaddr1, brdp->iosize1);
1815err:
1816 return retval;
1da177e4
LT		 1817}
1818
1819/*****************************************************************************/
1820
1821/*
1822 * Try to find an ECH board and initialize it. This code is capable of
1823 * dealing with all types of ECH board.
1824 */
1825
705c1862 1826static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1827{
ca7ed0f2 1828 struct stlpanel *panelp;
6b2c9457
JS		 1829 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1830 int retval;
1da177e4
LT		 1831 char *name;
1832
a0564e14 1833 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1834
1835 status = 0;
1836 conflict = 0;
1837
1838/*
1839 * Set up the initial board register contents for boards. This varies a
1840 * bit between the different board types. So we need to handle each
1841 * separately. Also do a check that the supplied IRQ is good.
1842 */
1843 switch (brdp->brdtype) {
1844
1845 case BRD_ECH:
1846 brdp->isr = stl_echatintr;
1847 brdp->ioctrl = brdp->ioaddr1 + 1;
1848 brdp->iostatus = brdp->ioaddr1 + 1;
1849 status = inb(brdp->iostatus);
3b85b341
JS		 1850 if ((status & ECH_IDBITMASK) != ECH_ID) {
1851 retval = -ENODEV;
1852 goto err;
1853 }
1da177e4
LT		 1854 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1855 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1856 printk("STALLION: invalid irq=%d for brd=%d\n",
1857 brdp->irq, brdp->brdnr);
3b85b341
JS		 1858 retval = -EINVAL;
1859 goto err;
1da177e4
LT		 1860 }
1861 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1862 status |= (stl_vecmap[brdp->irq] << 1);
1863 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1864 brdp->ioctrlval = ECH_INTENABLE |
1865 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1866 for (i = 0; i < 10; i++)
1da177e4
LT		 1867 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1868 brdp->iosize1 = 2;
1869 brdp->iosize2 = 32;
1870 name = "serial(EC8/32)";
1871 outb(status, brdp->ioaddr1);
1872 break;
1873
1874 case BRD_ECHMC:
1875 brdp->isr = stl_echmcaintr;
1876 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1877 brdp->iostatus = brdp->ioctrl;
1878 status = inb(brdp->iostatus);
3b85b341
JS		 1879 if ((status & ECH_IDBITMASK) != ECH_ID) {
1880 retval = -ENODEV;
1881 goto err;
1882 }
1da177e4
LT		 1883 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1884 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1885 printk("STALLION: invalid irq=%d for brd=%d\n",
1886 brdp->irq, brdp->brdnr);
3b85b341
JS		 1887 retval = -EINVAL;
1888 goto err;
1da177e4
LT		 1889 }
1890 outb(ECHMC_BRDRESET, brdp->ioctrl);
1891 outb(ECHMC_INTENABLE, brdp->ioctrl);
1892 brdp->iosize1 = 64;
1893 name = "serial(EC8/32-MC)";
1894 break;
1895
1896 case BRD_ECHPCI:
1897 brdp->isr = stl_echpciintr;
1898 brdp->ioctrl = brdp->ioaddr1 + 2;
1899 brdp->iosize1 = 4;
1900 brdp->iosize2 = 8;
1901 name = "serial(EC8/32-PCI)";
1902 break;
1903
1904 case BRD_ECH64PCI:
1905 brdp->isr = stl_echpci64intr;
1906 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1907 outb(0x43, (brdp->ioaddr1 + 0x4c));
1908 brdp->iosize1 = 0x80;
1909 brdp->iosize2 = 0x80;
1910 name = "serial(EC8/64-PCI)";
1911 break;
1912
1913 default:
1914 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1915 retval = -EINVAL;
1916 goto err;
1da177e4
LT		 1917 }
1918
1919/*
1920 * Check boards for possible IO address conflicts and return fail status
1921 * if an IO conflict found.
1922 */
3b85b341 1923 retval = -EBUSY;
1da177e4
LT		 1924 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1925 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1926 "%x conflicts with another device\n", brdp->brdnr,
1927 brdp->ioaddr1);
3b85b341 1928 goto err;
1da177e4
LT		 1929 }
1930
1931 if (brdp->iosize2 > 0)
1932 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1933 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1934 "address %x conflicts with another device\n",
1935 brdp->brdnr, brdp->ioaddr2);
1936 printk(KERN_WARNING "STALLION: Warning, also "
1937 "releasing board %d I/O address %x \n",
1938 brdp->brdnr, brdp->ioaddr1);
3b85b341 1939 goto err_rel1;
1da177e4
LT		 1940 }
1941
1942/*
1943 * Scan through the secondary io address space looking for panels.
1944 * As we find'em allocate and initialize panel structures for each.
1945 */
1946 brdp->clk = CD1400_CLK;
1947 brdp->hwid = status;
1948
1949 ioaddr = brdp->ioaddr2;
1950 banknr = 0;
1951 panelnr = 0;
1952 nxtid = 0;
1953
c62429d9 1954 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 1955 if (brdp->brdtype == BRD_ECHPCI) {
1956 outb(nxtid, brdp->ioctrl);
1957 ioaddr = brdp->ioaddr2;
1958 }
1959 status = inb(ioaddr + ECH_PNLSTATUS);
1960 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 1961 break;
ca7ed0f2 1962 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1963 if (!panelp) {
1da177e4 1964 printk("STALLION: failed to allocate memory "
ca7ed0f2 1965 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 1966 retval = -ENOMEM;
3b85b341 1967 goto err_fr;
1da177e4 1968 }
1da177e4
LT		 1969 panelp->magic = STL_PANELMAGIC;
1970 panelp->brdnr = brdp->brdnr;
1971 panelp->panelnr = panelnr;
1972 panelp->iobase = ioaddr;
1973 panelp->pagenr = nxtid;
1974 panelp->hwid = status;
1975 brdp->bnk2panel[banknr] = panelp;
1976 brdp->bnkpageaddr[banknr] = nxtid;
1977 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
1978
1979 if (status & ECH_PNLXPID) {
615e4a71 1980 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1981 panelp->isr = stl_sc26198intr;
1982 if (status & ECH_PNL16PORT) {
1983 panelp->nrports = 16;
1984 brdp->bnk2panel[banknr] = panelp;
1985 brdp->bnkpageaddr[banknr] = nxtid;
1986 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
1987 ECH_PNLSTATUS;
c62429d9 1988 } else
1da177e4 1989 panelp->nrports = 8;
1da177e4 1990 } else {
615e4a71 1991 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1992 panelp->isr = stl_cd1400echintr;
1993 if (status & ECH_PNL16PORT) {
1994 panelp->nrports = 16;
1995 panelp->ackmask = 0x80;
1996 if (brdp->brdtype != BRD_ECHPCI)
1997 ioaddr += EREG_BANKSIZE;
1998 brdp->bnk2panel[banknr] = panelp;
1999 brdp->bnkpageaddr[banknr] = ++nxtid;
2000 brdp->bnkstataddr[banknr++] = ioaddr +
2001 ECH_PNLSTATUS;
2002 } else {
2003 panelp->nrports = 8;
2004 panelp->ackmask = 0xc0;
2005 }
2006 }
2007
2008 nxtid++;
2009 ioaddr += EREG_BANKSIZE;
2010 brdp->nrports += panelp->nrports;
2011 brdp->panels[panelnr++] = panelp;
2012 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2013 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2014 retval = -EINVAL;
3b85b341 2015 goto err_fr;
49277b1c 2016 }
1da177e4
LT		 2017 }
2018
2019 brdp->nrpanels = panelnr;
2020 brdp->nrbnks = banknr;
2021 if (brdp->brdtype == BRD_ECH)
2022 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2023
2024 brdp->state |= BRD_FOUND;
0f2ed4c6 2025 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2026 printk("STALLION: failed to register interrupt "
2027 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2028 retval = -ENODEV;
2029 goto err_fr;
1da177e4
LT		 2030 }
2031
3b85b341
JS		 2032 return 0;
2033err_fr:
2034 stl_cleanup_panels(brdp);
2035 if (brdp->iosize2 > 0)
2036 release_region(brdp->ioaddr2, brdp->iosize2);
2037err_rel1:
2038 release_region(brdp->ioaddr1, brdp->iosize1);
2039err:
2040 return retval;
1da177e4
LT		 2041}
2042
2043/*****************************************************************************/
2044
2045/*
2046 * Initialize and configure the specified board.
2047 * Scan through all the boards in the configuration and see what we
2048 * can find. Handle EIO and the ECH boards a little differently here
2049 * since the initial search and setup is very different.
2050 */
2051
705c1862 2052static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2053{
3b85b341 2054 int i, retval;
1da177e4 2055
a0564e14 2056 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2057
2058 switch (brdp->brdtype) {
2059 case BRD_EASYIO:
2060 case BRD_EASYIOPCI:
3b85b341
JS		 2061 retval = stl_initeio(brdp);
2062 if (retval)
2063 goto err;
1da177e4
LT		 2064 break;
2065 case BRD_ECH:
2066 case BRD_ECHMC:
2067 case BRD_ECHPCI:
2068 case BRD_ECH64PCI:
3b85b341
JS		 2069 retval = stl_initech(brdp);
2070 if (retval)
2071 goto err;
1da177e4
LT		 2072 break;
2073 default:
2074 printk("STALLION: board=%d is unknown board type=%d\n",
2075 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2076 retval = -ENODEV;
2077 goto err;
1da177e4
LT		 2078 }
2079
1da177e4
LT		 2080 if ((brdp->state & BRD_FOUND) == 0) {
2081 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2082 stl_brdnames[brdp->brdtype], brdp->brdnr,
2083 brdp->ioaddr1, brdp->irq);
3b85b341 2084 goto err_free;
1da177e4
LT		 2085 }
2086
c62429d9 2087 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2088 if (brdp->panels[i] != NULL)
1da177e4
LT		 2089 stl_initports(brdp, brdp->panels[i]);
2090
2091 printk("STALLION: %s found, board=%d io=%x irq=%d "
2092 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2093 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2094 brdp->nrports);
3b85b341
JS		 2095
2096 return 0;
2097err_free:
2098 free_irq(brdp->irq, brdp);
2099
2100 stl_cleanup_panels(brdp);
2101
2102 release_region(brdp->ioaddr1, brdp->iosize1);
2103 if (brdp->iosize2 > 0)
2104 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2105err:
2106 return retval;
1da177e4
LT		 2107}
2108
2109/*****************************************************************************/
2110
2111/*
2112 * Find the next available board number that is free.
2113 */
2114
705c1862 2115static int __devinit stl_getbrdnr(void)
1da177e4 2116{
6b2c9457 2117 unsigned int i;
1da177e4 2118
c62429d9 2119 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2120 if (stl_brds[i] == NULL) {
1da177e4
LT		 2121 if (i >= stl_nrbrds)
2122 stl_nrbrds = i + 1;
c62429d9 2123 return i;
1da177e4 2124 }
c62429d9
JS		 2125
2126 return -1;
1da177e4
LT		 2127}
2128
b1b84fe0 2129/*****************************************************************************/
1da177e4
LT		 2130/*
2131 * We have a Stallion board. Allocate a board structure and
2132 * initialize it. Read its IO and IRQ resources from PCI
2133 * configuration space.
2134 */
2135
b1b84fe0
JS		 2136static int __devinit stl_pciprobe(struct pci_dev *pdev,
2137 const struct pci_device_id *ent)
1da177e4 2138{
b1b84fe0 2139 struct stlbrd *brdp;
aeaccfe4 2140 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2141 int brdnr, retval = -ENODEV;
1da177e4 2142
b1b84fe0 2143 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2144 goto err;
b1b84fe0 2145
3b85b341
JS		 2146 retval = pci_enable_device(pdev);
2147 if (retval)
2148 goto err;
2149 brdp = stl_allocbrd();
2150 if (brdp == NULL) {
2151 retval = -ENOMEM;
2152 goto err;
2153 }
79cfe7ab 2154 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2155 brdnr = stl_getbrdnr();
2156 if (brdnr < 0) {
fefaf9a7 2157 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2158 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2159 mutex_unlock(&stl_brdslock);
49277b1c 2160 retval = -ENODEV;
3b85b341 2161 goto err_fr;
1da177e4 2162 }
6b2c9457 2163 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2164 stl_brds[brdp->brdnr] = brdp;
2165 mutex_unlock(&stl_brdslock);
2166
1da177e4 2167 brdp->brdtype = brdtype;
fc06b5cf 2168 brdp->state |= STL_PROBED;
1da177e4 2169
1da177e4
LT		 2170/*
2171 * We have all resources from the board, so let's setup the actual
2172 * board structure now.
2173 */
2174 switch (brdtype) {
2175 case BRD_ECHPCI:
b1b84fe0
JS		 2176 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2177 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2178 break;
2179 case BRD_ECH64PCI:
b1b84fe0
JS		 2180 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2181 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2182 break;
2183 case BRD_EASYIOPCI:
b1b84fe0
JS		 2184 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2185 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2186 break;
2187 default:
fefaf9a7 2188 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2189 break;
2190 }
2191
b1b84fe0 2192 brdp->irq = pdev->irq;
3b85b341
JS		 2193 retval = stl_brdinit(brdp);
2194 if (retval)
79cfe7ab 2195 goto err_null;
1da177e4 2196
b1b84fe0
JS		 2197 pci_set_drvdata(pdev, brdp);
2198
aeaccfe4
JS		 2199 for (i = 0; i < brdp->nrports; i++)
2200 tty_register_device(stl_serial,
2201 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2202
3b85b341 2203 return 0;
79cfe7ab
JS		 2204err_null:
2205 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2206err_fr:
2207 kfree(brdp);
2208err:
2209 return retval;
1da177e4
LT		 2210}
2211
b1b84fe0 2212static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2213{
b1b84fe0 2214 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2215 unsigned int i;
1da177e4 2216
b1b84fe0 2217 free_irq(brdp->irq, brdp);
1da177e4 2218
b1b84fe0 2219 stl_cleanup_panels(brdp);
1da177e4 2220
b1b84fe0
JS		 2221 release_region(brdp->ioaddr1, brdp->iosize1);
2222 if (brdp->iosize2 > 0)
2223 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2224
aeaccfe4
JS		 2225 for (i = 0; i < brdp->nrports; i++)
2226 tty_unregister_device(stl_serial,
2227 brdp->brdnr * STL_MAXPORTS + i);
2228
b1b84fe0
JS		 2229 stl_brds[brdp->brdnr] = NULL;
2230 kfree(brdp);
1da177e4
LT		 2231}
2232
b1b84fe0
JS		 2233static struct pci_driver stl_pcidriver = {
2234 .name = "stallion",
2235 .id_table = stl_pcibrds,
2236 .probe = stl_pciprobe,
2237 .remove = __devexit_p(stl_pciremove)
2238};
1da177e4
LT		 2239
2240/*****************************************************************************/
2241
1da177e4
LT		 2242/*
2243 * Return the board stats structure to user app.
2244 */
2245
2246static int stl_getbrdstats(combrd_t __user *bp)
2247{
6b2c9457 2248 combrd_t stl_brdstats;
ca7ed0f2
JS		 2249 struct stlbrd *brdp;
2250 struct stlpanel *panelp;
6b2c9457 2251 unsigned int i;
1da177e4
LT		 2252
2253 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2254 return -EFAULT;
2255 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2256 return -ENODEV;
1da177e4 2257 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2258 if (brdp == NULL)
c62429d9 2259 return -ENODEV;
1da177e4
LT		 2260
2261 memset(&stl_brdstats, 0, sizeof(combrd_t));
2262 stl_brdstats.brd = brdp->brdnr;
2263 stl_brdstats.type = brdp->brdtype;
2264 stl_brdstats.hwid = brdp->hwid;
2265 stl_brdstats.state = brdp->state;
2266 stl_brdstats.ioaddr = brdp->ioaddr1;
2267 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2268 stl_brdstats.irq = brdp->irq;
2269 stl_brdstats.nrpanels = brdp->nrpanels;
2270 stl_brdstats.nrports = brdp->nrports;
c62429d9 2271 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2272 panelp = brdp->panels[i];
2273 stl_brdstats.panels[i].panel = i;
2274 stl_brdstats.panels[i].hwid = panelp->hwid;
2275 stl_brdstats.panels[i].nrports = panelp->nrports;
2276 }
2277
2278 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2279}
2280
2281/*****************************************************************************/
2282
2283/*
2284 * Resolve the referenced port number into a port struct pointer.
2285 */
2286
ca7ed0f2 2287static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2288{
ca7ed0f2
JS		 2289 struct stlbrd *brdp;
2290 struct stlpanel *panelp;
1da177e4 2291
c62429d9
JS		 2292 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2293 return NULL;
1da177e4 2294 brdp = stl_brds[brdnr];
615e4a71 2295 if (brdp == NULL)
c62429d9 2296 return NULL;
6b2c9457 2297 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2298 return NULL;
1da177e4 2299 panelp = brdp->panels[panelnr];
615e4a71 2300 if (panelp == NULL)
c62429d9 2301 return NULL;
6b2c9457 2302 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2303 return NULL;
2304 return panelp->ports[portnr];
1da177e4
LT		 2305}
2306
2307/*****************************************************************************/
2308
2309/*
2310 * Return the port stats structure to user app. A NULL port struct
2311 * pointer passed in means that we need to find out from the app
2312 * what port to get stats for (used through board control device).
2313 */
2314
d18a750f 2315static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2316{
6b2c9457 2317 comstats_t stl_comstats;
1da177e4
LT		 2318 unsigned char *head, *tail;
2319 unsigned long flags;
2320
2321 if (!portp) {
2322 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2323 return -EFAULT;
2324 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2325 stl_comstats.port);
615e4a71 2326 if (portp == NULL)
c62429d9 2327 return -ENODEV;
1da177e4
LT		 2328 }
2329
2330 portp->stats.state = portp->istate;
f8ae4764 2331 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2332 portp->stats.hwid = portp->hwid;
2333
2334 portp->stats.ttystate = 0;
2335 portp->stats.cflags = 0;
2336 portp->stats.iflags = 0;
2337 portp->stats.oflags = 0;
2338 portp->stats.lflags = 0;
2339 portp->stats.rxbuffered = 0;
2340
b65b5b59 2341 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2342 if (tty != NULL && portp->port.tty == tty) {
2343 portp->stats.ttystate = tty->flags;
2344 /* No longer available as a statistic */
2345 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2346 if (tty->termios != NULL) {
2347 portp->stats.cflags = tty->termios->c_cflag;
2348 portp->stats.iflags = tty->termios->c_iflag;
2349 portp->stats.oflags = tty->termios->c_oflag;
2350 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2351 }
d18a750f 2352 }
b65b5b59 2353 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2354
2355 head = portp->tx.head;
2356 tail = portp->tx.tail;
c62429d9
JS		 2357 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2358 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2359
2360 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2361
2362 return copy_to_user(cp, &portp->stats,
2363 sizeof(comstats_t)) ? -EFAULT : 0;
2364}
2365
2366/*****************************************************************************/
2367
2368/*
2369 * Clear the port stats structure. We also return it zeroed out...
2370 */
2371
ca7ed0f2 2372static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2373{
6b2c9457
JS		 2374 comstats_t stl_comstats;
2375
1da177e4
LT		 2376 if (!portp) {
2377 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2378 return -EFAULT;
2379 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2380 stl_comstats.port);
615e4a71 2381 if (portp == NULL)
c62429d9 2382 return -ENODEV;
1da177e4
LT		 2383 }
2384
2385 memset(&portp->stats, 0, sizeof(comstats_t));
2386 portp->stats.brd = portp->brdnr;
2387 portp->stats.panel = portp->panelnr;
2388 portp->stats.port = portp->portnr;
2389 return copy_to_user(cp, &portp->stats,
2390 sizeof(comstats_t)) ? -EFAULT : 0;
2391}
2392
2393/*****************************************************************************/
2394
2395/*
2396 * Return the entire driver ports structure to a user app.
2397 */
2398
ca7ed0f2 2399static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2400{
6b2c9457 2401 struct stlport stl_dummyport;
ca7ed0f2 2402 struct stlport *portp;
1da177e4 2403
ca7ed0f2 2404 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2405 return -EFAULT;
2406 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2407 stl_dummyport.portnr);
2408 if (!portp)
2409 return -ENODEV;
ca7ed0f2 2410 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2411}
2412
2413/*****************************************************************************/
2414
2415/*
2416 * Return the entire driver board structure to a user app.
2417 */
2418
ca7ed0f2 2419static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2420{
6b2c9457 2421 struct stlbrd stl_dummybrd;
ca7ed0f2 2422 struct stlbrd *brdp;
1da177e4 2423
ca7ed0f2 2424 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2425 return -EFAULT;
6b2c9457 2426 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2427 return -ENODEV;
2428 brdp = stl_brds[stl_dummybrd.brdnr];
2429 if (!brdp)
c62429d9 2430 return -ENODEV;
ca7ed0f2 2431 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2432}
2433
2434/*****************************************************************************/
2435
2436/*
2437 * The "staliomem" device is also required to do some special operations
2438 * on the board and/or ports. In this driver it is mostly used for stats
2439 * collection.
2440 */
2441
894cb917 2442static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2443{
2444 int brdnr, rc;
2445 void __user *argp = (void __user *)arg;
2446
894cb917 2447 pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg);
1da177e4 2448
894cb917 2449 brdnr = iminor(fp->f_dentry->d_inode);
1da177e4 2450 if (brdnr >= STL_MAXBRDS)
c62429d9 2451 return -ENODEV;
1da177e4
LT		 2452 rc = 0;
2453
894cb917 2454 lock_kernel();
1da177e4
LT		 2455 switch (cmd) {
2456 case COM_GETPORTSTATS:
d18a750f 2457 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2458 break;
2459 case COM_CLRPORTSTATS:
2460 rc = stl_clrportstats(NULL, argp);
2461 break;
2462 case COM_GETBRDSTATS:
2463 rc = stl_getbrdstats(argp);
2464 break;
2465 case COM_READPORT:
2466 rc = stl_getportstruct(argp);
2467 break;
2468 case COM_READBOARD:
2469 rc = stl_getbrdstruct(argp);
2470 break;
2471 default:
2472 rc = -ENOIOCTLCMD;
2473 break;
2474 }
894cb917 2475 unlock_kernel();
c62429d9 2476 return rc;
1da177e4
LT		 2477}
2478
b68e31d0 2479static const struct tty_operations stl_ops = {
1da177e4
LT		 2480 .open = stl_open,
2481 .close = stl_close,
2482 .write = stl_write,
2483 .put_char = stl_putchar,
2484 .flush_chars = stl_flushchars,
2485 .write_room = stl_writeroom,
2486 .chars_in_buffer = stl_charsinbuffer,
2487 .ioctl = stl_ioctl,
2488 .set_termios = stl_settermios,
2489 .throttle = stl_throttle,
2490 .unthrottle = stl_unthrottle,
2491 .stop = stl_stop,
2492 .start = stl_start,
2493 .hangup = stl_hangup,
2494 .flush_buffer = stl_flushbuffer,
2495 .break_ctl = stl_breakctl,
2496 .wait_until_sent = stl_waituntilsent,
2497 .send_xchar = stl_sendxchar,
1da177e4
LT		 2498 .tiocmget = stl_tiocmget,
2499 .tiocmset = stl_tiocmset,
8561c44c 2500 .proc_fops = &stl_proc_fops,
1da177e4
LT		 2501};
2502
31f35939
AC		 2503static const struct tty_port_operations stl_port_ops = {
2504 .carrier_raised = stl_carrier_raised,
fcc8ac18 2505 .dtr_rts = stl_dtr_rts,
047e9658
AC		 2506 .activate = stl_activate,
2507 .shutdown = stl_shutdown,
31f35939
AC		 2508};
2509
1da177e4
LT		 2510/*****************************************************************************/
2511/* CD1400 HARDWARE FUNCTIONS */
2512/*****************************************************************************/
2513
2514/*
2515 * These functions get/set/update the registers of the cd1400 UARTs.
2516 * Access to the cd1400 registers is via an address/data io port pair.
2517 * (Maybe should make this inline...)
2518 */
2519
ca7ed0f2 2520static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2521{
2522 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2523 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2524}
2525
ca7ed0f2 2526static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2527{
c62429d9 2528 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2529 outb(value, portp->ioaddr + EREG_DATA);
2530}
2531
ca7ed0f2 2532static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2533{
c62429d9 2534 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2535 if (inb(portp->ioaddr + EREG_DATA) != value) {
2536 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2537 return 1;
1da177e4 2538 }
014c2544 2539 return 0;
1da177e4
LT		 2540}
2541
2542/*****************************************************************************/
2543
2544/*
2545 * Inbitialize the UARTs in a panel. We don't care what sort of board
2546 * these ports are on - since the port io registers are almost
2547 * identical when dealing with ports.
2548 */
2549
ca7ed0f2 2550static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2551{
2552 unsigned int gfrcr;
2553 int chipmask, i, j;
2554 int nrchips, uartaddr, ioaddr;
b65b5b59 2555 unsigned long flags;
1da177e4 2556
a0564e14 2557 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2558
b65b5b59 2559 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2560 BRDENABLE(panelp->brdnr, panelp->pagenr);
2561
2562/*
2563 * Check that each chip is present and started up OK.
2564 */
2565 chipmask = 0;
2566 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2567 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2568 if (brdp->brdtype == BRD_ECHPCI) {
2569 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2570 ioaddr = panelp->iobase;
c62429d9 2571 } else
1da177e4 2572 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2573 uartaddr = (i & 0x01) ? 0x080 : 0;
2574 outb((GFRCR + uartaddr), ioaddr);
2575 outb(0, (ioaddr + EREG_DATA));
2576 outb((CCR + uartaddr), ioaddr);
2577 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2578 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2579 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2580 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2581 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2582 break;
c62429d9 2583
1da177e4
LT		 2584 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2585 printk("STALLION: cd1400 not responding, "
2586 "brd=%d panel=%d chip=%d\n",
2587 panelp->brdnr, panelp->panelnr, i);
2588 continue;
2589 }
2590 chipmask |= (0x1 << i);
2591 outb((PPR + uartaddr), ioaddr);
2592 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2593 }
2594
2595 BRDDISABLE(panelp->brdnr);
b65b5b59 2596 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2597 return chipmask;
1da177e4
LT		 2598}
2599
2600/*****************************************************************************/
2601
2602/*
2603 * Initialize hardware specific port registers.
2604 */
2605
ca7ed0f2 2606static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2607{
b65b5b59 2608 unsigned long flags;
a0564e14
JS		 2609 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2610 panelp, portp);
1da177e4 2611
615e4a71
JS		 2612 if ((brdp == NULL) || (panelp == NULL) ||
2613 (portp == NULL))
1da177e4
LT		 2614 return;
2615
b65b5b59 2616 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2617 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2618 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2619 portp->uartaddr = (portp->portnr & 0x04) << 5;
2620 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2621
2622 BRDENABLE(portp->brdnr, portp->pagenr);
2623 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2624 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2625 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2626 BRDDISABLE(portp->brdnr);
b65b5b59 2627 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2628}
2629
2630/*****************************************************************************/
2631
2632/*
2633 * Wait for the command register to be ready. We will poll this,
2634 * since it won't usually take too long to be ready.
2635 */
2636
ca7ed0f2 2637static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2638{
2639 int i;
2640
c62429d9
JS		 2641 for (i = 0; i < CCR_MAXWAIT; i++)
2642 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2643 return;
1da177e4
LT		 2644
2645 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2646 portp->portnr, portp->panelnr, portp->brdnr);
2647}
2648
2649/*****************************************************************************/
2650
2651/*
2652 * Set up the cd1400 registers for a port based on the termios port
2653 * settings.
2654 */
2655
606d099c 2656static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2657{
ca7ed0f2 2658 struct stlbrd *brdp;
1da177e4
LT		 2659 unsigned long flags;
2660 unsigned int clkdiv, baudrate;
2661 unsigned char cor1, cor2, cor3;
2662 unsigned char cor4, cor5, ccr;
2663 unsigned char srer, sreron, sreroff;
2664 unsigned char mcor1, mcor2, rtpr;
2665 unsigned char clk, div;
2666
2667 cor1 = 0;
2668 cor2 = 0;
2669 cor3 = 0;
2670 cor4 = 0;
2671 cor5 = 0;
2672 ccr = 0;
2673 rtpr = 0;
2674 clk = 0;
2675 div = 0;
2676 mcor1 = 0;
2677 mcor2 = 0;
2678 sreron = 0;
2679 sreroff = 0;
2680
2681 brdp = stl_brds[portp->brdnr];
615e4a71 2682 if (brdp == NULL)
1da177e4
LT		 2683 return;
2684
2685/*
2686 * Set up the RX char ignore mask with those RX error types we
2687 * can ignore. We can get the cd1400 to help us out a little here,
2688 * it will ignore parity errors and breaks for us.
2689 */
2690 portp->rxignoremsk = 0;
2691 if (tiosp->c_iflag & IGNPAR) {
2692 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2693 cor1 |= COR1_PARIGNORE;
2694 }
2695 if (tiosp->c_iflag & IGNBRK) {
2696 portp->rxignoremsk |= ST_BREAK;
2697 cor4 |= COR4_IGNBRK;
2698 }
2699
2700 portp->rxmarkmsk = ST_OVERRUN;
2701 if (tiosp->c_iflag & (INPCK | PARMRK))
2702 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2703 if (tiosp->c_iflag & BRKINT)
2704 portp->rxmarkmsk |= ST_BREAK;
2705
2706/*
2707 * Go through the char size, parity and stop bits and set all the
2708 * option register appropriately.
2709 */
2710 switch (tiosp->c_cflag & CSIZE) {
2711 case CS5:
2712 cor1 |= COR1_CHL5;
2713 break;
2714 case CS6:
2715 cor1 |= COR1_CHL6;
2716 break;
2717 case CS7:
2718 cor1 |= COR1_CHL7;
2719 break;
2720 default:
2721 cor1 |= COR1_CHL8;
2722 break;
2723 }
2724
2725 if (tiosp->c_cflag & CSTOPB)
2726 cor1 |= COR1_STOP2;
2727 else
2728 cor1 |= COR1_STOP1;
2729
2730 if (tiosp->c_cflag & PARENB) {
2731 if (tiosp->c_cflag & PARODD)
2732 cor1 |= (COR1_PARENB | COR1_PARODD);
2733 else
2734 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2735 } else {
2736 cor1 |= COR1_PARNONE;
2737 }
2738
2739/*
2740 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2741 * space for hardware flow control and the like. This should be set to
2742 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2743 * really be based on VTIME.
2744 */
2745 cor3 |= FIFO_RXTHRESHOLD;
2746 rtpr = 2;
2747
2748/*
2749 * Calculate the baud rate timers. For now we will just assume that
2750 * the input and output baud are the same. Could have used a baud
2751 * table here, but this way we can generate virtually any baud rate
2752 * we like!
2753 */
2754 baudrate = tiosp->c_cflag & CBAUD;
2755 if (baudrate & CBAUDEX) {
2756 baudrate &= ~CBAUDEX;
2757 if ((baudrate < 1) || (baudrate > 4))
2758 tiosp->c_cflag &= ~CBAUDEX;
2759 else
2760 baudrate += 15;
2761 }
2762 baudrate = stl_baudrates[baudrate];
2763 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2764 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2765 baudrate = 57600;
f8ae4764 2766 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2767 baudrate = 115200;
f8ae4764 2768 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2769 baudrate = 230400;
f8ae4764 2770 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2771 baudrate = 460800;
f8ae4764 2772 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2773 baudrate = (portp->baud_base / portp->custom_divisor);
2774 }
2775 if (baudrate > STL_CD1400MAXBAUD)
2776 baudrate = STL_CD1400MAXBAUD;
2777
2778 if (baudrate > 0) {
c62429d9
JS		 2779 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2780 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2781 if (clkdiv < 0x100)
2782 break;
2783 }
2784 div = (unsigned char) clkdiv;
2785 }
2786
2787/*
2788 * Check what form of modem signaling is required and set it up.
2789 */
2790 if ((tiosp->c_cflag & CLOCAL) == 0) {
2791 mcor1 |= MCOR1_DCD;
2792 mcor2 |= MCOR2_DCD;
2793 sreron |= SRER_MODEM;
f8ae4764 2794 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2795 } else
f8ae4764 2796 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2797
2798/*
2799 * Setup cd1400 enhanced modes if we can. In particular we want to
2800 * handle as much of the flow control as possible automatically. As
2801 * well as saving a few CPU cycles it will also greatly improve flow
2802 * control reliability.
2803 */
2804 if (tiosp->c_iflag & IXON) {
2805 cor2 |= COR2_TXIBE;
2806 cor3 |= COR3_SCD12;
2807 if (tiosp->c_iflag & IXANY)
2808 cor2 |= COR2_IXM;
2809 }
2810
2811 if (tiosp->c_cflag & CRTSCTS) {
2812 cor2 |= COR2_CTSAE;
2813 mcor1 |= FIFO_RTSTHRESHOLD;
2814 }
2815
2816/*
2817 * All cd1400 register values calculated so go through and set
2818 * them all up.
2819 */
2820
a0564e14 2821 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2822 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2823 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2824 cor1, cor2, cor3, cor4, cor5);
a0564e14 2825 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2826 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2827 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2828 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2829 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2830 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2831
b65b5b59 2832 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2833 BRDENABLE(portp->brdnr, portp->pagenr);
2834 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2835 srer = stl_cd1400getreg(portp, SRER);
2836 stl_cd1400setreg(portp, SRER, 0);
2837 if (stl_cd1400updatereg(portp, COR1, cor1))
2838 ccr = 1;
2839 if (stl_cd1400updatereg(portp, COR2, cor2))
2840 ccr = 1;
2841 if (stl_cd1400updatereg(portp, COR3, cor3))
2842 ccr = 1;
2843 if (ccr) {
2844 stl_cd1400ccrwait(portp);
2845 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2846 }
2847 stl_cd1400setreg(portp, COR4, cor4);
2848 stl_cd1400setreg(portp, COR5, cor5);
2849 stl_cd1400setreg(portp, MCOR1, mcor1);
2850 stl_cd1400setreg(portp, MCOR2, mcor2);
2851 if (baudrate > 0) {
2852 stl_cd1400setreg(portp, TCOR, clk);
2853 stl_cd1400setreg(portp, TBPR, div);
2854 stl_cd1400setreg(portp, RCOR, clk);
2855 stl_cd1400setreg(portp, RBPR, div);
2856 }
2857 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2858 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2859 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2860 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2861 stl_cd1400setreg(portp, RTPR, rtpr);
2862 mcor1 = stl_cd1400getreg(portp, MSVR1);
2863 if (mcor1 & MSVR1_DCD)
2864 portp->sigs |= TIOCM_CD;
2865 else
2866 portp->sigs &= ~TIOCM_CD;
2867 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2868 BRDDISABLE(portp->brdnr);
b65b5b59 2869 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2870}
2871
2872/*****************************************************************************/
2873
2874/*
2875 * Set the state of the DTR and RTS signals.
2876 */
2877
ca7ed0f2 2878static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2879{
2880 unsigned char msvr1, msvr2;
2881 unsigned long flags;
2882
a0564e14
JS		 2883 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2884 portp, dtr, rts);
1da177e4
LT		 2885
2886 msvr1 = 0;
2887 msvr2 = 0;
2888 if (dtr > 0)
2889 msvr1 = MSVR1_DTR;
2890 if (rts > 0)
2891 msvr2 = MSVR2_RTS;
2892
b65b5b59 2893 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2894 BRDENABLE(portp->brdnr, portp->pagenr);
2895 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2896 if (rts >= 0)
2897 stl_cd1400setreg(portp, MSVR2, msvr2);
2898 if (dtr >= 0)
2899 stl_cd1400setreg(portp, MSVR1, msvr1);
2900 BRDDISABLE(portp->brdnr);
b65b5b59 2901 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2902}
2903
2904/*****************************************************************************/
2905
2906/*
2907 * Return the state of the signals.
2908 */
2909
ca7ed0f2 2910static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2911{
2912 unsigned char msvr1, msvr2;
2913 unsigned long flags;
2914 int sigs;
2915
a0564e14 2916 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2917
b65b5b59 2918 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2919 BRDENABLE(portp->brdnr, portp->pagenr);
2920 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2921 msvr1 = stl_cd1400getreg(portp, MSVR1);
2922 msvr2 = stl_cd1400getreg(portp, MSVR2);
2923 BRDDISABLE(portp->brdnr);
b65b5b59 2924 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2925
2926 sigs = 0;
2927 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2928 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2929 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2930 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
2931#if 0
2932 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
2933 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
2934#else
2935 sigs |= TIOCM_DSR;
2936#endif
014c2544 2937 return sigs;
1da177e4
LT		 2938}
2939
2940/*****************************************************************************/
2941
2942/*
2943 * Enable/Disable the Transmitter and/or Receiver.
2944 */
2945
ca7ed0f2 2946static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2947{
2948 unsigned char ccr;
2949 unsigned long flags;
2950
a0564e14
JS		 2951 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
2952
1da177e4
LT		 2953 ccr = 0;
2954
2955 if (tx == 0)
2956 ccr |= CCR_TXDISABLE;
2957 else if (tx > 0)
2958 ccr |= CCR_TXENABLE;
2959 if (rx == 0)
2960 ccr |= CCR_RXDISABLE;
2961 else if (rx > 0)
2962 ccr |= CCR_RXENABLE;
2963
b65b5b59 2964 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2965 BRDENABLE(portp->brdnr, portp->pagenr);
2966 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2967 stl_cd1400ccrwait(portp);
2968 stl_cd1400setreg(portp, CCR, ccr);
2969 stl_cd1400ccrwait(portp);
2970 BRDDISABLE(portp->brdnr);
b65b5b59 2971 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2972}
2973
2974/*****************************************************************************/
2975
2976/*
2977 * Start/stop the Transmitter and/or Receiver.
2978 */
2979
ca7ed0f2 2980static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2981{
2982 unsigned char sreron, sreroff;
2983 unsigned long flags;
2984
a0564e14 2985 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 2986
2987 sreron = 0;
2988 sreroff = 0;
2989 if (tx == 0)
2990 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
2991 else if (tx == 1)
2992 sreron |= SRER_TXDATA;
2993 else if (tx >= 2)
2994 sreron |= SRER_TXEMPTY;
2995 if (rx == 0)
2996 sreroff |= SRER_RXDATA;
2997 else if (rx > 0)
2998 sreron |= SRER_RXDATA;
2999
b65b5b59 3000 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3001 BRDENABLE(portp->brdnr, portp->pagenr);
3002 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3003 stl_cd1400setreg(portp, SRER,
3004 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3005 BRDDISABLE(portp->brdnr);
3006 if (tx > 0)
3007 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3008 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3009}
3010
3011/*****************************************************************************/
3012
3013/*
3014 * Disable all interrupts from this port.
3015 */
3016
ca7ed0f2 3017static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3018{
3019 unsigned long flags;
3020
a0564e14
JS		 3021 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3022
b65b5b59 3023 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3024 BRDENABLE(portp->brdnr, portp->pagenr);
3025 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3026 stl_cd1400setreg(portp, SRER, 0);
3027 BRDDISABLE(portp->brdnr);
b65b5b59 3028 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3029}
3030
3031/*****************************************************************************/
3032
ca7ed0f2 3033static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3034{
3035 unsigned long flags;
3036
a0564e14 3037 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3038
b65b5b59 3039 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3040 BRDENABLE(portp->brdnr, portp->pagenr);
3041 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3042 stl_cd1400setreg(portp, SRER,
3043 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3044 SRER_TXEMPTY));
3045 BRDDISABLE(portp->brdnr);
3046 portp->brklen = len;
3047 if (len == 1)
3048 portp->stats.txbreaks++;
b65b5b59 3049 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3050}
3051
3052/*****************************************************************************/
3053
3054/*
3055 * Take flow control actions...
3056 */
3057
ca7ed0f2 3058static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3059{
3060 struct tty_struct *tty;
3061 unsigned long flags;
3062
a0564e14 3063 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3064
615e4a71 3065 if (portp == NULL)
1da177e4 3066 return;
d18a750f 3067 tty = tty_port_tty_get(&portp->port);
615e4a71 3068 if (tty == NULL)
1da177e4
LT		 3069 return;
3070
b65b5b59 3071 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3072 BRDENABLE(portp->brdnr, portp->pagenr);
3073 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3074
3075 if (state) {
3076 if (tty->termios->c_iflag & IXOFF) {
3077 stl_cd1400ccrwait(portp);
3078 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3079 portp->stats.rxxon++;
3080 stl_cd1400ccrwait(portp);
3081 }
3082/*
3083 * Question: should we return RTS to what it was before? It may
3084 * have been set by an ioctl... Suppose not, since if you have
3085 * hardware flow control set then it is pretty silly to go and
3086 * set the RTS line by hand.
3087 */
3088 if (tty->termios->c_cflag & CRTSCTS) {
3089 stl_cd1400setreg(portp, MCOR1,
3090 (stl_cd1400getreg(portp, MCOR1) |
3091 FIFO_RTSTHRESHOLD));
3092 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3093 portp->stats.rxrtson++;
3094 }
3095 } else {
3096 if (tty->termios->c_iflag & IXOFF) {
3097 stl_cd1400ccrwait(portp);
3098 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3099 portp->stats.rxxoff++;
3100 stl_cd1400ccrwait(portp);
3101 }
3102 if (tty->termios->c_cflag & CRTSCTS) {
3103 stl_cd1400setreg(portp, MCOR1,
3104 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3105 stl_cd1400setreg(portp, MSVR2, 0);
3106 portp->stats.rxrtsoff++;
3107 }
3108 }
3109
3110 BRDDISABLE(portp->brdnr);
b65b5b59 3111 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3112 tty_kref_put(tty);
1da177e4
LT		 3113}
3114
3115/*****************************************************************************/
3116
3117/*
3118 * Send a flow control character...
3119 */
3120
ca7ed0f2 3121static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3122{
3123 struct tty_struct *tty;
3124 unsigned long flags;
3125
a0564e14 3126 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3127
615e4a71 3128 if (portp == NULL)
1da177e4 3129 return;
d18a750f 3130 tty = tty_port_tty_get(&portp->port);
615e4a71 3131 if (tty == NULL)
1da177e4
LT		 3132 return;
3133
b65b5b59 3134 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3135 BRDENABLE(portp->brdnr, portp->pagenr);
3136 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3137 if (state) {
3138 stl_cd1400ccrwait(portp);
3139 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3140 portp->stats.rxxon++;
3141 stl_cd1400ccrwait(portp);
3142 } else {
3143 stl_cd1400ccrwait(portp);
3144 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3145 portp->stats.rxxoff++;
3146 stl_cd1400ccrwait(portp);
3147 }
3148 BRDDISABLE(portp->brdnr);
b65b5b59 3149 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3150 tty_kref_put(tty);
1da177e4
LT		 3151}
3152
3153/*****************************************************************************/
3154
ca7ed0f2 3155static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3156{
3157 unsigned long flags;
3158
a0564e14 3159 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3160
615e4a71 3161 if (portp == NULL)
1da177e4
LT		 3162 return;
3163
b65b5b59 3164 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3165 BRDENABLE(portp->brdnr, portp->pagenr);
3166 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3167 stl_cd1400ccrwait(portp);
3168 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3169 stl_cd1400ccrwait(portp);
3170 portp->tx.tail = portp->tx.head;
3171 BRDDISABLE(portp->brdnr);
b65b5b59 3172 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3173}
3174
3175/*****************************************************************************/
3176
3177/*
3178 * Return the current state of data flow on this port. This is only
3179 * really interresting when determining if data has fully completed
3180 * transmission or not... This is easy for the cd1400, it accurately
3181 * maintains the busy port flag.
3182 */
3183
ca7ed0f2 3184static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3185{
a0564e14 3186 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3187
615e4a71 3188 if (portp == NULL)
014c2544 3189 return 0;
1da177e4 3190
014c2544 3191 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3192}
3193
3194/*****************************************************************************/
3195
3196/*
3197 * Interrupt service routine for cd1400 EasyIO boards.
3198 */
3199
ca7ed0f2 3200static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3201{
3202 unsigned char svrtype;
3203
a0564e14 3204 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3205
b65b5b59 3206 spin_lock(&brd_lock);
1da177e4
LT		 3207 outb(SVRR, iobase);
3208 svrtype = inb(iobase + EREG_DATA);
3209 if (panelp->nrports > 4) {
3210 outb((SVRR + 0x80), iobase);
3211 svrtype |= inb(iobase + EREG_DATA);
3212 }
3213
3214 if (svrtype & SVRR_RX)
3215 stl_cd1400rxisr(panelp, iobase);
3216 else if (svrtype & SVRR_TX)
3217 stl_cd1400txisr(panelp, iobase);
3218 else if (svrtype & SVRR_MDM)
3219 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3220
3221 spin_unlock(&brd_lock);
1da177e4
LT		 3222}
3223
3224/*****************************************************************************/
3225
3226/*
3227 * Interrupt service routine for cd1400 panels.
3228 */
3229
ca7ed0f2 3230static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3231{
3232 unsigned char svrtype;
3233
a0564e14 3234 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3235
3236 outb(SVRR, iobase);
3237 svrtype = inb(iobase + EREG_DATA);
3238 outb((SVRR + 0x80), iobase);
3239 svrtype |= inb(iobase + EREG_DATA);
3240 if (svrtype & SVRR_RX)
3241 stl_cd1400rxisr(panelp, iobase);
3242 else if (svrtype & SVRR_TX)
3243 stl_cd1400txisr(panelp, iobase);
3244 else if (svrtype & SVRR_MDM)
3245 stl_cd1400mdmisr(panelp, iobase);
3246}
3247
3248
3249/*****************************************************************************/
3250
3251/*
3252 * Unfortunately we need to handle breaks in the TX data stream, since
3253 * this is the only way to generate them on the cd1400.
3254 */
3255
60be4810 3256static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3257{
3258 if (portp->brklen == 1) {
3259 outb((COR2 + portp->uartaddr), ioaddr);
3260 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3261 (ioaddr + EREG_DATA));
3262 outb((TDR + portp->uartaddr), ioaddr);
3263 outb(ETC_CMD, (ioaddr + EREG_DATA));
3264 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3265 outb((SRER + portp->uartaddr), ioaddr);
3266 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3267 (ioaddr + EREG_DATA));
014c2544 3268 return 1;
1da177e4
LT		 3269 } else if (portp->brklen > 1) {
3270 outb((TDR + portp->uartaddr), ioaddr);
3271 outb(ETC_CMD, (ioaddr + EREG_DATA));
3272 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3273 portp->brklen = -1;
014c2544 3274 return 1;
1da177e4
LT		 3275 } else {
3276 outb((COR2 + portp->uartaddr), ioaddr);
3277 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3278 (ioaddr + EREG_DATA));
3279 portp->brklen = 0;
3280 }
014c2544 3281 return 0;
1da177e4
LT		 3282}
3283
3284/*****************************************************************************/
3285
3286/*
3287 * Transmit interrupt handler. This has gotta be fast! Handling TX
3288 * chars is pretty simple, stuff as many as possible from the TX buffer
3289 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3290 * are embedded as commands in the data stream. Oh no, had to use a goto!
3291 * This could be optimized more, will do when I get time...
3292 * In practice it is possible that interrupts are enabled but that the
3293 * port has been hung up. Need to handle not having any TX buffer here,
3294 * this is done by using the side effect that head and tail will also
3295 * be NULL if the buffer has been freed.
3296 */
3297
ca7ed0f2 3298static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3299{
ca7ed0f2 3300 struct stlport *portp;
1da177e4
LT		 3301 int len, stlen;
3302 char *head, *tail;
3303 unsigned char ioack, srer;
d18a750f 3304 struct tty_struct *tty;
1da177e4 3305
a0564e14 3306 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3307
3308 ioack = inb(ioaddr + EREG_TXACK);
3309 if (((ioack & panelp->ackmask) != 0) ||
3310 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3311 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3312 return;
3313 }
3314 portp = panelp->ports[(ioack >> 3)];
3315
3316/*
3317 * Unfortunately we need to handle breaks in the data stream, since
3318 * this is the only way to generate them on the cd1400. Do it now if
3319 * a break is to be sent.
3320 */
3321 if (portp->brklen != 0)
3322 if (stl_cd1400breakisr(portp, ioaddr))
3323 goto stl_txalldone;
3324
3325 head = portp->tx.head;
3326 tail = portp->tx.tail;
3327 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3328 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3329 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3330 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3331 tty = tty_port_tty_get(&portp->port);
3332 if (tty) {
3333 tty_wakeup(tty);
3334 tty_kref_put(tty);
3335 }
1da177e4
LT		 3336 }
3337
3338 if (len == 0) {
3339 outb((SRER + portp->uartaddr), ioaddr);
3340 srer = inb(ioaddr + EREG_DATA);
3341 if (srer & SRER_TXDATA) {
3342 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3343 } else {
3344 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3345 clear_bit(ASYI_TXBUSY, &portp->istate);
3346 }
3347 outb(srer, (ioaddr + EREG_DATA));
3348 } else {
843b568c 3349 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3350 portp->stats.txtotal += len;
319fe7c3
JS		 3351 stlen = min_t(unsigned int, len,
3352 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3353 outb((TDR + portp->uartaddr), ioaddr);
3354 outsb((ioaddr + EREG_DATA), tail, stlen);
3355 len -= stlen;
3356 tail += stlen;
3357 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3358 tail = portp->tx.buf;
3359 if (len > 0) {
3360 outsb((ioaddr + EREG_DATA), tail, len);
3361 tail += len;
3362 }
3363 portp->tx.tail = tail;
3364 }
3365
3366stl_txalldone:
3367 outb((EOSRR + portp->uartaddr), ioaddr);
3368 outb(0, (ioaddr + EREG_DATA));
3369}
3370
3371/*****************************************************************************/
3372
3373/*
3374 * Receive character interrupt handler. Determine if we have good chars
3375 * or bad chars and then process appropriately. Good chars are easy
3376 * just shove the lot into the RX buffer and set all status byte to 0.
3377 * If a bad RX char then process as required. This routine needs to be
3378 * fast! In practice it is possible that we get an interrupt on a port
3379 * that is closed. This can happen on hangups - since they completely
3380 * shutdown a port not in user context. Need to handle this case.
3381 */
3382
ca7ed0f2 3383static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3384{
ca7ed0f2 3385 struct stlport *portp;
1da177e4
LT		 3386 struct tty_struct *tty;
3387 unsigned int ioack, len, buflen;
3388 unsigned char status;
3389 char ch;
3390
a0564e14 3391 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3392
3393 ioack = inb(ioaddr + EREG_RXACK);
3394 if ((ioack & panelp->ackmask) != 0) {
3395 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3396 return;
3397 }
3398 portp = panelp->ports[(ioack >> 3)];
d18a750f 3399 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3400
3401 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3402 outb((RDCR + portp->uartaddr), ioaddr);
3403 len = inb(ioaddr + EREG_DATA);
33f0f88f 3404 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3405 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3406 outb((RDSR + portp->uartaddr), ioaddr);
3407 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3408 portp->stats.rxlost += len;
3409 portp->stats.rxtotal += len;
3410 } else {
843b568c 3411 len = min(len, buflen);
1da177e4 3412 if (len > 0) {
33f0f88f 3413 unsigned char *ptr;
1da177e4 3414 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3415 tty_prepare_flip_string(tty, &ptr, len);
3416 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3417 tty_schedule_flip(tty);
3418 portp->stats.rxtotal += len;
3419 }
3420 }
3421 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3422 outb((RDSR + portp->uartaddr), ioaddr);
3423 status = inb(ioaddr + EREG_DATA);
3424 ch = inb(ioaddr + EREG_DATA);
3425 if (status & ST_PARITY)
3426 portp->stats.rxparity++;
3427 if (status & ST_FRAMING)
3428 portp->stats.rxframing++;
3429 if (status & ST_OVERRUN)
3430 portp->stats.rxoverrun++;
3431 if (status & ST_BREAK)
3432 portp->stats.rxbreaks++;
3433 if (status & ST_SCHARMASK) {
3434 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3435 portp->stats.txxon++;
3436 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3437 portp->stats.txxoff++;
3438 goto stl_rxalldone;
3439 }
33f0f88f 3440 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3441 if (portp->rxmarkmsk & status) {
3442 if (status & ST_BREAK) {
3443 status = TTY_BREAK;
f8ae4764 3444 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3445 do_SAK(tty);
3446 BRDENABLE(portp->brdnr, portp->pagenr);
3447 }
c62429d9 3448 } else if (status & ST_PARITY)
1da177e4 3449 status = TTY_PARITY;
c62429d9 3450 else if (status & ST_FRAMING)
1da177e4 3451 status = TTY_FRAME;
c62429d9 3452 else if(status & ST_OVERRUN)
1da177e4 3453 status = TTY_OVERRUN;
c62429d9 3454 else
1da177e4 3455 status = 0;
c62429d9 3456 } else
1da177e4 3457 status = 0;
33f0f88f
AC		 3458 tty_insert_flip_char(tty, ch, status);
3459 tty_schedule_flip(tty);
1da177e4
LT		 3460 }
3461 } else {
3462 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3463 tty_kref_put(tty);
1da177e4
LT		 3464 return;
3465 }
3466
3467stl_rxalldone:
d18a750f 3468 tty_kref_put(tty);
1da177e4
LT		 3469 outb((EOSRR + portp->uartaddr), ioaddr);
3470 outb(0, (ioaddr + EREG_DATA));
3471}
3472
3473/*****************************************************************************/
3474
3475/*
3476 * Modem interrupt handler. The is called when the modem signal line
3477 * (DCD) has changed state. Leave most of the work to the off-level
3478 * processing routine.
3479 */
3480
ca7ed0f2 3481static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3482{
ca7ed0f2 3483 struct stlport *portp;
1da177e4
LT		 3484 unsigned int ioack;
3485 unsigned char misr;
3486
a0564e14 3487 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3488
3489 ioack = inb(ioaddr + EREG_MDACK);
3490 if (((ioack & panelp->ackmask) != 0) ||
3491 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3492 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3493 return;
3494 }
3495 portp = panelp->ports[(ioack >> 3)];
3496
3497 outb((MISR + portp->uartaddr), ioaddr);
3498 misr = inb(ioaddr + EREG_DATA);
3499 if (misr & MISR_DCD) {
ccfea3c9 3500 stl_cd_change(portp);
1da177e4
LT		 3501 portp->stats.modem++;
3502 }
3503
3504 outb((EOSRR + portp->uartaddr), ioaddr);
3505 outb(0, (ioaddr + EREG_DATA));
3506}
3507
3508/*****************************************************************************/
3509/* SC26198 HARDWARE FUNCTIONS */
3510/*****************************************************************************/
3511
3512/*
3513 * These functions get/set/update the registers of the sc26198 UARTs.
3514 * Access to the sc26198 registers is via an address/data io port pair.
3515 * (Maybe should make this inline...)
3516 */
3517
ca7ed0f2 3518static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3519{
3520 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3521 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3522}
3523
ca7ed0f2 3524static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3525{
3526 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3527 outb(value, (portp->ioaddr + XP_DATA));
3528}
3529
ca7ed0f2 3530static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3531{
3532 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3533 if (inb(portp->ioaddr + XP_DATA) != value) {
3534 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3535 return 1;
1da177e4 3536 }
014c2544 3537 return 0;
1da177e4
LT		 3538}
3539
3540/*****************************************************************************/
3541
3542/*
3543 * Functions to get and set the sc26198 global registers.
3544 */
3545
ca7ed0f2 3546static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3547{
3548 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3549 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3550}
3551
3552#if 0
ca7ed0f2 3553static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3554{
3555 outb(regnr, (portp->ioaddr + XP_ADDR));
3556 outb(value, (portp->ioaddr + XP_DATA));
3557}
3558#endif
3559
3560/*****************************************************************************/
3561
3562/*
3563 * Inbitialize the UARTs in a panel. We don't care what sort of board
3564 * these ports are on - since the port io registers are almost
3565 * identical when dealing with ports.
3566 */
3567
ca7ed0f2 3568static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3569{
3570 int chipmask, i;
3571 int nrchips, ioaddr;
3572
a0564e14 3573 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3574
3575 BRDENABLE(panelp->brdnr, panelp->pagenr);
3576
3577/*
3578 * Check that each chip is present and started up OK.
3579 */
3580 chipmask = 0;
3581 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3582 if (brdp->brdtype == BRD_ECHPCI)
3583 outb(panelp->pagenr, brdp->ioctrl);
3584
c62429d9 3585 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3586 ioaddr = panelp->iobase + (i * 4);
3587 outb(SCCR, (ioaddr + XP_ADDR));
3588 outb(CR_RESETALL, (ioaddr + XP_DATA));
3589 outb(TSTR, (ioaddr + XP_ADDR));
3590 if (inb(ioaddr + XP_DATA) != 0) {
3591 printk("STALLION: sc26198 not responding, "
3592 "brd=%d panel=%d chip=%d\n",
3593 panelp->brdnr, panelp->panelnr, i);
3594 continue;
3595 }
3596 chipmask |= (0x1 << i);
3597 outb(GCCR, (ioaddr + XP_ADDR));
3598 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3599 outb(WDTRCR, (ioaddr + XP_ADDR));
3600 outb(0xff, (ioaddr + XP_DATA));
3601 }
3602
3603 BRDDISABLE(panelp->brdnr);
014c2544 3604 return chipmask;
1da177e4
LT		 3605}
3606
3607/*****************************************************************************/
3608
3609/*
3610 * Initialize hardware specific port registers.
3611 */
3612
ca7ed0f2 3613static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3614{
a0564e14
JS		 3615 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3616 panelp, portp);
1da177e4 3617
615e4a71
JS		 3618 if ((brdp == NULL) || (panelp == NULL) ||
3619 (portp == NULL))
1da177e4
LT		 3620 return;
3621
3622 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3623 portp->uartaddr = (portp->portnr & 0x07) << 4;
3624 portp->pagenr = panelp->pagenr;
3625 portp->hwid = 0x1;
3626
3627 BRDENABLE(portp->brdnr, portp->pagenr);
3628 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3629 BRDDISABLE(portp->brdnr);
3630}
3631
3632/*****************************************************************************/
3633
3634/*
3635 * Set up the sc26198 registers for a port based on the termios port
3636 * settings.
3637 */
3638
606d099c 3639static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3640{
ca7ed0f2 3641 struct stlbrd *brdp;
1da177e4
LT		 3642 unsigned long flags;
3643 unsigned int baudrate;
3644 unsigned char mr0, mr1, mr2, clk;
3645 unsigned char imron, imroff, iopr, ipr;
3646
3647 mr0 = 0;
3648 mr1 = 0;
3649 mr2 = 0;
3650 clk = 0;
3651 iopr = 0;
3652 imron = 0;
3653 imroff = 0;
3654
3655 brdp = stl_brds[portp->brdnr];
615e4a71 3656 if (brdp == NULL)
1da177e4
LT		 3657 return;
3658
3659/*
3660 * Set up the RX char ignore mask with those RX error types we
3661 * can ignore.
3662 */
3663 portp->rxignoremsk = 0;
3664 if (tiosp->c_iflag & IGNPAR)
3665 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3666 SR_RXOVERRUN);
3667 if (tiosp->c_iflag & IGNBRK)
3668 portp->rxignoremsk |= SR_RXBREAK;
3669
3670 portp->rxmarkmsk = SR_RXOVERRUN;
3671 if (tiosp->c_iflag & (INPCK | PARMRK))
3672 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3673 if (tiosp->c_iflag & BRKINT)
3674 portp->rxmarkmsk |= SR_RXBREAK;
3675
3676/*
3677 * Go through the char size, parity and stop bits and set all the
3678 * option register appropriately.
3679 */
3680 switch (tiosp->c_cflag & CSIZE) {
3681 case CS5:
3682 mr1 |= MR1_CS5;
3683 break;
3684 case CS6:
3685 mr1 |= MR1_CS6;
3686 break;
3687 case CS7:
3688 mr1 |= MR1_CS7;
3689 break;
3690 default:
3691 mr1 |= MR1_CS8;
3692 break;
3693 }
3694
3695 if (tiosp->c_cflag & CSTOPB)
3696 mr2 |= MR2_STOP2;
3697 else
3698 mr2 |= MR2_STOP1;
3699
3700 if (tiosp->c_cflag & PARENB) {
3701 if (tiosp->c_cflag & PARODD)
3702 mr1 |= (MR1_PARENB | MR1_PARODD);
3703 else
3704 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3705 } else
1da177e4 3706 mr1 |= MR1_PARNONE;
1da177e4
LT		 3707
3708 mr1 |= MR1_ERRBLOCK;
3709
3710/*
3711 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3712 * space for hardware flow control and the like. This should be set to
3713 * VMIN.
3714 */
3715 mr2 |= MR2_RXFIFOHALF;
3716
3717/*
3718 * Calculate the baud rate timers. For now we will just assume that
3719 * the input and output baud are the same. The sc26198 has a fixed
3720 * baud rate table, so only discrete baud rates possible.
3721 */
3722 baudrate = tiosp->c_cflag & CBAUD;
3723 if (baudrate & CBAUDEX) {
3724 baudrate &= ~CBAUDEX;
3725 if ((baudrate < 1) || (baudrate > 4))
3726 tiosp->c_cflag &= ~CBAUDEX;
3727 else
3728 baudrate += 15;
3729 }
3730 baudrate = stl_baudrates[baudrate];
3731 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3732 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3733 baudrate = 57600;
f8ae4764 3734 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3735 baudrate = 115200;
f8ae4764 3736 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3737 baudrate = 230400;
f8ae4764 3738 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3739 baudrate = 460800;
f8ae4764 3740 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3741 baudrate = (portp->baud_base / portp->custom_divisor);
3742 }
3743 if (baudrate > STL_SC26198MAXBAUD)
3744 baudrate = STL_SC26198MAXBAUD;
3745
c62429d9
JS		 3746 if (baudrate > 0)
3747 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3748 if (baudrate <= sc26198_baudtable[clk])
3749 break;
1da177e4
LT		 3750
3751/*
3752 * Check what form of modem signaling is required and set it up.
3753 */
3754 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3755 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3756 } else {
3757 iopr |= IOPR_DCDCOS;
3758 imron |= IR_IOPORT;
f8ae4764 3759 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3760 }
3761
3762/*
3763 * Setup sc26198 enhanced modes if we can. In particular we want to
3764 * handle as much of the flow control as possible automatically. As
3765 * well as saving a few CPU cycles it will also greatly improve flow
3766 * control reliability.
3767 */
3768 if (tiosp->c_iflag & IXON) {
3769 mr0 |= MR0_SWFTX | MR0_SWFT;
3770 imron |= IR_XONXOFF;
c62429d9 3771 } else
1da177e4 3772 imroff |= IR_XONXOFF;
c62429d9 3773
1da177e4
LT		 3774 if (tiosp->c_iflag & IXOFF)
3775 mr0 |= MR0_SWFRX;
3776
3777 if (tiosp->c_cflag & CRTSCTS) {
3778 mr2 |= MR2_AUTOCTS;
3779 mr1 |= MR1_AUTORTS;
3780 }
3781
3782/*
3783 * All sc26198 register values calculated so go through and set
3784 * them all up.
3785 */
3786
a0564e14 3787 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3788 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3789 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3790 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3791 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3792 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3793 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3794
b65b5b59 3795 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3796 BRDENABLE(portp->brdnr, portp->pagenr);
3797 stl_sc26198setreg(portp, IMR, 0);
3798 stl_sc26198updatereg(portp, MR0, mr0);
3799 stl_sc26198updatereg(portp, MR1, mr1);
3800 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3801 stl_sc26198updatereg(portp, MR2, mr2);
3802 stl_sc26198updatereg(portp, IOPIOR,
3803 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3804
3805 if (baudrate > 0) {
3806 stl_sc26198setreg(portp, TXCSR, clk);
3807 stl_sc26198setreg(portp, RXCSR, clk);
3808 }
3809
3810 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3811 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3812
3813 ipr = stl_sc26198getreg(portp, IPR);
3814 if (ipr & IPR_DCD)
3815 portp->sigs &= ~TIOCM_CD;
3816 else
3817 portp->sigs |= TIOCM_CD;
3818
3819 portp->imr = (portp->imr & ~imroff) | imron;
3820 stl_sc26198setreg(portp, IMR, portp->imr);
3821 BRDDISABLE(portp->brdnr);
b65b5b59 3822 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3823}
3824
3825/*****************************************************************************/
3826
3827/*
3828 * Set the state of the DTR and RTS signals.
3829 */
3830
ca7ed0f2 3831static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3832{
3833 unsigned char iopioron, iopioroff;
3834 unsigned long flags;
3835
a0564e14
JS		 3836 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3837 dtr, rts);
1da177e4
LT		 3838
3839 iopioron = 0;
3840 iopioroff = 0;
3841 if (dtr == 0)
3842 iopioroff |= IPR_DTR;
3843 else if (dtr > 0)
3844 iopioron |= IPR_DTR;
3845 if (rts == 0)
3846 iopioroff |= IPR_RTS;
3847 else if (rts > 0)
3848 iopioron |= IPR_RTS;
3849
b65b5b59 3850 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3851 BRDENABLE(portp->brdnr, portp->pagenr);
3852 stl_sc26198setreg(portp, IOPIOR,
3853 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3854 BRDDISABLE(portp->brdnr);
b65b5b59 3855 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3856}
3857
3858/*****************************************************************************/
3859
3860/*
3861 * Return the state of the signals.
3862 */
3863
ca7ed0f2 3864static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3865{
3866 unsigned char ipr;
3867 unsigned long flags;
3868 int sigs;
3869
a0564e14 3870 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3871
b65b5b59 3872 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3873 BRDENABLE(portp->brdnr, portp->pagenr);
3874 ipr = stl_sc26198getreg(portp, IPR);
3875 BRDDISABLE(portp->brdnr);
b65b5b59 3876 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3877
3878 sigs = 0;
3879 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3880 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3881 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3882 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3883 sigs |= TIOCM_DSR;
014c2544 3884 return sigs;
1da177e4
LT		 3885}
3886
3887/*****************************************************************************/
3888
3889/*
3890 * Enable/Disable the Transmitter and/or Receiver.
3891 */
3892
ca7ed0f2 3893static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3894{
3895 unsigned char ccr;
3896 unsigned long flags;
3897
a0564e14 3898 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3899
3900 ccr = portp->crenable;
3901 if (tx == 0)
3902 ccr &= ~CR_TXENABLE;
3903 else if (tx > 0)
3904 ccr |= CR_TXENABLE;
3905 if (rx == 0)
3906 ccr &= ~CR_RXENABLE;
3907 else if (rx > 0)
3908 ccr |= CR_RXENABLE;
3909
b65b5b59 3910 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3911 BRDENABLE(portp->brdnr, portp->pagenr);
3912 stl_sc26198setreg(portp, SCCR, ccr);
3913 BRDDISABLE(portp->brdnr);
3914 portp->crenable = ccr;
b65b5b59 3915 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3916}
3917
3918/*****************************************************************************/
3919
3920/*
3921 * Start/stop the Transmitter and/or Receiver.
3922 */
3923
ca7ed0f2 3924static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3925{
3926 unsigned char imr;
3927 unsigned long flags;
3928
a0564e14 3929 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3930
3931 imr = portp->imr;
3932 if (tx == 0)
3933 imr &= ~IR_TXRDY;
3934 else if (tx == 1)
3935 imr |= IR_TXRDY;
3936 if (rx == 0)
3937 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
3938 else if (rx > 0)
3939 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
3940
b65b5b59 3941 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3942 BRDENABLE(portp->brdnr, portp->pagenr);
3943 stl_sc26198setreg(portp, IMR, imr);
3944 BRDDISABLE(portp->brdnr);
3945 portp->imr = imr;
3946 if (tx > 0)
3947 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3948 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3949}
3950
3951/*****************************************************************************/
3952
3953/*
3954 * Disable all interrupts from this port.
3955 */
3956
ca7ed0f2 3957static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 3958{
3959 unsigned long flags;
3960
a0564e14 3961 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 3962
b65b5b59 3963 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3964 BRDENABLE(portp->brdnr, portp->pagenr);
3965 portp->imr = 0;
3966 stl_sc26198setreg(portp, IMR, 0);
3967 BRDDISABLE(portp->brdnr);
b65b5b59 3968 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3969}
3970
3971/*****************************************************************************/
3972
ca7ed0f2 3973static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3974{
3975 unsigned long flags;
3976
a0564e14 3977 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3978
b65b5b59 3979 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3980 BRDENABLE(portp->brdnr, portp->pagenr);
3981 if (len == 1) {
3982 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
3983 portp->stats.txbreaks++;
c62429d9 3984 } else
1da177e4 3985 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 3986
1da177e4 3987 BRDDISABLE(portp->brdnr);
b65b5b59 3988 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3989}
3990
3991/*****************************************************************************/
3992
3993/*
3994 * Take flow control actions...
3995 */
3996
ca7ed0f2 3997static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3998{
3999 struct tty_struct *tty;
4000 unsigned long flags;
4001 unsigned char mr0;
4002
a0564e14 4003 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4004
615e4a71 4005 if (portp == NULL)
1da177e4 4006 return;
d18a750f 4007 tty = tty_port_tty_get(&portp->port);
615e4a71 4008 if (tty == NULL)
1da177e4
LT		 4009 return;
4010
b65b5b59 4011 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4012 BRDENABLE(portp->brdnr, portp->pagenr);
4013
4014 if (state) {
4015 if (tty->termios->c_iflag & IXOFF) {
4016 mr0 = stl_sc26198getreg(portp, MR0);
4017 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4018 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4019 mr0 |= MR0_SWFRX;
4020 portp->stats.rxxon++;
4021 stl_sc26198wait(portp);
4022 stl_sc26198setreg(portp, MR0, mr0);
4023 }
4024/*
4025 * Question: should we return RTS to what it was before? It may
4026 * have been set by an ioctl... Suppose not, since if you have
4027 * hardware flow control set then it is pretty silly to go and
4028 * set the RTS line by hand.
4029 */
4030 if (tty->termios->c_cflag & CRTSCTS) {
4031 stl_sc26198setreg(portp, MR1,
4032 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4033 stl_sc26198setreg(portp, IOPIOR,
4034 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4035 portp->stats.rxrtson++;
4036 }
4037 } else {
4038 if (tty->termios->c_iflag & IXOFF) {
4039 mr0 = stl_sc26198getreg(portp, MR0);
4040 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4041 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4042 mr0 &= ~MR0_SWFRX;
4043 portp->stats.rxxoff++;
4044 stl_sc26198wait(portp);
4045 stl_sc26198setreg(portp, MR0, mr0);
4046 }
4047 if (tty->termios->c_cflag & CRTSCTS) {
4048 stl_sc26198setreg(portp, MR1,
4049 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4050 stl_sc26198setreg(portp, IOPIOR,
4051 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4052 portp->stats.rxrtsoff++;
4053 }
4054 }
4055
4056 BRDDISABLE(portp->brdnr);
b65b5b59 4057 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4058 tty_kref_put(tty);
1da177e4
LT		 4059}
4060
4061/*****************************************************************************/
4062
4063/*
4064 * Send a flow control character.
4065 */
4066
ca7ed0f2 4067static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4068{
4069 struct tty_struct *tty;
4070 unsigned long flags;
4071 unsigned char mr0;
4072
a0564e14 4073 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4074
615e4a71 4075 if (portp == NULL)
1da177e4 4076 return;
d18a750f 4077 tty = tty_port_tty_get(&portp->port);
615e4a71 4078 if (tty == NULL)
1da177e4
LT		 4079 return;
4080
b65b5b59 4081 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4082 BRDENABLE(portp->brdnr, portp->pagenr);
4083 if (state) {
4084 mr0 = stl_sc26198getreg(portp, MR0);
4085 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4086 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4087 mr0 |= MR0_SWFRX;
4088 portp->stats.rxxon++;
4089 stl_sc26198wait(portp);
4090 stl_sc26198setreg(portp, MR0, mr0);
4091 } else {
4092 mr0 = stl_sc26198getreg(portp, MR0);
4093 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4094 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4095 mr0 &= ~MR0_SWFRX;
4096 portp->stats.rxxoff++;
4097 stl_sc26198wait(portp);
4098 stl_sc26198setreg(portp, MR0, mr0);
4099 }
4100 BRDDISABLE(portp->brdnr);
b65b5b59 4101 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4102 tty_kref_put(tty);
1da177e4
LT		 4103}
4104
4105/*****************************************************************************/
4106
ca7ed0f2 4107static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4108{
4109 unsigned long flags;
4110
a0564e14 4111 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4112
615e4a71 4113 if (portp == NULL)
1da177e4
LT		 4114 return;
4115
b65b5b59 4116 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4117 BRDENABLE(portp->brdnr, portp->pagenr);
4118 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4119 stl_sc26198setreg(portp, SCCR, portp->crenable);
4120 BRDDISABLE(portp->brdnr);
4121 portp->tx.tail = portp->tx.head;
b65b5b59 4122 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4123}
4124
4125/*****************************************************************************/
4126
4127/*
4128 * Return the current state of data flow on this port. This is only
4129 * really interresting when determining if data has fully completed
4130 * transmission or not... The sc26198 interrupt scheme cannot
4131 * determine when all data has actually drained, so we need to
4132 * check the port statusy register to be sure.
4133 */
4134
ca7ed0f2 4135static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4136{
4137 unsigned long flags;
4138 unsigned char sr;
4139
a0564e14 4140 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4141
615e4a71 4142 if (portp == NULL)
014c2544 4143 return 0;
1da177e4 4144 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4145 return 1;
1da177e4 4146
b65b5b59 4147 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4148 BRDENABLE(portp->brdnr, portp->pagenr);
4149 sr = stl_sc26198getreg(portp, SR);
4150 BRDDISABLE(portp->brdnr);
b65b5b59 4151 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4152
014c2544 4153 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4154}
4155
4156/*****************************************************************************/
4157
4158/*
4159 * Delay for a small amount of time, to give the sc26198 a chance
4160 * to process a command...
4161 */
4162
ca7ed0f2 4163static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4164{
4165 int i;
4166
a0564e14 4167 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4168
615e4a71 4169 if (portp == NULL)
1da177e4
LT		 4170 return;
4171
c62429d9 4172 for (i = 0; i < 20; i++)
1da177e4
LT		 4173 stl_sc26198getglobreg(portp, TSTR);
4174}
4175
4176/*****************************************************************************/
4177
4178/*
4179 * If we are TX flow controlled and in IXANY mode then we may
4180 * need to unflow control here. We gotta do this because of the
4181 * automatic flow control modes of the sc26198.
4182 */
4183
60be4810 4184static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4185{
4186 unsigned char mr0;
4187
4188 mr0 = stl_sc26198getreg(portp, MR0);
4189 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4190 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4191 stl_sc26198wait(portp);
4192 stl_sc26198setreg(portp, MR0, mr0);
4193 clear_bit(ASYI_TXFLOWED, &portp->istate);
4194}
4195
4196/*****************************************************************************/
4197
4198/*
4199 * Interrupt service routine for sc26198 panels.
4200 */
4201
ca7ed0f2 4202static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4203{
ca7ed0f2 4204 struct stlport *portp;
1da177e4
LT		 4205 unsigned int iack;
4206
b65b5b59
AC		 4207 spin_lock(&brd_lock);
4208
1da177e4
LT		 4209/*
4210 * Work around bug in sc26198 chip... Cannot have A6 address
4211 * line of UART high, else iack will be returned as 0.
4212 */
4213 outb(0, (iobase + 1));
4214
4215 iack = inb(iobase + XP_IACK);
4216 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4217
4218 if (iack & IVR_RXDATA)
4219 stl_sc26198rxisr(portp, iack);
4220 else if (iack & IVR_TXDATA)
4221 stl_sc26198txisr(portp);
4222 else
4223 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4224
4225 spin_unlock(&brd_lock);
1da177e4
LT		 4226}
4227
4228/*****************************************************************************/
4229
4230/*
4231 * Transmit interrupt handler. This has gotta be fast! Handling TX
4232 * chars is pretty simple, stuff as many as possible from the TX buffer
4233 * into the sc26198 FIFO.
4234 * In practice it is possible that interrupts are enabled but that the
4235 * port has been hung up. Need to handle not having any TX buffer here,
4236 * this is done by using the side effect that head and tail will also
4237 * be NULL if the buffer has been freed.
4238 */
4239
ca7ed0f2 4240static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4241{
d18a750f 4242 struct tty_struct *tty;
1da177e4
LT		 4243 unsigned int ioaddr;
4244 unsigned char mr0;
4245 int len, stlen;
4246 char *head, *tail;
4247
a0564e14 4248 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4249
4250 ioaddr = portp->ioaddr;
4251 head = portp->tx.head;
4252 tail = portp->tx.tail;
4253 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4254 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4255 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4256 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4257 tty = tty_port_tty_get(&portp->port);
4258 if (tty) {
4259 tty_wakeup(tty);
4260 tty_kref_put(tty);
4261 }
1da177e4
LT		 4262 }
4263
4264 if (len == 0) {
4265 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4266 mr0 = inb(ioaddr + XP_DATA);
4267 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4268 portp->imr &= ~IR_TXRDY;
4269 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4270 outb(portp->imr, (ioaddr + XP_DATA));
4271 clear_bit(ASYI_TXBUSY, &portp->istate);
4272 } else {
4273 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4274 outb(mr0, (ioaddr + XP_DATA));
4275 }
4276 } else {
843b568c 4277 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4278 portp->stats.txtotal += len;
319fe7c3
JS		 4279 stlen = min_t(unsigned int, len,
4280 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4281 outb(GTXFIFO, (ioaddr + XP_ADDR));
4282 outsb((ioaddr + XP_DATA), tail, stlen);
4283 len -= stlen;
4284 tail += stlen;
4285 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4286 tail = portp->tx.buf;
4287 if (len > 0) {
4288 outsb((ioaddr + XP_DATA), tail, len);
4289 tail += len;
4290 }
4291 portp->tx.tail = tail;
4292 }
4293}
4294
4295/*****************************************************************************/
4296
4297/*
4298 * Receive character interrupt handler. Determine if we have good chars
4299 * or bad chars and then process appropriately. Good chars are easy
4300 * just shove the lot into the RX buffer and set all status byte to 0.
4301 * If a bad RX char then process as required. This routine needs to be
4302 * fast! In practice it is possible that we get an interrupt on a port
4303 * that is closed. This can happen on hangups - since they completely
4304 * shutdown a port not in user context. Need to handle this case.
4305 */
4306
ca7ed0f2 4307static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4308{
4309 struct tty_struct *tty;
4310 unsigned int len, buflen, ioaddr;
4311
a0564e14 4312 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4313
d18a750f 4314 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4315 ioaddr = portp->ioaddr;
4316 outb(GIBCR, (ioaddr + XP_ADDR));
4317 len = inb(ioaddr + XP_DATA) + 1;
4318
4319 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4320 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4321 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4322 outb(GRXFIFO, (ioaddr + XP_ADDR));
4323 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4324 portp->stats.rxlost += len;
4325 portp->stats.rxtotal += len;
4326 } else {
843b568c 4327 len = min(len, buflen);
1da177e4 4328 if (len > 0) {
33f0f88f 4329 unsigned char *ptr;
1da177e4 4330 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4331 tty_prepare_flip_string(tty, &ptr, len);
4332 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4333 tty_schedule_flip(tty);
4334 portp->stats.rxtotal += len;
4335 }
4336 }
4337 } else {
4338 stl_sc26198rxbadchars(portp);
4339 }
4340
4341/*
4342 * If we are TX flow controlled and in IXANY mode then we may need
4343 * to unflow control here. We gotta do this because of the automatic
4344 * flow control modes of the sc26198.
4345 */
4346 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4347 if ((tty != NULL) &&
4348 (tty->termios != NULL) &&
1da177e4
LT		 4349 (tty->termios->c_iflag & IXANY)) {
4350 stl_sc26198txunflow(portp, tty);
4351 }
4352 }
d18a750f 4353 tty_kref_put(tty);
1da177e4
LT		 4354}
4355
4356/*****************************************************************************/
4357
4358/*
4359 * Process an RX bad character.
4360 */
4361
60be4810 4362static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4363{
4364 struct tty_struct *tty;
4365 unsigned int ioaddr;
4366
d18a750f 4367 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4368 ioaddr = portp->ioaddr;
4369
4370 if (status & SR_RXPARITY)
4371 portp->stats.rxparity++;
4372 if (status & SR_RXFRAMING)
4373 portp->stats.rxframing++;
4374 if (status & SR_RXOVERRUN)
4375 portp->stats.rxoverrun++;
4376 if (status & SR_RXBREAK)
4377 portp->stats.rxbreaks++;
4378
615e4a71 4379 if ((tty != NULL) &&
1da177e4
LT		 4380 ((portp->rxignoremsk & status) == 0)) {
4381 if (portp->rxmarkmsk & status) {
4382 if (status & SR_RXBREAK) {
4383 status = TTY_BREAK;
f8ae4764 4384 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4385 do_SAK(tty);
4386 BRDENABLE(portp->brdnr, portp->pagenr);
4387 }
c62429d9 4388 } else if (status & SR_RXPARITY)
1da177e4 4389 status = TTY_PARITY;
c62429d9 4390 else if (status & SR_RXFRAMING)
1da177e4 4391 status = TTY_FRAME;
c62429d9 4392 else if(status & SR_RXOVERRUN)
1da177e4 4393 status = TTY_OVERRUN;
c62429d9 4394 else
1da177e4 4395 status = 0;
c62429d9 4396 } else
1da177e4 4397 status = 0;
1da177e4 4398
33f0f88f
AC		 4399 tty_insert_flip_char(tty, ch, status);
4400 tty_schedule_flip(tty);
1da177e4
LT		 4401
4402 if (status == 0)
4403 portp->stats.rxtotal++;
4404 }
d18a750f 4405 tty_kref_put(tty);
1da177e4
LT		 4406}
4407
4408/*****************************************************************************/
4409
4410/*
4411 * Process all characters in the RX FIFO of the UART. Check all char
4412 * status bytes as well, and process as required. We need to check
4413 * all bytes in the FIFO, in case some more enter the FIFO while we
4414 * are here. To get the exact character error type we need to switch
4415 * into CHAR error mode (that is why we need to make sure we empty
4416 * the FIFO).
4417 */
4418
ca7ed0f2 4419static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4420{
4421 unsigned char status, mr1;
4422 char ch;
4423
4424/*
4425 * To get the precise error type for each character we must switch
4426 * back into CHAR error mode.
4427 */
4428 mr1 = stl_sc26198getreg(portp, MR1);
4429 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4430
4431 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4432 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4433 ch = stl_sc26198getreg(portp, RXFIFO);
4434 stl_sc26198rxbadch(portp, status, ch);
4435 }
4436
4437/*
4438 * To get correct interrupt class we must switch back into BLOCK
4439 * error mode.
4440 */
4441 stl_sc26198setreg(portp, MR1, mr1);
4442}
4443
4444/*****************************************************************************/
4445
4446/*
4447 * Other interrupt handler. This includes modem signals, flow
4448 * control actions, etc. Most stuff is left to off-level interrupt
4449 * processing time.
4450 */
4451
ca7ed0f2 4452static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4453{
4454 unsigned char cir, ipr, xisr;
4455
a0564e14 4456 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4457
4458 cir = stl_sc26198getglobreg(portp, CIR);
4459
4460 switch (cir & CIR_SUBTYPEMASK) {
4461 case CIR_SUBCOS:
4462 ipr = stl_sc26198getreg(portp, IPR);
4463 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4464 stl_cd_change(portp);
1da177e4
LT		 4465 portp->stats.modem++;
4466 }
4467 break;
4468 case CIR_SUBXONXOFF:
4469 xisr = stl_sc26198getreg(portp, XISR);
4470 if (xisr & XISR_RXXONGOT) {
4471 set_bit(ASYI_TXFLOWED, &portp->istate);
4472 portp->stats.txxoff++;
4473 }
4474 if (xisr & XISR_RXXOFFGOT) {
4475 clear_bit(ASYI_TXFLOWED, &portp->istate);
4476 portp->stats.txxon++;
4477 }
4478 break;
4479 case CIR_SUBBREAK:
4480 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4481 stl_sc26198rxbadchars(portp);
4482 break;
4483 default:
4484 break;
4485 }
4486}
4487
fc06b5cf
JS		 4488static void stl_free_isabrds(void)
4489{
4490 struct stlbrd *brdp;
4491 unsigned int i;
4492
4493 for (i = 0; i < stl_nrbrds; i++) {
4494 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4495 continue;
4496
4497 free_irq(brdp->irq, brdp);
4498
4499 stl_cleanup_panels(brdp);
4500
4501 release_region(brdp->ioaddr1, brdp->iosize1);
4502 if (brdp->iosize2 > 0)
4503 release_region(brdp->ioaddr2, brdp->iosize2);
4504
4505 kfree(brdp);
4506 stl_brds[i] = NULL;
4507 }
4508}
4509
23b85a15
JS		 4510/*
4511 * Loadable module initialization stuff.
4512 */
4513static int __init stallion_module_init(void)
4514{
843b568c
JS		 4515 struct stlbrd *brdp;
4516 struct stlconf conf;
aeaccfe4 4517 unsigned int i, j;
fc06b5cf 4518 int retval;
23b85a15
JS		 4519
4520 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4521
4522 spin_lock_init(&stallion_lock);
4523 spin_lock_init(&brd_lock);
4524
e415109f
JS		 4525 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4526 if (!stl_serial) {
4527 retval = -ENOMEM;
4528 goto err;
4529 }
4530
4531 stl_serial->owner = THIS_MODULE;
4532 stl_serial->driver_name = stl_drvname;
4533 stl_serial->name = "ttyE";
4534 stl_serial->major = STL_SERIALMAJOR;
4535 stl_serial->minor_start = 0;
4536 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4537 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4538 stl_serial->init_termios = stl_deftermios;
4539 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4540 tty_set_operations(stl_serial, &stl_ops);
4541
4542 retval = tty_register_driver(stl_serial);
4543 if (retval) {
4544 printk("STALLION: failed to register serial driver\n");
4545 goto err_frtty;
4546 }
4547
843b568c
JS		 4548/*
4549 * Find any dynamically supported boards. That is via module load
4550 * line options.
4551 */
4552 for (i = stl_nrbrds; i < stl_nargs; i++) {
4553 memset(&conf, 0, sizeof(conf));
4554 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4555 continue;
4556 if ((brdp = stl_allocbrd()) == NULL)
4557 continue;
4558 brdp->brdnr = i;
4559 brdp->brdtype = conf.brdtype;
4560 brdp->ioaddr1 = conf.ioaddr1;
4561 brdp->ioaddr2 = conf.ioaddr2;
4562 brdp->irq = conf.irq;
4563 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4564 stl_brds[brdp->brdnr] = brdp;
4565 if (stl_brdinit(brdp)) {
4566 stl_brds[brdp->brdnr] = NULL;
843b568c 4567 kfree(brdp);
b08b5ad9 4568 } else {
aeaccfe4
JS		 4569 for (j = 0; j < brdp->nrports; j++)
4570 tty_register_device(stl_serial,
4571 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4572 stl_nrbrds = i + 1;
79cfe7ab 4573 }
843b568c 4574 }
23b85a15 4575
79cfe7ab 4576 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4577 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4578 if (retval && stl_nrbrds == 0) {
4579 printk(KERN_ERR "STALLION: can't register pci driver\n");
4580 goto err_unrtty;
fc06b5cf 4581 }
23b85a15
JS		 4582
4583/*
4584 * Set up a character driver for per board stuff. This is mainly used
4585 * to do stats ioctls on the ports.
4586 */
4587 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4588 printk("STALLION: failed to register serial board device\n");
4589
4590 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4591 if (IS_ERR(stallion_class))
4592 printk("STALLION: failed to create class\n");
23b85a15 4593 for (i = 0; i < 4; i++)
03457cd4
GKH		 4594 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4595 NULL, "staliomem%d", i);
23b85a15 4596
23b85a15 4597 return 0;
e415109f
JS		 4598err_unrtty:
4599 tty_unregister_driver(stl_serial);
4600err_frtty:
fc06b5cf 4601 put_tty_driver(stl_serial);
b1b84fe0
JS		 4602err:
4603 return retval;
23b85a15
JS		 4604}
4605
4606static void __exit stallion_module_exit(void)
4607{
aeaccfe4
JS		 4608 struct stlbrd *brdp;
4609 unsigned int i, j;
23b85a15
JS		 4610
4611 pr_debug("cleanup_module()\n");
4612
4613 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4614 stl_drvversion);
4615
4616/*
4617 * Free up all allocated resources used by the ports. This includes
4618 * memory and interrupts. As part of this process we will also do
4619 * a hangup on every open port - to try to flush out any processes
4620 * hanging onto ports.
4621 */
aeaccfe4
JS		 4622 for (i = 0; i < stl_nrbrds; i++) {
4623 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4624 continue;
4625 for (j = 0; j < brdp->nrports; j++)
4626 tty_unregister_device(stl_serial,
4627 brdp->brdnr * STL_MAXPORTS + j);
4628 }
fc06b5cf 4629
23b85a15 4630 for (i = 0; i < 4; i++)
07c015e7 4631 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4632 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4633 class_destroy(stallion_class);
4634
b1b84fe0
JS		 4635 pci_unregister_driver(&stl_pcidriver);
4636
fc06b5cf 4637 stl_free_isabrds();
e415109f
JS		 4638
4639 tty_unregister_driver(stl_serial);
4640 put_tty_driver(stl_serial);
23b85a15
JS		 4641}
4642
4643module_init(stallion_module_init);
4644module_exit(stallion_module_exit);
4645
4646MODULE_AUTHOR("Greg Ungerer");
4647MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4648MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)