[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / rio / rioinit.c

/*
** -----------------------------------------------------------------------------
**
**  Perle Specialix driver for Linux
**  Ported from existing RIO Driver for SCO sources.
 *
 *  (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
 *
 *      This program is free software; you can redistribute it and/or modify
 *      it under the terms of the GNU General Public License as published by
 *      the Free Software Foundation; either version 2 of the License, or
 *      (at your option) any later version.
 *
 *      This program is distributed in the hope that it will be useful,
 *      but WITHOUT ANY WARRANTY; without even the implied warranty of
 *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *      GNU General Public License for more details.
 *
 *      You should have received a copy of the GNU General Public License
 *      along with this program; if not, write to the Free Software
 *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
**
**	Module		: rioinit.c
**	SID		: 1.3
**	Last Modified	: 11/6/98 10:33:43
**	Retrieved	: 11/6/98 10:33:49
**
**  ident @(#)rioinit.c	1.3
**
** -----------------------------------------------------------------------------
*/

#include <linux/module.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/string.h>
#include <asm/uaccess.h>

#include <linux/termios.h>
#include <linux/serial.h>

#include <linux/generic_serial.h>


#include "linux_compat.h"
#include "pkt.h"
#include "daemon.h"
#include "rio.h"
#include "riospace.h"
#include "cmdpkt.h"
#include "map.h"
#include "rup.h"
#include "port.h"
#include "riodrvr.h"
#include "rioinfo.h"
#include "func.h"
#include "errors.h"
#include "pci.h"

#include "parmmap.h"
#include "unixrup.h"
#include "board.h"
#include "host.h"
#include "phb.h"
#include "link.h"
#include "cmdblk.h"
#include "route.h"
#include "cirrus.h"
#include "rioioctl.h"
#include "rio_linux.h"

int RIOPCIinit(struct rio_info *p, int Mode);

static int RIOScrub(int, u8 __iomem *, int);


/**
** RIOAssignAT :
**
** Fill out the fields in the p->RIOHosts structure now we know we know
** we have a board present.
**
** bits < 0 indicates 8 bit operation requested,
** bits > 0 indicates 16 bit operation.
*/

int RIOAssignAT(struct rio_info *p, int	Base, void __iomem *virtAddr, int mode)
{
	int		bits;
	struct DpRam __iomem *cardp = (struct DpRam __iomem *)virtAddr;

	if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE))
		bits = BYTE_OPERATION;
	else
		bits = WORD_OPERATION;

	/*
	** Board has passed its scrub test. Fill in all the
	** transient stuff.
	*/
	p->RIOHosts[p->RIONumHosts].Caddr	= virtAddr;
	p->RIOHosts[p->RIONumHosts].CardP	= virtAddr;

	/*
	** Revision 01 AT host cards don't support WORD operations,
	*/
	if (readb(&cardp->DpRevision) == 01)
		bits = BYTE_OPERATION;

	p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
	p->RIOHosts[p->RIONumHosts].Copy = rio_copy_to_card;
											/* set this later */
	p->RIOHosts[p->RIONumHosts].Slot = -1;
	p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits;
	writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE ,
		&p->RIOHosts[p->RIONumHosts].Control);
	writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
	writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE,
		&p->RIOHosts[p->RIONumHosts].Control);
	writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
	p->RIOHosts[p->RIONumHosts].UniqueNum =
		((readb(&p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
		((readb(&p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
		((readb(&p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
		((readb(&p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);

	p->RIONumHosts++;
	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
	return(1);
}

static	u8	val[] = {
#ifdef VERY_LONG_TEST
	  0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
	  0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36, 
#endif
	  0xff, 0x00, 0x00 };

#define	TEST_END sizeof(val)

/*
** RAM test a board. 
** Nothing too complicated, just enough to check it out.
*/
int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, int slot)
{
	struct DpRam __iomem *DpRam = caddr;
	void __iomem *ram[4];
	int  size[4];
	int  op, bank;
	int  nbanks;

	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=%p, slot=%d\n",
			type, DpRam, slot);

	RIOHostReset(type, DpRam, slot);

	/*
	** Scrub the memory. This comes in several banks:
	** DPsram1	- 7000h bytes
	** DPsram2	- 200h  bytes
	** DPsram3	- 7000h bytes
	** scratch	- 1000h bytes
	*/

	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");

	size[0] = DP_SRAM1_SIZE;
	size[1] = DP_SRAM2_SIZE;
	size[2] = DP_SRAM3_SIZE;
	size[3] = DP_SCRATCH_SIZE;

	ram[0] = DpRam->DpSram1;
	ram[1] = DpRam->DpSram2;
	ram[2] = DpRam->DpSram3;
	nbanks = (type == RIO_PCI) ? 3 : 4;
	if (nbanks == 4)
		ram[3] = DpRam->DpScratch;


	if (nbanks == 3) {
		rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: %p(0x%x), %p(0x%x), %p(0x%x)\n",
				ram[0], size[0], ram[1], size[1], ram[2], size[2]);
	} else {
		rio_dprintk (RIO_DEBUG_INIT, "RIO-init: %p(0x%x), %p(0x%x), %p(0x%x), %p(0x%x)\n",
				ram[0], size[0], ram[1], size[1], ram[2], size[2], ram[3], size[3]);
	}

	/*
	** This scrub operation will test for crosstalk between
	** banks. TEST_END is a magic number, and relates to the offset
	** within the 'val' array used by Scrub.
	*/
	for (op=0; op<TEST_END; op++) {
		for (bank=0; bank<nbanks; bank++) {
			if (RIOScrub(op, ram[bank], size[bank]) == RIO_FAIL) {
				rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n", 
							bank, op);
				return RIO_FAIL;
			}
		}
	}

	rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
	return 0;
}


/*
** Scrub an area of RAM.
** Define PRETEST and POSTTEST for a more thorough checking of the
** state of the memory.
** Call with op set to an index into the above 'val' array to determine
** which value will be written into memory.
** Call with op set to zero means that the RAM will not be read and checked
** before it is written.
** Call with op not zero and the RAM will be read and compared with val[op-1]
** to check that the data from the previous phase was retained.
*/

static int RIOScrub(int op, u8 __iomem *ram, int size)
{
	int off;
	unsigned char	oldbyte;
	unsigned char	newbyte;
	unsigned char	invbyte;
	unsigned short	oldword;
	unsigned short	newword;
	unsigned short	invword;
	unsigned short	swapword;

	if (op) {
		oldbyte = val[op-1];
		oldword = oldbyte | (oldbyte<<8);
	} else
	  oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
	newbyte = val[op];
	newword = newbyte | (newbyte<<8);
	invbyte = ~newbyte;
	invword = invbyte | (invbyte<<8);

	/*
	** Check that the RAM contains the value that should have been left there
	** by the previous test (not applicable for pass zero)
	*/
	if (op) {
		for (off=0; off<size; off++) {
			if (readb(ram + off) != oldbyte) {
				rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
				return RIO_FAIL;
			}
		}
		for (off=0; off<size; off+=2) {
			if (readw(ram + off) != oldword) {
				rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword, readw(ram + off));
				rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
				return RIO_FAIL;
			}
		}
	}

	/*
	** Now write the INVERSE of the test data into every location, using
	** BYTE write operations, first checking before each byte is written
	** that the location contains the old value still, and checking after
	** the write that the location contains the data specified - this is
	** the BYTE read/write test.
	*/
	for (off=0; off<size; off++) {
		if (op && (readb(ram + off) != oldbyte)) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
			return RIO_FAIL;
		}
		writeb(invbyte, ram + off);
		if (readb(ram + off) != invbyte) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, readb(ram + off));
			return RIO_FAIL;
		}
	}

	/*
	** now, use WORD operations to write the test value into every location,
	** check as before that the location contains the previous test value
	** before overwriting, and that it contains the data value written
	** afterwards.
	** This is the WORD operation test.
	*/
	for (off=0; off<size; off+=2) {
		if (readw(ram + off) != invword) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, readw(ram + off));
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
			return RIO_FAIL;
		}

		writew(newword, ram + off);
		if ( readw(ram + off) != newword ) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
			return RIO_FAIL;
		}
	}

	/*
	** now run through the block of memory again, first in byte mode
	** then in word mode, and check that all the locations contain the
	** required test data.
	*/
	for (off=0; off<size; off++) {
		if (readb(ram + off) != newbyte) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
			return RIO_FAIL;
		}
	}

	for (off=0; off<size; off+=2) {
		if (readw(ram + off) != newword ) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
			return RIO_FAIL;
		}
	}

	/*
	** time to check out byte swapping errors
	*/
	swapword = invbyte | (newbyte << 8);

	for (off=0; off<size; off+=2) {
		writeb(invbyte, &ram[off]);
		writeb(newbyte, &ram[off+1]);
	}

	for ( off=0; off<size; off+=2 ) {
		if (readw(ram + off) != swapword) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, readw(ram + off));
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
			return RIO_FAIL;
		}
		writew(~swapword, ram + off);
	}

	for (off=0; off<size; off+=2) {
		if (readb(ram + off) != newbyte) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
			return RIO_FAIL;
		}
		if (readb(ram + off + 1) != invbyte) {
			rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, readb(ram + off + 1));
			return RIO_FAIL;
		}
		writew(newword, ram + off);
	}
	return 0;
}


int RIODefaultName(struct rio_info *p, struct Host *HostP, unsigned int	UnitId)
{
	memcpy(HostP->Mapping[UnitId].Name, "UNKNOWN RTA X-XX", 17);
	HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
	if ((UnitId+1) > 9) {
		HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
		HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
	}
	else {
		HostP->Mapping[UnitId].Name[14]='1'+UnitId;
		HostP->Mapping[UnitId].Name[15]=0;
	}
	return 0;
}

#define RIO_RELEASE	"Linux"
#define RELEASE_ID	"1.0"

static struct rioVersion	stVersion;

struct rioVersion *RIOVersid(void)
{
    strlcpy(stVersion.version, "RIO driver for linux V1.0",
	    sizeof(stVersion.version));
    strlcpy(stVersion.buildDate, __DATE__,
	    sizeof(stVersion.buildDate));

    return &stVersion;
}

void RIOHostReset(unsigned int Type, struct DpRam __iomem *DpRamP, unsigned int Slot)
{
	/*
	** Reset the Tpu
	*/
	rio_dprintk (RIO_DEBUG_INIT,  "RIOHostReset: type 0x%x", Type);
	switch ( Type ) {
	case RIO_AT:
		rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
		writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE | BYTE_OPERATION |
			SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
		writeb(0xFF, &DpRamP->DpResetTpu);
		udelay(3);
			rio_dprintk (RIO_DEBUG_INIT,  "RIOHostReset: Don't know if it worked. Try reset again\n");
		writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE |
			BYTE_OPERATION | SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
		writeb(0xFF, &DpRamP->DpResetTpu);
		udelay(3);
		break;
	case RIO_PCI:
		rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
		writeb(RIO_PCI_BOOT_FROM_RAM, &DpRamP->DpControl);
		writeb(0xFF, &DpRamP->DpResetInt);
		writeb(0xFF, &DpRamP->DpResetTpu);
		udelay(100);
		break;
	default:
		rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
		break;
	}
	return;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	** -----------------------------------------------------------------------------
	3	**
	4	** Perle Specialix driver for Linux
	5	** Ported from existing RIO Driver for SCO sources.
	6	*
	7	* (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	**
	23	** Module : rioinit.c
	24	** SID : 1.3
	25	** Last Modified : 11/6/98 10:33:43
	26	** Retrieved : 11/6/98 10:33:49
	27	**
	28	** ident @(#)rioinit.c 1.3
	29	**
	30	** -----------------------------------------------------------------------------
	31	*/
1da177e4	32
1da177e4 LT	33	#include <linux/module.h>
	34	#include <linux/slab.h>
	35	#include <linux/errno.h>
97998d8f	36	#include <linux/delay.h>
1da177e4 LT	37	#include <asm/io.h>
	38	#include <asm/system.h>
	39	#include <asm/string.h>
1da177e4 LT	40	#include <asm/uaccess.h>
	41
	42	#include <linux/termios.h>
	43	#include <linux/serial.h>
	44
	45	#include <linux/generic_serial.h>
	46
	47
	48	#include "linux_compat.h"
1da177e4 LT	49	#include "pkt.h"
	50	#include "daemon.h"
	51	#include "rio.h"
	52	#include "riospace.h"
1da177e4 LT	53	#include "cmdpkt.h"
1da177e4 LT	54	#include "map.h"
1da177e4 LT	55	#include "rup.h"
	56	#include "port.h"
	57	#include "riodrvr.h"
	58	#include "rioinfo.h"
	59	#include "func.h"
	60	#include "errors.h"
	61	#include "pci.h"
	62
	63	#include "parmmap.h"
	64	#include "unixrup.h"
	65	#include "board.h"
	66	#include "host.h"
1da177e4 LT	67	#include "phb.h"
	68	#include "link.h"
	69	#include "cmdblk.h"
	70	#include "route.h"
1da177e4 LT	71	#include "cirrus.h"
	72	#include "rioioctl.h"
	73	#include "rio_linux.h"
	74
1da177e4 LT	75	int RIOPCIinit(struct rio_info *p, int Mode);
1da177e4 LT	76
d886cb58	77	static int RIOScrub(int, u8 __iomem *, int);
1da177e4	78
1da177e4 LT	79
	80	/**
	81	** RIOAssignAT :
	82	**
	83	** Fill out the fields in the p->RIOHosts structure now we know we know
	84	** we have a board present.
	85	**
	86	** bits < 0 indicates 8 bit operation requested,
	87	** bits > 0 indicates 16 bit operation.
	88	*/
00d83a54	89
d886cb58	90	int RIOAssignAT(struct rio_info p, int Base, void __iomem virtAddr, int mode)
1da177e4 LT	91	{
1da177e4 LT	92	int bits;
d886cb58	93	struct DpRam __iomem cardp = (struct DpRam __iomem )virtAddr;
1da177e4 LT	94
	95	if ((Base < ONE_MEG) \|\| (mode & BYTE_ACCESS_MODE))
	96	bits = BYTE_OPERATION;
	97	else
	98	bits = WORD_OPERATION;
	99
	100	/*
	101	** Board has passed its scrub test. Fill in all the
	102	** transient stuff.
	103	*/
	104	p->RIOHosts[p->RIONumHosts].Caddr = virtAddr;
d886cb58	105	p->RIOHosts[p->RIONumHosts].CardP = virtAddr;
1da177e4 LT	106
	107	/*
	108	** Revision 01 AT host cards don't support WORD operations,
	109	*/
00d83a54	110	if (readb(&cardp->DpRevision) == 01)
1da177e4 LT	111	bits = BYTE_OPERATION;
	112
	113	p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
00d83a54	114	p->RIOHosts[p->RIONumHosts].Copy = rio_copy_to_card;
1da177e4 LT	115	/* set this later */
	116	p->RIOHosts[p->RIONumHosts].Slot = -1;
	117	p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS \| SLOW_AT_BUS \| bits;
00d83a54 AC	118	writeb(BOOT_FROM_RAM \| EXTERNAL_BUS_OFF \| p->RIOHosts[p->RIONumHosts].Mode \| INTERRUPT_DISABLE ,
	119	&p->RIOHosts[p->RIONumHosts].Control);
	120	writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
	121	writeb(BOOT_FROM_RAM \| EXTERNAL_BUS_OFF \| p->RIOHosts[p->RIONumHosts].Mode \| INTERRUPT_DISABLE,
	122	&p->RIOHosts[p->RIONumHosts].Control);
	123	writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
1da177e4	124	p->RIOHosts[p->RIONumHosts].UniqueNum =
00d83a54 AC	125	((readb(&p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)\|
	126	((readb(&p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)\|
	127	((readb(&p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)\|
	128	((readb(&p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
1da177e4 LT	129	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);
	130
	131	p->RIONumHosts++;
	132	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
	133	return(1);
	134	}
1da177e4	135
00d83a54	136	static u8 val[] = {
1da177e4 LT	137	#ifdef VERY_LONG_TEST
	138	0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
	139	0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36,
	140	#endif
	141	0xff, 0x00, 0x00 };
	142
	143	#define TEST_END sizeof(val)
	144
	145	/*
	146	** RAM test a board.
	147	** Nothing too complicated, just enough to check it out.
	148	*/
d886cb58	149	int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, int slot)
1da177e4	150	{
d886cb58 AV	151	struct DpRam __iomem *DpRam = caddr;
d886cb58 AV	152	void __iomem *ram[4];
1da177e4 LT	153	int size[4];
	154	int op, bank;
	155	int nbanks;
	156
554b7c80	157	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=%p, slot=%d\n",
00d83a54	158	type, DpRam, slot);
1da177e4 LT	159
	160	RIOHostReset(type, DpRam, slot);
	161
	162	/*
	163	** Scrub the memory. This comes in several banks:
	164	** DPsram1 - 7000h bytes
	165	** DPsram2 - 200h bytes
	166	** DPsram3 - 7000h bytes
	167	** scratch - 1000h bytes
	168	*/
	169
	170	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");
	171
	172	size[0] = DP_SRAM1_SIZE;
	173	size[1] = DP_SRAM2_SIZE;
	174	size[2] = DP_SRAM3_SIZE;
	175	size[3] = DP_SCRATCH_SIZE;
	176
d886cb58 AV	177	ram[0] = DpRam->DpSram1;
	178	ram[1] = DpRam->DpSram2;
	179	ram[2] = DpRam->DpSram3;
1da177e4 LT	180	nbanks = (type == RIO_PCI) ? 3 : 4;
1da177e4 LT	181	if (nbanks == 4)
d886cb58	182	ram[3] = DpRam->DpScratch;
1da177e4 LT	183
	184
	185	if (nbanks == 3) {
554b7c80	186	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: %p(0x%x), %p(0x%x), %p(0x%x)\n",
00d83a54	187	ram[0], size[0], ram[1], size[1], ram[2], size[2]);
1da177e4	188	} else {
554b7c80	189	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: %p(0x%x), %p(0x%x), %p(0x%x), %p(0x%x)\n",
00d83a54	190	ram[0], size[0], ram[1], size[1], ram[2], size[2], ram[3], size[3]);
1da177e4 LT	191	}
	192
	193	/*
	194	** This scrub operation will test for crosstalk between
	195	** banks. TEST_END is a magic number, and relates to the offset
	196	** within the 'val' array used by Scrub.
	197	*/
	198	for (op=0; op<TEST_END; op++) {
	199	for (bank=0; bank<nbanks; bank++) {
d886cb58	200	if (RIOScrub(op, ram[bank], size[bank]) == RIO_FAIL) {
1da177e4 LT	201	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n",
	202	bank, op);
	203	return RIO_FAIL;
	204	}
	205	}
	206	}
	207
	208	rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
554b7c80	209	return 0;
1da177e4 LT	210	}
	211
	212
	213	/*
	214	** Scrub an area of RAM.
	215	** Define PRETEST and POSTTEST for a more thorough checking of the
	216	** state of the memory.
	217	** Call with op set to an index into the above 'val' array to determine
	218	** which value will be written into memory.
	219	** Call with op set to zero means that the RAM will not be read and checked
	220	** before it is written.
0779bf2d	221	** Call with op not zero and the RAM will be read and compared with val[op-1]
1da177e4 LT	222	** to check that the data from the previous phase was retained.
1da177e4 LT	223	*/
00d83a54	224
d886cb58	225	static int RIOScrub(int op, u8 __iomem *ram, int size)
1da177e4	226	{
00d83a54	227	int off;
1da177e4 LT	228	unsigned char oldbyte;
	229	unsigned char newbyte;
	230	unsigned char invbyte;
	231	unsigned short oldword;
	232	unsigned short newword;
	233	unsigned short invword;
	234	unsigned short swapword;
	235
	236	if (op) {
	237	oldbyte = val[op-1];
	238	oldword = oldbyte \| (oldbyte<<8);
	239	} else
	240	oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
	241	newbyte = val[op];
	242	newword = newbyte \| (newbyte<<8);
	243	invbyte = ~newbyte;
	244	invword = invbyte \| (invbyte<<8);
	245
	246	/*
	247	** Check that the RAM contains the value that should have been left there
	248	** by the previous test (not applicable for pass zero)
	249	*/
	250	if (op) {
	251	for (off=0; off<size; off++) {
00d83a54 AC	252	if (readb(ram + off) != oldbyte) {
00d83a54 AC	253	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
1da177e4 LT	254	return RIO_FAIL;
	255	}
	256	}
	257	for (off=0; off<size; off+=2) {
00d83a54 AC	258	if (readw(ram + off) != oldword) {
	259	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword, readw(ram + off));
	260	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
1da177e4 LT	261	return RIO_FAIL;
	262	}
	263	}
	264	}
	265
	266	/*
	267	** Now write the INVERSE of the test data into every location, using
	268	** BYTE write operations, first checking before each byte is written
	269	** that the location contains the old value still, and checking after
	270	** the write that the location contains the data specified - this is
	271	** the BYTE read/write test.
	272	*/
	273	for (off=0; off<size; off++) {
00d83a54 AC	274	if (op && (readb(ram + off) != oldbyte)) {
00d83a54 AC	275	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
1da177e4 LT	276	return RIO_FAIL;
1da177e4 LT	277	}
00d83a54 AC	278	writeb(invbyte, ram + off);
	279	if (readb(ram + off) != invbyte) {
	280	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, readb(ram + off));
1da177e4 LT	281	return RIO_FAIL;
	282	}
	283	}
	284
	285	/*
	286	** now, use WORD operations to write the test value into every location,
	287	** check as before that the location contains the previous test value
	288	** before overwriting, and that it contains the data value written
	289	** afterwards.
	290	** This is the WORD operation test.
	291	*/
	292	for (off=0; off<size; off+=2) {
00d83a54 AC	293	if (readw(ram + off) != invword) {
	294	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, readw(ram + off));
	295	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
1da177e4 LT	296	return RIO_FAIL;
	297	}
	298
00d83a54 AC	299	writew(newword, ram + off);
	300	if ( readw(ram + off) != newword ) {
	301	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
	302	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
1da177e4 LT	303	return RIO_FAIL;
	304	}
	305	}
	306
	307	/*
	308	** now run through the block of memory again, first in byte mode
	309	** then in word mode, and check that all the locations contain the
	310	** required test data.
	311	*/
	312	for (off=0; off<size; off++) {
00d83a54 AC	313	if (readb(ram + off) != newbyte) {
00d83a54 AC	314	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
1da177e4 LT	315	return RIO_FAIL;
	316	}
	317	}
	318
	319	for (off=0; off<size; off+=2) {
00d83a54 AC	320	if (readw(ram + off) != newword ) {
	321	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
	322	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
1da177e4 LT	323	return RIO_FAIL;
	324	}
	325	}
	326
	327	/*
	328	** time to check out byte swapping errors
	329	*/
	330	swapword = invbyte \| (newbyte << 8);
	331
	332	for (off=0; off<size; off+=2) {
00d83a54 AC	333	writeb(invbyte, &ram[off]);
00d83a54 AC	334	writeb(newbyte, &ram[off+1]);
1da177e4 LT	335	}
	336
	337	for ( off=0; off<size; off+=2 ) {
00d83a54 AC	338	if (readw(ram + off) != swapword) {
	339	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, readw(ram + off));
	340	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
1da177e4 LT	341	return RIO_FAIL;
1da177e4 LT	342	}
00d83a54	343	writew(~swapword, ram + off);
1da177e4 LT	344	}
	345
	346	for (off=0; off<size; off+=2) {
00d83a54 AC	347	if (readb(ram + off) != newbyte) {
00d83a54 AC	348	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
1da177e4 LT	349	return RIO_FAIL;
1da177e4 LT	350	}
00d83a54 AC	351	if (readb(ram + off + 1) != invbyte) {
00d83a54 AC	352	rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, readb(ram + off + 1));
1da177e4 LT	353	return RIO_FAIL;
1da177e4 LT	354	}
00d83a54	355	writew(newword, ram + off);
1da177e4	356	}
554b7c80	357	return 0;
1da177e4 LT	358	}
1da177e4 LT	359
1da177e4	360
00d83a54	361	int RIODefaultName(struct rio_info p, struct Host HostP, unsigned int UnitId)
1da177e4	362	{
00d83a54	363	memcpy(HostP->Mapping[UnitId].Name, "UNKNOWN RTA X-XX", 17);
1da177e4 LT	364	HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
	365	if ((UnitId+1) > 9) {
	366	HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
	367	HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
	368	}
	369	else {
	370	HostP->Mapping[UnitId].Name[14]='1'+UnitId;
	371	HostP->Mapping[UnitId].Name[15]=0;
	372	}
	373	return 0;
	374	}
	375
	376	#define RIO_RELEASE "Linux"
	377	#define RELEASE_ID "1.0"
	378
1da177e4 LT	379	static struct rioVersion stVersion;
1da177e4 LT	380
00d83a54	381	struct rioVersion *RIOVersid(void)
1da177e4 LT	382	{
	383	strlcpy(stVersion.version, "RIO driver for linux V1.0",
	384	sizeof(stVersion.version));
	385	strlcpy(stVersion.buildDate, __DATE__,
	386	sizeof(stVersion.buildDate));
	387
	388	return &stVersion;
	389	}
	390
d886cb58	391	void RIOHostReset(unsigned int Type, struct DpRam __iomem *DpRamP, unsigned int Slot)
1da177e4 LT	392	{
	393	/*
	394	** Reset the Tpu
	395	*/
	396	rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type);
	397	switch ( Type ) {
00d83a54 AC	398	case RIO_AT:
	399	rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
	400	writeb(BOOT_FROM_RAM \| EXTERNAL_BUS_OFF \| INTERRUPT_DISABLE \| BYTE_OPERATION \|
	401	SLOW_LINKS \| SLOW_AT_BUS, &DpRamP->DpControl);
	402	writeb(0xFF, &DpRamP->DpResetTpu);
	403	udelay(3);
1da177e4	404	rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n");
00d83a54 AC	405	writeb(BOOT_FROM_RAM \| EXTERNAL_BUS_OFF \| INTERRUPT_DISABLE \|
	406	BYTE_OPERATION \| SLOW_LINKS \| SLOW_AT_BUS, &DpRamP->DpControl);
	407	writeb(0xFF, &DpRamP->DpResetTpu);
	408	udelay(3);
	409	break;
1da177e4 LT	410	case RIO_PCI:
1da177e4 LT	411	rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
00d83a54 AC	412	writeb(RIO_PCI_BOOT_FROM_RAM, &DpRamP->DpControl);
	413	writeb(0xFF, &DpRamP->DpResetInt);
	414	writeb(0xFF, &DpRamP->DpResetTpu);
97998d8f	415	udelay(100);
1da177e4	416	break;
1da177e4 LT	417	default:
	418	rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
	419	break;
	420	}
	421	return;
	422	}