tty: moxa: split open lock
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / moxa.c
CommitLineData
1da177e4
LT
1/*****************************************************************************/
2/*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
b9705b60
JS
5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
6 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
1da177e4
LT
7 *
8 * This code is loosely based on the Linux serial driver, written by
9 * Linus Torvalds, Theodore T'so and others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
1da177e4
LT
15 */
16
17/*
18 * MOXA Intellio Series Driver
19 * for : LINUX
20 * date : 1999/1/7
21 * version : 5.1
22 */
23
1da177e4
LT
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
03718234 29#include <linux/firmware.h>
1da177e4
LT
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
46
47#include <asm/system.h>
48#include <asm/io.h>
49#include <asm/uaccess.h>
50
03718234
JS
51#include "moxa.h"
52
b9705b60 53#define MOXA_VERSION "6.0k"
1da177e4 54
03718234
JS
55#define MOXA_FW_HDRLEN 32
56
11324edd 57#define MOXAMAJOR 172
1da177e4 58
11324edd 59#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 60#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 61#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 62
08d01c79
JS
63#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
64 (brd)->boardType == MOXA_BOARD_C320_PCI)
65
1da177e4
LT
66/*
67 * Define the Moxa PCI vendor and device IDs.
68 */
11324edd
JS
69#define MOXA_BUS_TYPE_ISA 0
70#define MOXA_BUS_TYPE_PCI 1
1da177e4 71
1da177e4
LT
72enum {
73 MOXA_BOARD_C218_PCI = 1,
74 MOXA_BOARD_C218_ISA,
75 MOXA_BOARD_C320_PCI,
76 MOXA_BOARD_C320_ISA,
77 MOXA_BOARD_CP204J,
78};
79
80static char *moxa_brdname[] =
81{
82 "C218 Turbo PCI series",
83 "C218 Turbo ISA series",
84 "C320 Turbo PCI series",
85 "C320 Turbo ISA series",
86 "CP-204J series",
87};
88
89#ifdef CONFIG_PCI
90static struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS
91 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
92 .driver_data = MOXA_BOARD_C218_PCI },
93 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
94 .driver_data = MOXA_BOARD_C320_PCI },
95 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
96 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT
97 { 0 }
98};
99MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
100#endif /* CONFIG_PCI */
101
03718234
JS
102struct moxa_port;
103
8f8ecbad 104static struct moxa_board_conf {
1da177e4
LT
105 int boardType;
106 int numPorts;
1da177e4 107 int busType;
8f8ecbad 108
810ab09b 109 unsigned int ready;
8f8ecbad 110
03718234
JS
111 struct moxa_port *ports;
112
8f8ecbad
JS
113 void __iomem *basemem;
114 void __iomem *intNdx;
115 void __iomem *intPend;
116 void __iomem *intTable;
117} moxa_boards[MAX_BOARDS];
118
119struct mxser_mstatus {
120 tcflag_t cflag;
121 int cts;
122 int dsr;
123 int ri;
124 int dcd;
9dff89cd 125};
1da177e4 126
8f8ecbad
JS
127struct moxaq_str {
128 int inq;
129 int outq;
130};
1da177e4 131
8f8ecbad 132struct moxa_port {
9de6a51f 133 struct tty_port port;
b4173f45 134 struct moxa_board_conf *board;
7bcf97d1
JS
135 void __iomem *tableAddr;
136
1da177e4 137 int type;
1da177e4 138 int cflag;
7bcf97d1 139 unsigned long statusflags;
1da177e4 140
8482bcd5 141 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS
142 u8 lineCtrl;
143 u8 lowChkFlag;
8f8ecbad 144};
1da177e4 145
74d7d97b
JS
146struct mon_str {
147 int tick;
148 int rxcnt[MAX_PORTS];
149 int txcnt[MAX_PORTS];
150};
151
1da177e4 152/* statusflags */
a808ac0c
AC
153#define TXSTOPPED 1
154#define LOWWAIT 2
155#define EMPTYWAIT 3
1da177e4 156
1da177e4
LT
157#define SERIAL_DO_RESTART
158
1da177e4
LT
159#define WAKEUP_CHARS 256
160
1da177e4 161static int ttymajor = MOXAMAJOR;
74d7d97b
JS
162static struct mon_str moxaLog;
163static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 164static unsigned int moxaLowWaterChk;
a8f5cda0 165static DEFINE_MUTEX(moxa_openlock);
e8c62103 166static DEFINE_SPINLOCK(moxa_lock);
1da177e4
LT
167/* Variables for insmod */
168#ifdef MODULE
d353eca4
JS
169static unsigned long baseaddr[MAX_BOARDS];
170static unsigned int type[MAX_BOARDS];
171static unsigned int numports[MAX_BOARDS];
1da177e4
LT
172#endif
173
174MODULE_AUTHOR("William Chen");
175MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
176MODULE_LICENSE("GPL");
177#ifdef MODULE
d353eca4
JS
178module_param_array(type, uint, NULL, 0);
179MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
180module_param_array(baseaddr, ulong, NULL, 0);
181MODULE_PARM_DESC(baseaddr, "base address");
182module_param_array(numports, uint, NULL, 0);
183MODULE_PARM_DESC(numports, "numports (ignored for C218)");
1da177e4
LT
184#endif
185module_param(ttymajor, int, 0);
1da177e4 186
1da177e4
LT
187/*
188 * static functions:
189 */
1da177e4
LT
190static int moxa_open(struct tty_struct *, struct file *);
191static void moxa_close(struct tty_struct *, struct file *);
192static int moxa_write(struct tty_struct *, const unsigned char *, int);
193static int moxa_write_room(struct tty_struct *);
194static void moxa_flush_buffer(struct tty_struct *);
195static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 196static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT
197static void moxa_stop(struct tty_struct *);
198static void moxa_start(struct tty_struct *);
199static void moxa_hangup(struct tty_struct *);
200static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
201static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
202 unsigned int set, unsigned int clear);
203static void moxa_poll(unsigned long);
db1acaa6 204static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 205static void moxa_shutdown(struct tty_port *);
31f35939 206static int moxa_carrier_raised(struct tty_port *);
f176178b 207static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT
208/*
209 * moxa board interface functions:
210 */
b4173f45
JS
211static void MoxaPortEnable(struct moxa_port *);
212static void MoxaPortDisable(struct moxa_port *);
213static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
214static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
215static void MoxaPortLineCtrl(struct moxa_port *, int, int);
216static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
217static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 218static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 219static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 220static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS
221static int MoxaPortTxQueue(struct moxa_port *);
222static int MoxaPortRxQueue(struct moxa_port *);
223static int MoxaPortTxFree(struct moxa_port *);
224static void MoxaPortTxDisable(struct moxa_port *);
225static void MoxaPortTxEnable(struct moxa_port *);
8f8ecbad
JS
226static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
227static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
b4173f45 228static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 229
74d7d97b
JS
230/*
231 * I/O functions
232 */
233
a808ac0c
AC
234static DEFINE_SPINLOCK(moxafunc_lock);
235
74d7d97b
JS
236static void moxa_wait_finish(void __iomem *ofsAddr)
237{
238 unsigned long end = jiffies + moxaFuncTout;
239
240 while (readw(ofsAddr + FuncCode) != 0)
241 if (time_after(jiffies, end))
242 return;
243 if (readw(ofsAddr + FuncCode) != 0 && printk_ratelimit())
244 printk(KERN_WARNING "moxa function expired\n");
245}
246
eaa95a8d 247static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 248{
f5c5a36d
AC
249 unsigned long flags;
250 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS
251 writew(arg, ofsAddr + FuncArg);
252 writew(cmd, ofsAddr + FuncCode);
253 moxa_wait_finish(ofsAddr);
f5c5a36d
AC
254 spin_unlock_irqrestore(&moxafunc_lock, flags);
255}
256
257static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
258{
259 unsigned long flags;
260 u16 ret;
261 spin_lock_irqsave(&moxafunc_lock, flags);
262 writew(arg, ofsAddr + FuncArg);
263 writew(cmd, ofsAddr + FuncCode);
264 moxa_wait_finish(ofsAddr);
265 ret = readw(ofsAddr + FuncArg);
266 spin_unlock_irqrestore(&moxafunc_lock, flags);
267 return ret;
74d7d97b
JS
268}
269
7bcf97d1
JS
270static void moxa_low_water_check(void __iomem *ofsAddr)
271{
272 u16 rptr, wptr, mask, len;
273
274 if (readb(ofsAddr + FlagStat) & Xoff_state) {
275 rptr = readw(ofsAddr + RXrptr);
276 wptr = readw(ofsAddr + RXwptr);
277 mask = readw(ofsAddr + RX_mask);
278 len = (wptr - rptr) & mask;
279 if (len <= Low_water)
280 moxafunc(ofsAddr, FC_SendXon, 0);
281 }
282}
283
74d7d97b
JS
284/*
285 * TTY operations
286 */
287
288static int moxa_ioctl(struct tty_struct *tty, struct file *file,
289 unsigned int cmd, unsigned long arg)
290{
291 struct moxa_port *ch = tty->driver_data;
292 void __user *argp = (void __user *)arg;
a8f5cda0 293 int status, ret = 0;
74d7d97b
JS
294
295 if (tty->index == MAX_PORTS) {
296 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
297 cmd != MOXA_GETMSTATUS)
298 return -EINVAL;
299 } else if (!ch)
300 return -ENODEV;
301
302 switch (cmd) {
303 case MOXA_GETDATACOUNT:
304 moxaLog.tick = jiffies;
a8f5cda0
JS
305 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
306 ret = -EFAULT;
307 break;
74d7d97b
JS
308 case MOXA_FLUSH_QUEUE:
309 MoxaPortFlushData(ch, arg);
a8f5cda0 310 break;
74d7d97b
JS
311 case MOXA_GET_IOQUEUE: {
312 struct moxaq_str __user *argm = argp;
313 struct moxaq_str tmp;
314 struct moxa_port *p;
315 unsigned int i, j;
316
317 for (i = 0; i < MAX_BOARDS; i++) {
318 p = moxa_boards[i].ports;
319 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
320 memset(&tmp, 0, sizeof(tmp));
e8c62103 321 spin_lock_bh(&moxa_lock);
74d7d97b
JS
322 if (moxa_boards[i].ready) {
323 tmp.inq = MoxaPortRxQueue(p);
324 tmp.outq = MoxaPortTxQueue(p);
325 }
e8c62103
AC
326 spin_unlock_bh(&moxa_lock);
327 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS
328 return -EFAULT;
329 }
330 }
a8f5cda0 331 break;
74d7d97b
JS
332 } case MOXA_GET_OQUEUE:
333 status = MoxaPortTxQueue(ch);
a8f5cda0
JS
334 ret = put_user(status, (unsigned long __user *)argp);
335 break;
74d7d97b
JS
336 case MOXA_GET_IQUEUE:
337 status = MoxaPortRxQueue(ch);
a8f5cda0
JS
338 ret = put_user(status, (unsigned long __user *)argp);
339 break;
74d7d97b
JS
340 case MOXA_GETMSTATUS: {
341 struct mxser_mstatus __user *argm = argp;
342 struct mxser_mstatus tmp;
343 struct moxa_port *p;
344 unsigned int i, j;
345
346 for (i = 0; i < MAX_BOARDS; i++) {
347 p = moxa_boards[i].ports;
348 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 349 struct tty_struct *ttyp;
74d7d97b 350 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC
351 spin_lock_bh(&moxa_lock);
352 if (!moxa_boards[i].ready) {
353 spin_unlock_bh(&moxa_lock);
74d7d97b 354 goto copy;
e8c62103 355 }
74d7d97b
JS
356
357 status = MoxaPortLineStatus(p);
e8c62103
AC
358 spin_unlock_bh(&moxa_lock);
359
74d7d97b
JS
360 if (status & 1)
361 tmp.cts = 1;
362 if (status & 2)
363 tmp.dsr = 1;
364 if (status & 4)
365 tmp.dcd = 1;
366
d450b5a0
AC
367 ttyp = tty_port_tty_get(&p->port);
368 if (!ttyp || !ttyp->termios)
74d7d97b
JS
369 tmp.cflag = p->cflag;
370 else
d450b5a0
AC
371 tmp.cflag = ttyp->termios->c_cflag;
372 tty_kref_put(tty);
74d7d97b 373copy:
e8c62103 374 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS
375 return -EFAULT;
376 }
377 }
a8f5cda0 378 break;
74d7d97b
JS
379 }
380 case TIOCGSERIAL:
a808ac0c 381 mutex_lock(&ch->port.mutex);
a8f5cda0 382 ret = moxa_get_serial_info(ch, argp);
a808ac0c 383 mutex_unlock(&ch->port.mutex);
a8f5cda0 384 break;
74d7d97b 385 case TIOCSSERIAL:
a808ac0c 386 mutex_lock(&ch->port.mutex);
a8f5cda0 387 ret = moxa_set_serial_info(ch, argp);
a808ac0c 388 mutex_unlock(&ch->port.mutex);
a8f5cda0
JS
389 break;
390 default:
391 ret = -ENOIOCTLCMD;
74d7d97b 392 }
a8f5cda0 393 return ret;
74d7d97b
JS
394}
395
9e98966c 396static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS
397{
398 struct moxa_port *port = tty->driver_data;
399
400 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
401 Magic_code);
9e98966c 402 return 0;
74d7d97b
JS
403}
404
b68e31d0 405static const struct tty_operations moxa_ops = {
1da177e4
LT
406 .open = moxa_open,
407 .close = moxa_close,
408 .write = moxa_write,
409 .write_room = moxa_write_room,
410 .flush_buffer = moxa_flush_buffer,
411 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 412 .ioctl = moxa_ioctl,
1da177e4
LT
413 .set_termios = moxa_set_termios,
414 .stop = moxa_stop,
415 .start = moxa_start,
416 .hangup = moxa_hangup,
74d7d97b 417 .break_ctl = moxa_break_ctl,
1da177e4
LT
418 .tiocmget = moxa_tiocmget,
419 .tiocmset = moxa_tiocmset,
420};
421
31f35939
AC
422static const struct tty_port_operations moxa_port_ops = {
423 .carrier_raised = moxa_carrier_raised,
f176178b
AC
424 .dtr_rts = moxa_dtr_rts,
425 .shutdown = moxa_shutdown,
31f35939
AC
426};
427
aa7e5221 428static struct tty_driver *moxaDriver;
aa7e5221 429static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
33f0f88f 430
74d7d97b
JS
431/*
432 * HW init
433 */
434
03718234
JS
435static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
436{
437 switch (brd->boardType) {
438 case MOXA_BOARD_C218_ISA:
439 case MOXA_BOARD_C218_PCI:
440 if (model != 1)
441 goto err;
442 break;
443 case MOXA_BOARD_CP204J:
444 if (model != 3)
445 goto err;
446 break;
447 default:
448 if (model != 2)
449 goto err;
450 break;
451 }
452 return 0;
453err:
454 return -EINVAL;
455}
456
457static int moxa_check_fw(const void *ptr)
458{
459 const __le16 *lptr = ptr;
460
461 if (*lptr != cpu_to_le16(0x7980))
462 return -EINVAL;
463
464 return 0;
465}
466
467static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
468 size_t len)
469{
470 void __iomem *baseAddr = brd->basemem;
471 u16 tmp;
472
473 writeb(HW_reset, baseAddr + Control_reg); /* reset */
474 msleep(10);
475 memset_io(baseAddr, 0, 4096);
476 memcpy_toio(baseAddr, buf, len); /* download BIOS */
477 writeb(0, baseAddr + Control_reg); /* restart */
478
479 msleep(2000);
480
481 switch (brd->boardType) {
482 case MOXA_BOARD_C218_ISA:
483 case MOXA_BOARD_C218_PCI:
484 tmp = readw(baseAddr + C218_key);
485 if (tmp != C218_KeyCode)
486 goto err;
487 break;
488 case MOXA_BOARD_CP204J:
489 tmp = readw(baseAddr + C218_key);
490 if (tmp != CP204J_KeyCode)
491 goto err;
492 break;
493 default:
494 tmp = readw(baseAddr + C320_key);
495 if (tmp != C320_KeyCode)
496 goto err;
497 tmp = readw(baseAddr + C320_status);
498 if (tmp != STS_init) {
eaa95a8d 499 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS
500 "module not found\n");
501 return -EIO;
502 }
503 break;
504 }
505
506 return 0;
507err:
eaa95a8d 508 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS
509 return -EIO;
510}
511
512static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
513 size_t len)
514{
515 void __iomem *baseAddr = brd->basemem;
516
517 if (len < 7168) {
eaa95a8d 518 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS
519 return -EINVAL;
520 }
521
522 writew(len - 7168 - 2, baseAddr + C320bapi_len);
523 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
524 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
525 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
526 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
527
528 return 0;
529}
530
5292bcd3 531static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS
532 size_t len)
533{
534 void __iomem *baseAddr = brd->basemem;
b46f69cd 535 const __le16 *uptr = ptr;
03718234 536 size_t wlen, len2, j;
5292bcd3 537 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 538 unsigned int i, retry;
03718234
JS
539 u16 usum, keycode;
540
5292bcd3
JS
541 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
542 C218_KeyCode;
03718234 543
5292bcd3
JS
544 switch (brd->boardType) {
545 case MOXA_BOARD_CP204J:
546 case MOXA_BOARD_C218_ISA:
547 case MOXA_BOARD_C218_PCI:
548 key = C218_key;
549 loadbuf = C218_LoadBuf;
550 loadlen = C218DLoad_len;
551 checksum = C218check_sum;
552 checksum_ok = C218chksum_ok;
553 break;
554 default:
555 key = C320_key;
556 keycode = C320_KeyCode;
557 loadbuf = C320_LoadBuf;
558 loadlen = C320DLoad_len;
559 checksum = C320check_sum;
560 checksum_ok = C320chksum_ok;
561 break;
03718234 562 }
03718234
JS
563
564 usum = 0;
565 wlen = len >> 1;
566 for (i = 0; i < wlen; i++)
567 usum += le16_to_cpu(uptr[i]);
568 retry = 0;
569 do {
570 wlen = len >> 1;
571 j = 0;
572 while (wlen) {
573 len2 = (wlen > 2048) ? 2048 : wlen;
574 wlen -= len2;
5292bcd3 575 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 576 j += len2 << 1;
5292bcd3
JS
577
578 writew(len2, baseAddr + loadlen);
579 writew(0, baseAddr + key);
580 for (i = 0; i < 100; i++) {
581 if (readw(baseAddr + key) == keycode)
03718234
JS
582 break;
583 msleep(10);
584 }
5292bcd3 585 if (readw(baseAddr + key) != keycode)
03718234
JS
586 return -EIO;
587 }
5292bcd3
JS
588 writew(0, baseAddr + loadlen);
589 writew(usum, baseAddr + checksum);
590 writew(0, baseAddr + key);
591 for (i = 0; i < 100; i++) {
592 if (readw(baseAddr + key) == keycode)
03718234
JS
593 break;
594 msleep(10);
595 }
596 retry++;
5292bcd3
JS
597 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
598 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS
599 return -EIO;
600
5292bcd3 601 writew(0, baseAddr + key);
03718234
JS
602 for (i = 0; i < 600; i++) {
603 if (readw(baseAddr + Magic_no) == Magic_code)
604 break;
605 msleep(10);
606 }
607 if (readw(baseAddr + Magic_no) != Magic_code)
608 return -EIO;
609
08d01c79 610 if (MOXA_IS_320(brd)) {
5292bcd3
JS
611 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
612 writew(0x3800, baseAddr + TMS320_PORT1);
613 writew(0x3900, baseAddr + TMS320_PORT2);
614 writew(28499, baseAddr + TMS320_CLOCK);
615 } else {
616 writew(0x3200, baseAddr + TMS320_PORT1);
617 writew(0x3400, baseAddr + TMS320_PORT2);
618 writew(19999, baseAddr + TMS320_CLOCK);
619 }
03718234
JS
620 }
621 writew(1, baseAddr + Disable_IRQ);
622 writew(0, baseAddr + Magic_no);
623 for (i = 0; i < 500; i++) {
624 if (readw(baseAddr + Magic_no) == Magic_code)
625 break;
626 msleep(10);
627 }
628 if (readw(baseAddr + Magic_no) != Magic_code)
629 return -EIO;
630
08d01c79 631 if (MOXA_IS_320(brd)) {
5292bcd3
JS
632 j = readw(baseAddr + Module_cnt);
633 if (j <= 0)
634 return -EIO;
635 brd->numPorts = j * 8;
636 writew(j, baseAddr + Module_no);
637 writew(0, baseAddr + Magic_no);
638 for (i = 0; i < 600; i++) {
639 if (readw(baseAddr + Magic_no) == Magic_code)
640 break;
641 msleep(10);
642 }
643 if (readw(baseAddr + Magic_no) != Magic_code)
644 return -EIO;
03718234 645 }
03718234
JS
646 brd->intNdx = baseAddr + IRQindex;
647 brd->intPend = baseAddr + IRQpending;
648 brd->intTable = baseAddr + IRQtable;
649
650 return 0;
651}
652
653static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
654 size_t len)
655{
656 void __iomem *ofsAddr, *baseAddr = brd->basemem;
657 struct moxa_port *port;
658 int retval, i;
659
660 if (len % 2) {
eaa95a8d 661 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS
662 return -EINVAL;
663 }
664
5292bcd3
JS
665 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
666 if (retval)
667 return retval;
668
03718234
JS
669 switch (brd->boardType) {
670 case MOXA_BOARD_C218_ISA:
671 case MOXA_BOARD_C218_PCI:
672 case MOXA_BOARD_CP204J:
03718234
JS
673 port = brd->ports;
674 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 675 port->board = brd;
03718234
JS
676 port->DCDState = 0;
677 port->tableAddr = baseAddr + Extern_table +
678 Extern_size * i;
679 ofsAddr = port->tableAddr;
680 writew(C218rx_mask, ofsAddr + RX_mask);
681 writew(C218tx_mask, ofsAddr + TX_mask);
682 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
683 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
684
685 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
686 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
687
688 }
689 break;
690 default:
03718234
JS
691 port = brd->ports;
692 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 693 port->board = brd;
03718234
JS
694 port->DCDState = 0;
695 port->tableAddr = baseAddr + Extern_table +
696 Extern_size * i;
697 ofsAddr = port->tableAddr;
698 switch (brd->numPorts) {
699 case 8:
700 writew(C320p8rx_mask, ofsAddr + RX_mask);
701 writew(C320p8tx_mask, ofsAddr + TX_mask);
702 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
703 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
704 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
705 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
706
707 break;
708 case 16:
709 writew(C320p16rx_mask, ofsAddr + RX_mask);
710 writew(C320p16tx_mask, ofsAddr + TX_mask);
711 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
712 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
713 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
714 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
715 break;
716
717 case 24:
718 writew(C320p24rx_mask, ofsAddr + RX_mask);
719 writew(C320p24tx_mask, ofsAddr + TX_mask);
720 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
721 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
722 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
723 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
724 break;
725 case 32:
726 writew(C320p32rx_mask, ofsAddr + RX_mask);
727 writew(C320p32tx_mask, ofsAddr + TX_mask);
728 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
729 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
730 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
731 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
732 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
733 break;
734 }
735 }
736 break;
737 }
03718234
JS
738 return 0;
739}
740
741static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
742{
2bca76e8 743 const void *ptr = fw->data;
03718234
JS
744 char rsn[64];
745 u16 lens[5];
746 size_t len;
747 unsigned int a, lenp, lencnt;
748 int ret = -EINVAL;
749 struct {
750 __le32 magic; /* 0x34303430 */
751 u8 reserved1[2];
752 u8 type; /* UNIX = 3 */
753 u8 model; /* C218T=1, C320T=2, CP204=3 */
754 u8 reserved2[8];
755 __le16 len[5];
2bca76e8 756 } const *hdr = ptr;
03718234
JS
757
758 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
759
760 if (fw->size < MOXA_FW_HDRLEN) {
761 strcpy(rsn, "too short (even header won't fit)");
762 goto err;
763 }
764 if (hdr->magic != cpu_to_le32(0x30343034)) {
765 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
766 goto err;
767 }
768 if (hdr->type != 3) {
769 sprintf(rsn, "not for linux, type is %u", hdr->type);
770 goto err;
771 }
772 if (moxa_check_fw_model(brd, hdr->model)) {
773 sprintf(rsn, "not for this card, model is %u", hdr->model);
774 goto err;
775 }
776
777 len = MOXA_FW_HDRLEN;
778 lencnt = hdr->model == 2 ? 5 : 3;
779 for (a = 0; a < ARRAY_SIZE(lens); a++) {
780 lens[a] = le16_to_cpu(hdr->len[a]);
781 if (lens[a] && len + lens[a] <= fw->size &&
782 moxa_check_fw(&fw->data[len]))
eaa95a8d 783 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS
784 "at offset %u, but going on\n", (u32)len);
785 if (!lens[a] && a < lencnt) {
786 sprintf(rsn, "too few entries in fw file");
787 goto err;
788 }
789 len += lens[a];
790 }
791
792 if (len != fw->size) {
793 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
794 (u32)len);
795 goto err;
796 }
797
798 ptr += MOXA_FW_HDRLEN;
799 lenp = 0; /* bios */
800
801 strcpy(rsn, "read above");
802
803 ret = moxa_load_bios(brd, ptr, lens[lenp]);
804 if (ret)
805 goto err;
806
807 /* we skip the tty section (lens[1]), since we don't need it */
808 ptr += lens[lenp] + lens[lenp + 1];
809 lenp += 2; /* comm */
810
811 if (hdr->model == 2) {
812 ret = moxa_load_320b(brd, ptr, lens[lenp]);
813 if (ret)
814 goto err;
815 /* skip another tty */
816 ptr += lens[lenp] + lens[lenp + 1];
817 lenp += 2;
818 }
819
820 ret = moxa_load_code(brd, ptr, lens[lenp]);
821 if (ret)
822 goto err;
823
824 return 0;
825err:
826 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
827 return ret;
828}
829
830static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
831{
832 const struct firmware *fw;
833 const char *file;
810ab09b
JS
834 struct moxa_port *p;
835 unsigned int i;
03718234
JS
836 int ret;
837
810ab09b
JS
838 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
839 GFP_KERNEL);
840 if (brd->ports == NULL) {
841 printk(KERN_ERR "cannot allocate memory for ports\n");
842 ret = -ENOMEM;
843 goto err;
844 }
845
846 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 847 tty_port_init(&p->port);
31f35939 848 p->port.ops = &moxa_port_ops;
810ab09b 849 p->type = PORT_16550A;
810ab09b 850 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS
851 }
852
03718234
JS
853 switch (brd->boardType) {
854 case MOXA_BOARD_C218_ISA:
855 case MOXA_BOARD_C218_PCI:
856 file = "c218tunx.cod";
857 break;
858 case MOXA_BOARD_CP204J:
859 file = "cp204unx.cod";
860 break;
861 default:
862 file = "c320tunx.cod";
863 break;
864 }
865
866 ret = request_firmware(&fw, file, dev);
867 if (ret) {
ec09cd56
JS
868 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
869 "you've placed '%s' file into your firmware "
870 "loader directory (e.g. /lib/firmware)\n",
871 file);
810ab09b 872 goto err_free;
03718234
JS
873 }
874
875 ret = moxa_load_fw(brd, fw);
876
877 release_firmware(fw);
810ab09b
JS
878
879 if (ret)
880 goto err_free;
881
2a541341 882 spin_lock_bh(&moxa_lock);
810ab09b 883 brd->ready = 1;
0bcc4caa
JS
884 if (!timer_pending(&moxaTimer))
885 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 886 spin_unlock_bh(&moxa_lock);
0bcc4caa 887
810ab09b
JS
888 return 0;
889err_free:
890 kfree(brd->ports);
891err:
03718234
JS
892 return ret;
893}
894
810ab09b
JS
895static void moxa_board_deinit(struct moxa_board_conf *brd)
896{
a8f5cda0
JS
897 unsigned int a, opened;
898
899 mutex_lock(&moxa_openlock);
7bcf97d1 900 spin_lock_bh(&moxa_lock);
810ab09b 901 brd->ready = 0;
7bcf97d1 902 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS
903
904 /* pci hot-un-plug support */
905 for (a = 0; a < brd->numPorts; a++)
d450b5a0
AC
906 if (brd->ports[a].port.flags & ASYNC_INITIALIZED) {
907 struct tty_struct *tty = tty_port_tty_get(
908 &brd->ports[a].port);
909 if (tty) {
910 tty_hangup(tty);
911 tty_kref_put(tty);
912 }
913 }
a8f5cda0
JS
914 while (1) {
915 opened = 0;
916 for (a = 0; a < brd->numPorts; a++)
9de6a51f 917 if (brd->ports[a].port.flags & ASYNC_INITIALIZED)
a8f5cda0
JS
918 opened++;
919 mutex_unlock(&moxa_openlock);
920 if (!opened)
921 break;
922 msleep(50);
923 mutex_lock(&moxa_openlock);
924 }
925
810ab09b
JS
926 iounmap(brd->basemem);
927 brd->basemem = NULL;
928 kfree(brd->ports);
929}
930
1da177e4 931#ifdef CONFIG_PCI
9cde5bf0
JS
932static int __devinit moxa_pci_probe(struct pci_dev *pdev,
933 const struct pci_device_id *ent)
1da177e4 934{
9cde5bf0
JS
935 struct moxa_board_conf *board;
936 unsigned int i;
937 int board_type = ent->driver_data;
938 int retval;
939
940 retval = pci_enable_device(pdev);
7aeb95da
JS
941 if (retval) {
942 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 943 goto err;
7aeb95da 944 }
9cde5bf0
JS
945
946 for (i = 0; i < MAX_BOARDS; i++)
947 if (moxa_boards[i].basemem == NULL)
948 break;
949
950 retval = -ENODEV;
951 if (i >= MAX_BOARDS) {
7aeb95da 952 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS
953 "found. Board is ignored.\n", MAX_BOARDS);
954 goto err;
955 }
956
957 board = &moxa_boards[i];
e46a5e3f
JS
958
959 retval = pci_request_region(pdev, 2, "moxa-base");
960 if (retval) {
961 dev_err(&pdev->dev, "can't request pci region 2\n");
962 goto err;
963 }
964
24cb2335 965 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS
966 if (board->basemem == NULL) {
967 dev_err(&pdev->dev, "can't remap io space 2\n");
e46a5e3f 968 goto err_reg;
7aeb95da 969 }
9cde5bf0 970
1da177e4
LT
971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 986
03718234
JS
987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
9cde5bf0 991 pci_set_drvdata(pdev, board);
1da177e4 992
bb9f910a
JS
993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
eaa95a8d 996 return 0;
03718234
JS
997err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
e46a5e3f
JS
1000err_reg:
1001 pci_release_region(pdev, 2);
9cde5bf0
JS
1002err:
1003 return retval;
1004}
1005
1006static void __devexit moxa_pci_remove(struct pci_dev *pdev)
1007{
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
810ab09b
JS
1010 moxa_board_deinit(brd);
1011
e46a5e3f 1012 pci_release_region(pdev, 2);
1da177e4 1013}
a784bf7c
JS
1014
1015static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
1019 .remove = __devexit_p(moxa_pci_remove)
1020};
1da177e4
LT
1021#endif /* CONFIG_PCI */
1022
1023static int __init moxa_init(void)
1024{
810ab09b 1025 unsigned int isabrds = 0;
d353eca4 1026 int retval = 0;
1da177e4 1027
7aeb95da
JS
1028 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1029 MOXA_VERSION);
1da177e4
LT
1030 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
1031 if (!moxaDriver)
1032 return -ENOMEM;
1033
1da177e4 1034 moxaDriver->owner = THIS_MODULE;
9b4e3b13 1035 moxaDriver->name = "ttyMX";
1da177e4
LT
1036 moxaDriver->major = ttymajor;
1037 moxaDriver->minor_start = 0;
1038 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1039 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1040 moxaDriver->init_termios = tty_std_termios;
1da177e4 1041 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC
1042 moxaDriver->init_termios.c_ispeed = 9600;
1043 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4
LT
1044 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
1045 tty_set_operations(moxaDriver, &moxa_ops);
1046
1da177e4 1047 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1048 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT
1049 put_tty_driver(moxaDriver);
1050 return -1;
1051 }
1da177e4 1052
d353eca4 1053 /* Find the boards defined from module args. */
1da177e4 1054#ifdef MODULE
d353eca4
JS
1055 {
1056 struct moxa_board_conf *brd = moxa_boards;
810ab09b 1057 unsigned int i;
1da177e4 1058 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS
1059 if (!baseaddr[i])
1060 break;
1061 if (type[i] == MOXA_BOARD_C218_ISA ||
1062 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1063 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS
1064 isabrds + 1, moxa_brdname[type[i] - 1],
1065 baseaddr[i]);
1066 brd->boardType = type[i];
1067 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1068 numports[i];
1069 brd->busType = MOXA_BUS_TYPE_ISA;
24cb2335 1070 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
d353eca4 1071 if (!brd->basemem) {
eaa95a8d 1072 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1073 baseaddr[i]);
1da177e4
LT
1074 continue;
1075 }
03718234
JS
1076 if (moxa_init_board(brd, NULL)) {
1077 iounmap(brd->basemem);
1078 brd->basemem = NULL;
1079 continue;
1080 }
d353eca4 1081
bb9f910a
JS
1082 printk(KERN_INFO "MOXA isa board found at 0x%.8lu and "
1083 "ready (%u ports, firmware loaded)\n",
1084 baseaddr[i], brd->numPorts);
1085
d353eca4
JS
1086 brd++;
1087 isabrds++;
1da177e4
LT
1088 }
1089 }
d353eca4 1090 }
1da177e4 1091#endif
a784bf7c 1092
1da177e4 1093#ifdef CONFIG_PCI
a784bf7c
JS
1094 retval = pci_register_driver(&moxa_pci_driver);
1095 if (retval) {
eaa95a8d 1096 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1097 if (isabrds)
a784bf7c 1098 retval = 0;
1da177e4
LT
1099 }
1100#endif
a784bf7c 1101
a784bf7c 1102 return retval;
1da177e4
LT
1103}
1104
1105static void __exit moxa_exit(void)
1106{
eaa95a8d 1107 unsigned int i;
1da177e4 1108
9cde5bf0 1109#ifdef CONFIG_PCI
a784bf7c 1110 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1111#endif
a784bf7c 1112
810ab09b
JS
1113 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1114 if (moxa_boards[i].ready)
1115 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS
1116
1117 del_timer_sync(&moxaTimer);
1118
1119 if (tty_unregister_driver(moxaDriver))
1120 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1121 "serial driver\n");
1122 put_tty_driver(moxaDriver);
1da177e4
LT
1123}
1124
1125module_init(moxa_init);
1126module_exit(moxa_exit);
1127
f176178b 1128static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1129{
f176178b
AC
1130 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1131 MoxaPortDisable(ch);
a8f5cda0 1132 MoxaPortFlushData(ch, 2);
f176178b 1133 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
a8f5cda0
JS
1134}
1135
31f35939
AC
1136static int moxa_carrier_raised(struct tty_port *port)
1137{
1138 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1139 int dcd;
1140
8482bcd5 1141 spin_lock_irq(&port->lock);
31f35939 1142 dcd = ch->DCDState;
8482bcd5 1143 spin_unlock_irq(&port->lock);
31f35939
AC
1144 return dcd;
1145}
1146
f176178b 1147static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1148{
f176178b
AC
1149 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1150 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS
1151}
1152
f176178b 1153
1da177e4
LT
1154static int moxa_open(struct tty_struct *tty, struct file *filp)
1155{
810ab09b 1156 struct moxa_board_conf *brd;
8f8ecbad 1157 struct moxa_port *ch;
1da177e4
LT
1158 int port;
1159 int retval;
1da177e4 1160
11324edd 1161 port = tty->index;
1da177e4 1162 if (port == MAX_PORTS) {
74d7d97b 1163 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1164 }
a8f5cda0
JS
1165 if (mutex_lock_interruptible(&moxa_openlock))
1166 return -ERESTARTSYS;
810ab09b 1167 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS
1168 if (!brd->ready) {
1169 mutex_unlock(&moxa_openlock);
810ab09b 1170 return -ENODEV;
a8f5cda0 1171 }
1da177e4 1172
f0e85277
DE
1173 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1174 mutex_unlock(&moxa_openlock);
1175 return -ENODEV;
1176 }
1177
810ab09b 1178 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1179 ch->port.count++;
1da177e4 1180 tty->driver_data = ch;
d450b5a0 1181 tty_port_tty_set(&ch->port, tty);
f176178b 1182 mutex_lock(&ch->port.mutex);
9de6a51f 1183 if (!(ch->port.flags & ASYNC_INITIALIZED)) {
1da177e4 1184 ch->statusflags = 0;
db1acaa6 1185 moxa_set_tty_param(tty, tty->termios);
b4173f45
JS
1186 MoxaPortLineCtrl(ch, 1, 1);
1187 MoxaPortEnable(ch);
a8f5cda0 1188 MoxaSetFifo(ch, ch->type == PORT_16550A);
9de6a51f 1189 ch->port.flags |= ASYNC_INITIALIZED;
1da177e4 1190 }
f176178b 1191 mutex_unlock(&ch->port.mutex);
a8f5cda0 1192 mutex_unlock(&moxa_openlock);
1da177e4 1193
f176178b
AC
1194 retval = tty_port_block_til_ready(&ch->port, tty, filp);
1195 if (retval == 0)
1196 set_bit(ASYNCB_NORMAL_ACTIVE, &ch->port.flags);
a8f5cda0 1197 return retval;
1da177e4
LT
1198}
1199
1200static void moxa_close(struct tty_struct *tty, struct file *filp)
1201{
f176178b 1202 struct moxa_port *ch = tty->driver_data;
1da177e4 1203 ch->cflag = tty->termios->c_cflag;
f176178b 1204 tty_port_close(&ch->port, tty, filp);
1da177e4
LT
1205}
1206
1207static int moxa_write(struct tty_struct *tty,
1208 const unsigned char *buf, int count)
1209{
b4173f45 1210 struct moxa_port *ch = tty->driver_data;
b4173f45 1211 int len;
1da177e4 1212
1da177e4 1213 if (ch == NULL)
b4173f45 1214 return 0;
33f0f88f 1215
7bcf97d1 1216 spin_lock_bh(&moxa_lock);
d450b5a0 1217 len = MoxaPortWriteData(tty, buf, count);
7bcf97d1 1218 spin_unlock_bh(&moxa_lock);
1da177e4 1219
a808ac0c 1220 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1221 return len;
1da177e4
LT
1222}
1223
1224static int moxa_write_room(struct tty_struct *tty)
1225{
8f8ecbad 1226 struct moxa_port *ch;
1da177e4
LT
1227
1228 if (tty->stopped)
eaa95a8d 1229 return 0;
b4173f45 1230 ch = tty->driver_data;
1da177e4 1231 if (ch == NULL)
eaa95a8d 1232 return 0;
b4173f45 1233 return MoxaPortTxFree(ch);
1da177e4
LT
1234}
1235
1236static void moxa_flush_buffer(struct tty_struct *tty)
1237{
b4173f45 1238 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1239
1240 if (ch == NULL)
1241 return;
b4173f45 1242 MoxaPortFlushData(ch, 1);
1da177e4
LT
1243 tty_wakeup(tty);
1244}
1245
1246static int moxa_chars_in_buffer(struct tty_struct *tty)
1247{
b4173f45 1248 struct moxa_port *ch = tty->driver_data;
1da177e4 1249 int chars;
1da177e4 1250
b4173f45 1251 chars = MoxaPortTxQueue(ch);
f710ebd7 1252 if (chars)
1da177e4
LT
1253 /*
1254 * Make it possible to wakeup anything waiting for output
1255 * in tty_ioctl.c, etc.
1256 */
f710ebd7 1257 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1258 return chars;
1da177e4
LT
1259}
1260
1da177e4
LT
1261static int moxa_tiocmget(struct tty_struct *tty, struct file *file)
1262{
8482bcd5 1263 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1264 int flag = 0, dtr, rts;
1265
b4173f45 1266 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT
1267 if (dtr)
1268 flag |= TIOCM_DTR;
1269 if (rts)
1270 flag |= TIOCM_RTS;
b4173f45 1271 dtr = MoxaPortLineStatus(ch);
1da177e4
LT
1272 if (dtr & 1)
1273 flag |= TIOCM_CTS;
1274 if (dtr & 2)
1275 flag |= TIOCM_DSR;
1276 if (dtr & 4)
1277 flag |= TIOCM_CD;
1278 return flag;
1279}
1280
1281static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
1282 unsigned int set, unsigned int clear)
1283{
a8f5cda0 1284 struct moxa_port *ch;
1da177e4
LT
1285 int port;
1286 int dtr, rts;
1287
11324edd 1288 port = tty->index;
a8f5cda0
JS
1289 mutex_lock(&moxa_openlock);
1290 ch = tty->driver_data;
1291 if (!ch) {
1292 mutex_unlock(&moxa_openlock);
74d7d97b 1293 return -EINVAL;
a8f5cda0 1294 }
1da177e4 1295
b4173f45 1296 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT
1297 if (set & TIOCM_RTS)
1298 rts = 1;
1299 if (set & TIOCM_DTR)
1300 dtr = 1;
1301 if (clear & TIOCM_RTS)
1302 rts = 0;
1303 if (clear & TIOCM_DTR)
1304 dtr = 0;
b4173f45 1305 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1306 mutex_unlock(&moxa_openlock);
1da177e4
LT
1307 return 0;
1308}
1309
1da177e4 1310static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1311 struct ktermios *old_termios)
1da177e4 1312{
eaa95a8d 1313 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1314
1315 if (ch == NULL)
1316 return;
db1acaa6 1317 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1318 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1319 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT
1320}
1321
1322static void moxa_stop(struct tty_struct *tty)
1323{
eaa95a8d 1324 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1325
1326 if (ch == NULL)
1327 return;
b4173f45 1328 MoxaPortTxDisable(ch);
a808ac0c 1329 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT
1330}
1331
1332
1333static void moxa_start(struct tty_struct *tty)
1334{
eaa95a8d 1335 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1336
1337 if (ch == NULL)
1338 return;
1339
1340 if (!(ch->statusflags & TXSTOPPED))
1341 return;
1342
b4173f45 1343 MoxaPortTxEnable(ch);
a808ac0c 1344 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT
1345}
1346
1347static void moxa_hangup(struct tty_struct *tty)
1348{
a808ac0c 1349 struct moxa_port *ch = tty->driver_data;
f176178b 1350 tty_port_hangup(&ch->port);
1da177e4
LT
1351}
1352
7bcf97d1 1353static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1354{
d450b5a0 1355 struct tty_struct *tty;
8482bcd5 1356 unsigned long flags;
7bcf97d1 1357 dcd = !!dcd;
1da177e4 1358
8482bcd5 1359 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1360 if (dcd != p->DCDState) {
8482bcd5
AC
1361 p->DCDState = dcd;
1362 spin_unlock_irqrestore(&p->port.lock, flags);
d450b5a0
AC
1363 tty = tty_port_tty_get(&p->port);
1364 if (tty && C_CLOCAL(tty) && !dcd)
1365 tty_hangup(tty);
1366 tty_kref_put(tty);
7bcf97d1 1367 }
8482bcd5
AC
1368 else
1369 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1370}
1da177e4 1371
7bcf97d1
JS
1372static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1373 u16 __iomem *ip)
1374{
d450b5a0 1375 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1376 void __iomem *ofsAddr;
9de6a51f 1377 unsigned int inited = p->port.flags & ASYNC_INITIALIZED;
7bcf97d1
JS
1378 u16 intr;
1379
1380 if (tty) {
a808ac0c 1381 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1382 MoxaPortTxQueue(p) == 0) {
a808ac0c 1383 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS
1384 tty_wakeup(tty);
1385 }
a808ac0c 1386 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1387 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1388 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS
1389 tty_wakeup(tty);
1390 }
1391
f9b412a8 1392 if (inited && !test_bit(TTY_THROTTLED, &tty->flags) &&
7bcf97d1
JS
1393 MoxaPortRxQueue(p) > 0) { /* RX */
1394 MoxaPortReadData(p);
1395 tty_schedule_flip(tty);
1396 }
1397 } else {
a808ac0c 1398 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1399 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1400 }
0bcc4caa 1401
7bcf97d1 1402 if (!handle) /* nothing else to do */
0e0fd7d7 1403 goto put;
7bcf97d1
JS
1404
1405 intr = readw(ip); /* port irq status */
1406 if (intr == 0)
0e0fd7d7 1407 goto put;
7bcf97d1
JS
1408
1409 writew(0, ip); /* ACK port */
1410 ofsAddr = p->tableAddr;
1411 if (intr & IntrTx) /* disable tx intr */
1412 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1413 ofsAddr + HostStat);
1414
1415 if (!inited)
0e0fd7d7 1416 goto put;
7bcf97d1
JS
1417
1418 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1419 tty_insert_flip_char(tty, 0, TTY_BREAK);
1420 tty_schedule_flip(tty);
1421 }
1422
1423 if (intr & IntrLine)
1424 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS
1425put:
1426 tty_kref_put(tty);
7bcf97d1
JS
1427
1428 return 0;
1429}
1430
1431static void moxa_poll(unsigned long ignored)
1432{
1433 struct moxa_board_conf *brd;
1434 u16 __iomem *ip;
2a541341 1435 unsigned int card, port, served = 0;
7bcf97d1
JS
1436
1437 spin_lock(&moxa_lock);
1da177e4 1438 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS
1439 brd = &moxa_boards[card];
1440 if (!brd->ready)
1da177e4 1441 continue;
7bcf97d1 1442
2a541341
JS
1443 served++;
1444
7bcf97d1
JS
1445 ip = NULL;
1446 if (readb(brd->intPend) == 0xff)
1447 ip = brd->intTable + readb(brd->intNdx);
1448
1449 for (port = 0; port < brd->numPorts; port++)
1450 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1451
1452 if (ip)
1453 writeb(0, brd->intPend); /* ACK */
1454
1455 if (moxaLowWaterChk) {
1456 struct moxa_port *p = brd->ports;
1457 for (port = 0; port < brd->numPorts; port++, p++)
1458 if (p->lowChkFlag) {
1459 p->lowChkFlag = 0;
1460 moxa_low_water_check(p->tableAddr);
1da177e4 1461 }
1da177e4
LT
1462 }
1463 }
7bcf97d1 1464 moxaLowWaterChk = 0;
1da177e4 1465
2a541341
JS
1466 if (served)
1467 mod_timer(&moxaTimer, jiffies + HZ / 50);
1468 spin_unlock(&moxa_lock);
1da177e4
LT
1469}
1470
1471/******************************************************************************/
1472
db1acaa6 1473static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1474{
eaa95a8d
JS
1475 register struct ktermios *ts = tty->termios;
1476 struct moxa_port *ch = tty->driver_data;
db1acaa6 1477 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1478
1da177e4
LT
1479 rts = cts = txflow = rxflow = xany = 0;
1480 if (ts->c_cflag & CRTSCTS)
1481 rts = cts = 1;
1482 if (ts->c_iflag & IXON)
1483 txflow = 1;
1484 if (ts->c_iflag & IXOFF)
1485 rxflow = 1;
1486 if (ts->c_iflag & IXANY)
1487 xany = 1;
db1acaa6
AC
1488
1489 /* Clear the features we don't support */
1490 ts->c_cflag &= ~CMSPAR;
b4173f45
JS
1491 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1492 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC
1493 if (baud == -1)
1494 baud = tty_termios_baud_rate(old_termios);
1495 /* Not put the baud rate into the termios data */
1496 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT
1497}
1498
1da177e4
LT
1499/*****************************************************************************
1500 * Driver level functions: *
1da177e4 1501 *****************************************************************************/
1da177e4 1502
b4173f45 1503static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT
1504{
1505 void __iomem *ofsAddr;
eaa95a8d 1506 if (mode < 0 || mode > 2)
1da177e4 1507 return;
b4173f45 1508 ofsAddr = port->tableAddr;
1da177e4
LT
1509 moxafunc(ofsAddr, FC_FlushQueue, mode);
1510 if (mode != 1) {
b4173f45 1511 port->lowChkFlag = 0;
6f56b658 1512 moxa_low_water_check(ofsAddr);
1da177e4
LT
1513 }
1514}
1515
1da177e4
LT
1516/*
1517 * Moxa Port Number Description:
1518 *
1519 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1520 * the port number using in MOXA driver functions will be 0 to 31 for
1521 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1522 * to 127 for fourth. For example, if you setup three MOXA boards,
1523 * first board is C218, second board is C320-16 and third board is
1524 * C320-32. The port number of first board (C218 - 8 ports) is from
1525 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1526 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1527 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1528 * 127 will be invalid.
1529 *
1530 *
1531 * Moxa Functions Description:
1532 *
1533 * Function 1: Driver initialization routine, this routine must be
1534 * called when initialized driver.
1535 * Syntax:
1536 * void MoxaDriverInit();
1537 *
1538 *
1539 * Function 2: Moxa driver private IOCTL command processing.
1540 * Syntax:
1541 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1542 *
1543 * unsigned int cmd : IOCTL command
1544 * unsigned long arg : IOCTL argument
1545 * int port : port number (0 - 127)
1546 *
1547 * return: 0 (OK)
1548 * -EINVAL
1549 * -ENOIOCTLCMD
1550 *
1551 *
1da177e4
LT
1552 * Function 6: Enable this port to start Tx/Rx data.
1553 * Syntax:
1554 * void MoxaPortEnable(int port);
1555 * int port : port number (0 - 127)
1556 *
1557 *
1558 * Function 7: Disable this port
1559 * Syntax:
1560 * void MoxaPortDisable(int port);
1561 * int port : port number (0 - 127)
1562 *
1563 *
1da177e4
LT
1564 * Function 10: Setting baud rate of this port.
1565 * Syntax:
08d01c79 1566 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT
1567 * int port : port number (0 - 127)
1568 * long baud : baud rate (50 - 115200)
1569 *
1570 * return: 0 : this port is invalid or baud < 50
1571 * 50 - 115200 : the real baud rate set to the port, if
1572 * the argument baud is large than maximun
1573 * available baud rate, the real setting
1574 * baud rate will be the maximun baud rate.
1575 *
1576 *
1da177e4
LT
1577 * Function 12: Configure the port.
1578 * Syntax:
606d099c 1579 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1580 * int port : port number (0 - 127)
606d099c 1581 * struct ktermios * termio : termio structure pointer
c7bce309 1582 * speed_t baud : baud rate
1da177e4
LT
1583 *
1584 * return: -1 : this port is invalid or termio == NULL
1585 * 0 : setting O.K.
1586 *
1587 *
1588 * Function 13: Get the DTR/RTS state of this port.
1589 * Syntax:
1590 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1591 * int port : port number (0 - 127)
1592 * int * dtrState : pointer to INT to receive the current DTR
1593 * state. (if NULL, this function will not
1594 * write to this address)
1595 * int * rtsState : pointer to INT to receive the current RTS
1596 * state. (if NULL, this function will not
1597 * write to this address)
1598 *
1599 * return: -1 : this port is invalid
1600 * 0 : O.K.
1601 *
1602 *
1603 * Function 14: Setting the DTR/RTS output state of this port.
1604 * Syntax:
1605 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1606 * int port : port number (0 - 127)
1607 * int dtrState : DTR output state (0: off, 1: on)
1608 * int rtsState : RTS output state (0: off, 1: on)
1609 *
1610 *
1611 * Function 15: Setting the flow control of this port.
1612 * Syntax:
1613 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1614 * int txFlow,int xany);
1615 * int port : port number (0 - 127)
1616 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1617 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1618 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1619 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1620 * int xany : S/W XANY flow control (0: no, 1: yes)
1621 *
1622 *
1623 * Function 16: Get ths line status of this port
1624 * Syntax:
1625 * int MoxaPortLineStatus(int port);
1626 * int port : port number (0 - 127)
1627 *
1628 * return: Bit 0 - CTS state (0: off, 1: on)
1629 * Bit 1 - DSR state (0: off, 1: on)
1630 * Bit 2 - DCD state (0: off, 1: on)
1631 *
1632 *
1da177e4
LT
1633 * Function 19: Flush the Rx/Tx buffer data of this port.
1634 * Syntax:
1635 * void MoxaPortFlushData(int port, int mode);
1636 * int port : port number (0 - 127)
1637 * int mode
1638 * 0 : flush the Rx buffer
1639 * 1 : flush the Tx buffer
1640 * 2 : flush the Rx and Tx buffer
1641 *
1642 *
1643 * Function 20: Write data.
1644 * Syntax:
1645 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1646 * int port : port number (0 - 127)
1647 * unsigned char * buffer : pointer to write data buffer.
1648 * int length : write data length
1649 *
1650 * return: 0 - length : real write data length
1651 *
1652 *
1653 * Function 21: Read data.
1654 * Syntax:
33f0f88f 1655 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1656 * int port : port number (0 - 127)
33f0f88f 1657 * struct tty_struct *tty : tty for data
1da177e4
LT
1658 *
1659 * return: 0 - length : real read data length
1660 *
1661 *
1da177e4
LT
1662 * Function 24: Get the Tx buffer current queued data bytes
1663 * Syntax:
1664 * int MoxaPortTxQueue(int port);
1665 * int port : port number (0 - 127)
1666 *
1667 * return: .. : Tx buffer current queued data bytes
1668 *
1669 *
1670 * Function 25: Get the Tx buffer current free space
1671 * Syntax:
1672 * int MoxaPortTxFree(int port);
1673 * int port : port number (0 - 127)
1674 *
1675 * return: .. : Tx buffer current free space
1676 *
1677 *
1678 * Function 26: Get the Rx buffer current queued data bytes
1679 * Syntax:
1680 * int MoxaPortRxQueue(int port);
1681 * int port : port number (0 - 127)
1682 *
1683 * return: .. : Rx buffer current queued data bytes
1684 *
1685 *
1da177e4
LT
1686 * Function 28: Disable port data transmission.
1687 * Syntax:
1688 * void MoxaPortTxDisable(int port);
1689 * int port : port number (0 - 127)
1690 *
1691 *
1692 * Function 29: Enable port data transmission.
1693 * Syntax:
1694 * void MoxaPortTxEnable(int port);
1695 * int port : port number (0 - 127)
1696 *
1697 *
1da177e4
LT
1698 * Function 31: Get the received BREAK signal count and reset it.
1699 * Syntax:
1700 * int MoxaPortResetBrkCnt(int port);
1701 * int port : port number (0 - 127)
1702 *
1703 * return: 0 - .. : BREAK signal count
1704 *
1705 *
1da177e4 1706 */
1da177e4 1707
b4173f45 1708static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT
1709{
1710 void __iomem *ofsAddr;
eaa95a8d 1711 u16 lowwater = 512;
1da177e4 1712
b4173f45 1713 ofsAddr = port->tableAddr;
1da177e4 1714 writew(lowwater, ofsAddr + Low_water);
08d01c79 1715 if (MOXA_IS_320(port->board))
1da177e4 1716 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS
1717 else
1718 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1719 ofsAddr + HostStat);
1da177e4
LT
1720
1721 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1722 moxafunc(ofsAddr, FC_FlushQueue, 2);
1723
1724 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1725 MoxaPortLineStatus(port);
1726}
1727
b4173f45 1728static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1729{
b4173f45 1730 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT
1731
1732 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1733 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1734 writew(0, ofsAddr + HostStat);
1735 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1736}
1737
08d01c79 1738static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1739{
08d01c79
JS
1740 void __iomem *ofsAddr = port->tableAddr;
1741 unsigned int clock, val;
1742 speed_t max;
1da177e4 1743
08d01c79
JS
1744 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1745 if (baud < 50)
eaa95a8d 1746 return 0;
1da177e4
LT
1747 if (baud > max)
1748 baud = max;
08d01c79 1749 clock = 921600;
1da177e4
LT
1750 val = clock / baud;
1751 moxafunc(ofsAddr, FC_SetBaud, val);
1752 baud = clock / val;
eaa95a8d 1753 return baud;
1da177e4
LT
1754}
1755
b4173f45
JS
1756static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1757 speed_t baud)
1da177e4
LT
1758{
1759 void __iomem *ofsAddr;
1760 tcflag_t cflag;
1da177e4
LT
1761 tcflag_t mode = 0;
1762
b4173f45 1763 ofsAddr = port->tableAddr;
1da177e4
LT
1764 cflag = termio->c_cflag; /* termio->c_cflag */
1765
1766 mode = termio->c_cflag & CSIZE;
1767 if (mode == CS5)
1768 mode = MX_CS5;
1769 else if (mode == CS6)
1770 mode = MX_CS6;
1771 else if (mode == CS7)
1772 mode = MX_CS7;
1773 else if (mode == CS8)
1774 mode = MX_CS8;
1775
1776 if (termio->c_cflag & CSTOPB) {
1777 if (mode == MX_CS5)
1778 mode |= MX_STOP15;
1779 else
1780 mode |= MX_STOP2;
1781 } else
1782 mode |= MX_STOP1;
1783
1784 if (termio->c_cflag & PARENB) {
1785 if (termio->c_cflag & PARODD)
1786 mode |= MX_PARODD;
1787 else
1788 mode |= MX_PAREVEN;
1789 } else
1790 mode |= MX_PARNONE;
1791
eaa95a8d 1792 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1793
08d01c79
JS
1794 if (MOXA_IS_320(port->board) && baud >= 921600)
1795 return -1;
1796
db1acaa6 1797 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT
1798
1799 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1800 spin_lock_irq(&moxafunc_lock);
1da177e4
LT
1801 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1802 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1803 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1804 moxa_wait_finish(ofsAddr);
a808ac0c 1805 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT
1806
1807 }
eaa95a8d 1808 return baud;
1da177e4
LT
1809}
1810
b4173f45
JS
1811static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1812 int *rtsState)
1da177e4 1813{
b4173f45
JS
1814 if (dtrState)
1815 *dtrState = !!(port->lineCtrl & DTR_ON);
1816 if (rtsState)
1817 *rtsState = !!(port->lineCtrl & RTS_ON);
1818
eaa95a8d 1819 return 0;
1da177e4
LT
1820}
1821
b4173f45 1822static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1823{
eaa95a8d 1824 u8 mode = 0;
1da177e4 1825
1da177e4
LT
1826 if (dtr)
1827 mode |= DTR_ON;
1828 if (rts)
1829 mode |= RTS_ON;
b4173f45
JS
1830 port->lineCtrl = mode;
1831 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT
1832}
1833
b4173f45
JS
1834static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1835 int txflow, int rxflow, int txany)
1da177e4 1836{
b4173f45 1837 int mode = 0;
1da177e4 1838
1da177e4
LT
1839 if (rts)
1840 mode |= RTS_FlowCtl;
1841 if (cts)
1842 mode |= CTS_FlowCtl;
1843 if (txflow)
1844 mode |= Tx_FlowCtl;
1845 if (rxflow)
1846 mode |= Rx_FlowCtl;
1847 if (txany)
1848 mode |= IXM_IXANY;
b4173f45 1849 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT
1850}
1851
b4173f45 1852static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT
1853{
1854 void __iomem *ofsAddr;
1855 int val;
1856
b4173f45 1857 ofsAddr = port->tableAddr;
f5c5a36d
AC
1858 if (MOXA_IS_320(port->board))
1859 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1860 else
1da177e4 1861 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1862 val &= 0x0B;
7bcf97d1 1863 if (val & 8)
1da177e4 1864 val |= 4;
7bcf97d1 1865 moxa_new_dcdstate(port, val & 8);
1da177e4 1866 val &= 7;
7bcf97d1 1867 return val;
1da177e4
LT
1868}
1869
d450b5a0 1870static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1871 const unsigned char *buffer, int len)
1da177e4 1872{
d450b5a0 1873 struct moxa_port *port = tty->driver_data;
1da177e4 1874 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS
1875 unsigned int c, total;
1876 u16 head, tail, tx_mask, spage, epage;
1877 u16 pageno, pageofs, bufhead;
1da177e4 1878
b4173f45
JS
1879 ofsAddr = port->tableAddr;
1880 baseAddr = port->board->basemem;
1da177e4
LT
1881 tx_mask = readw(ofsAddr + TX_mask);
1882 spage = readw(ofsAddr + Page_txb);
1883 epage = readw(ofsAddr + EndPage_txb);
1884 tail = readw(ofsAddr + TXwptr);
1885 head = readw(ofsAddr + TXrptr);
2108eba5 1886 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT
1887 if (c > len)
1888 c = len;
9de6a51f 1889 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT
1890 total = c;
1891 if (spage == epage) {
1892 bufhead = readw(ofsAddr + Ofs_txb);
1893 writew(spage, baseAddr + Control_reg);
1894 while (c > 0) {
1895 if (head > tail)
1896 len = head - tail - 1;
1897 else
1898 len = tx_mask + 1 - tail;
1899 len = (c > len) ? len : c;
1900 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS
1901 memcpy_toio(ofs, buffer, len);
1902 buffer += len;
1da177e4
LT
1903 tail = (tail + len) & tx_mask;
1904 c -= len;
1905 }
1da177e4 1906 } else {
1da177e4
LT
1907 pageno = spage + (tail >> 13);
1908 pageofs = tail & Page_mask;
2108eba5
JS
1909 while (c > 0) {
1910 len = Page_size - pageofs;
1911 if (len > c)
1912 len = c;
1da177e4
LT
1913 writeb(pageno, baseAddr + Control_reg);
1914 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS
1915 memcpy_toio(ofs, buffer, len);
1916 buffer += len;
1da177e4
LT
1917 if (++pageno == epage)
1918 pageno = spage;
1919 pageofs = 0;
2108eba5
JS
1920 c -= len;
1921 }
1922 tail = (tail + total) & tx_mask;
1da177e4 1923 }
2108eba5 1924 writew(tail, ofsAddr + TXwptr);
1da177e4 1925 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1926 return total;
1da177e4
LT
1927}
1928
7bcf97d1 1929static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1930{
9de6a51f 1931 struct tty_struct *tty = port->port.tty;
2108eba5 1932 unsigned char *dst;
1da177e4 1933 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS
1934 unsigned int count, len, total;
1935 u16 tail, rx_mask, spage, epage;
1936 u16 pageno, pageofs, bufhead, head;
1da177e4 1937
b4173f45
JS
1938 ofsAddr = port->tableAddr;
1939 baseAddr = port->board->basemem;
1da177e4
LT
1940 head = readw(ofsAddr + RXrptr);
1941 tail = readw(ofsAddr + RXwptr);
1942 rx_mask = readw(ofsAddr + RX_mask);
1943 spage = readw(ofsAddr + Page_rxb);
1944 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1945 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1946 if (count == 0)
33f0f88f 1947 return 0;
1da177e4 1948
33f0f88f 1949 total = count;
7bcf97d1 1950 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT
1951 if (spage == epage) {
1952 bufhead = readw(ofsAddr + Ofs_rxb);
1953 writew(spage, baseAddr + Control_reg);
1954 while (count > 0) {
1da177e4 1955 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS
1956 len = (tail >= head) ? (tail - head) :
1957 (rx_mask + 1 - head);
1958 len = tty_prepare_flip_string(tty, &dst,
1959 min(len, count));
1960 memcpy_fromio(dst, ofs, len);
1da177e4
LT
1961 head = (head + len) & rx_mask;
1962 count -= len;
1963 }
1da177e4 1964 } else {
1da177e4
LT
1965 pageno = spage + (head >> 13);
1966 pageofs = head & Page_mask;
2108eba5 1967 while (count > 0) {
1da177e4
LT
1968 writew(pageno, baseAddr + Control_reg);
1969 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS
1970 len = tty_prepare_flip_string(tty, &dst,
1971 min(Page_size - pageofs, count));
1972 memcpy_fromio(dst, ofs, len);
1973
1974 count -= len;
1975 pageofs = (pageofs + len) & Page_mask;
1976 if (pageofs == 0 && ++pageno == epage)
1da177e4 1977 pageno = spage;
2108eba5
JS
1978 }
1979 head = (head + total) & rx_mask;
1da177e4 1980 }
2108eba5
JS
1981 writew(head, ofsAddr + RXrptr);
1982 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1983 moxaLowWaterChk = 1;
b4173f45 1984 port->lowChkFlag = 1;
1da177e4 1985 }
2108eba5 1986 return total;
1da177e4
LT
1987}
1988
1989
b4173f45 1990static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1991{
b4173f45 1992 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1993 u16 rptr, wptr, mask;
1da177e4 1994
1da177e4
LT
1995 rptr = readw(ofsAddr + TXrptr);
1996 wptr = readw(ofsAddr + TXwptr);
1997 mask = readw(ofsAddr + TX_mask);
2108eba5 1998 return (wptr - rptr) & mask;
1da177e4
LT
1999}
2000
b4173f45 2001static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 2002{
b4173f45 2003 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2004 u16 rptr, wptr, mask;
1da177e4 2005
1da177e4
LT
2006 rptr = readw(ofsAddr + TXrptr);
2007 wptr = readw(ofsAddr + TXwptr);
2008 mask = readw(ofsAddr + TX_mask);
2108eba5 2009 return mask - ((wptr - rptr) & mask);
1da177e4
LT
2010}
2011
b4173f45 2012static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2013{
b4173f45 2014 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2015 u16 rptr, wptr, mask;
1da177e4 2016
1da177e4
LT
2017 rptr = readw(ofsAddr + RXrptr);
2018 wptr = readw(ofsAddr + RXwptr);
2019 mask = readw(ofsAddr + RX_mask);
2108eba5 2020 return (wptr - rptr) & mask;
1da177e4
LT
2021}
2022
b4173f45 2023static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2024{
b4173f45 2025 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT
2026}
2027
b4173f45 2028static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2029{
b4173f45 2030 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT
2031}
2032
8f8ecbad 2033static int moxa_get_serial_info(struct moxa_port *info,
eaa95a8d 2034 struct serial_struct __user *retinfo)
1da177e4 2035{
eaa95a8d
JS
2036 struct serial_struct tmp = {
2037 .type = info->type,
9de6a51f
AC
2038 .line = info->port.tty->index,
2039 .flags = info->port.flags,
eaa95a8d 2040 .baud_base = 921600,
44b7d1b3 2041 .close_delay = info->port.close_delay
eaa95a8d
JS
2042 };
2043 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1da177e4
LT
2044}
2045
2046
8f8ecbad 2047static int moxa_set_serial_info(struct moxa_port *info,
eaa95a8d 2048 struct serial_struct __user *new_info)
1da177e4
LT
2049{
2050 struct serial_struct new_serial;
2051
eaa95a8d 2052 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1da177e4
LT
2053 return -EFAULT;
2054
eaa95a8d
JS
2055 if (new_serial.irq != 0 || new_serial.port != 0 ||
2056 new_serial.custom_divisor != 0 ||
2057 new_serial.baud_base != 921600)
2058 return -EPERM;
1da177e4
LT
2059
2060 if (!capable(CAP_SYS_ADMIN)) {
2061 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
9de6a51f 2062 (info->port.flags & ~ASYNC_USR_MASK)))
eaa95a8d
JS
2063 return -EPERM;
2064 } else
44b7d1b3 2065 info->port.close_delay = new_serial.close_delay * HZ / 100;
1da177e4
LT
2066
2067 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
9de6a51f 2068 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
1da177e4 2069
eaa95a8d 2070 MoxaSetFifo(info, new_serial.type == PORT_16550A);
1da177e4
LT
2071
2072 info->type = new_serial.type;
eaa95a8d 2073 return 0;
1da177e4
LT
2074}
2075
2076
2077
2078/*****************************************************************************
2079 * Static local functions: *
2080 *****************************************************************************/
1da177e4 2081
b4173f45 2082static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2083{
b4173f45 2084 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT
2085
2086 if (!enable) {
2087 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2088 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2089 } else {
2090 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2091 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2092 }
2093}