[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / drm / via_irq.c

/* via_irq.c
 *
 * Copyright 2004 BEAM Ltd.
 * Copyright 2002 Tungsten Graphics, Inc.
 * Copyright 2005 Thomas Hellstrom.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * BEAM LTD, TUNGSTEN GRAPHICS  AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Terry Barnaby <terry1@beam.ltd.uk>
 *    Keith Whitwell <keith@tungstengraphics.com>
 *    Thomas Hellstrom <unichrome@shipmail.org>
 *
 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
 * The refresh rate is also calculated for video playback sync purposes.
 */

#include "drmP.h"
#include "drm.h"
#include "via_drm.h"
#include "via_drv.h"

#define VIA_REG_INTERRUPT       0x200

/* VIA_REG_INTERRUPT */
#define VIA_IRQ_GLOBAL          (1 << 31)
#define VIA_IRQ_VBLANK_ENABLE   (1 << 19)
#define VIA_IRQ_VBLANK_PENDING  (1 << 3)
#define VIA_IRQ_HQV0_ENABLE     (1 << 11)
#define VIA_IRQ_HQV1_ENABLE     (1 << 25)
#define VIA_IRQ_HQV0_PENDING    (1 << 9)
#define VIA_IRQ_HQV1_PENDING    (1 << 10)
#define VIA_IRQ_DMA0_DD_ENABLE  (1 << 20)
#define VIA_IRQ_DMA0_TD_ENABLE  (1 << 21)
#define VIA_IRQ_DMA1_DD_ENABLE  (1 << 22)
#define VIA_IRQ_DMA1_TD_ENABLE  (1 << 23)
#define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
#define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
#define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
#define VIA_IRQ_DMA1_TD_PENDING (1 << 7)


/*
 * Device-specific IRQs go here. This type might need to be extended with
 * the register if there are multiple IRQ control registers.
 * Currently we activate the HQV interrupts of  Unichrome Pro group A.
 */

static maskarray_t via_pro_group_a_irqs[] = {
	{VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
	 0x00000000},
	{VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
	 0x00000000},
	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
};
static int via_num_pro_group_a =
    sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t);
static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};

static maskarray_t via_unichrome_irqs[] = {
	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
	 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
};
static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t);
static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};

static unsigned time_diff(struct timeval *now, struct timeval *then)
{
	return (now->tv_usec >= then->tv_usec) ?
	    now->tv_usec - then->tv_usec :
	    1000000 - (then->tv_usec - now->tv_usec);
}

irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
{
	drm_device_t *dev = (drm_device_t *) arg;
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;
	int handled = 0;
	struct timeval cur_vblank;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int i;

	status = VIA_READ(VIA_REG_INTERRUPT);
	if (status & VIA_IRQ_VBLANK_PENDING) {
		atomic_inc(&dev->vbl_received);
		if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
			do_gettimeofday(&cur_vblank);
			if (dev_priv->last_vblank_valid) {
				dev_priv->usec_per_vblank =
				    time_diff(&cur_vblank,
					      &dev_priv->last_vblank) >> 4;
			}
			dev_priv->last_vblank = cur_vblank;
			dev_priv->last_vblank_valid = 1;
		}
		if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
			DRM_DEBUG("US per vblank is: %u\n",
				  dev_priv->usec_per_vblank);
		}
		DRM_WAKEUP(&dev->vbl_queue);
		drm_vbl_send_signals(dev);
		handled = 1;
	}

	for (i = 0; i < dev_priv->num_irqs; ++i) {
		if (status & cur_irq->pending_mask) {
			atomic_inc(&cur_irq->irq_received);
			DRM_WAKEUP(&cur_irq->irq_queue);
			handled = 1;
			if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) {
				via_dmablit_handler(dev, 0, 1);
			} else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) {
				via_dmablit_handler(dev, 1, 1);
			}
		}
		cur_irq++;
	}

	/* Acknowlege interrupts */
	VIA_WRITE(VIA_REG_INTERRUPT, status);

	if (handled)
		return IRQ_HANDLED;
	else
		return IRQ_NONE;
}

static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
{
	u32 status;

	if (dev_priv) {
		/* Acknowlege interrupts */
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status |
			  dev_priv->irq_pending_mask);
	}
}

int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	unsigned int cur_vblank;
	int ret = 0;

	DRM_DEBUG("viadrv_vblank_wait\n");
	if (!dev_priv) {
		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
		return -EINVAL;
	}

	viadrv_acknowledge_irqs(dev_priv);

	/* Assume that the user has missed the current sequence number
	 * by about a day rather than she wants to wait for years
	 * using vertical blanks...
	 */

	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
		    (((cur_vblank = atomic_read(&dev->vbl_received)) -
		      *sequence) <= (1 << 23)));

	*sequence = cur_vblank;
	return ret;
}

static int
via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
		    unsigned int *sequence)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	unsigned int cur_irq_sequence;
	drm_via_irq_t *cur_irq;
	int ret = 0;
	maskarray_t *masks;
	int real_irq;

	DRM_DEBUG("%s\n", __FUNCTION__);

	if (!dev_priv) {
		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
		return DRM_ERR(EINVAL);
	}

	if (irq >= drm_via_irq_num) {
		DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
			  irq);
		return DRM_ERR(EINVAL);
	}

	real_irq = dev_priv->irq_map[irq];

	if (real_irq < 0) {
		DRM_ERROR("%s Video IRQ %d not available on this hardware.\n",
			  __FUNCTION__, irq);
		return DRM_ERR(EINVAL);
	}

	masks = dev_priv->irq_masks;
	cur_irq = dev_priv->via_irqs + real_irq;

	if (masks[real_irq][2] && !force_sequence) {
		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
			    ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
			     masks[irq][4]));
		cur_irq_sequence = atomic_read(&cur_irq->irq_received);
	} else {
		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
			    (((cur_irq_sequence =
			       atomic_read(&cur_irq->irq_received)) -
			      *sequence) <= (1 << 23)));
	}
	*sequence = cur_irq_sequence;
	return ret;
}

/*
 * drm_dma.h hooks
 */

void via_driver_irq_preinstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;
	drm_via_irq_t *cur_irq;
	int i;

	DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
	if (dev_priv) {
		cur_irq = dev_priv->via_irqs;

		dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
		dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;

		dev_priv->irq_masks = (dev_priv->pro_group_a) ?
		    via_pro_group_a_irqs : via_unichrome_irqs;
		dev_priv->num_irqs = (dev_priv->pro_group_a) ?
		    via_num_pro_group_a : via_num_unichrome;
		dev_priv->irq_map = (dev_priv->pro_group_a) ?
			via_irqmap_pro_group_a : via_irqmap_unichrome;

		for (i = 0; i < dev_priv->num_irqs; ++i) {
			atomic_set(&cur_irq->irq_received, 0);
			cur_irq->enable_mask = dev_priv->irq_masks[i][0];
			cur_irq->pending_mask = dev_priv->irq_masks[i][1];
			DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
			dev_priv->irq_enable_mask |= cur_irq->enable_mask;
			dev_priv->irq_pending_mask |= cur_irq->pending_mask;
			cur_irq++;

			DRM_DEBUG("Initializing IRQ %d\n", i);
		}

		dev_priv->last_vblank_valid = 0;

		/* Clear VSync interrupt regs */
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status &
			  ~(dev_priv->irq_enable_mask));

		/* Clear bits if they're already high */
		viadrv_acknowledge_irqs(dev_priv);
	}
}

void via_driver_irq_postinstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;

	DRM_DEBUG("via_driver_irq_postinstall\n");
	if (dev_priv) {
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
			  | dev_priv->irq_enable_mask);

		/* Some magic, oh for some data sheets ! */

		VIA_WRITE8(0x83d4, 0x11);
		VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);

	}
}

void via_driver_irq_uninstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;

	DRM_DEBUG("driver_irq_uninstall)\n");
	if (dev_priv) {

		/* Some more magic, oh for some data sheets ! */

		VIA_WRITE8(0x83d4, 0x11);
		VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);

		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status &
			  ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
	}
}

int via_wait_irq(DRM_IOCTL_ARGS)
{
	DRM_DEVICE;
	drm_via_irqwait_t __user *argp = (void __user *)data;
	drm_via_irqwait_t irqwait;
	struct timeval now;
	int ret = 0;
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int force_sequence;

	if (!dev->irq)
		return DRM_ERR(EINVAL);

	DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
	if (irqwait.request.irq >= dev_priv->num_irqs) {
		DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
			  irqwait.request.irq);
		return DRM_ERR(EINVAL);
	}

	cur_irq += irqwait.request.irq;

	switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
	case VIA_IRQ_RELATIVE:
		irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
		irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
	case VIA_IRQ_ABSOLUTE:
		break;
	default:
		return DRM_ERR(EINVAL);
	}

	if (irqwait.request.type & VIA_IRQ_SIGNAL) {
		DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
			  __FUNCTION__);
		return DRM_ERR(EINVAL);
	}

	force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);

	ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
				  &irqwait.request.sequence);
	do_gettimeofday(&now);
	irqwait.reply.tval_sec = now.tv_sec;
	irqwait.reply.tval_usec = now.tv_usec;

	DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));

	return ret;
}
Commit	Line	Data
22f579c6 DA	1	/* via_irq.c
	2	*
	3	* Copyright 2004 BEAM Ltd.
	4	* Copyright 2002 Tungsten Graphics, Inc.
	5	* Copyright 2005 Thomas Hellstrom.
	6	* All Rights Reserved.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the "Software"),
	10	* to deal in the Software without restriction, including without limitation
	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	12	* and/or sell copies of the Software, and to permit persons to whom the
	13	* Software is furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice (including the next
	16	* paragraph) shall be included in all copies or substantial portions of the
	17	* Software.
	18	*
	19	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	20	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	21	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	22	* BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	23	* DAMAGES OR
	24	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	25	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	26	* DEALINGS IN THE SOFTWARE.
	27	*
	28	* Authors:
	29	* Terry Barnaby <terry1@beam.ltd.uk>
	30	* Keith Whitwell <keith@tungstengraphics.com>
	31	* Thomas Hellstrom <unichrome@shipmail.org>
	32	*
	33	* This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
	34	* interrupt, as well as an infrastructure to handle other interrupts of the chip.
	35	* The refresh rate is also calculated for video playback sync purposes.
	36	*/
	37
	38	#include "drmP.h"
	39	#include "drm.h"
	40	#include "via_drm.h"
	41	#include "via_drv.h"
	42
	43	#define VIA_REG_INTERRUPT 0x200
	44
	45	/* VIA_REG_INTERRUPT */
	46	#define VIA_IRQ_GLOBAL (1 << 31)
	47	#define VIA_IRQ_VBLANK_ENABLE (1 << 19)
	48	#define VIA_IRQ_VBLANK_PENDING (1 << 3)
	49	#define VIA_IRQ_HQV0_ENABLE (1 << 11)
	50	#define VIA_IRQ_HQV1_ENABLE (1 << 25)
	51	#define VIA_IRQ_HQV0_PENDING (1 << 9)
	52	#define VIA_IRQ_HQV1_PENDING (1 << 10)
92514243 DA	53	#define VIA_IRQ_DMA0_DD_ENABLE (1 << 20)
	54	#define VIA_IRQ_DMA0_TD_ENABLE (1 << 21)
	55	#define VIA_IRQ_DMA1_DD_ENABLE (1 << 22)
	56	#define VIA_IRQ_DMA1_TD_ENABLE (1 << 23)
	57	#define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
	58	#define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
	59	#define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
	60	#define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
	61
22f579c6 DA	62
	63	/*
	64	* Device-specific IRQs go here. This type might need to be extended with
	65	* the register if there are multiple IRQ control registers.
b5e89ed5	66	* Currently we activate the HQV interrupts of Unichrome Pro group A.
22f579c6 DA	67	*/
	68
	69	static maskarray_t via_pro_group_a_irqs[] = {
b5e89ed5 DA	70	{VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
	71	0x00000000},
	72	{VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
92514243 DA	73	0x00000000},
	74	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
	75	VIA_DMA_CSR_TA \| VIA_DMA_CSR_TD, 0x00000008},
	76	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
	77	VIA_DMA_CSR_TA \| VIA_DMA_CSR_TD, 0x00000008},
b5e89ed5 DA	78	};
	79	static int via_num_pro_group_a =
	80	sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t);
92514243	81	static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
b5e89ed5	82
92514243 DA	83	static maskarray_t via_unichrome_irqs[] = {
	84	{VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
	85	VIA_DMA_CSR_TA \| VIA_DMA_CSR_TD, 0x00000008},
	86	{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
	87	VIA_DMA_CSR_TA \| VIA_DMA_CSR_TD, 0x00000008}
	88	};
b5e89ed5	89	static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t);
92514243	90	static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
b5e89ed5 DA	91
b5e89ed5 DA	92	static unsigned time_diff(struct timeval now, struct timeval then)
22f579c6	93	{
b5e89ed5 DA	94	return (now->tv_usec >= then->tv_usec) ?
	95	now->tv_usec - then->tv_usec :
	96	1000000 - (then->tv_usec - now->tv_usec);
22f579c6 DA	97	}
	98
	99	irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
	100	{
	101	drm_device_t dev = (drm_device_t ) arg;
	102	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	103	u32 status;
	104	int handled = 0;
	105	struct timeval cur_vblank;
	106	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	107	int i;
	108
	109	status = VIA_READ(VIA_REG_INTERRUPT);
	110	if (status & VIA_IRQ_VBLANK_PENDING) {
	111	atomic_inc(&dev->vbl_received);
b5e89ed5	112	if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
22f579c6	113	do_gettimeofday(&cur_vblank);
b5e89ed5 DA	114	if (dev_priv->last_vblank_valid) {
	115	dev_priv->usec_per_vblank =
	116	time_diff(&cur_vblank,
	117	&dev_priv->last_vblank) >> 4;
22f579c6 DA	118	}
	119	dev_priv->last_vblank = cur_vblank;
	120	dev_priv->last_vblank_valid = 1;
b5e89ed5 DA	121	}
b5e89ed5 DA	122	if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
22f579c6	123	DRM_DEBUG("US per vblank is: %u\n",
b5e89ed5	124	dev_priv->usec_per_vblank);
22f579c6 DA	125	}
	126	DRM_WAKEUP(&dev->vbl_queue);
	127	drm_vbl_send_signals(dev);
	128	handled = 1;
	129	}
22f579c6	130
b5e89ed5	131	for (i = 0; i < dev_priv->num_irqs; ++i) {
22f579c6	132	if (status & cur_irq->pending_mask) {
b5e89ed5 DA	133	atomic_inc(&cur_irq->irq_received);
b5e89ed5 DA	134	DRM_WAKEUP(&cur_irq->irq_queue);
22f579c6	135	handled = 1;
92514243 DA	136	if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) {
	137	via_dmablit_handler(dev, 0, 1);
	138	} else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) {
	139	via_dmablit_handler(dev, 1, 1);
	140	}
22f579c6 DA	141	}
	142	cur_irq++;
	143	}
b5e89ed5	144
22f579c6 DA	145	/* Acknowlege interrupts */
	146	VIA_WRITE(VIA_REG_INTERRUPT, status);
	147
22f579c6 DA	148	if (handled)
	149	return IRQ_HANDLED;
	150	else
	151	return IRQ_NONE;
	152	}
	153
	154	static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
	155	{
	156	u32 status;
	157
	158	if (dev_priv) {
	159	/* Acknowlege interrupts */
	160	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	161	VIA_WRITE(VIA_REG_INTERRUPT, status \|
22f579c6 DA	162	dev_priv->irq_pending_mask);
	163	}
	164	}
	165
	166	int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
	167	{
	168	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	169	unsigned int cur_vblank;
	170	int ret = 0;
	171
	172	DRM_DEBUG("viadrv_vblank_wait\n");
	173	if (!dev_priv) {
	174	DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
	175	return -EINVAL;
	176	}
	177
	178	viadrv_acknowledge_irqs(dev_priv);
	179
	180	/* Assume that the user has missed the current sequence number
	181	* by about a day rather than she wants to wait for years
	182	* using vertical blanks...
	183	*/
	184
	185	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
	186	(((cur_vblank = atomic_read(&dev->vbl_received)) -
	187	*sequence) <= (1 << 23)));
b5e89ed5	188
22f579c6 DA	189	*sequence = cur_vblank;
	190	return ret;
	191	}
	192
ce60fe02	193	static int
22f579c6 DA	194	via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
	195	unsigned int *sequence)
	196	{
	197	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	198	unsigned int cur_irq_sequence;
d253258c	199	drm_via_irq_t *cur_irq;
22f579c6	200	int ret = 0;
86678dfd	201	maskarray_t *masks;
92514243	202	int real_irq;
22f579c6 DA	203
	204	DRM_DEBUG("%s\n", __FUNCTION__);
	205
	206	if (!dev_priv) {
	207	DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
	208	return DRM_ERR(EINVAL);
	209	}
	210
92514243	211	if (irq >= drm_via_irq_num) {
b5e89ed5 DA	212	DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
b5e89ed5 DA	213	irq);
22f579c6 DA	214	return DRM_ERR(EINVAL);
22f579c6 DA	215	}
b5e89ed5	216
92514243 DA	217	real_irq = dev_priv->irq_map[irq];
	218
	219	if (real_irq < 0) {
	220	DRM_ERROR("%s Video IRQ %d not available on this hardware.\n",
	221	__FUNCTION__, irq);
	222	return DRM_ERR(EINVAL);
	223	}
86678dfd DA	224
86678dfd DA	225	masks = dev_priv->irq_masks;
d253258c	226	cur_irq = dev_priv->via_irqs + real_irq;
22f579c6	227
92514243	228	if (masks[real_irq][2] && !force_sequence) {
22f579c6	229	DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
b5e89ed5 DA	230	((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
b5e89ed5 DA	231	masks[irq][4]));
22f579c6 DA	232	cur_irq_sequence = atomic_read(&cur_irq->irq_received);
	233	} else {
	234	DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
b5e89ed5 DA	235	(((cur_irq_sequence =
	236	atomic_read(&cur_irq->irq_received)) -
	237	*sequence) <= (1 << 23)));
22f579c6 DA	238	}
	239	*sequence = cur_irq_sequence;
	240	return ret;
	241	}
	242
22f579c6 DA	243	/*
	244	* drm_dma.h hooks
	245	*/
	246
	247	void via_driver_irq_preinstall(drm_device_t * dev)
	248	{
	249	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	250	u32 status;
d253258c	251	drm_via_irq_t *cur_irq;
22f579c6 DA	252	int i;
	253
	254	DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
	255	if (dev_priv) {
d253258c	256	cur_irq = dev_priv->via_irqs;
22f579c6 DA	257
	258	dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
	259	dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
	260
	261	dev_priv->irq_masks = (dev_priv->pro_group_a) ?
b5e89ed5	262	via_pro_group_a_irqs : via_unichrome_irqs;
22f579c6	263	dev_priv->num_irqs = (dev_priv->pro_group_a) ?
b5e89ed5	264	via_num_pro_group_a : via_num_unichrome;
92514243 DA	265	dev_priv->irq_map = (dev_priv->pro_group_a) ?
92514243 DA	266	via_irqmap_pro_group_a : via_irqmap_unichrome;
b5e89ed5 DA	267
b5e89ed5 DA	268	for (i = 0; i < dev_priv->num_irqs; ++i) {
22f579c6	269	atomic_set(&cur_irq->irq_received, 0);
b5e89ed5	270	cur_irq->enable_mask = dev_priv->irq_masks[i][0];
22f579c6	271	cur_irq->pending_mask = dev_priv->irq_masks[i][1];
b5e89ed5	272	DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
22f579c6 DA	273	dev_priv->irq_enable_mask \|= cur_irq->enable_mask;
	274	dev_priv->irq_pending_mask \|= cur_irq->pending_mask;
	275	cur_irq++;
b5e89ed5	276
22f579c6 DA	277	DRM_DEBUG("Initializing IRQ %d\n", i);
22f579c6 DA	278	}
b5e89ed5 DA	279
b5e89ed5 DA	280	dev_priv->last_vblank_valid = 0;
22f579c6	281
92514243	282	/* Clear VSync interrupt regs */
22f579c6	283	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	284	VIA_WRITE(VIA_REG_INTERRUPT, status &
22f579c6	285	~(dev_priv->irq_enable_mask));
b5e89ed5	286
22f579c6 DA	287	/* Clear bits if they're already high */
	288	viadrv_acknowledge_irqs(dev_priv);
	289	}
	290	}
	291
	292	void via_driver_irq_postinstall(drm_device_t * dev)
	293	{
	294	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	295	u32 status;
	296
	297	DRM_DEBUG("via_driver_irq_postinstall\n");
	298	if (dev_priv) {
	299	status = VIA_READ(VIA_REG_INTERRUPT);
	300	VIA_WRITE(VIA_REG_INTERRUPT, status \| VIA_IRQ_GLOBAL
	301	\| dev_priv->irq_enable_mask);
	302
	303	/* Some magic, oh for some data sheets ! */
	304
	305	VIA_WRITE8(0x83d4, 0x11);
	306	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) \| 0x30);
b5e89ed5	307
22f579c6 DA	308	}
	309	}
	310
	311	void via_driver_irq_uninstall(drm_device_t * dev)
	312	{
	313	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	314	u32 status;
	315
	316	DRM_DEBUG("driver_irq_uninstall)\n");
	317	if (dev_priv) {
	318
	319	/* Some more magic, oh for some data sheets ! */
	320
	321	VIA_WRITE8(0x83d4, 0x11);
	322	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
	323
	324	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	325	VIA_WRITE(VIA_REG_INTERRUPT, status &
22f579c6 DA	326	~(VIA_IRQ_VBLANK_ENABLE \| dev_priv->irq_enable_mask));
	327	}
	328	}
	329
	330	int via_wait_irq(DRM_IOCTL_ARGS)
	331	{
92514243	332	DRM_DEVICE;
22f579c6 DA	333	drm_via_irqwait_t __user argp = (void __user )data;
	334	drm_via_irqwait_t irqwait;
	335	struct timeval now;
	336	int ret = 0;
	337	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	338	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	339	int force_sequence;
	340
	341	if (!dev->irq)
	342	return DRM_ERR(EINVAL);
	343
	344	DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
	345	if (irqwait.request.irq >= dev_priv->num_irqs) {
b5e89ed5	346	DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
22f579c6 DA	347	irqwait.request.irq);
	348	return DRM_ERR(EINVAL);
	349	}
	350
	351	cur_irq += irqwait.request.irq;
	352
	353	switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
	354	case VIA_IRQ_RELATIVE:
	355	irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
	356	irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
	357	case VIA_IRQ_ABSOLUTE:
	358	break;
	359	default:
	360	return DRM_ERR(EINVAL);
	361	}
	362
	363	if (irqwait.request.type & VIA_IRQ_SIGNAL) {
b5e89ed5	364	DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
22f579c6 DA	365	__FUNCTION__);
	366	return DRM_ERR(EINVAL);
	367	}
	368
	369	force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);
	370
	371	ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
	372	&irqwait.request.sequence);
	373	do_gettimeofday(&now);
	374	irqwait.reply.tval_sec = now.tv_sec;
	375	irqwait.reply.tval_usec = now.tv_usec;
	376
	377	DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));
	378
	379	return ret;
	380	}