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22f579c6 DA |
1 | /* via_irq.c |
2 | * | |
3 | * Copyright 2004 BEAM Ltd. | |
4 | * Copyright 2002 Tungsten Graphics, Inc. | |
5 | * Copyright 2005 Thomas Hellstrom. | |
6 | * All Rights Reserved. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a | |
9 | * copy of this software and associated documentation files (the "Software"), | |
10 | * to deal in the Software without restriction, including without limitation | |
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
12 | * and/or sell copies of the Software, and to permit persons to whom the | |
13 | * Software is furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice (including the next | |
16 | * paragraph) shall be included in all copies or substantial portions of the | |
17 | * Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
23 | * DAMAGES OR | |
24 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
25 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
26 | * DEALINGS IN THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Terry Barnaby <terry1@beam.ltd.uk> | |
30 | * Keith Whitwell <keith@tungstengraphics.com> | |
31 | * Thomas Hellstrom <unichrome@shipmail.org> | |
32 | * | |
33 | * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank | |
34 | * interrupt, as well as an infrastructure to handle other interrupts of the chip. | |
35 | * The refresh rate is also calculated for video playback sync purposes. | |
36 | */ | |
37 | ||
38 | #include "drmP.h" | |
39 | #include "drm.h" | |
40 | #include "via_drm.h" | |
41 | #include "via_drv.h" | |
42 | ||
43 | #define VIA_REG_INTERRUPT 0x200 | |
44 | ||
45 | /* VIA_REG_INTERRUPT */ | |
46 | #define VIA_IRQ_GLOBAL (1 << 31) | |
47 | #define VIA_IRQ_VBLANK_ENABLE (1 << 19) | |
48 | #define VIA_IRQ_VBLANK_PENDING (1 << 3) | |
49 | #define VIA_IRQ_HQV0_ENABLE (1 << 11) | |
50 | #define VIA_IRQ_HQV1_ENABLE (1 << 25) | |
51 | #define VIA_IRQ_HQV0_PENDING (1 << 9) | |
52 | #define VIA_IRQ_HQV1_PENDING (1 << 10) | |
92514243 DA |
53 | #define VIA_IRQ_DMA0_DD_ENABLE (1 << 20) |
54 | #define VIA_IRQ_DMA0_TD_ENABLE (1 << 21) | |
55 | #define VIA_IRQ_DMA1_DD_ENABLE (1 << 22) | |
56 | #define VIA_IRQ_DMA1_TD_ENABLE (1 << 23) | |
57 | #define VIA_IRQ_DMA0_DD_PENDING (1 << 4) | |
58 | #define VIA_IRQ_DMA0_TD_PENDING (1 << 5) | |
59 | #define VIA_IRQ_DMA1_DD_PENDING (1 << 6) | |
60 | #define VIA_IRQ_DMA1_TD_PENDING (1 << 7) | |
61 | ||
22f579c6 DA |
62 | |
63 | /* | |
64 | * Device-specific IRQs go here. This type might need to be extended with | |
65 | * the register if there are multiple IRQ control registers. | |
b5e89ed5 | 66 | * Currently we activate the HQV interrupts of Unichrome Pro group A. |
22f579c6 DA |
67 | */ |
68 | ||
69 | static maskarray_t via_pro_group_a_irqs[] = { | |
b5e89ed5 DA |
70 | {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, |
71 | 0x00000000}, | |
72 | {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, | |
92514243 DA |
73 | 0x00000000}, |
74 | {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, | |
75 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
76 | {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, | |
77 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
b5e89ed5 DA |
78 | }; |
79 | static int via_num_pro_group_a = | |
80 | sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t); | |
92514243 | 81 | static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3}; |
b5e89ed5 | 82 | |
92514243 DA |
83 | static maskarray_t via_unichrome_irqs[] = { |
84 | {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, | |
85 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
86 | {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, | |
87 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008} | |
88 | }; | |
b5e89ed5 | 89 | static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t); |
92514243 | 90 | static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1}; |
b5e89ed5 DA |
91 | |
92 | static unsigned time_diff(struct timeval *now, struct timeval *then) | |
22f579c6 | 93 | { |
b5e89ed5 DA |
94 | return (now->tv_usec >= then->tv_usec) ? |
95 | now->tv_usec - then->tv_usec : | |
96 | 1000000 - (then->tv_usec - now->tv_usec); | |
22f579c6 DA |
97 | } |
98 | ||
99 | irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) | |
100 | { | |
101 | drm_device_t *dev = (drm_device_t *) arg; | |
102 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
103 | u32 status; | |
104 | int handled = 0; | |
105 | struct timeval cur_vblank; | |
106 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
107 | int i; | |
108 | ||
109 | status = VIA_READ(VIA_REG_INTERRUPT); | |
110 | if (status & VIA_IRQ_VBLANK_PENDING) { | |
111 | atomic_inc(&dev->vbl_received); | |
b5e89ed5 | 112 | if (!(atomic_read(&dev->vbl_received) & 0x0F)) { |
22f579c6 | 113 | do_gettimeofday(&cur_vblank); |
b5e89ed5 DA |
114 | if (dev_priv->last_vblank_valid) { |
115 | dev_priv->usec_per_vblank = | |
116 | time_diff(&cur_vblank, | |
117 | &dev_priv->last_vblank) >> 4; | |
22f579c6 DA |
118 | } |
119 | dev_priv->last_vblank = cur_vblank; | |
120 | dev_priv->last_vblank_valid = 1; | |
b5e89ed5 DA |
121 | } |
122 | if (!(atomic_read(&dev->vbl_received) & 0xFF)) { | |
22f579c6 | 123 | DRM_DEBUG("US per vblank is: %u\n", |
b5e89ed5 | 124 | dev_priv->usec_per_vblank); |
22f579c6 DA |
125 | } |
126 | DRM_WAKEUP(&dev->vbl_queue); | |
127 | drm_vbl_send_signals(dev); | |
128 | handled = 1; | |
129 | } | |
22f579c6 | 130 | |
b5e89ed5 | 131 | for (i = 0; i < dev_priv->num_irqs; ++i) { |
22f579c6 | 132 | if (status & cur_irq->pending_mask) { |
b5e89ed5 DA |
133 | atomic_inc(&cur_irq->irq_received); |
134 | DRM_WAKEUP(&cur_irq->irq_queue); | |
22f579c6 | 135 | handled = 1; |
92514243 DA |
136 | if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { |
137 | via_dmablit_handler(dev, 0, 1); | |
138 | } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { | |
139 | via_dmablit_handler(dev, 1, 1); | |
140 | } | |
22f579c6 DA |
141 | } |
142 | cur_irq++; | |
143 | } | |
b5e89ed5 | 144 | |
22f579c6 DA |
145 | /* Acknowlege interrupts */ |
146 | VIA_WRITE(VIA_REG_INTERRUPT, status); | |
147 | ||
22f579c6 DA |
148 | if (handled) |
149 | return IRQ_HANDLED; | |
150 | else | |
151 | return IRQ_NONE; | |
152 | } | |
153 | ||
154 | static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) | |
155 | { | |
156 | u32 status; | |
157 | ||
158 | if (dev_priv) { | |
159 | /* Acknowlege interrupts */ | |
160 | status = VIA_READ(VIA_REG_INTERRUPT); | |
b5e89ed5 | 161 | VIA_WRITE(VIA_REG_INTERRUPT, status | |
22f579c6 DA |
162 | dev_priv->irq_pending_mask); |
163 | } | |
164 | } | |
165 | ||
166 | int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence) | |
167 | { | |
168 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
169 | unsigned int cur_vblank; | |
170 | int ret = 0; | |
171 | ||
172 | DRM_DEBUG("viadrv_vblank_wait\n"); | |
173 | if (!dev_priv) { | |
174 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
175 | return -EINVAL; | |
176 | } | |
177 | ||
178 | viadrv_acknowledge_irqs(dev_priv); | |
179 | ||
180 | /* Assume that the user has missed the current sequence number | |
181 | * by about a day rather than she wants to wait for years | |
182 | * using vertical blanks... | |
183 | */ | |
184 | ||
185 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, | |
186 | (((cur_vblank = atomic_read(&dev->vbl_received)) - | |
187 | *sequence) <= (1 << 23))); | |
b5e89ed5 | 188 | |
22f579c6 DA |
189 | *sequence = cur_vblank; |
190 | return ret; | |
191 | } | |
192 | ||
ce60fe02 | 193 | static int |
22f579c6 DA |
194 | via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence, |
195 | unsigned int *sequence) | |
196 | { | |
197 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
198 | unsigned int cur_irq_sequence; | |
199 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
200 | int ret = 0; | |
201 | maskarray_t *masks = dev_priv->irq_masks; | |
92514243 | 202 | int real_irq; |
22f579c6 DA |
203 | |
204 | DRM_DEBUG("%s\n", __FUNCTION__); | |
205 | ||
206 | if (!dev_priv) { | |
207 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
208 | return DRM_ERR(EINVAL); | |
209 | } | |
210 | ||
92514243 | 211 | if (irq >= drm_via_irq_num) { |
b5e89ed5 DA |
212 | DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, |
213 | irq); | |
22f579c6 DA |
214 | return DRM_ERR(EINVAL); |
215 | } | |
b5e89ed5 | 216 | |
92514243 DA |
217 | real_irq = dev_priv->irq_map[irq]; |
218 | ||
219 | if (real_irq < 0) { | |
220 | DRM_ERROR("%s Video IRQ %d not available on this hardware.\n", | |
221 | __FUNCTION__, irq); | |
222 | return DRM_ERR(EINVAL); | |
223 | } | |
224 | ||
225 | cur_irq += real_irq; | |
22f579c6 | 226 | |
92514243 | 227 | if (masks[real_irq][2] && !force_sequence) { |
22f579c6 | 228 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, |
b5e89ed5 DA |
229 | ((VIA_READ(masks[irq][2]) & masks[irq][3]) == |
230 | masks[irq][4])); | |
22f579c6 DA |
231 | cur_irq_sequence = atomic_read(&cur_irq->irq_received); |
232 | } else { | |
233 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, | |
b5e89ed5 DA |
234 | (((cur_irq_sequence = |
235 | atomic_read(&cur_irq->irq_received)) - | |
236 | *sequence) <= (1 << 23))); | |
22f579c6 DA |
237 | } |
238 | *sequence = cur_irq_sequence; | |
239 | return ret; | |
240 | } | |
241 | ||
22f579c6 DA |
242 | /* |
243 | * drm_dma.h hooks | |
244 | */ | |
245 | ||
246 | void via_driver_irq_preinstall(drm_device_t * dev) | |
247 | { | |
248 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
249 | u32 status; | |
250 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
251 | int i; | |
252 | ||
253 | DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv); | |
254 | if (dev_priv) { | |
255 | ||
256 | dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; | |
257 | dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; | |
258 | ||
259 | dev_priv->irq_masks = (dev_priv->pro_group_a) ? | |
b5e89ed5 | 260 | via_pro_group_a_irqs : via_unichrome_irqs; |
22f579c6 | 261 | dev_priv->num_irqs = (dev_priv->pro_group_a) ? |
b5e89ed5 | 262 | via_num_pro_group_a : via_num_unichrome; |
92514243 DA |
263 | dev_priv->irq_map = (dev_priv->pro_group_a) ? |
264 | via_irqmap_pro_group_a : via_irqmap_unichrome; | |
b5e89ed5 DA |
265 | |
266 | for (i = 0; i < dev_priv->num_irqs; ++i) { | |
22f579c6 | 267 | atomic_set(&cur_irq->irq_received, 0); |
b5e89ed5 | 268 | cur_irq->enable_mask = dev_priv->irq_masks[i][0]; |
22f579c6 | 269 | cur_irq->pending_mask = dev_priv->irq_masks[i][1]; |
b5e89ed5 | 270 | DRM_INIT_WAITQUEUE(&cur_irq->irq_queue); |
22f579c6 DA |
271 | dev_priv->irq_enable_mask |= cur_irq->enable_mask; |
272 | dev_priv->irq_pending_mask |= cur_irq->pending_mask; | |
273 | cur_irq++; | |
b5e89ed5 | 274 | |
22f579c6 DA |
275 | DRM_DEBUG("Initializing IRQ %d\n", i); |
276 | } | |
b5e89ed5 DA |
277 | |
278 | dev_priv->last_vblank_valid = 0; | |
22f579c6 | 279 | |
92514243 | 280 | /* Clear VSync interrupt regs */ |
22f579c6 | 281 | status = VIA_READ(VIA_REG_INTERRUPT); |
b5e89ed5 | 282 | VIA_WRITE(VIA_REG_INTERRUPT, status & |
22f579c6 | 283 | ~(dev_priv->irq_enable_mask)); |
b5e89ed5 | 284 | |
22f579c6 DA |
285 | /* Clear bits if they're already high */ |
286 | viadrv_acknowledge_irqs(dev_priv); | |
287 | } | |
288 | } | |
289 | ||
290 | void via_driver_irq_postinstall(drm_device_t * dev) | |
291 | { | |
292 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
293 | u32 status; | |
294 | ||
295 | DRM_DEBUG("via_driver_irq_postinstall\n"); | |
296 | if (dev_priv) { | |
297 | status = VIA_READ(VIA_REG_INTERRUPT); | |
298 | VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL | |
299 | | dev_priv->irq_enable_mask); | |
300 | ||
301 | /* Some magic, oh for some data sheets ! */ | |
302 | ||
303 | VIA_WRITE8(0x83d4, 0x11); | |
304 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); | |
b5e89ed5 | 305 | |
22f579c6 DA |
306 | } |
307 | } | |
308 | ||
309 | void via_driver_irq_uninstall(drm_device_t * dev) | |
310 | { | |
311 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
312 | u32 status; | |
313 | ||
314 | DRM_DEBUG("driver_irq_uninstall)\n"); | |
315 | if (dev_priv) { | |
316 | ||
317 | /* Some more magic, oh for some data sheets ! */ | |
318 | ||
319 | VIA_WRITE8(0x83d4, 0x11); | |
320 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); | |
321 | ||
322 | status = VIA_READ(VIA_REG_INTERRUPT); | |
b5e89ed5 | 323 | VIA_WRITE(VIA_REG_INTERRUPT, status & |
22f579c6 DA |
324 | ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); |
325 | } | |
326 | } | |
327 | ||
328 | int via_wait_irq(DRM_IOCTL_ARGS) | |
329 | { | |
92514243 | 330 | DRM_DEVICE; |
22f579c6 DA |
331 | drm_via_irqwait_t __user *argp = (void __user *)data; |
332 | drm_via_irqwait_t irqwait; | |
333 | struct timeval now; | |
334 | int ret = 0; | |
335 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
336 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
337 | int force_sequence; | |
338 | ||
339 | if (!dev->irq) | |
340 | return DRM_ERR(EINVAL); | |
341 | ||
342 | DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait)); | |
343 | if (irqwait.request.irq >= dev_priv->num_irqs) { | |
b5e89ed5 | 344 | DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, |
22f579c6 DA |
345 | irqwait.request.irq); |
346 | return DRM_ERR(EINVAL); | |
347 | } | |
348 | ||
349 | cur_irq += irqwait.request.irq; | |
350 | ||
351 | switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) { | |
352 | case VIA_IRQ_RELATIVE: | |
353 | irqwait.request.sequence += atomic_read(&cur_irq->irq_received); | |
354 | irqwait.request.type &= ~_DRM_VBLANK_RELATIVE; | |
355 | case VIA_IRQ_ABSOLUTE: | |
356 | break; | |
357 | default: | |
358 | return DRM_ERR(EINVAL); | |
359 | } | |
360 | ||
361 | if (irqwait.request.type & VIA_IRQ_SIGNAL) { | |
b5e89ed5 | 362 | DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n", |
22f579c6 DA |
363 | __FUNCTION__); |
364 | return DRM_ERR(EINVAL); | |
365 | } | |
366 | ||
367 | force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE); | |
368 | ||
369 | ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence, | |
370 | &irqwait.request.sequence); | |
371 | do_gettimeofday(&now); | |
372 | irqwait.reply.tval_sec = now.tv_sec; | |
373 | irqwait.reply.tval_usec = now.tv_usec; | |
374 | ||
375 | DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait)); | |
376 | ||
377 | return ret; | |
378 | } |