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1cac41cb MB |
1 | /* arch/arm/mach-exynos/cal_bts.c |
2 | * | |
3 | * Copyright (c) 2014 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * EXYNOS - BTS CAL code. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include "cal_bts8890.h" | |
14 | ||
15 | void bts_setqos(addr_u32 base, unsigned int priority, unsigned int master_id) //QOS : [RRRRWWWW] | |
16 | { | |
17 | Outp32(base + BTS_RCON, 0x0); | |
18 | Outp32(base + BTS_RCON, 0x0); | |
19 | Outp32(base + BTS_WCON, 0x0); | |
20 | Outp32(base + BTS_WCON, 0x0); | |
21 | ||
22 | Outp32(base + BTS_PRIORITY, ((priority >> 16) & 0xFFFF)); | |
23 | Outp32(base + BTS_TOKENMAX, 0xFFDF); | |
24 | Outp32(base + BTS_BWUPBOUND, 0x18); | |
25 | Outp32(base + BTS_BWLOBOUND, 0x1); | |
26 | Outp32(base + BTS_INITTKN, 0x8); | |
27 | ||
28 | Outp32(base + BTS_PRIORITY + WOFFSET, (priority & 0xFFFF)); | |
29 | Outp32(base + BTS_TOKENMAX + WOFFSET, 0xFFDF); | |
30 | Outp32(base + BTS_BWUPBOUND + WOFFSET, 0x18); | |
31 | Outp32(base + BTS_BWLOBOUND + WOFFSET, 0x1); | |
32 | Outp32(base + BTS_INITTKN + WOFFSET, 0x8); | |
33 | ||
34 | Outp32(base + BTS_EMERGENTRID, master_id); | |
35 | Outp32(base + BTS_EMERGENTWID, master_id); | |
36 | Outp32(base + BTS_RCON, 0x1); | |
37 | Outp32(base + BTS_WCON, 0x1); | |
38 | } | |
39 | ||
40 | void bts_setqos_bw(addr_u32 base, unsigned int priority, | |
41 | unsigned int window, unsigned int token, unsigned int master_id) //QOS : [RRRRWWWW] | |
42 | { | |
43 | Outp32(base + BTS_RCON, 0x0); | |
44 | Outp32(base + BTS_RCON, 0x0); | |
45 | Outp32(base + BTS_WCON, 0x0); | |
46 | Outp32(base + BTS_WCON, 0x0); | |
47 | ||
48 | Outp32(base + BTS_PRIORITY, ((priority >> 16) & 0xFFFF)); | |
49 | Outp32(base + BTS_TOKENMAX, 0xFFDF); | |
50 | Outp32(base + BTS_BWUPBOUND, 0x18); | |
51 | Outp32(base + BTS_BWLOBOUND, 0x1); | |
52 | Outp32(base + BTS_INITTKN, 0x8); | |
53 | Outp32(base + BTS_DEMWIN, window); | |
54 | Outp32(base + BTS_DEMTKN, token); | |
55 | Outp32(base + BTS_DEFWIN, window); | |
56 | Outp32(base + BTS_DEFTKN, token); | |
57 | Outp32(base + BTS_PRMWIN, window); | |
58 | Outp32(base + BTS_PRMTKN, token); | |
59 | Outp32(base + BTS_FLEXIBLE, 0x0); | |
60 | ||
61 | Outp32(base + BTS_PRIORITY + WOFFSET, (priority & 0xFFFF)); | |
62 | Outp32(base + BTS_TOKENMAX + WOFFSET, 0xFFDF); | |
63 | Outp32(base + BTS_BWUPBOUND + WOFFSET, 0x18); | |
64 | Outp32(base + BTS_BWLOBOUND + WOFFSET, 0x1); | |
65 | Outp32(base + BTS_INITTKN + WOFFSET, 0x8); | |
66 | Outp32(base + BTS_DEMWIN + WOFFSET, window); | |
67 | Outp32(base + BTS_DEMTKN + WOFFSET, token); | |
68 | Outp32(base + BTS_DEFWIN + WOFFSET, window); | |
69 | Outp32(base + BTS_DEFTKN + WOFFSET, token); | |
70 | Outp32(base + BTS_PRMWIN + WOFFSET, window); | |
71 | Outp32(base + BTS_PRMTKN + WOFFSET, token); | |
72 | Outp32(base + BTS_FLEXIBLE + WOFFSET, 0x0); | |
73 | ||
74 | Outp32(base + BTS_RMODE, 0x1); | |
75 | Outp32(base + BTS_WMODE, 0x1); | |
76 | Outp32(base + BTS_EMERGENTRID, master_id); | |
77 | Outp32(base + BTS_EMERGENTWID, master_id); | |
78 | Outp32(base + BTS_RCON, 0x3); | |
79 | Outp32(base + BTS_WCON, 0x3); | |
80 | } | |
81 | ||
82 | void bts_setqos_mo(addr_u32 base, unsigned int priority, unsigned int mo, unsigned int master_id) //QOS : [RRRRWWWW] | |
83 | { | |
84 | Outp32(base + BTS_RCON, 0x0); | |
85 | Outp32(base + BTS_RCON, 0x0); | |
86 | Outp32(base + BTS_WCON, 0x0); | |
87 | Outp32(base + BTS_WCON, 0x0); | |
88 | ||
89 | Outp32(base + BTS_PRIORITY, ((priority >> 16) & 0xFFFF)); | |
90 | Outp32(base + BTS_MOUPBOUND, 0x7F - mo); | |
91 | Outp32(base + BTS_MOLOBOUND, mo); | |
92 | Outp32(base + BTS_FLEXIBLE, 0x0); | |
93 | ||
94 | Outp32(base + BTS_PRIORITY + WOFFSET, (priority & 0xFFFF)); | |
95 | Outp32(base + BTS_MOUPBOUND + WOFFSET, 0x7F - mo); | |
96 | Outp32(base + BTS_MOLOBOUND + WOFFSET, mo); | |
97 | Outp32(base + BTS_FLEXIBLE + WOFFSET, 0x0); | |
98 | ||
99 | Outp32(base + BTS_RMODE, 0x2); | |
100 | Outp32(base + BTS_WMODE, 0x2); | |
101 | Outp32(base + BTS_EMERGENTRID, master_id); | |
102 | Outp32(base + BTS_EMERGENTWID, master_id); | |
103 | Outp32(base + BTS_RCON, 0x3); | |
104 | Outp32(base + BTS_WCON, 0x3); | |
105 | } | |
106 | ||
107 | void bts_setqos_fbmbw(addr_u32 base, unsigned int priority, unsigned int window, | |
108 | unsigned int token, unsigned int fbm, unsigned int master_id) //QOS : [RRRRWWWW] | |
109 | { | |
110 | Outp32(base + BTS_RCON, 0x0); | |
111 | Outp32(base + BTS_RCON, 0x0); | |
112 | Outp32(base + BTS_WCON, 0x0); | |
113 | Outp32(base + BTS_WCON, 0x0); | |
114 | ||
115 | Outp32(base + BTS_PRIORITY, ((priority >> 16) & 0xFFFF)); | |
116 | Outp32(base + BTS_TOKENMAX, 0xFFDF); | |
117 | Outp32(base + BTS_BWUPBOUND, 0x18); | |
118 | Outp32(base + BTS_BWLOBOUND, 0x1); | |
119 | Outp32(base + BTS_INITTKN, 0x8); | |
120 | Outp32(base + BTS_DEMWIN, window); | |
121 | Outp32(base + BTS_DEMTKN, token); | |
122 | Outp32(base + BTS_DEFWIN, window); | |
123 | Outp32(base + BTS_DEFTKN, token); | |
124 | Outp32(base + BTS_PRMWIN, window); | |
125 | Outp32(base + BTS_PRMTKN, token); | |
126 | Outp32(base + BTS_FLEXIBLE, 0x2); | |
127 | ||
128 | Outp32(base + BTS_PRIORITY + WOFFSET, (priority & 0xFFFF)); | |
129 | Outp32(base + BTS_TOKENMAX + WOFFSET, 0xFFDF); | |
130 | Outp32(base + BTS_BWUPBOUND + WOFFSET, 0x18); | |
131 | Outp32(base + BTS_BWLOBOUND + WOFFSET, 0x1); | |
132 | Outp32(base + BTS_INITTKN + WOFFSET, 0x8); | |
133 | Outp32(base + BTS_DEMWIN + WOFFSET, window); | |
134 | Outp32(base + BTS_DEMTKN + WOFFSET, token); | |
135 | Outp32(base + BTS_DEFWIN + WOFFSET, window); | |
136 | Outp32(base + BTS_DEFTKN + WOFFSET, token); | |
137 | Outp32(base + BTS_PRMWIN + WOFFSET, window); | |
138 | Outp32(base + BTS_PRMTKN + WOFFSET, token); | |
139 | Outp32(base + BTS_FLEXIBLE + WOFFSET, 0x1); | |
140 | ||
141 | Outp32(base + BTS_RMODE, 0x1); | |
142 | Outp32(base + BTS_WMODE, 0x1); | |
143 | ||
144 | Outp32(base + BTS_EMERGENTRID, master_id); | |
145 | Outp32(base + BTS_EMERGENTWID, master_id); | |
146 | if(fbm == 1) { | |
147 | Outp32(base + BTS_RCON, 0x7); | |
148 | Outp32(base + BTS_WCON, 0x7); | |
149 | } else { | |
150 | Outp32(base + BTS_RCON, 0x3); | |
151 | Outp32(base + BTS_WCON, 0x3); | |
152 | } | |
153 | } | |
154 | ||
155 | ||
156 | void bts_setemergentID(addr_u32 base, unsigned int master_id) | |
157 | { | |
158 | Outp32(base + BTS_PRIORITY, 0x4444); | |
159 | Outp32(base + BTS_PRIORITY + WOFFSET, 0x4444); | |
160 | ||
161 | Outp32(base + BTS_EMERGENTRID, master_id); | |
162 | Outp32(base + BTS_EMERGENTWID, master_id); | |
163 | } | |
164 | ||
165 | ||
166 | void bts_disable(addr_u32 base, unsigned int master_id) | |
167 | { | |
168 | /* reset to default */ | |
169 | Outp32(base + BTS_RCON, 0x0); | |
170 | Outp32(base + BTS_RCON, 0x0); | |
171 | Outp32(base + BTS_WCON, 0x0); | |
172 | Outp32(base + BTS_WCON, 0x0); | |
173 | ||
174 | Outp32(base + BTS_RMODE, 0x1); | |
175 | Outp32(base + BTS_WMODE, 0x1); | |
176 | ||
177 | Outp32(base + BTS_PRIORITY, 0xA942); | |
178 | Outp32(base + BTS_TOKENMAX, 0x0); | |
179 | Outp32(base + BTS_BWUPBOUND, 0x3FFF); | |
180 | Outp32(base + BTS_BWLOBOUND, 0x3FFF); | |
181 | Outp32(base + BTS_INITTKN, 0x7FFF); | |
182 | Outp32(base + BTS_DEMWIN, 0x7FFF); | |
183 | Outp32(base + BTS_DEMTKN, 0x1FFF); | |
184 | Outp32(base + BTS_DEFWIN, 0x7FFF); | |
185 | Outp32(base + BTS_DEFTKN, 0x1FFF); | |
186 | Outp32(base + BTS_PRMWIN, 0x7FFF); | |
187 | Outp32(base + BTS_PRMTKN, 0x1FFF); | |
188 | Outp32(base + BTS_MOUPBOUND, 0x1F); | |
189 | Outp32(base + BTS_MOLOBOUND, 0x1F); | |
190 | Outp32(base + BTS_FLEXIBLE, 0x0); | |
191 | ||
192 | Outp32(base + BTS_PRIORITY + WOFFSET, 0xA942); | |
193 | Outp32(base + BTS_TOKENMAX + WOFFSET, 0x0); | |
194 | Outp32(base + BTS_BWUPBOUND + WOFFSET, 0x3FFF); | |
195 | Outp32(base + BTS_BWLOBOUND + WOFFSET, 0x3FFF); | |
196 | Outp32(base + BTS_INITTKN + WOFFSET, 0x7FFF); | |
197 | Outp32(base + BTS_DEMWIN + WOFFSET, 0x7FFF); | |
198 | Outp32(base + BTS_DEMTKN + WOFFSET, 0x1FFF); | |
199 | Outp32(base + BTS_DEFWIN + WOFFSET, 0x7FFF); | |
200 | Outp32(base + BTS_DEFTKN + WOFFSET, 0x1FFF); | |
201 | Outp32(base + BTS_PRMWIN + WOFFSET, 0x7FFF); | |
202 | Outp32(base + BTS_PRMTKN + WOFFSET, 0x1FFF); | |
203 | Outp32(base + BTS_MOUPBOUND + WOFFSET, 0x1F); | |
204 | Outp32(base + BTS_MOLOBOUND + WOFFSET, 0x1F); | |
205 | Outp32(base + BTS_FLEXIBLE + WOFFSET, 0x0); | |
206 | Outp32(base + BTS_EMERGENTRID, master_id); | |
207 | Outp32(base + BTS_EMERGENTWID, master_id); | |
208 | } | |
209 | ||
210 | void bts_settrexqos(addr_u32 base, unsigned int priority, unsigned int master_id, unsigned int mask) | |
211 | { | |
212 | Outp32(base + TBTS_CON, 0x0); | |
213 | Outp32(base + TBTS_RCON, 0x0); | |
214 | Outp32(base + TBTS_WCON, 0x0); | |
215 | ||
216 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
217 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
218 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
219 | ||
220 | Outp32(base + TBTS_EMERGENTID, master_id); | |
221 | Outp32(base + TBTS_MASK, mask); | |
222 | Outp32(base + TBTS_CON, 0x1001); | |
223 | } | |
224 | ||
225 | void bts_settrexqos_mo(addr_u32 base, unsigned int priority, unsigned int mo, unsigned int master_id, unsigned int mask) | |
226 | { | |
227 | Outp32(base + TBTS_CON, 0x0); | |
228 | Outp32(base + TBTS_RCON, 0x0); | |
229 | Outp32(base + TBTS_WCON, 0x0); | |
230 | ||
231 | Outp32(base + TBTS_TKNUPBOUND, mo); | |
232 | Outp32(base + TBTS_TKNLOBOUND, mo); | |
233 | ||
234 | Outp32(base + TBTS_DEMTH, mo); | |
235 | Outp32(base + TBTS_PRMTH, mo); | |
236 | ||
237 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
238 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
239 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
240 | ||
241 | Outp32(base + TBTS_RCON, 0x11); // MO mode & Blocking on | |
242 | Outp32(base + TBTS_WCON, 0x11); | |
243 | Outp32(base + TBTS_EMERGENTID, master_id); | |
244 | Outp32(base + TBTS_MASK, mask); | |
245 | Outp32(base + TBTS_CON, 0x1001); | |
246 | } | |
247 | ||
248 | void bts_settrexqos_mo_rt(addr_u32 base, unsigned int priority, unsigned int mo, unsigned int master_id, unsigned int mask, | |
249 | unsigned int time_out, unsigned int bypass_en) | |
250 | { | |
251 | Outp32(base + TBTS_CON, 0x0); | |
252 | Outp32(base + TBTS_RCON, 0x0); | |
253 | Outp32(base + TBTS_WCON, 0x0); | |
254 | ||
255 | Outp32(base + TBTS_TKNUPBOUND, mo); | |
256 | Outp32(base + TBTS_TKNLOBOUND, mo); | |
257 | ||
258 | Outp32(base + TBTS_DEMTH, mo); | |
259 | Outp32(base + TBTS_PRMTH, mo); | |
260 | ||
261 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
262 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
263 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
264 | ||
265 | Outp32(base + TBTS_TIMEOUT, time_out); | |
266 | ||
267 | if(bypass_en) { | |
268 | Outp32(base + TBTS_RCON, 0x111); // MO mode & Qos bypass | |
269 | Outp32(base + TBTS_WCON, 0x111); | |
270 | } else { | |
271 | Outp32(base + TBTS_RCON, 0x11); // MO mode | |
272 | Outp32(base + TBTS_WCON, 0x11); | |
273 | } | |
274 | Outp32(base + TBTS_EMERGENTID, master_id); | |
275 | Outp32(base + TBTS_MASK, mask); | |
276 | Outp32(base + TBTS_CON, 0x1001); // Time out, Urgent enable | |
277 | } | |
278 | ||
279 | void bts_settrexqos_mo_cp(addr_u32 base, unsigned int priority, unsigned int mo, unsigned int master_id, unsigned int mask, | |
280 | unsigned int time_out, unsigned int bypass_en) | |
281 | { | |
282 | Outp32(base + TBTS_CON, 0x0); | |
283 | Outp32(base + TBTS_RCON, 0x0); | |
284 | Outp32(base + TBTS_WCON, 0x0); | |
285 | ||
286 | Outp32(base + TBTS_TKNUPBOUND, mo); | |
287 | Outp32(base + TBTS_TKNLOBOUND, mo); | |
288 | ||
289 | Outp32(base + TBTS_DEMTH, mo); | |
290 | Outp32(base + TBTS_PRMTH, mo); | |
291 | ||
292 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
293 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
294 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
295 | ||
296 | Outp32(base + TBTS_TIMEOUT, time_out); | |
297 | ||
298 | if(bypass_en) { | |
299 | Outp32(base + TBTS_RCON, 0x111); // MO mode & Qos bypass | |
300 | Outp32(base + TBTS_WCON, 0x111); | |
301 | } else { | |
302 | Outp32(base + TBTS_RCON, 0x11); // MO mode | |
303 | Outp32(base + TBTS_WCON, 0x11); | |
304 | } | |
305 | Outp32(base + TBTS_EMERGENTID, master_id); | |
306 | Outp32(base + TBTS_MASK, mask); | |
307 | Outp32(base + TBTS_CON, 0x101101); // Time out, Urgent enable | |
308 | } | |
309 | ||
310 | void bts_settrexqos_mo_change(addr_u32 base, unsigned int mo) | |
311 | { | |
312 | Outp32(base + TBTS_RCON, 0x0); | |
313 | Outp32(base + TBTS_WCON, 0x0); | |
314 | ||
315 | Outp32(base + TBTS_TKNUPBOUND, mo); | |
316 | Outp32(base + TBTS_TKNLOBOUND, mo); | |
317 | ||
318 | Outp32(base + TBTS_DEMTH, mo); | |
319 | Outp32(base + TBTS_PRMTH, mo); | |
320 | ||
321 | Outp32(base + TBTS_RCON, 0x11); // MO mode & Blocking on | |
322 | Outp32(base + TBTS_WCON, 0x11); | |
323 | } | |
324 | ||
325 | void bts_settrexqos_urgent_off(addr_u32 base) | |
326 | { | |
327 | Outp32(base + TBTS_CON, 0x001001); // Time out, Urgent disable | |
328 | } | |
329 | void bts_settrexqos_urgent_on(addr_u32 base) | |
330 | { | |
331 | Outp32(base + TBTS_CON, 0x101101); // Time out, Urgent enable | |
332 | } | |
333 | ||
334 | void bts_settrexqos_bw(addr_u32 base, unsigned int priority, unsigned int decval, unsigned int master_id, unsigned int mask) | |
335 | { | |
336 | Outp32(base + TBTS_CON, 0x0); | |
337 | Outp32(base + TBTS_RCON, 0x0); | |
338 | Outp32(base + TBTS_WCON, 0x0); | |
339 | ||
340 | Outp32(base + TBTS_TKNUPBOUND, 0x3FFF); | |
341 | Outp32(base + TBTS_TKNLOBOUND, 0x3FF7); | |
342 | Outp32(base + TBTS_RTKNINIT, 0x3FFF); | |
343 | Outp32(base + TBTS_WTKNINIT, 0x3FFF); | |
344 | ||
345 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
346 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
347 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
348 | ||
349 | Outp32(base + TBTS_RTKNDEC, decval); | |
350 | Outp32(base + TBTS_WTKNDEC, decval); | |
351 | ||
352 | Outp32(base + TBTS_RCON, 0x1); // Blocking on | |
353 | Outp32(base + TBTS_WCON, 0x1); | |
354 | Outp32(base + TBTS_EMERGENTID, master_id); | |
355 | Outp32(base + TBTS_MASK, mask); | |
356 | Outp32(base + TBTS_CON, 0x1001); | |
357 | ||
358 | } | |
359 | ||
360 | void bts_settrexqos_fbmbw(addr_u32 base, unsigned int priority, unsigned int master_id, unsigned int mask) | |
361 | { | |
362 | Outp32(base + TBTS_CON, 0x0); | |
363 | Outp32(base + TBTS_RCON, 0x0); | |
364 | Outp32(base + TBTS_WCON, 0x0); | |
365 | ||
366 | Outp32(base + TBTS_DEMQOS, priority & 0xF); | |
367 | Outp32(base + TBTS_DEFQOS, priority & 0xF); | |
368 | Outp32(base + TBTS_PRMQOS, priority & 0xF); | |
369 | ||
370 | Outp32(base + TBTS_RCON, 0x1); // Blocking on | |
371 | Outp32(base + TBTS_WCON, 0x1); | |
372 | Outp32(base + TBTS_EMERGENTID, master_id); | |
373 | Outp32(base + TBTS_MASK, mask); | |
374 | Outp32(base + TBTS_CON, 0x1001); | |
375 | } | |
376 | ||
377 | ||
378 | void bts_trexdisable(addr_u32 base, unsigned int master_id, unsigned int mask) | |
379 | { | |
380 | Outp32(base + TBTS_CON, 0x00010000); | |
381 | Outp32(base + TBTS_RCON, 0x0); | |
382 | Outp32(base + TBTS_WCON, 0x0); | |
383 | ||
384 | Outp32(base + TBTS_TKNUPBOUND, 0x5FFF); | |
385 | Outp32(base + TBTS_TKNLOBOUND, 0x1FFF); | |
386 | ||
387 | Outp32(base + TBTS_DEMTH, 0x5FFF); | |
388 | Outp32(base + TBTS_PRMTH, 0x1FFF); | |
389 | ||
390 | Outp32(base + TBTS_DEMQOS, 0x2); | |
391 | Outp32(base + TBTS_DEFQOS, 0x4); | |
392 | Outp32(base + TBTS_PRMQOS, 0x9); | |
393 | ||
394 | Outp32(base + TBTS_QURGUPTH, 0x8); | |
395 | Outp32(base + TBTS_QURGDOWNTH, 0x8); | |
396 | Outp32(base + TBTS_RTKNINIT, 0x3FFF); | |
397 | Outp32(base + TBTS_WTKNINIT, 0x3FFF); | |
398 | Outp32(base + TBTS_RTKNDEC, 0x0); | |
399 | Outp32(base + TBTS_WTKNDEC, 0x0); | |
400 | Outp32(base + TBTS_EMERGENTID, master_id); | |
401 | Outp32(base + TBTS_MASK, mask); | |
402 | } | |
403 | ||
404 | ||
405 | ||
406 | void bts_setnsp(addr_u32 base, unsigned int nsp) | |
407 | { | |
408 | Outp32(base , nsp); | |
409 | } |