Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the SWIM3 (Super Woz Integrated Machine 3) | |
3 | * floppy controller found on Power Macintoshes. | |
4 | * | |
5 | * Copyright (C) 1996 Paul Mackerras. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * TODO: | |
15 | * handle 2 drives | |
16 | * handle GCR disks | |
17 | */ | |
18 | ||
b3025457 BH |
19 | #undef DEBUG |
20 | ||
1da177e4 LT |
21 | #include <linux/stddef.h> |
22 | #include <linux/kernel.h> | |
23 | #include <linux/sched.h> | |
24 | #include <linux/timer.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/fd.h> | |
27 | #include <linux/ioctl.h> | |
28 | #include <linux/blkdev.h> | |
1da177e4 | 29 | #include <linux/interrupt.h> |
2a48fc0a | 30 | #include <linux/mutex.h> |
1da177e4 | 31 | #include <linux/module.h> |
515729ec | 32 | #include <linux/spinlock.h> |
1da177e4 LT |
33 | #include <asm/io.h> |
34 | #include <asm/dbdma.h> | |
35 | #include <asm/prom.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/mediabay.h> | |
38 | #include <asm/machdep.h> | |
39 | #include <asm/pmac_feature.h> | |
40 | ||
1da177e4 LT |
41 | #define MAX_FLOPPIES 2 |
42 | ||
b3025457 BH |
43 | static DEFINE_MUTEX(swim3_mutex); |
44 | static struct gendisk *disks[MAX_FLOPPIES]; | |
45 | ||
1da177e4 LT |
46 | enum swim_state { |
47 | idle, | |
48 | locating, | |
49 | seeking, | |
50 | settling, | |
51 | do_transfer, | |
52 | jogging, | |
53 | available, | |
54 | revalidating, | |
55 | ejecting | |
56 | }; | |
57 | ||
58 | #define REG(x) unsigned char x; char x ## _pad[15]; | |
59 | ||
60 | /* | |
61 | * The names for these registers mostly represent speculation on my part. | |
62 | * It will be interesting to see how close they are to the names Apple uses. | |
63 | */ | |
64 | struct swim3 { | |
65 | REG(data); | |
66 | REG(timer); /* counts down at 1MHz */ | |
67 | REG(error); | |
68 | REG(mode); | |
69 | REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ | |
70 | REG(setup); | |
71 | REG(control); /* writing bits clears them */ | |
72 | REG(status); /* writing bits sets them in control */ | |
73 | REG(intr); | |
74 | REG(nseek); /* # tracks to seek */ | |
75 | REG(ctrack); /* current track number */ | |
76 | REG(csect); /* current sector number */ | |
77 | REG(gap3); /* size of gap 3 in track format */ | |
78 | REG(sector); /* sector # to read or write */ | |
79 | REG(nsect); /* # sectors to read or write */ | |
80 | REG(intr_enable); | |
81 | }; | |
82 | ||
83 | #define control_bic control | |
84 | #define control_bis status | |
85 | ||
86 | /* Bits in select register */ | |
87 | #define CA_MASK 7 | |
88 | #define LSTRB 8 | |
89 | ||
90 | /* Bits in control register */ | |
91 | #define DO_SEEK 0x80 | |
92 | #define FORMAT 0x40 | |
93 | #define SELECT 0x20 | |
94 | #define WRITE_SECTORS 0x10 | |
95 | #define DO_ACTION 0x08 | |
96 | #define DRIVE2_ENABLE 0x04 | |
97 | #define DRIVE_ENABLE 0x02 | |
98 | #define INTR_ENABLE 0x01 | |
99 | ||
100 | /* Bits in status register */ | |
101 | #define FIFO_1BYTE 0x80 | |
102 | #define FIFO_2BYTE 0x40 | |
103 | #define ERROR 0x20 | |
104 | #define DATA 0x08 | |
105 | #define RDDATA 0x04 | |
106 | #define INTR_PENDING 0x02 | |
107 | #define MARK_BYTE 0x01 | |
108 | ||
109 | /* Bits in intr and intr_enable registers */ | |
110 | #define ERROR_INTR 0x20 | |
111 | #define DATA_CHANGED 0x10 | |
112 | #define TRANSFER_DONE 0x08 | |
113 | #define SEEN_SECTOR 0x04 | |
114 | #define SEEK_DONE 0x02 | |
115 | #define TIMER_DONE 0x01 | |
116 | ||
117 | /* Bits in error register */ | |
118 | #define ERR_DATA_CRC 0x80 | |
119 | #define ERR_ADDR_CRC 0x40 | |
120 | #define ERR_OVERRUN 0x04 | |
121 | #define ERR_UNDERRUN 0x01 | |
122 | ||
123 | /* Bits in setup register */ | |
124 | #define S_SW_RESET 0x80 | |
125 | #define S_GCR_WRITE 0x40 | |
126 | #define S_IBM_DRIVE 0x20 | |
127 | #define S_TEST_MODE 0x10 | |
128 | #define S_FCLK_DIV2 0x08 | |
129 | #define S_GCR 0x04 | |
130 | #define S_COPY_PROT 0x02 | |
131 | #define S_INV_WDATA 0x01 | |
132 | ||
133 | /* Select values for swim3_action */ | |
134 | #define SEEK_POSITIVE 0 | |
135 | #define SEEK_NEGATIVE 4 | |
136 | #define STEP 1 | |
137 | #define MOTOR_ON 2 | |
138 | #define MOTOR_OFF 6 | |
139 | #define INDEX 3 | |
140 | #define EJECT 7 | |
141 | #define SETMFM 9 | |
142 | #define SETGCR 13 | |
143 | ||
144 | /* Select values for swim3_select and swim3_readbit */ | |
145 | #define STEP_DIR 0 | |
146 | #define STEPPING 1 | |
147 | #define MOTOR_ON 2 | |
148 | #define RELAX 3 /* also eject in progress */ | |
149 | #define READ_DATA_0 4 | |
150 | #define TWOMEG_DRIVE 5 | |
151 | #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */ | |
152 | #define DRIVE_PRESENT 7 | |
153 | #define DISK_IN 8 | |
154 | #define WRITE_PROT 9 | |
155 | #define TRACK_ZERO 10 | |
156 | #define TACHO 11 | |
157 | #define READ_DATA_1 12 | |
158 | #define MFM_MODE 13 | |
159 | #define SEEK_COMPLETE 14 | |
160 | #define ONEMEG_MEDIA 15 | |
161 | ||
162 | /* Definitions of values used in writing and formatting */ | |
163 | #define DATA_ESCAPE 0x99 | |
164 | #define GCR_SYNC_EXC 0x3f | |
165 | #define GCR_SYNC_CONV 0x80 | |
166 | #define GCR_FIRST_MARK 0xd5 | |
167 | #define GCR_SECOND_MARK 0xaa | |
168 | #define GCR_ADDR_MARK "\xd5\xaa\x00" | |
169 | #define GCR_DATA_MARK "\xd5\xaa\x0b" | |
170 | #define GCR_SLIP_BYTE "\x27\xaa" | |
171 | #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f" | |
172 | ||
173 | #define DATA_99 "\x99\x99" | |
174 | #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe" | |
175 | #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc" | |
176 | #define MFM_GAP_LEN 12 | |
177 | ||
178 | struct floppy_state { | |
179 | enum swim_state state; | |
180 | struct swim3 __iomem *swim3; /* hardware registers */ | |
181 | struct dbdma_regs __iomem *dma; /* DMA controller registers */ | |
182 | int swim3_intr; /* interrupt number for SWIM3 */ | |
183 | int dma_intr; /* interrupt number for DMA channel */ | |
184 | int cur_cyl; /* cylinder head is on, or -1 */ | |
185 | int cur_sector; /* last sector we saw go past */ | |
186 | int req_cyl; /* the cylinder for the current r/w request */ | |
187 | int head; /* head number ditto */ | |
188 | int req_sector; /* sector number ditto */ | |
189 | int scount; /* # sectors we're transferring at present */ | |
190 | int retries; | |
191 | int settle_time; | |
192 | int secpercyl; /* disk geometry information */ | |
193 | int secpertrack; | |
194 | int total_secs; | |
195 | int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */ | |
196 | struct dbdma_cmd *dma_cmd; | |
197 | int ref_count; | |
198 | int expect_cyl; | |
199 | struct timer_list timeout; | |
200 | int timeout_pending; | |
201 | int ejected; | |
202 | wait_queue_head_t wait; | |
203 | int wanted; | |
d58b0c39 | 204 | struct macio_dev *mdev; |
1da177e4 | 205 | char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)]; |
b3025457 BH |
206 | int index; |
207 | struct request *cur_req; | |
1da177e4 LT |
208 | }; |
209 | ||
b3025457 BH |
210 | #define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) |
211 | #define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
212 | #define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
213 | ||
214 | #ifdef DEBUG | |
215 | #define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg) | |
216 | #else | |
217 | #define swim3_dbg(fmt, arg...) do { } while(0) | |
218 | #endif | |
219 | ||
1da177e4 LT |
220 | static struct floppy_state floppy_states[MAX_FLOPPIES]; |
221 | static int floppy_count = 0; | |
222 | static DEFINE_SPINLOCK(swim3_lock); | |
223 | ||
224 | static unsigned short write_preamble[] = { | |
225 | 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */ | |
226 | 0, 0, 0, 0, 0, 0, /* sync field */ | |
227 | 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */ | |
228 | 0x990f /* no escape for 512 bytes */ | |
229 | }; | |
230 | ||
231 | static unsigned short write_postamble[] = { | |
232 | 0x9904, /* insert CRC */ | |
233 | 0x4e4e, 0x4e4e, | |
234 | 0x9908, /* stop writing */ | |
235 | 0, 0, 0, 0, 0, 0 | |
236 | }; | |
237 | ||
1da177e4 LT |
238 | static void seek_track(struct floppy_state *fs, int n); |
239 | static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count); | |
1da177e4 LT |
240 | static void act(struct floppy_state *fs); |
241 | static void scan_timeout(unsigned long data); | |
242 | static void seek_timeout(unsigned long data); | |
243 | static void settle_timeout(unsigned long data); | |
244 | static void xfer_timeout(unsigned long data); | |
7d12e780 DH |
245 | static irqreturn_t swim3_interrupt(int irq, void *dev_id); |
246 | /*static void fd_dma_interrupt(int irq, void *dev_id);*/ | |
1da177e4 LT |
247 | static int grab_drive(struct floppy_state *fs, enum swim_state state, |
248 | int interruptible); | |
249 | static void release_drive(struct floppy_state *fs); | |
250 | static int fd_eject(struct floppy_state *fs); | |
b4d9a442 | 251 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 | 252 | unsigned int cmd, unsigned long param); |
b4d9a442 AV |
253 | static int floppy_open(struct block_device *bdev, fmode_t mode); |
254 | static int floppy_release(struct gendisk *disk, fmode_t mode); | |
4bbde777 TH |
255 | static unsigned int floppy_check_events(struct gendisk *disk, |
256 | unsigned int clearing); | |
1da177e4 | 257 | static int floppy_revalidate(struct gendisk *disk); |
1da177e4 | 258 | |
b3025457 | 259 | static bool swim3_end_request(struct floppy_state *fs, int err, unsigned int nr_bytes) |
f4bd4b90 | 260 | { |
b3025457 BH |
261 | struct request *req = fs->cur_req; |
262 | int rc; | |
f4bd4b90 | 263 | |
b3025457 BH |
264 | swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n", |
265 | err, nr_bytes, req); | |
f4bd4b90 | 266 | |
b3025457 BH |
267 | if (err) |
268 | nr_bytes = blk_rq_cur_bytes(req); | |
269 | rc = __blk_end_request(req, err, nr_bytes); | |
270 | if (rc) | |
271 | return true; | |
272 | fs->cur_req = NULL; | |
273 | return false; | |
f4bd4b90 TH |
274 | } |
275 | ||
1da177e4 LT |
276 | static void swim3_select(struct floppy_state *fs, int sel) |
277 | { | |
278 | struct swim3 __iomem *sw = fs->swim3; | |
279 | ||
280 | out_8(&sw->select, RELAX); | |
281 | if (sel & 8) | |
282 | out_8(&sw->control_bis, SELECT); | |
283 | else | |
284 | out_8(&sw->control_bic, SELECT); | |
285 | out_8(&sw->select, sel & CA_MASK); | |
286 | } | |
287 | ||
288 | static void swim3_action(struct floppy_state *fs, int action) | |
289 | { | |
290 | struct swim3 __iomem *sw = fs->swim3; | |
291 | ||
292 | swim3_select(fs, action); | |
293 | udelay(1); | |
294 | out_8(&sw->select, sw->select | LSTRB); | |
295 | udelay(2); | |
296 | out_8(&sw->select, sw->select & ~LSTRB); | |
297 | udelay(1); | |
298 | } | |
299 | ||
300 | static int swim3_readbit(struct floppy_state *fs, int bit) | |
301 | { | |
302 | struct swim3 __iomem *sw = fs->swim3; | |
303 | int stat; | |
304 | ||
305 | swim3_select(fs, bit); | |
306 | udelay(1); | |
307 | stat = in_8(&sw->status); | |
308 | return (stat & DATA) == 0; | |
309 | } | |
310 | ||
1da177e4 LT |
311 | static void start_request(struct floppy_state *fs) |
312 | { | |
313 | struct request *req; | |
314 | unsigned long x; | |
315 | ||
b3025457 BH |
316 | swim3_dbg("start request, initial state=%d\n", fs->state); |
317 | ||
1da177e4 LT |
318 | if (fs->state == idle && fs->wanted) { |
319 | fs->state = available; | |
320 | wake_up(&fs->wait); | |
321 | return; | |
322 | } | |
f4bd4b90 | 323 | while (fs->state == idle) { |
b3025457 BH |
324 | swim3_dbg("start request, idle loop, cur_req=%p\n", fs->cur_req); |
325 | if (!fs->cur_req) { | |
326 | fs->cur_req = blk_fetch_request(disks[fs->index]->queue); | |
327 | swim3_dbg(" fetched request %p\n", fs->cur_req); | |
328 | if (!fs->cur_req) | |
f4bd4b90 | 329 | break; |
f4bd4b90 | 330 | } |
b3025457 BH |
331 | req = fs->cur_req; |
332 | ||
333 | if (fs->mdev->media_bay && | |
334 | check_media_bay(fs->mdev->media_bay) != MB_FD) { | |
335 | swim3_dbg("%s", " media bay absent, dropping req\n"); | |
336 | swim3_end_request(fs, -ENODEV, 0); | |
337 | continue; | |
338 | } | |
339 | ||
340 | #if 0 /* This is really too verbose */ | |
341 | swim3_dbg("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n", | |
342 | req->rq_disk->disk_name, req->cmd, | |
343 | (long)blk_rq_pos(req), blk_rq_sectors(req), | |
344 | req->buffer); | |
345 | swim3_dbg(" errors=%d current_nr_sectors=%u\n", | |
346 | req->errors, blk_rq_cur_sectors(req)); | |
1da177e4 LT |
347 | #endif |
348 | ||
83096ebf | 349 | if (blk_rq_pos(req) >= fs->total_secs) { |
b3025457 BH |
350 | swim3_dbg(" pos out of bounds (%ld, max is %ld)\n", |
351 | (long)blk_rq_pos(req), (long)fs->total_secs); | |
352 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
353 | continue; |
354 | } | |
1da177e4 | 355 | if (fs->ejected) { |
b3025457 BH |
356 | swim3_dbg("%s", " disk ejected\n"); |
357 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
358 | continue; |
359 | } | |
360 | ||
361 | if (rq_data_dir(req) == WRITE) { | |
362 | if (fs->write_prot < 0) | |
363 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
364 | if (fs->write_prot) { | |
b3025457 BH |
365 | swim3_dbg("%s", " try to write, disk write protected\n"); |
366 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
367 | continue; |
368 | } | |
369 | } | |
370 | ||
83096ebf TH |
371 | /* Do not remove the cast. blk_rq_pos(req) is now a |
372 | * sector_t and can be 64 bits, but it will never go | |
373 | * past 32 bits for this driver anyway, so we can | |
374 | * safely cast it down and not have to do a 64/32 | |
375 | * division | |
1da177e4 | 376 | */ |
83096ebf TH |
377 | fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl; |
378 | x = ((long)blk_rq_pos(req)) % fs->secpercyl; | |
1da177e4 LT |
379 | fs->head = x / fs->secpertrack; |
380 | fs->req_sector = x % fs->secpertrack + 1; | |
1da177e4 LT |
381 | fs->state = do_transfer; |
382 | fs->retries = 0; | |
383 | ||
384 | act(fs); | |
385 | } | |
386 | } | |
387 | ||
b3025457 BH |
388 | static void do_fd_request(struct request_queue * q) |
389 | { | |
390 | start_request(q->queuedata); | |
391 | } | |
392 | ||
1da177e4 LT |
393 | static void set_timeout(struct floppy_state *fs, int nticks, |
394 | void (*proc)(unsigned long)) | |
395 | { | |
1da177e4 LT |
396 | if (fs->timeout_pending) |
397 | del_timer(&fs->timeout); | |
398 | fs->timeout.expires = jiffies + nticks; | |
399 | fs->timeout.function = proc; | |
400 | fs->timeout.data = (unsigned long) fs; | |
401 | add_timer(&fs->timeout); | |
402 | fs->timeout_pending = 1; | |
1da177e4 LT |
403 | } |
404 | ||
405 | static inline void scan_track(struct floppy_state *fs) | |
406 | { | |
407 | struct swim3 __iomem *sw = fs->swim3; | |
408 | ||
409 | swim3_select(fs, READ_DATA_0); | |
410 | in_8(&sw->intr); /* clear SEEN_SECTOR bit */ | |
411 | in_8(&sw->error); | |
412 | out_8(&sw->intr_enable, SEEN_SECTOR); | |
413 | out_8(&sw->control_bis, DO_ACTION); | |
414 | /* enable intr when track found */ | |
415 | set_timeout(fs, HZ, scan_timeout); /* enable timeout */ | |
416 | } | |
417 | ||
418 | static inline void seek_track(struct floppy_state *fs, int n) | |
419 | { | |
420 | struct swim3 __iomem *sw = fs->swim3; | |
421 | ||
422 | if (n >= 0) { | |
423 | swim3_action(fs, SEEK_POSITIVE); | |
424 | sw->nseek = n; | |
425 | } else { | |
426 | swim3_action(fs, SEEK_NEGATIVE); | |
427 | sw->nseek = -n; | |
428 | } | |
429 | fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1; | |
430 | swim3_select(fs, STEP); | |
431 | in_8(&sw->error); | |
432 | /* enable intr when seek finished */ | |
433 | out_8(&sw->intr_enable, SEEK_DONE); | |
434 | out_8(&sw->control_bis, DO_SEEK); | |
435 | set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */ | |
436 | fs->settle_time = 0; | |
437 | } | |
438 | ||
439 | static inline void init_dma(struct dbdma_cmd *cp, int cmd, | |
440 | void *buf, int count) | |
441 | { | |
442 | st_le16(&cp->req_count, count); | |
443 | st_le16(&cp->command, cmd); | |
444 | st_le32(&cp->phy_addr, virt_to_bus(buf)); | |
445 | cp->xfer_status = 0; | |
446 | } | |
447 | ||
448 | static inline void setup_transfer(struct floppy_state *fs) | |
449 | { | |
450 | int n; | |
451 | struct swim3 __iomem *sw = fs->swim3; | |
452 | struct dbdma_cmd *cp = fs->dma_cmd; | |
453 | struct dbdma_regs __iomem *dr = fs->dma; | |
b3025457 | 454 | struct request *req = fs->cur_req; |
1da177e4 | 455 | |
b3025457 BH |
456 | if (blk_rq_cur_sectors(req) <= 0) { |
457 | swim3_warn("%s", "Transfer 0 sectors ?\n"); | |
1da177e4 LT |
458 | return; |
459 | } | |
b3025457 | 460 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
461 | n = 1; |
462 | else { | |
463 | n = fs->secpertrack - fs->req_sector + 1; | |
b3025457 BH |
464 | if (n > blk_rq_cur_sectors(req)) |
465 | n = blk_rq_cur_sectors(req); | |
1da177e4 | 466 | } |
b3025457 BH |
467 | |
468 | swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n", | |
469 | fs->req_sector, fs->secpertrack, fs->head, n); | |
470 | ||
1da177e4 LT |
471 | fs->scount = n; |
472 | swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0); | |
473 | out_8(&sw->sector, fs->req_sector); | |
474 | out_8(&sw->nsect, n); | |
475 | out_8(&sw->gap3, 0); | |
476 | out_le32(&dr->cmdptr, virt_to_bus(cp)); | |
b3025457 | 477 | if (rq_data_dir(req) == WRITE) { |
1da177e4 LT |
478 | /* Set up 3 dma commands: write preamble, data, postamble */ |
479 | init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble)); | |
480 | ++cp; | |
b3025457 | 481 | init_dma(cp, OUTPUT_MORE, req->buffer, 512); |
1da177e4 LT |
482 | ++cp; |
483 | init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble)); | |
484 | } else { | |
b3025457 | 485 | init_dma(cp, INPUT_LAST, req->buffer, n * 512); |
1da177e4 LT |
486 | } |
487 | ++cp; | |
488 | out_le16(&cp->command, DBDMA_STOP); | |
489 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
490 | in_8(&sw->error); | |
491 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
b3025457 | 492 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
493 | out_8(&sw->control_bis, WRITE_SECTORS); |
494 | in_8(&sw->intr); | |
495 | out_le32(&dr->control, (RUN << 16) | RUN); | |
496 | /* enable intr when transfer complete */ | |
497 | out_8(&sw->intr_enable, TRANSFER_DONE); | |
498 | out_8(&sw->control_bis, DO_ACTION); | |
499 | set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */ | |
500 | } | |
501 | ||
502 | static void act(struct floppy_state *fs) | |
503 | { | |
504 | for (;;) { | |
b3025457 BH |
505 | swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n", |
506 | fs->state, fs->req_cyl, fs->cur_cyl); | |
507 | ||
1da177e4 LT |
508 | switch (fs->state) { |
509 | case idle: | |
510 | return; /* XXX shouldn't get here */ | |
511 | ||
512 | case locating: | |
513 | if (swim3_readbit(fs, TRACK_ZERO)) { | |
b3025457 | 514 | swim3_dbg("%s", " locate track 0\n"); |
1da177e4 LT |
515 | fs->cur_cyl = 0; |
516 | if (fs->req_cyl == 0) | |
517 | fs->state = do_transfer; | |
518 | else | |
519 | fs->state = seeking; | |
520 | break; | |
521 | } | |
522 | scan_track(fs); | |
523 | return; | |
524 | ||
525 | case seeking: | |
526 | if (fs->cur_cyl < 0) { | |
527 | fs->expect_cyl = -1; | |
528 | fs->state = locating; | |
529 | break; | |
530 | } | |
531 | if (fs->req_cyl == fs->cur_cyl) { | |
b3025457 | 532 | swim3_warn("%s", "Whoops, seeking 0\n"); |
1da177e4 LT |
533 | fs->state = do_transfer; |
534 | break; | |
535 | } | |
536 | seek_track(fs, fs->req_cyl - fs->cur_cyl); | |
537 | return; | |
538 | ||
539 | case settling: | |
540 | /* check for SEEK_COMPLETE after 30ms */ | |
541 | fs->settle_time = (HZ + 32) / 33; | |
542 | set_timeout(fs, fs->settle_time, settle_timeout); | |
543 | return; | |
544 | ||
545 | case do_transfer: | |
546 | if (fs->cur_cyl != fs->req_cyl) { | |
547 | if (fs->retries > 5) { | |
b3025457 BH |
548 | swim3_err("Wrong cylinder in transfer, want: %d got %d\n", |
549 | fs->req_cyl, fs->cur_cyl); | |
550 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
551 | fs->state = idle; |
552 | return; | |
553 | } | |
554 | fs->state = seeking; | |
555 | break; | |
556 | } | |
557 | setup_transfer(fs); | |
558 | return; | |
559 | ||
560 | case jogging: | |
561 | seek_track(fs, -5); | |
562 | return; | |
563 | ||
564 | default: | |
b3025457 | 565 | swim3_err("Unknown state %d\n", fs->state); |
1da177e4 LT |
566 | return; |
567 | } | |
568 | } | |
569 | } | |
570 | ||
571 | static void scan_timeout(unsigned long data) | |
572 | { | |
573 | struct floppy_state *fs = (struct floppy_state *) data; | |
574 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
575 | unsigned long flags; |
576 | ||
577 | swim3_dbg("* scan timeout, state=%d\n", fs->state); | |
1da177e4 | 578 | |
b3025457 | 579 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
580 | fs->timeout_pending = 0; |
581 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
582 | out_8(&sw->select, RELAX); | |
583 | out_8(&sw->intr_enable, 0); | |
584 | fs->cur_cyl = -1; | |
585 | if (fs->retries > 5) { | |
b3025457 | 586 | swim3_end_request(fs, -EIO, 0); |
1da177e4 LT |
587 | fs->state = idle; |
588 | start_request(fs); | |
589 | } else { | |
590 | fs->state = jogging; | |
591 | act(fs); | |
592 | } | |
b3025457 | 593 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
594 | } |
595 | ||
596 | static void seek_timeout(unsigned long data) | |
597 | { | |
598 | struct floppy_state *fs = (struct floppy_state *) data; | |
599 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
600 | unsigned long flags; |
601 | ||
602 | swim3_dbg("* seek timeout, state=%d\n", fs->state); | |
1da177e4 | 603 | |
b3025457 | 604 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
605 | fs->timeout_pending = 0; |
606 | out_8(&sw->control_bic, DO_SEEK); | |
607 | out_8(&sw->select, RELAX); | |
608 | out_8(&sw->intr_enable, 0); | |
b3025457 BH |
609 | swim3_err("%s", "Seek timeout\n"); |
610 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
611 | fs->state = idle; |
612 | start_request(fs); | |
b3025457 | 613 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
614 | } |
615 | ||
616 | static void settle_timeout(unsigned long data) | |
617 | { | |
618 | struct floppy_state *fs = (struct floppy_state *) data; | |
619 | struct swim3 __iomem *sw = fs->swim3; | |
b3025457 BH |
620 | unsigned long flags; |
621 | ||
622 | swim3_dbg("* settle timeout, state=%d\n", fs->state); | |
1da177e4 | 623 | |
b3025457 | 624 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
625 | fs->timeout_pending = 0; |
626 | if (swim3_readbit(fs, SEEK_COMPLETE)) { | |
627 | out_8(&sw->select, RELAX); | |
628 | fs->state = locating; | |
629 | act(fs); | |
b3025457 | 630 | goto unlock; |
1da177e4 LT |
631 | } |
632 | out_8(&sw->select, RELAX); | |
633 | if (fs->settle_time < 2*HZ) { | |
634 | ++fs->settle_time; | |
635 | set_timeout(fs, 1, settle_timeout); | |
b3025457 | 636 | goto unlock; |
1da177e4 | 637 | } |
b3025457 BH |
638 | swim3_err("%s", "Seek settle timeout\n"); |
639 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
640 | fs->state = idle; |
641 | start_request(fs); | |
b3025457 BH |
642 | unlock: |
643 | spin_unlock_irqrestore(&swim3_lock, flags); | |
1da177e4 LT |
644 | } |
645 | ||
646 | static void xfer_timeout(unsigned long data) | |
647 | { | |
648 | struct floppy_state *fs = (struct floppy_state *) data; | |
649 | struct swim3 __iomem *sw = fs->swim3; | |
650 | struct dbdma_regs __iomem *dr = fs->dma; | |
b3025457 | 651 | unsigned long flags; |
1da177e4 LT |
652 | int n; |
653 | ||
b3025457 BH |
654 | swim3_dbg("* xfer timeout, state=%d\n", fs->state); |
655 | ||
656 | spin_lock_irqsave(&swim3_lock, flags); | |
1da177e4 LT |
657 | fs->timeout_pending = 0; |
658 | out_le32(&dr->control, RUN << 16); | |
659 | /* We must wait a bit for dbdma to stop */ | |
660 | for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++) | |
661 | udelay(1); | |
662 | out_8(&sw->intr_enable, 0); | |
663 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
664 | out_8(&sw->select, RELAX); | |
b3025457 BH |
665 | swim3_err("Timeout %sing sector %ld\n", |
666 | (rq_data_dir(fs->cur_req)==WRITE? "writ": "read"), | |
667 | (long)blk_rq_pos(fs->cur_req)); | |
668 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
669 | fs->state = idle; |
670 | start_request(fs); | |
b3025457 | 671 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
672 | } |
673 | ||
7d12e780 | 674 | static irqreturn_t swim3_interrupt(int irq, void *dev_id) |
1da177e4 LT |
675 | { |
676 | struct floppy_state *fs = (struct floppy_state *) dev_id; | |
677 | struct swim3 __iomem *sw = fs->swim3; | |
678 | int intr, err, n; | |
679 | int stat, resid; | |
680 | struct dbdma_regs __iomem *dr; | |
681 | struct dbdma_cmd *cp; | |
b3025457 BH |
682 | unsigned long flags; |
683 | struct request *req = fs->cur_req; | |
684 | ||
685 | swim3_dbg("* interrupt, state=%d\n", fs->state); | |
1da177e4 | 686 | |
b3025457 | 687 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
688 | intr = in_8(&sw->intr); |
689 | err = (intr & ERROR_INTR)? in_8(&sw->error): 0; | |
690 | if ((intr & ERROR_INTR) && fs->state != do_transfer) | |
b3025457 BH |
691 | swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n", |
692 | fs->state, rq_data_dir(req), intr, err); | |
1da177e4 LT |
693 | switch (fs->state) { |
694 | case locating: | |
695 | if (intr & SEEN_SECTOR) { | |
696 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
697 | out_8(&sw->select, RELAX); | |
698 | out_8(&sw->intr_enable, 0); | |
699 | del_timer(&fs->timeout); | |
700 | fs->timeout_pending = 0; | |
701 | if (sw->ctrack == 0xff) { | |
b3025457 | 702 | swim3_err("%s", "Seen sector but cyl=ff?\n"); |
1da177e4 LT |
703 | fs->cur_cyl = -1; |
704 | if (fs->retries > 5) { | |
b3025457 | 705 | swim3_end_request(fs, -EIO, 0); |
1da177e4 LT |
706 | fs->state = idle; |
707 | start_request(fs); | |
708 | } else { | |
709 | fs->state = jogging; | |
710 | act(fs); | |
711 | } | |
712 | break; | |
713 | } | |
714 | fs->cur_cyl = sw->ctrack; | |
715 | fs->cur_sector = sw->csect; | |
716 | if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl) | |
b3025457 BH |
717 | swim3_err("Expected cyl %d, got %d\n", |
718 | fs->expect_cyl, fs->cur_cyl); | |
1da177e4 LT |
719 | fs->state = do_transfer; |
720 | act(fs); | |
721 | } | |
722 | break; | |
723 | case seeking: | |
724 | case jogging: | |
725 | if (sw->nseek == 0) { | |
726 | out_8(&sw->control_bic, DO_SEEK); | |
727 | out_8(&sw->select, RELAX); | |
728 | out_8(&sw->intr_enable, 0); | |
729 | del_timer(&fs->timeout); | |
730 | fs->timeout_pending = 0; | |
731 | if (fs->state == seeking) | |
732 | ++fs->retries; | |
733 | fs->state = settling; | |
734 | act(fs); | |
735 | } | |
736 | break; | |
737 | case settling: | |
738 | out_8(&sw->intr_enable, 0); | |
739 | del_timer(&fs->timeout); | |
740 | fs->timeout_pending = 0; | |
741 | act(fs); | |
742 | break; | |
743 | case do_transfer: | |
744 | if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0) | |
745 | break; | |
746 | out_8(&sw->intr_enable, 0); | |
747 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
748 | out_8(&sw->select, RELAX); | |
749 | del_timer(&fs->timeout); | |
750 | fs->timeout_pending = 0; | |
751 | dr = fs->dma; | |
752 | cp = fs->dma_cmd; | |
b3025457 | 753 | if (rq_data_dir(req) == WRITE) |
1da177e4 LT |
754 | ++cp; |
755 | /* | |
756 | * Check that the main data transfer has finished. | |
757 | * On writing, the swim3 sometimes doesn't use | |
758 | * up all the bytes of the postamble, so we can still | |
759 | * see DMA active here. That doesn't matter as long | |
760 | * as all the sector data has been transferred. | |
761 | */ | |
762 | if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) { | |
763 | /* wait a little while for DMA to complete */ | |
764 | for (n = 0; n < 100; ++n) { | |
765 | if (cp->xfer_status != 0) | |
766 | break; | |
767 | udelay(1); | |
768 | barrier(); | |
769 | } | |
770 | } | |
771 | /* turn off DMA */ | |
772 | out_le32(&dr->control, (RUN | PAUSE) << 16); | |
773 | stat = ld_le16(&cp->xfer_status); | |
774 | resid = ld_le16(&cp->res_count); | |
775 | if (intr & ERROR_INTR) { | |
776 | n = fs->scount - 1 - resid / 512; | |
777 | if (n > 0) { | |
b3025457 | 778 | blk_update_request(req, 0, n << 9); |
1da177e4 LT |
779 | fs->req_sector += n; |
780 | } | |
781 | if (fs->retries < 5) { | |
782 | ++fs->retries; | |
783 | act(fs); | |
784 | } else { | |
b3025457 BH |
785 | swim3_err("Error %sing block %ld (err=%x)\n", |
786 | rq_data_dir(req) == WRITE? "writ": "read", | |
787 | (long)blk_rq_pos(req), err); | |
788 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
789 | fs->state = idle; |
790 | } | |
791 | } else { | |
792 | if ((stat & ACTIVE) == 0 || resid != 0) { | |
793 | /* musta been an error */ | |
b3025457 BH |
794 | swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid); |
795 | swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n", | |
796 | fs->state, rq_data_dir(req), intr, err); | |
797 | swim3_end_request(fs, -EIO, 0); | |
1da177e4 LT |
798 | fs->state = idle; |
799 | start_request(fs); | |
800 | break; | |
801 | } | |
b3025457 BH |
802 | fs->retries = 0; |
803 | if (swim3_end_request(fs, 0, fs->scount << 9)) { | |
1da177e4 LT |
804 | fs->req_sector += fs->scount; |
805 | if (fs->req_sector > fs->secpertrack) { | |
806 | fs->req_sector -= fs->secpertrack; | |
807 | if (++fs->head > 1) { | |
808 | fs->head = 0; | |
809 | ++fs->req_cyl; | |
810 | } | |
811 | } | |
812 | act(fs); | |
467ca759 TH |
813 | } else |
814 | fs->state = idle; | |
1da177e4 LT |
815 | } |
816 | if (fs->state == idle) | |
817 | start_request(fs); | |
818 | break; | |
819 | default: | |
b3025457 | 820 | swim3_err("Don't know what to do in state %d\n", fs->state); |
1da177e4 | 821 | } |
b3025457 | 822 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
823 | return IRQ_HANDLED; |
824 | } | |
825 | ||
826 | /* | |
7d12e780 | 827 | static void fd_dma_interrupt(int irq, void *dev_id) |
1da177e4 LT |
828 | { |
829 | } | |
830 | */ | |
831 | ||
b3025457 | 832 | /* Called under the mutex to grab exclusive access to a drive */ |
1da177e4 LT |
833 | static int grab_drive(struct floppy_state *fs, enum swim_state state, |
834 | int interruptible) | |
835 | { | |
836 | unsigned long flags; | |
837 | ||
b3025457 BH |
838 | swim3_dbg("%s", "-> grab drive\n"); |
839 | ||
840 | spin_lock_irqsave(&swim3_lock, flags); | |
841 | if (fs->state != idle && fs->state != available) { | |
1da177e4 LT |
842 | ++fs->wanted; |
843 | while (fs->state != available) { | |
b3025457 | 844 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
845 | if (interruptible && signal_pending(current)) { |
846 | --fs->wanted; | |
1da177e4 LT |
847 | return -EINTR; |
848 | } | |
849 | interruptible_sleep_on(&fs->wait); | |
b3025457 | 850 | spin_lock_irqsave(&swim3_lock, flags); |
1da177e4 LT |
851 | } |
852 | --fs->wanted; | |
853 | } | |
854 | fs->state = state; | |
b3025457 BH |
855 | spin_unlock_irqrestore(&swim3_lock, flags); |
856 | ||
1da177e4 LT |
857 | return 0; |
858 | } | |
859 | ||
860 | static void release_drive(struct floppy_state *fs) | |
861 | { | |
862 | unsigned long flags; | |
863 | ||
b3025457 BH |
864 | swim3_dbg("%s", "-> release drive\n"); |
865 | ||
866 | spin_lock_irqsave(&swim3_lock, flags); | |
1da177e4 LT |
867 | fs->state = idle; |
868 | start_request(fs); | |
b3025457 | 869 | spin_unlock_irqrestore(&swim3_lock, flags); |
1da177e4 LT |
870 | } |
871 | ||
872 | static int fd_eject(struct floppy_state *fs) | |
873 | { | |
874 | int err, n; | |
875 | ||
876 | err = grab_drive(fs, ejecting, 1); | |
877 | if (err) | |
878 | return err; | |
879 | swim3_action(fs, EJECT); | |
880 | for (n = 20; n > 0; --n) { | |
881 | if (signal_pending(current)) { | |
882 | err = -EINTR; | |
883 | break; | |
884 | } | |
885 | swim3_select(fs, RELAX); | |
86e84862 | 886 | schedule_timeout_interruptible(1); |
1da177e4 LT |
887 | if (swim3_readbit(fs, DISK_IN) == 0) |
888 | break; | |
889 | } | |
890 | swim3_select(fs, RELAX); | |
891 | udelay(150); | |
892 | fs->ejected = 1; | |
893 | release_drive(fs); | |
894 | return err; | |
895 | } | |
896 | ||
897 | static struct floppy_struct floppy_type = | |
898 | { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */ | |
899 | ||
8a6cfeb6 | 900 | static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 LT |
901 | unsigned int cmd, unsigned long param) |
902 | { | |
b4d9a442 | 903 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
904 | int err; |
905 | ||
906 | if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)) | |
907 | return -EPERM; | |
908 | ||
d58b0c39 BH |
909 | if (fs->mdev->media_bay && |
910 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
911 | return -ENXIO; |
912 | ||
913 | switch (cmd) { | |
914 | case FDEJECT: | |
915 | if (fs->ref_count != 1) | |
916 | return -EBUSY; | |
917 | err = fd_eject(fs); | |
918 | return err; | |
919 | case FDGETPRM: | |
920 | if (copy_to_user((void __user *) param, &floppy_type, | |
921 | sizeof(struct floppy_struct))) | |
922 | return -EFAULT; | |
923 | return 0; | |
924 | } | |
925 | return -ENOTTY; | |
926 | } | |
927 | ||
8a6cfeb6 AB |
928 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
929 | unsigned int cmd, unsigned long param) | |
930 | { | |
931 | int ret; | |
932 | ||
2a48fc0a | 933 | mutex_lock(&swim3_mutex); |
8a6cfeb6 | 934 | ret = floppy_locked_ioctl(bdev, mode, cmd, param); |
2a48fc0a | 935 | mutex_unlock(&swim3_mutex); |
8a6cfeb6 AB |
936 | |
937 | return ret; | |
938 | } | |
939 | ||
b4d9a442 | 940 | static int floppy_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 941 | { |
b4d9a442 | 942 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
943 | struct swim3 __iomem *sw = fs->swim3; |
944 | int n, err = 0; | |
945 | ||
946 | if (fs->ref_count == 0) { | |
d58b0c39 BH |
947 | if (fs->mdev->media_bay && |
948 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
949 | return -ENXIO; |
950 | out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2); | |
951 | out_8(&sw->control_bic, 0xff); | |
952 | out_8(&sw->mode, 0x95); | |
953 | udelay(10); | |
954 | out_8(&sw->intr_enable, 0); | |
955 | out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); | |
956 | swim3_action(fs, MOTOR_ON); | |
957 | fs->write_prot = -1; | |
958 | fs->cur_cyl = -1; | |
959 | for (n = 0; n < 2 * HZ; ++n) { | |
960 | if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE)) | |
961 | break; | |
962 | if (signal_pending(current)) { | |
963 | err = -EINTR; | |
964 | break; | |
965 | } | |
966 | swim3_select(fs, RELAX); | |
86e84862 | 967 | schedule_timeout_interruptible(1); |
1da177e4 LT |
968 | } |
969 | if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
970 | || swim3_readbit(fs, DISK_IN) == 0)) | |
971 | err = -ENXIO; | |
972 | swim3_action(fs, SETMFM); | |
973 | swim3_select(fs, RELAX); | |
974 | ||
b4d9a442 | 975 | } else if (fs->ref_count == -1 || mode & FMODE_EXCL) |
1da177e4 LT |
976 | return -EBUSY; |
977 | ||
b4d9a442 AV |
978 | if (err == 0 && (mode & FMODE_NDELAY) == 0 |
979 | && (mode & (FMODE_READ|FMODE_WRITE))) { | |
980 | check_disk_change(bdev); | |
1da177e4 LT |
981 | if (fs->ejected) |
982 | err = -ENXIO; | |
983 | } | |
984 | ||
b4d9a442 | 985 | if (err == 0 && (mode & FMODE_WRITE)) { |
1da177e4 LT |
986 | if (fs->write_prot < 0) |
987 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
988 | if (fs->write_prot) | |
989 | err = -EROFS; | |
990 | } | |
991 | ||
992 | if (err) { | |
993 | if (fs->ref_count == 0) { | |
994 | swim3_action(fs, MOTOR_OFF); | |
995 | out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); | |
996 | swim3_select(fs, RELAX); | |
997 | } | |
998 | return err; | |
999 | } | |
1000 | ||
b4d9a442 | 1001 | if (mode & FMODE_EXCL) |
1da177e4 LT |
1002 | fs->ref_count = -1; |
1003 | else | |
1004 | ++fs->ref_count; | |
1005 | ||
1006 | return 0; | |
1007 | } | |
1008 | ||
6e9624b8 AB |
1009 | static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode) |
1010 | { | |
1011 | int ret; | |
1012 | ||
2a48fc0a | 1013 | mutex_lock(&swim3_mutex); |
6e9624b8 | 1014 | ret = floppy_open(bdev, mode); |
2a48fc0a | 1015 | mutex_unlock(&swim3_mutex); |
6e9624b8 AB |
1016 | |
1017 | return ret; | |
1018 | } | |
1019 | ||
b4d9a442 | 1020 | static int floppy_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 1021 | { |
b4d9a442 | 1022 | struct floppy_state *fs = disk->private_data; |
1da177e4 | 1023 | struct swim3 __iomem *sw = fs->swim3; |
b3025457 | 1024 | |
2a48fc0a | 1025 | mutex_lock(&swim3_mutex); |
1da177e4 LT |
1026 | if (fs->ref_count > 0 && --fs->ref_count == 0) { |
1027 | swim3_action(fs, MOTOR_OFF); | |
1028 | out_8(&sw->control_bic, 0xff); | |
1029 | swim3_select(fs, RELAX); | |
1030 | } | |
2a48fc0a | 1031 | mutex_unlock(&swim3_mutex); |
1da177e4 LT |
1032 | return 0; |
1033 | } | |
1034 | ||
4bbde777 TH |
1035 | static unsigned int floppy_check_events(struct gendisk *disk, |
1036 | unsigned int clearing) | |
1da177e4 LT |
1037 | { |
1038 | struct floppy_state *fs = disk->private_data; | |
4bbde777 | 1039 | return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0; |
1da177e4 LT |
1040 | } |
1041 | ||
1042 | static int floppy_revalidate(struct gendisk *disk) | |
1043 | { | |
1044 | struct floppy_state *fs = disk->private_data; | |
1045 | struct swim3 __iomem *sw; | |
1046 | int ret, n; | |
1047 | ||
d58b0c39 BH |
1048 | if (fs->mdev->media_bay && |
1049 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
1050 | return -ENXIO; |
1051 | ||
1052 | sw = fs->swim3; | |
1053 | grab_drive(fs, revalidating, 0); | |
1054 | out_8(&sw->intr_enable, 0); | |
1055 | out_8(&sw->control_bis, DRIVE_ENABLE); | |
1056 | swim3_action(fs, MOTOR_ON); /* necessary? */ | |
1057 | fs->write_prot = -1; | |
1058 | fs->cur_cyl = -1; | |
1059 | mdelay(1); | |
1060 | for (n = HZ; n > 0; --n) { | |
1061 | if (swim3_readbit(fs, SEEK_COMPLETE)) | |
1062 | break; | |
1063 | if (signal_pending(current)) | |
1064 | break; | |
1065 | swim3_select(fs, RELAX); | |
86e84862 | 1066 | schedule_timeout_interruptible(1); |
1da177e4 LT |
1067 | } |
1068 | ret = swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
1069 | || swim3_readbit(fs, DISK_IN) == 0; | |
1070 | if (ret) | |
1071 | swim3_action(fs, MOTOR_OFF); | |
1072 | else { | |
1073 | fs->ejected = 0; | |
1074 | swim3_action(fs, SETMFM); | |
1075 | } | |
1076 | swim3_select(fs, RELAX); | |
1077 | ||
1078 | release_drive(fs); | |
1079 | return ret; | |
1080 | } | |
1081 | ||
83d5cde4 | 1082 | static const struct block_device_operations floppy_fops = { |
6e9624b8 | 1083 | .open = floppy_unlocked_open, |
b4d9a442 | 1084 | .release = floppy_release, |
8a6cfeb6 | 1085 | .ioctl = floppy_ioctl, |
4bbde777 | 1086 | .check_events = floppy_check_events, |
1da177e4 LT |
1087 | .revalidate_disk= floppy_revalidate, |
1088 | }; | |
1089 | ||
b3025457 BH |
1090 | static void swim3_mb_event(struct macio_dev* mdev, int mb_state) |
1091 | { | |
1092 | struct floppy_state *fs = macio_get_drvdata(mdev); | |
1093 | struct swim3 __iomem *sw = fs->swim3; | |
1094 | ||
1095 | if (!fs) | |
1096 | return; | |
1097 | if (mb_state != MB_FD) | |
1098 | return; | |
1099 | ||
1100 | /* Clear state */ | |
1101 | out_8(&sw->intr_enable, 0); | |
1102 | in_8(&sw->intr); | |
1103 | in_8(&sw->error); | |
1104 | } | |
1105 | ||
3e9a6927 | 1106 | static int swim3_add_device(struct macio_dev *mdev, int index) |
1da177e4 | 1107 | { |
61c7a080 | 1108 | struct device_node *swim = mdev->ofdev.dev.of_node; |
3e9a6927 BH |
1109 | struct floppy_state *fs = &floppy_states[index]; |
1110 | int rc = -EBUSY; | |
1da177e4 | 1111 | |
b3025457 BH |
1112 | /* Do this first for message macros */ |
1113 | memset(fs, 0, sizeof(*fs)); | |
1114 | fs->mdev = mdev; | |
1115 | fs->index = index; | |
1116 | ||
3e9a6927 BH |
1117 | /* Check & Request resources */ |
1118 | if (macio_resource_count(mdev) < 2) { | |
b3025457 | 1119 | swim3_err("%s", "No address in device-tree\n"); |
3e9a6927 | 1120 | return -ENXIO; |
1da177e4 | 1121 | } |
b3025457 BH |
1122 | if (macio_irq_count(mdev) < 1) { |
1123 | swim3_err("%s", "No interrupt in device-tree\n"); | |
1124 | return -ENXIO; | |
cc5d0189 | 1125 | } |
3e9a6927 | 1126 | if (macio_request_resource(mdev, 0, "swim3 (mmio)")) { |
b3025457 | 1127 | swim3_err("%s", "Can't request mmio resource\n"); |
3e9a6927 | 1128 | return -EBUSY; |
1da177e4 | 1129 | } |
3e9a6927 | 1130 | if (macio_request_resource(mdev, 1, "swim3 (dma)")) { |
b3025457 | 1131 | swim3_err("%s", "Can't request dma resource\n"); |
3e9a6927 BH |
1132 | macio_release_resource(mdev, 0); |
1133 | return -EBUSY; | |
1da177e4 | 1134 | } |
3e9a6927 | 1135 | dev_set_drvdata(&mdev->ofdev.dev, fs); |
1da177e4 | 1136 | |
d58b0c39 | 1137 | if (mdev->media_bay == NULL) |
1da177e4 LT |
1138 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1); |
1139 | ||
1da177e4 | 1140 | fs->state = idle; |
3e9a6927 BH |
1141 | fs->swim3 = (struct swim3 __iomem *) |
1142 | ioremap(macio_resource_start(mdev, 0), 0x200); | |
1143 | if (fs->swim3 == NULL) { | |
b3025457 | 1144 | swim3_err("%s", "Couldn't map mmio registers\n"); |
3e9a6927 BH |
1145 | rc = -ENOMEM; |
1146 | goto out_release; | |
1147 | } | |
1148 | fs->dma = (struct dbdma_regs __iomem *) | |
1149 | ioremap(macio_resource_start(mdev, 1), 0x200); | |
1150 | if (fs->dma == NULL) { | |
b3025457 | 1151 | swim3_err("%s", "Couldn't map dma registers\n"); |
3e9a6927 BH |
1152 | iounmap(fs->swim3); |
1153 | rc = -ENOMEM; | |
1154 | goto out_release; | |
1155 | } | |
1156 | fs->swim3_intr = macio_irq(mdev, 0); | |
a419aef8 | 1157 | fs->dma_intr = macio_irq(mdev, 1); |
1da177e4 LT |
1158 | fs->cur_cyl = -1; |
1159 | fs->cur_sector = -1; | |
1160 | fs->secpercyl = 36; | |
1161 | fs->secpertrack = 18; | |
1162 | fs->total_secs = 2880; | |
1da177e4 LT |
1163 | init_waitqueue_head(&fs->wait); |
1164 | ||
1165 | fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); | |
1166 | memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); | |
1167 | st_le16(&fs->dma_cmd[1].command, DBDMA_STOP); | |
1168 | ||
b3025457 BH |
1169 | if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD) |
1170 | swim3_mb_event(mdev, MB_FD); | |
1171 | ||
1da177e4 | 1172 | if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) { |
b3025457 | 1173 | swim3_err("%s", "Couldn't request interrupt\n"); |
1da177e4 | 1174 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0); |
3e9a6927 | 1175 | goto out_unmap; |
1da177e4 LT |
1176 | return -EBUSY; |
1177 | } | |
1da177e4 LT |
1178 | |
1179 | init_timer(&fs->timeout); | |
1180 | ||
b3025457 | 1181 | swim3_info("SWIM3 floppy controller %s\n", |
d58b0c39 | 1182 | mdev->media_bay ? "in media bay" : ""); |
1da177e4 | 1183 | |
3e9a6927 BH |
1184 | return 0; |
1185 | ||
1186 | out_unmap: | |
1187 | iounmap(fs->dma); | |
1188 | iounmap(fs->swim3); | |
1189 | ||
1190 | out_release: | |
1191 | macio_release_resource(mdev, 0); | |
1192 | macio_release_resource(mdev, 1); | |
1193 | ||
1194 | return rc; | |
1195 | } | |
1196 | ||
1197 | static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match) | |
1198 | { | |
3e9a6927 | 1199 | struct gendisk *disk; |
b3025457 BH |
1200 | int index, rc; |
1201 | ||
1202 | index = floppy_count++; | |
1203 | if (index >= MAX_FLOPPIES) | |
1204 | return -ENXIO; | |
3e9a6927 BH |
1205 | |
1206 | /* Add the drive */ | |
b3025457 | 1207 | rc = swim3_add_device(mdev, index); |
3e9a6927 BH |
1208 | if (rc) |
1209 | return rc; | |
b3025457 BH |
1210 | /* Now register that disk. Same comment about failure handling */ |
1211 | disk = disks[index] = alloc_disk(1); | |
1212 | if (disk == NULL) | |
1213 | return -ENOMEM; | |
1214 | disk->queue = blk_init_queue(do_fd_request, &swim3_lock); | |
1215 | if (disk->queue == NULL) { | |
1216 | put_disk(disk); | |
1217 | return -ENOMEM; | |
1218 | } | |
1219 | disk->queue->queuedata = &floppy_states[index]; | |
3e9a6927 | 1220 | |
b3025457 | 1221 | if (index == 0) { |
3e9a6927 BH |
1222 | /* If we failed, there isn't much we can do as the driver is still |
1223 | * too dumb to remove the device, just bail out | |
1224 | */ | |
1225 | if (register_blkdev(FLOPPY_MAJOR, "fd")) | |
1226 | return 0; | |
3e9a6927 BH |
1227 | } |
1228 | ||
3e9a6927 | 1229 | disk->major = FLOPPY_MAJOR; |
b3025457 | 1230 | disk->first_minor = index; |
3e9a6927 | 1231 | disk->fops = &floppy_fops; |
b3025457 | 1232 | disk->private_data = &floppy_states[index]; |
3e9a6927 | 1233 | disk->flags |= GENHD_FL_REMOVABLE; |
b3025457 | 1234 | sprintf(disk->disk_name, "fd%d", index); |
3e9a6927 BH |
1235 | set_capacity(disk, 2880); |
1236 | add_disk(disk); | |
1237 | ||
1238 | return 0; | |
1239 | } | |
1240 | ||
1241 | static struct of_device_id swim3_match[] = | |
1242 | { | |
1243 | { | |
1244 | .name = "swim3", | |
1245 | }, | |
1246 | { | |
1247 | .compatible = "ohare-swim3" | |
1248 | }, | |
1249 | { | |
1250 | .compatible = "swim3" | |
1251 | }, | |
f41c53a5 | 1252 | { /* end of list */ } |
3e9a6927 BH |
1253 | }; |
1254 | ||
1255 | static struct macio_driver swim3_driver = | |
1256 | { | |
c2cdf6ab BH |
1257 | .driver = { |
1258 | .name = "swim3", | |
1259 | .of_match_table = swim3_match, | |
1260 | }, | |
3e9a6927 | 1261 | .probe = swim3_attach, |
b3025457 BH |
1262 | #ifdef CONFIG_PMAC_MEDIABAY |
1263 | .mediabay_event = swim3_mb_event, | |
1264 | #endif | |
3e9a6927 BH |
1265 | #if 0 |
1266 | .suspend = swim3_suspend, | |
1267 | .resume = swim3_resume, | |
1268 | #endif | |
1269 | }; | |
1270 | ||
1271 | ||
1272 | int swim3_init(void) | |
1273 | { | |
1274 | macio_register_driver(&swim3_driver); | |
1da177e4 LT |
1275 | return 0; |
1276 | } | |
1277 | ||
1278 | module_init(swim3_init) | |
1279 | ||
1280 | MODULE_LICENSE("GPL"); | |
1281 | MODULE_AUTHOR("Paul Mackerras"); | |
1282 | MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR); |