ahci: sis controllers actually can do PMP
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ata / pata_sc1200.c
CommitLineData
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1/*
2 * New ATA layer SC1200 driver Alan Cox <alan@redhat.com>
3 *
4 * TODO: Mode selection filtering
5 * TODO: Can't enable second channel until ATA core has serialize
6 * TODO: Needs custom DMA cleanup code
7 *
8 * Based very heavily on
9 *
10 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
11 *
12 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
13 * May be copied or modified under the terms of the GNU General Public License
14 *
15 * Development of this chipset driver was funded
16 * by the nice folks at National Semiconductor.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
85cd7251 30 *
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31 */
32
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/init.h>
37#include <linux/blkdev.h>
38#include <linux/delay.h>
39#include <scsi/scsi_host.h>
40#include <linux/libata.h>
41
42#define DRV_NAME "sc1200"
2a3103ce 43#define DRV_VERSION "0.2.6"
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44
45#define SC1200_REV_A 0x00
46#define SC1200_REV_B1 0x01
47#define SC1200_REV_B3 0x02
48#define SC1200_REV_C1 0x03
49#define SC1200_REV_D1 0x04
50
51/**
52 * sc1200_clock - PCI clock
53 *
54 * Return the PCI bus clocking for the SC1200 chipset configuration
55 * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
56 */
85cd7251 57
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58static int sc1200_clock(void)
59{
60 /* Magic registers that give us the chipset data */
61 u8 chip_id = inb(0x903C);
62 u8 silicon_rev = inb(0x903D);
63 u16 pci_clock;
85cd7251 64
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65 if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
66 return 0; /* 33 MHz mode */
67
68 /* Clock generator configuration 0x901E its 8/9 are the PCI clocking
69 0/3 is 33Mhz 1 is 48 2 is 66 */
70
71 pci_clock = inw(0x901E);
72 pci_clock >>= 8;
73 pci_clock &= 0x03;
74 if (pci_clock == 3)
75 pci_clock = 0;
76 return pci_clock;
77}
78
79/**
80 * sc1200_set_piomode - PIO setup
81 * @ap: ATA interface
82 * @adev: device on the interface
83 *
84 * Set our PIO requirements. This is fairly simple on the SC1200
85 */
85cd7251 86
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87static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
88{
89 static const u32 pio_timings[4][5] = {
90 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
91 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
92 {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
93 {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz
94 };
95
96 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
97 u32 format;
98 unsigned int reg = 0x40 + 0x10 * ap->port_no;
99 int mode = adev->pio_mode - XFER_PIO_0;
85cd7251 100
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101 pci_read_config_dword(pdev, reg + 4, &format);
102 format >>= 31;
103 format += sc1200_clock();
85cd7251 104 pci_write_config_dword(pdev, reg + 8 * adev->devno,
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105 pio_timings[format][mode]);
106}
107
108/**
109 * sc1200_set_dmamode - DMA timing setup
110 * @ap: ATA interface
111 * @adev: Device being configured
112 *
113 * We cannot mix MWDMA and UDMA without reloading timings each switch
114 * master to slave.
115 */
85cd7251 116
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117static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
118{
119 static const u32 udma_timing[3][3] = {
120 { 0x00921250, 0x00911140, 0x00911030 },
121 { 0x00932470, 0x00922260, 0x00922140 },
122 { 0x009436A1, 0x00933481, 0x00923261 }
123 };
85cd7251 124
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125 static const u32 mwdma_timing[3][3] = {
126 { 0x00077771, 0x00012121, 0x00002020 },
127 { 0x000BBBB2, 0x00024241, 0x00013131 },
128 { 0x000FFFF3, 0x00035352, 0x00015151 }
129 };
85cd7251 130
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131 int clock = sc1200_clock();
132 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
133 unsigned int reg = 0x40 + 0x10 * ap->port_no;
134 int mode = adev->dma_mode;
135 u32 format;
136
137 if (mode >= XFER_UDMA_0)
138 format = udma_timing[clock][mode - XFER_UDMA_0];
139 else
140 format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
85cd7251 141
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142 if (adev->devno == 0) {
143 u32 timings;
85cd7251 144
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145 pci_read_config_dword(pdev, reg + 4, &timings);
146 timings &= 0x80000000UL;
147 timings |= format;
148 pci_write_config_dword(pdev, reg + 4, timings);
149 } else
150 pci_write_config_dword(pdev, reg + 12, format);
151}
152
153/**
9363c382 154 * sc1200_qc_issue - command issue
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155 * @qc: command pending
156 *
157 * Called when the libata layer is about to issue a command. We wrap
158 * this interface so that we can load the correct ATA timings if
3a4fa0a2 159 * necessary. Specifically we have a problem that there is only
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160 * one MWDMA/UDMA bit.
161 */
162
9363c382 163static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
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164{
165 struct ata_port *ap = qc->ap;
166 struct ata_device *adev = qc->dev;
167 struct ata_device *prev = ap->private_data;
168
169 /* See if the DMA settings could be wrong */
170 if (adev->dma_mode != 0 && adev != prev && prev != NULL) {
171 /* Maybe, but do the channels match MWDMA/UDMA ? */
172 if ((adev->dma_mode >= XFER_UDMA_0 && prev->dma_mode < XFER_UDMA_0) ||
173 (adev->dma_mode < XFER_UDMA_0 && prev->dma_mode >= XFER_UDMA_0))
174 /* Switch the mode bits */
175 sc1200_set_dmamode(ap, adev);
176 }
177
9363c382 178 return ata_sff_qc_issue(qc);
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179}
180
181static struct scsi_host_template sc1200_sht = {
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182 ATA_BMDMA_SHT(DRV_NAME),
183 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
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184};
185
186static struct ata_port_operations sc1200_port_ops = {
029cfd6b 187 .inherits = &ata_bmdma_port_ops,
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188 .qc_prep = ata_sff_dumb_qc_prep,
189 .qc_issue = sc1200_qc_issue,
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190 .cable_detect = ata_cable_40wire,
191 .set_piomode = sc1200_set_piomode,
192 .set_dmamode = sc1200_set_dmamode,
85cd7251 193};
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194
195/**
196 * sc1200_init_one - Initialise an SC1200
197 * @dev: PCI device
198 * @id: Entry in match table
199 *
200 * Just throw the needed data at the libata helper and it does all
201 * our work.
202 */
85cd7251 203
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204static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
205{
1626aeb8 206 static const struct ata_port_info info = {
1d2808fd 207 .flags = ATA_FLAG_SLAVE_POSS,
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208 .pio_mask = 0x1f,
209 .mwdma_mask = 0x07,
210 .udma_mask = 0x07,
211 .port_ops = &sc1200_port_ops
212 };
669a5db4 213 /* Can't enable port 2 yet, see top comments */
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214 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
215
9363c382 216 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL);
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217}
218
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219static const struct pci_device_id sc1200[] = {
220 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
221
222 { },
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223};
224
225static struct pci_driver sc1200_pci_driver = {
2d2744fc 226 .name = DRV_NAME,
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227 .id_table = sc1200,
228 .probe = sc1200_init_one,
30ced0f0 229 .remove = ata_pci_remove_one,
438ac6d5 230#ifdef CONFIG_PM
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231 .suspend = ata_pci_device_suspend,
232 .resume = ata_pci_device_resume,
438ac6d5 233#endif
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234};
235
236static int __init sc1200_init(void)
237{
238 return pci_register_driver(&sc1200_pci_driver);
239}
240
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241static void __exit sc1200_exit(void)
242{
243 pci_unregister_driver(&sc1200_pci_driver);
244}
245
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246MODULE_AUTHOR("Alan Cox, Mark Lord");
247MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
248MODULE_LICENSE("GPL");
249MODULE_DEVICE_TABLE(pci, sc1200);
250MODULE_VERSION(DRV_VERSION);
251
252module_init(sc1200_init);
253module_exit(sc1200_exit);