[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ata / pata_opti.c

/*
 * pata_opti.c 	- ATI PATA for new ATA layer
 *			  (C) 2005 Red Hat Inc
 *			  Alan Cox <alan@redhat.com>
 *
 * Based on
 *  linux/drivers/ide/pci/opti621.c		Version 0.7	Sept 10, 2002
 *
 *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
 *
 * Authors:
 * Jaromir Koutek <miri@punknet.cz>,
 * Jan Harkes <jaharkes@cwi.nl>,
 * Mark Lord <mlord@pobox.com>
 * Some parts of code are from ali14xx.c and from rz1000.c.
 *
 * Also consulted the FreeBSD prototype driver by Kevin Day to try
 * and resolve some confusions. Further documentation can be found in
 * Ralf Brown's interrupt list
 *
 * If you have other variants of the Opti range (Viper/Vendetta) please
 * try this driver with those PCI idents and report back. For the later
 * chips see the pata_optidma driver
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME "pata_opti"
#define DRV_VERSION "0.2.9"

enum {
	READ_REG	= 0,	/* index of Read cycle timing register */
	WRITE_REG 	= 1,	/* index of Write cycle timing register */
	CNTRL_REG 	= 3,	/* index of Control register */
	STRAP_REG 	= 5,	/* index of Strap register */
	MISC_REG 	= 6	/* index of Miscellaneous register */
};

/**
 *	opti_pre_reset		-	probe begin
 *	@ap: ATA port
 *
 *	Set up cable type and use generic probe init
 */

static int opti_pre_reset(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	static const struct pci_bits opti_enable_bits[] = {
		{ 0x45, 1, 0x80, 0x00 },
		{ 0x40, 1, 0x08, 0x00 }
	};

	if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
		return -ENOENT;
	return ata_std_prereset(ap);
}

/**
 *	opti_probe_reset		-	probe reset
 *	@ap: ATA port
 *
 *	Perform the ATA probe and bus reset sequence plus specific handling
 *	for this hardware. The Opti needs little handling - we have no UDMA66
 *	capability that needs cable detection. All we must do is check the port
 *	is enabled.
 */

static void opti_error_handler(struct ata_port *ap)
{
	ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
}

/**
 *	opti_write_reg		-	control register setup
 *	@ap: ATA port
 *	@value: value
 *	@reg: control register number
 *
 *	The Opti uses magic 'trapdoor' register accesses to do configuration
 *	rather than using PCI space as other controllers do. The double inw
 *	on the error register activates configuration mode. We can then write
 *	the control register
 */

static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
{
	void __iomem *regio = ap->ioaddr.cmd_addr;

	/* These 3 unlock the control register access */
	ioread16(regio + 1);
	ioread16(regio + 1);
	iowrite8(3, regio + 2);

	/* Do the I/O */
	iowrite8(val, regio + reg);

	/* Relock */
	iowrite8(0x83, regio + 2);
}

/**
 *	opti_set_piomode	-	set initial PIO mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	Called to do the PIO mode setup. Timing numbers are taken from
 *	the FreeBSD driver then pre computed to keep the code clean. There
 *	are two tables depending on the hardware clock speed.
 */

static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_device *pair = ata_dev_pair(adev);
	int clock;
	int pio = adev->pio_mode - XFER_PIO_0;
	void __iomem *regio = ap->ioaddr.cmd_addr;
	u8 addr;

	/* Address table precomputed with prefetch off and a DCLK of 2 */
	static const u8 addr_timing[2][5] = {
		{ 0x30, 0x20, 0x20, 0x10, 0x10 },
		{ 0x20, 0x20, 0x10, 0x10, 0x10 }
	};
	static const u8 data_rec_timing[2][5] = {
		{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
		{ 0x58, 0x44, 0x32, 0x22, 0x21 }
	};

	iowrite8(0xff, regio + 5);
	clock = ioread16(regio + 5) & 1;

	/*
 	 *	As with many controllers the address setup time is shared
 	 *	and must suit both devices if present.
	 */

	addr = addr_timing[clock][pio];
	if (pair) {
		/* Hardware constraint */
		u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
		if (pair_addr > addr)
			addr = pair_addr;
	}

	/* Commence primary programming sequence */
	opti_write_reg(ap, adev->devno, MISC_REG);
	opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
	opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
	opti_write_reg(ap, addr, MISC_REG);

	/* Programming sequence complete, override strapping */
	opti_write_reg(ap, 0x85, CNTRL_REG);
}

static struct scsi_host_template opti_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
#ifdef CONFIG_PM
	.resume			= ata_scsi_device_resume,
	.suspend		= ata_scsi_device_suspend,
#endif
};

static struct ata_port_operations opti_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= opti_set_piomode,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= opti_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	.cable_detect	= ata_cable_40wire,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,
	.irq_on		= ata_irq_on,
	.irq_ack	= ata_irq_ack,

	.port_start	= ata_port_start,
};

static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	static struct ata_port_info info = {
		.sht = &opti_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.port_ops = &opti_port_ops
	};
	static struct ata_port_info *port_info[2] = { &info, &info };
	static int printed_version;

	if (!printed_version++)
		dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");

	return ata_pci_init_one(dev, port_info, 2);
}

static const struct pci_device_id opti[] = {
	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },

	{ },
};

static struct pci_driver opti_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= opti,
	.probe 		= opti_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= ata_pci_device_resume,
#endif
};

static int __init opti_init(void)
{
	return pci_register_driver(&opti_pci_driver);
}

static void __exit opti_exit(void)
{
	pci_unregister_driver(&opti_pci_driver);
}


MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, opti);
MODULE_VERSION(DRV_VERSION);

module_init(opti_init);
module_exit(opti_exit);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_opti.c - ATI PATA for new ATA layer
	3	* (C) 2005 Red Hat Inc
	4	* Alan Cox <alan@redhat.com>
	5	*
	6	* Based on
	7	* linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
	8	*
	9	* Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
	10	*
	11	* Authors:
	12	* Jaromir Koutek <miri@punknet.cz>,
	13	* Jan Harkes <jaharkes@cwi.nl>,
	14	* Mark Lord <mlord@pobox.com>
	15	* Some parts of code are from ali14xx.c and from rz1000.c.
	16	*
	17	* Also consulted the FreeBSD prototype driver by Kevin Day to try
	18	* and resolve some confusions. Further documentation can be found in
	19	* Ralf Brown's interrupt list
	20	*
	21	* If you have other variants of the Opti range (Viper/Vendetta) please
	22	* try this driver with those PCI idents and report back. For the later
	23	* chips see the pata_optidma driver
	24	*
	25	*/
	26
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/pci.h>
	30	#include <linux/init.h>
	31	#include <linux/blkdev.h>
	32	#include <linux/delay.h>
	33	#include <scsi/scsi_host.h>
	34	#include <linux/libata.h>
	35
	36	#define DRV_NAME "pata_opti"
a0fcdc02	37	#define DRV_VERSION "0.2.9"
669a5db4 JG	38
	39	enum {
	40	READ_REG = 0, /* index of Read cycle timing register */
	41	WRITE_REG = 1, /* index of Write cycle timing register */
	42	CNTRL_REG = 3, /* index of Control register */
	43	STRAP_REG = 5, /* index of Strap register */
	44	MISC_REG = 6 /* index of Miscellaneous register */
	45	};
	46
	47	/**
	48	* opti_pre_reset - probe begin
	49	* @ap: ATA port
	50	*
	51	* Set up cable type and use generic probe init
	52	*/
	53
	54	static int opti_pre_reset(struct ata_port *ap)
	55	{
	56	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	57	static const struct pci_bits opti_enable_bits[] = {
	58	{ 0x45, 1, 0x80, 0x00 },
	59	{ 0x40, 1, 0x08, 0x00 }
	60	};
	61
c961922b AC	62	if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
c961922b AC	63	return -ENOENT;
669a5db4 JG	64	return ata_std_prereset(ap);
	65	}
	66
	67	/**
	68	* opti_probe_reset - probe reset
	69	* @ap: ATA port
	70	*
	71	* Perform the ATA probe and bus reset sequence plus specific handling
	72	* for this hardware. The Opti needs little handling - we have no UDMA66
	73	* capability that needs cable detection. All we must do is check the port
	74	* is enabled.
	75	*/
	76
	77	static void opti_error_handler(struct ata_port *ap)
	78	{
	79	ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
	80	}
	81
	82	/**
	83	* opti_write_reg - control register setup
	84	* @ap: ATA port
	85	* @value: value
	86	* @reg: control register number
	87	*
	88	* The Opti uses magic 'trapdoor' register accesses to do configuration
	89	* rather than using PCI space as other controllers do. The double inw
	90	* on the error register activates configuration mode. We can then write
	91	* the control register
	92	*/
	93
	94	static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
	95	{
0d5ff566	96	void __iomem *regio = ap->ioaddr.cmd_addr;
669a5db4 JG	97
669a5db4 JG	98	/* These 3 unlock the control register access */
0d5ff566 TH	99	ioread16(regio + 1);
	100	ioread16(regio + 1);
	101	iowrite8(3, regio + 2);
669a5db4 JG	102
669a5db4 JG	103	/* Do the I/O */
0d5ff566	104	iowrite8(val, regio + reg);
669a5db4 JG	105
669a5db4 JG	106	/* Relock */
0d5ff566	107	iowrite8(0x83, regio + 2);
669a5db4 JG	108	}
669a5db4 JG	109
669a5db4 JG	110	/**
	111	* opti_set_piomode - set initial PIO mode data
	112	* @ap: ATA interface
	113	* @adev: ATA device
	114	*
	115	* Called to do the PIO mode setup. Timing numbers are taken from
	116	* the FreeBSD driver then pre computed to keep the code clean. There
	117	* are two tables depending on the hardware clock speed.
	118	*/
	119
	120	static void opti_set_piomode(struct ata_port ap, struct ata_device adev)
	121	{
	122	struct ata_device *pair = ata_dev_pair(adev);
	123	int clock;
	124	int pio = adev->pio_mode - XFER_PIO_0;
0d5ff566	125	void __iomem *regio = ap->ioaddr.cmd_addr;
669a5db4 JG	126	u8 addr;
	127
	128	/* Address table precomputed with prefetch off and a DCLK of 2 */
	129	static const u8 addr_timing[2][5] = {
	130	{ 0x30, 0x20, 0x20, 0x10, 0x10 },
	131	{ 0x20, 0x20, 0x10, 0x10, 0x10 }
	132	};
	133	static const u8 data_rec_timing[2][5] = {
	134	{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
	135	{ 0x58, 0x44, 0x32, 0x22, 0x21 }
	136	};
	137
0d5ff566 TH	138	iowrite8(0xff, regio + 5);
0d5ff566 TH	139	clock = ioread16(regio + 5) & 1;
669a5db4 JG	140
	141	/*
	142	* As with many controllers the address setup time is shared
	143	* and must suit both devices if present.
	144	*/
	145
	146	addr = addr_timing[clock][pio];
	147	if (pair) {
	148	/* Hardware constraint */
	149	u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
	150	if (pair_addr > addr)
	151	addr = pair_addr;
	152	}
	153
	154	/* Commence primary programming sequence */
	155	opti_write_reg(ap, adev->devno, MISC_REG);
	156	opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
	157	opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
	158	opti_write_reg(ap, addr, MISC_REG);
	159
	160	/* Programming sequence complete, override strapping */
	161	opti_write_reg(ap, 0x85, CNTRL_REG);
	162	}
	163
	164	static struct scsi_host_template opti_sht = {
	165	.module = THIS_MODULE,
	166	.name = DRV_NAME,
	167	.ioctl = ata_scsi_ioctl,
	168	.queuecommand = ata_scsi_queuecmd,
	169	.can_queue = ATA_DEF_QUEUE,
	170	.this_id = ATA_SHT_THIS_ID,
	171	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	172	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	173	.emulated = ATA_SHT_EMULATED,
	174	.use_clustering = ATA_SHT_USE_CLUSTERING,
	175	.proc_name = DRV_NAME,
	176	.dma_boundary = ATA_DMA_BOUNDARY,
	177	.slave_configure = ata_scsi_slave_config,
afdfe899	178	.slave_destroy = ata_scsi_slave_destroy,
669a5db4	179	.bios_param = ata_std_bios_param,
438ac6d5	180	#ifdef CONFIG_PM
30ced0f0 AC	181	.resume = ata_scsi_device_resume,
30ced0f0 AC	182	.suspend = ata_scsi_device_suspend,
438ac6d5	183	#endif
669a5db4 JG	184	};
	185
	186	static struct ata_port_operations opti_port_ops = {
	187	.port_disable = ata_port_disable,
	188	.set_piomode = opti_set_piomode,
669a5db4 JG	189	.tf_load = ata_tf_load,
	190	.tf_read = ata_tf_read,
	191	.check_status = ata_check_status,
	192	.exec_command = ata_exec_command,
	193	.dev_select = ata_std_dev_select,
	194
	195	.freeze = ata_bmdma_freeze,
	196	.thaw = ata_bmdma_thaw,
	197	.error_handler = opti_error_handler,
	198	.post_internal_cmd = ata_bmdma_post_internal_cmd,
a0fcdc02	199	.cable_detect = ata_cable_40wire,
669a5db4 JG	200
	201	.bmdma_setup = ata_bmdma_setup,
	202	.bmdma_start = ata_bmdma_start,
	203	.bmdma_stop = ata_bmdma_stop,
	204	.bmdma_status = ata_bmdma_status,
	205
	206	.qc_prep = ata_qc_prep,
	207	.qc_issue = ata_qc_issue_prot,
bda30288	208
0d5ff566	209	.data_xfer = ata_data_xfer,
669a5db4 JG	210
	211	.irq_handler = ata_interrupt,
	212	.irq_clear = ata_bmdma_irq_clear,
246ce3b6 AI	213	.irq_on = ata_irq_on,
246ce3b6 AI	214	.irq_ack = ata_irq_ack,
669a5db4 JG	215
669a5db4 JG	216	.port_start = ata_port_start,
669a5db4 JG	217	};
	218
	219	static int opti_init_one(struct pci_dev dev, const struct pci_device_id id)
	220	{
	221	static struct ata_port_info info = {
	222	.sht = &opti_sht,
	223	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	224	.pio_mask = 0x1f,
	225	.port_ops = &opti_port_ops
	226	};
	227	static struct ata_port_info *port_info[2] = { &info, &info };
	228	static int printed_version;
	229
	230	if (!printed_version++)
	231	dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
	232
	233	return ata_pci_init_one(dev, port_info, 2);
	234	}
	235
	236	static const struct pci_device_id opti[] = {
2d2744fc JG	237	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
	238	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
	239
	240	{ },
669a5db4 JG	241	};
	242
	243	static struct pci_driver opti_pci_driver = {
2d2744fc	244	.name = DRV_NAME,
669a5db4 JG	245	.id_table = opti,
669a5db4 JG	246	.probe = opti_init_one,
30ced0f0	247	.remove = ata_pci_remove_one,
438ac6d5	248	#ifdef CONFIG_PM
30ced0f0 AC	249	.suspend = ata_pci_device_suspend,
30ced0f0 AC	250	.resume = ata_pci_device_resume,
438ac6d5	251	#endif
669a5db4 JG	252	};
	253
	254	static int __init opti_init(void)
	255	{
	256	return pci_register_driver(&opti_pci_driver);
	257	}
	258
669a5db4 JG	259	static void __exit opti_exit(void)
	260	{
	261	pci_unregister_driver(&opti_pci_driver);
	262	}
	263
	264
	265	MODULE_AUTHOR("Alan Cox");
	266	MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
	267	MODULE_LICENSE("GPL");
	268	MODULE_DEVICE_TABLE(pci, opti);
	269	MODULE_VERSION(DRV_VERSION);
	270
	271	module_init(opti_init);
	272	module_exit(opti_exit);