[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / xtensa / kernel / vmlinux.lds.S

/*
 * arch/xtensa/kernel/vmlinux.lds.S
 *
 * Xtensa linker script
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/thread_info.h>

#include <variant/core.h>
#include <platform/hardware.h>
OUTPUT_ARCH(xtensa)
ENTRY(_start)

#ifdef __XTENSA_EB__
jiffies = jiffies_64 + 4;
#else
jiffies = jiffies_64;
#endif

#ifndef KERNELOFFSET
#define KERNELOFFSET 0xd0001000
#endif

/* Note: In the following macros, it would be nice to specify only the
   vector name and section kind and construct "sym" and "section" using
   CPP concatenation, but that does not work reliably.  Concatenating a
   string with "." produces an invalid token.  CPP will not print a
   warning because it thinks this is an assembly file, but it leaves
   them as multiple tokens and there may or may not be whitespace
   between them.  */

/* Macro for a relocation entry */

#define RELOCATE_ENTRY(sym, section)		\
	LONG(sym ## _start);			\
	LONG(sym ## _end);			\
	LONG(LOADADDR(section))

/* Macro to define a section for a vector.
 *
 * Use of the MIN function catches the types of errors illustrated in
 * the following example:
 *
 * Assume the section .DoubleExceptionVector.literal is completely
 * full.  Then a programmer adds code to .DoubleExceptionVector.text
 * that produces another literal.  The final literal position will
 * overlay onto the first word of the adjacent code section
 * .DoubleExceptionVector.text.  (In practice, the literals will
 * overwrite the code, and the first few instructions will be
 * garbage.)
 */

#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec)       \
  section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size,		    \
		         LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3)   \
  {									    \
    . = ALIGN(4);							    \
    sym ## _start = ABSOLUTE(.);		 			    \
    *(section)								    \
    sym ## _end = ABSOLUTE(.);						    \
  }

/*
 *  Mapping of input sections to output sections when linking.
 */

SECTIONS
{
  . = KERNELOFFSET;
  /* .text section */

  _text = .;
  _stext = .;

  .text :
  {
    /* The HEAD_TEXT section must be the first section! */
    HEAD_TEXT
    TEXT_TEXT
    VMLINUX_SYMBOL(__sched_text_start) = .;
    *(.sched.literal .sched.text)
    VMLINUX_SYMBOL(__sched_text_end) = .;
    VMLINUX_SYMBOL(__lock_text_start) = .;
    *(.spinlock.literal .spinlock.text)
    VMLINUX_SYMBOL(__lock_text_end) = .;

  }
  _etext = .;
  PROVIDE (etext = .);

  . = ALIGN(16);

  RODATA

  /*  Relocation table */

  .fixup   : { *(.fixup) }

  EXCEPTION_TABLE(16)
  /* Data section */

  _sdata = .;
  RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  INIT_TEXT_SECTION(PAGE_SIZE)

  .init.data :
  {
    INIT_DATA
    . = ALIGN(0x4);
    __tagtable_begin = .;
    *(.taglist)
    __tagtable_end = .;

    . = ALIGN(16);
    __boot_reloc_table_start = ABSOLUTE(.);

    RELOCATE_ENTRY(_WindowVectors_text,
		   .WindowVectors.text);
#if XCHAL_EXCM_LEVEL >= 2
    RELOCATE_ENTRY(_Level2InterruptVector_text,
		   .Level2InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 3
    RELOCATE_ENTRY(_Level3InterruptVector_text,
		   .Level3InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 4
    RELOCATE_ENTRY(_Level4InterruptVector_text,
		   .Level4InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 5
    RELOCATE_ENTRY(_Level5InterruptVector_text,
		   .Level5InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 6
    RELOCATE_ENTRY(_Level6InterruptVector_text,
		   .Level6InterruptVector.text);
#endif
    RELOCATE_ENTRY(_KernelExceptionVector_text,
		   .KernelExceptionVector.text);
    RELOCATE_ENTRY(_UserExceptionVector_text,
		   .UserExceptionVector.text);
    RELOCATE_ENTRY(_DoubleExceptionVector_literal,
		   .DoubleExceptionVector.literal);
    RELOCATE_ENTRY(_DoubleExceptionVector_text,
		   .DoubleExceptionVector.text);
    RELOCATE_ENTRY(_DebugInterruptVector_text,
		   .DebugInterruptVector.text);
  
    __boot_reloc_table_end = ABSOLUTE(.) ;

    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
    INIT_CALLS
    CON_INITCALL
    SECURITY_INITCALL
    INIT_RAM_FS
  }

  PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)

  /* We need this dummy segment here */

  . = ALIGN(4);
  .dummy : { LONG(0) }

  /* The vectors are relocated to the real position at startup time */

  SECTION_VECTOR (_WindowVectors_text,
		  .WindowVectors.text,
		  XCHAL_WINDOW_VECTORS_VADDR, 4,
		  .dummy)
  SECTION_VECTOR (_DebugInterruptVector_literal,
		  .DebugInterruptVector.literal,
		  XCHAL_DEBUG_VECTOR_VADDR - 4,
		  SIZEOF(.WindowVectors.text),
		  .WindowVectors.text)
  SECTION_VECTOR (_DebugInterruptVector_text,
		  .DebugInterruptVector.text,
		  XCHAL_DEBUG_VECTOR_VADDR,
		  4,
		  .DebugInterruptVector.literal)
#undef LAST
#define LAST	.DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (_Level2InterruptVector_text,
		  .Level2InterruptVector.text,
		  XCHAL_INTLEVEL2_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (_Level3InterruptVector_text,
		  .Level3InterruptVector.text,
		  XCHAL_INTLEVEL3_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (_Level4InterruptVector_text,
		  .Level4InterruptVector.text,
		  XCHAL_INTLEVEL4_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (_Level5InterruptVector_text,
		  .Level5InterruptVector.text,
		  XCHAL_INTLEVEL5_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (_Level6InterruptVector_text,
		  .Level6InterruptVector.text,
		  XCHAL_INTLEVEL6_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level6InterruptVector.text
#endif
  SECTION_VECTOR (_KernelExceptionVector_literal,
		  .KernelExceptionVector.literal,
		  XCHAL_KERNEL_VECTOR_VADDR - 4,
		  SIZEOF(LAST), LAST)
#undef LAST
  SECTION_VECTOR (_KernelExceptionVector_text,
		  .KernelExceptionVector.text,
		  XCHAL_KERNEL_VECTOR_VADDR,
		  4,
		  .KernelExceptionVector.literal)
  SECTION_VECTOR (_UserExceptionVector_literal,
		  .UserExceptionVector.literal,
		  XCHAL_USER_VECTOR_VADDR - 4,
		  SIZEOF(.KernelExceptionVector.text),
		  .KernelExceptionVector.text)
  SECTION_VECTOR (_UserExceptionVector_text,
		  .UserExceptionVector.text,
		  XCHAL_USER_VECTOR_VADDR,
		  4,
		  .UserExceptionVector.literal)
  SECTION_VECTOR (_DoubleExceptionVector_literal,
		  .DoubleExceptionVector.literal,
		  XCHAL_DOUBLEEXC_VECTOR_VADDR - 16,
		  SIZEOF(.UserExceptionVector.text),
		  .UserExceptionVector.text)
  SECTION_VECTOR (_DoubleExceptionVector_text,
		  .DoubleExceptionVector.text,
		  XCHAL_DOUBLEEXC_VECTOR_VADDR,
		  32,
		  .DoubleExceptionVector.literal)

  . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
  . = ALIGN(PAGE_SIZE);

  __init_end = .;

  BSS_SECTION(0, 8192, 0)

  _end = .;

  /* only used by the boot loader  */

  . = ALIGN(0x10);
  .bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }

  .ResetVector.text XCHAL_RESET_VECTOR_VADDR :
  {
    *(.ResetVector.text)
  }

  .xt.lit : { *(.xt.lit) }
  .xt.prop : { *(.xt.prop) }

  .debug  0 :  { *(.debug) }
  .line  0 :  { *(.line) }
  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
  .debug_sfnames  0 :  { *(.debug_sfnames) }
  .debug_aranges  0 :  { *(.debug_aranges) }
  .debug_pubnames  0 :  { *(.debug_pubnames) }
  .debug_info  0 :  { *(.debug_info) }
  .debug_abbrev  0 :  { *(.debug_abbrev) }
  .debug_line  0 :  { *(.debug_line) }
  .debug_frame  0 :  { *(.debug_frame) }
  .debug_str  0 :  { *(.debug_str) }
  .debug_loc  0 :  { *(.debug_loc) }
  .debug_macinfo  0 :  { *(.debug_macinfo) }
  .debug_weaknames  0 :  { *(.debug_weaknames) }
  .debug_funcnames  0 :  { *(.debug_funcnames) }
  .debug_typenames  0 :  { *(.debug_typenames) }
  .debug_varnames  0 :  { *(.debug_varnames) }

  .xt.insn 0 :
  {
    *(.xt.insn)
    *(.gnu.linkonce.x*)
  }

  .xt.lit 0 :
  {
    *(.xt.lit)
    *(.gnu.linkonce.p*)
  }

  /* Sections to be discarded */
  DISCARDS
  /DISCARD/ : { *(.exit.literal) }
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/vmlinux.lds.S
	3	*
	4	* Xtensa linker script
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
2d1c645c	10	* Copyright (C) 2001 - 2008 Tensilica Inc.
5a0015d6 CZ	11	*
	12	* Chris Zankel <chris@zankel.net>
	13	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	14	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	15	*/
	16
	17	#include <asm-generic/vmlinux.lds.h>
cd3db323 TA	18	#include <asm/page.h>
cd3db323 TA	19	#include <asm/thread_info.h>
5a0015d6	20
367b8112	21	#include <variant/core.h>
6770fa02	22	#include <platform/hardware.h>
5a0015d6 CZ	23	OUTPUT_ARCH(xtensa)
	24	ENTRY(_start)
	25
173d6681	26	#ifdef __XTENSA_EB__
5a0015d6 CZ	27	jiffies = jiffies_64 + 4;
	28	#else
	29	jiffies = jiffies_64;
	30	#endif
	31
6770fa02	32	#ifndef KERNELOFFSET
173d6681	33	#define KERNELOFFSET 0xd0001000
6770fa02	34	#endif
5a0015d6 CZ	35
	36	/* Note: In the following macros, it would be nice to specify only the
	37	vector name and section kind and construct "sym" and "section" using
	38	CPP concatenation, but that does not work reliably. Concatenating a
	39	string with "." produces an invalid token. CPP will not print a
	40	warning because it thinks this is an assembly file, but it leaves
	41	them as multiple tokens and there may or may not be whitespace
	42	between them. */
	43
	44	/* Macro for a relocation entry */
	45
	46	#define RELOCATE_ENTRY(sym, section) \
	47	LONG(sym ## _start); \
	48	LONG(sym ## _end); \
	49	LONG(LOADADDR(section))
	50
	51	/* Macro to define a section for a vector.
	52	*
	53	* Use of the MIN function catches the types of errors illustrated in
	54	* the following example:
	55	*
	56	* Assume the section .DoubleExceptionVector.literal is completely
	57	* full. Then a programmer adds code to .DoubleExceptionVector.text
	58	* that produces another literal. The final literal position will
	59	* overlay onto the first word of the adjacent code section
	60	* .DoubleExceptionVector.text. (In practice, the literals will
	61	* overwrite the code, and the first few instructions will be
	62	* garbage.)
	63	*/
	64
	65	#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec) \
	66	section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size, \
	67	LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
	68	{ \
	69	. = ALIGN(4); \
	70	sym ## _start = ABSOLUTE(.); \
	71	*(section) \
	72	sym ## _end = ABSOLUTE(.); \
	73	}
	74
	75	/*
	76	* Mapping of input sections to output sections when linking.
	77	*/
	78
	79	SECTIONS
	80	{
173d6681	81	. = KERNELOFFSET;
5a0015d6 CZ	82	/* .text section */
	83
	84	_text = .;
	85	_stext = .;
5a0015d6 CZ	86
	87	.text :
	88	{
0ebdcb4d TA	89	/* The HEAD_TEXT section must be the first section! */
0ebdcb4d TA	90	HEAD_TEXT
78f3cdfa	91	TEXT_TEXT
5a0015d6	92	VMLINUX_SYMBOL(__sched_text_start) = .;
813e6783	93	*(.sched.literal .sched.text)
5a0015d6 CZ	94	VMLINUX_SYMBOL(__sched_text_end) = .;
5a0015d6 CZ	95	VMLINUX_SYMBOL(__lock_text_start) = .;
813e6783	96	*(.spinlock.literal .spinlock.text)
5a0015d6 CZ	97	VMLINUX_SYMBOL(__lock_text_end) = .;
	98
	99	}
	100	_etext = .;
de4f6e5b	101	PROVIDE (etext = .);
5a0015d6 CZ	102
	103	. = ALIGN(16);
	104
	105	RODATA
	106
	107	/* Relocation table */
	108
5a0015d6 CZ	109	.fixup : { *(.fixup) }
5a0015d6 CZ	110
cd3db323	111	EXCEPTION_TABLE(16)
5a0015d6 CZ	112	/* Data section */
5a0015d6 CZ	113
5e7b6ed8	114	_sdata = .;
cd3db323	115	RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
5a0015d6 CZ	116	_edata = .;
5a0015d6 CZ	117
5a0015d6 CZ	118	/* Initialization code and data: */
5a0015d6 CZ	119
cd3db323	120	. = ALIGN(PAGE_SIZE);
5a0015d6	121	__init_begin = .;
cd3db323	122	INIT_TEXT_SECTION(PAGE_SIZE)
5a0015d6 CZ	123
	124	.init.data :
	125	{
01ba2bdc	126	INIT_DATA
5a0015d6 CZ	127	. = ALIGN(0x4);
	128	__tagtable_begin = .;
	129	*(.taglist)
	130	__tagtable_end = .;
de4f6e5b CZ	131
	132	. = ALIGN(16);
	133	__boot_reloc_table_start = ABSOLUTE(.);
	134
	135	RELOCATE_ENTRY(_WindowVectors_text,
	136	.WindowVectors.text);
2d1c645c MG	137	#if XCHAL_EXCM_LEVEL >= 2
	138	RELOCATE_ENTRY(_Level2InterruptVector_text,
	139	.Level2InterruptVector.text);
	140	#endif
	141	#if XCHAL_EXCM_LEVEL >= 3
	142	RELOCATE_ENTRY(_Level3InterruptVector_text,
	143	.Level3InterruptVector.text);
	144	#endif
	145	#if XCHAL_EXCM_LEVEL >= 4
	146	RELOCATE_ENTRY(_Level4InterruptVector_text,
	147	.Level4InterruptVector.text);
	148	#endif
	149	#if XCHAL_EXCM_LEVEL >= 5
	150	RELOCATE_ENTRY(_Level5InterruptVector_text,
	151	.Level5InterruptVector.text);
	152	#endif
	153	#if XCHAL_EXCM_LEVEL >= 6
	154	RELOCATE_ENTRY(_Level6InterruptVector_text,
	155	.Level6InterruptVector.text);
	156	#endif
de4f6e5b CZ	157	RELOCATE_ENTRY(_KernelExceptionVector_text,
	158	.KernelExceptionVector.text);
	159	RELOCATE_ENTRY(_UserExceptionVector_text,
	160	.UserExceptionVector.text);
	161	RELOCATE_ENTRY(_DoubleExceptionVector_literal,
	162	.DoubleExceptionVector.literal);
	163	RELOCATE_ENTRY(_DoubleExceptionVector_text,
	164	.DoubleExceptionVector.text);
6d15d109 MG	165	RELOCATE_ENTRY(_DebugInterruptVector_text,
6d15d109 MG	166	.DebugInterruptVector.text);
de4f6e5b CZ	167
de4f6e5b CZ	168	__boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6	169
cd3db323 TA	170	INIT_SETUP(XCHAL_ICACHE_LINESIZE)
	171	INIT_CALLS
	172	CON_INITCALL
	173	SECURITY_INITCALL
	174	INIT_RAM_FS
5a0015d6	175	}
de4f6e5b	176
0415b00d	177	PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
de4f6e5b	178
5a0015d6 CZ	179	/* We need this dummy segment here */
	180
	181	. = ALIGN(4);
	182	.dummy : { LONG(0) }
	183
	184	/* The vectors are relocated to the real position at startup time */
	185
	186	SECTION_VECTOR (_WindowVectors_text,
	187	.WindowVectors.text,
	188	XCHAL_WINDOW_VECTORS_VADDR, 4,
	189	.dummy)
	190	SECTION_VECTOR (_DebugInterruptVector_literal,
	191	.DebugInterruptVector.literal,
173d6681	192	XCHAL_DEBUG_VECTOR_VADDR - 4,
5a0015d6 CZ	193	SIZEOF(.WindowVectors.text),
	194	.WindowVectors.text)
	195	SECTION_VECTOR (_DebugInterruptVector_text,
	196	.DebugInterruptVector.text,
173d6681	197	XCHAL_DEBUG_VECTOR_VADDR,
5a0015d6 CZ	198	4,
5a0015d6 CZ	199	.DebugInterruptVector.literal)
2d1c645c MG	200	#undef LAST
	201	#define LAST .DebugInterruptVector.text
	202	#if XCHAL_EXCM_LEVEL >= 2
	203	SECTION_VECTOR (_Level2InterruptVector_text,
	204	.Level2InterruptVector.text,
	205	XCHAL_INTLEVEL2_VECTOR_VADDR,
	206	SIZEOF(LAST), LAST)
	207	# undef LAST
	208	# define LAST .Level2InterruptVector.text
	209	#endif
	210	#if XCHAL_EXCM_LEVEL >= 3
	211	SECTION_VECTOR (_Level3InterruptVector_text,
	212	.Level3InterruptVector.text,
	213	XCHAL_INTLEVEL3_VECTOR_VADDR,
	214	SIZEOF(LAST), LAST)
	215	# undef LAST
	216	# define LAST .Level3InterruptVector.text
	217	#endif
	218	#if XCHAL_EXCM_LEVEL >= 4
	219	SECTION_VECTOR (_Level4InterruptVector_text,
	220	.Level4InterruptVector.text,
	221	XCHAL_INTLEVEL4_VECTOR_VADDR,
	222	SIZEOF(LAST), LAST)
	223	# undef LAST
	224	# define LAST .Level4InterruptVector.text
	225	#endif
	226	#if XCHAL_EXCM_LEVEL >= 5
	227	SECTION_VECTOR (_Level5InterruptVector_text,
	228	.Level5InterruptVector.text,
	229	XCHAL_INTLEVEL5_VECTOR_VADDR,
	230	SIZEOF(LAST), LAST)
	231	# undef LAST
	232	# define LAST .Level5InterruptVector.text
	233	#endif
	234	#if XCHAL_EXCM_LEVEL >= 6
	235	SECTION_VECTOR (_Level6InterruptVector_text,
	236	.Level6InterruptVector.text,
	237	XCHAL_INTLEVEL6_VECTOR_VADDR,
	238	SIZEOF(LAST), LAST)
	239	# undef LAST
	240	# define LAST .Level6InterruptVector.text
	241	#endif
5a0015d6 CZ	242	SECTION_VECTOR (_KernelExceptionVector_literal,
5a0015d6 CZ	243	.KernelExceptionVector.literal,
173d6681	244	XCHAL_KERNEL_VECTOR_VADDR - 4,
2d1c645c MG	245	SIZEOF(LAST), LAST)
2d1c645c MG	246	#undef LAST
5a0015d6 CZ	247	SECTION_VECTOR (_KernelExceptionVector_text,
5a0015d6 CZ	248	.KernelExceptionVector.text,
173d6681	249	XCHAL_KERNEL_VECTOR_VADDR,
5a0015d6 CZ	250	4,
	251	.KernelExceptionVector.literal)
	252	SECTION_VECTOR (_UserExceptionVector_literal,
	253	.UserExceptionVector.literal,
173d6681	254	XCHAL_USER_VECTOR_VADDR - 4,
5a0015d6 CZ	255	SIZEOF(.KernelExceptionVector.text),
	256	.KernelExceptionVector.text)
	257	SECTION_VECTOR (_UserExceptionVector_text,
	258	.UserExceptionVector.text,
173d6681	259	XCHAL_USER_VECTOR_VADDR,
5a0015d6 CZ	260	4,
	261	.UserExceptionVector.literal)
	262	SECTION_VECTOR (_DoubleExceptionVector_literal,
	263	.DoubleExceptionVector.literal,
	264	XCHAL_DOUBLEEXC_VECTOR_VADDR - 16,
	265	SIZEOF(.UserExceptionVector.text),
	266	.UserExceptionVector.text)
	267	SECTION_VECTOR (_DoubleExceptionVector_text,
	268	.DoubleExceptionVector.text,
	269	XCHAL_DOUBLEEXC_VECTOR_VADDR,
	270	32,
	271	.DoubleExceptionVector.literal)
	272
	273	. = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
cd3db323	274	. = ALIGN(PAGE_SIZE);
5a0015d6 CZ	275
	276	__init_end = .;
	277
cd3db323	278	BSS_SECTION(0, 8192, 0)
de4f6e5b	279
5a0015d6 CZ	280	_end = .;
	281
	282	/* only used by the boot loader */
	283
	284	. = ALIGN(0x10);
	285	.bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
	286
5a0015d6 CZ	287	.ResetVector.text XCHAL_RESET_VECTOR_VADDR :
	288	{
	289	*(.ResetVector.text)
	290	}
	291
de4f6e5b CZ	292	.xt.lit : { *(.xt.lit) }
de4f6e5b CZ	293	.xt.prop : { *(.xt.prop) }
5a0015d6 CZ	294
	295	.debug 0 : { *(.debug) }
	296	.line 0 : { *(.line) }
	297	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	298	.debug_sfnames 0 : { *(.debug_sfnames) }
	299	.debug_aranges 0 : { *(.debug_aranges) }
	300	.debug_pubnames 0 : { *(.debug_pubnames) }
	301	.debug_info 0 : { *(.debug_info) }
	302	.debug_abbrev 0 : { *(.debug_abbrev) }
	303	.debug_line 0 : { *(.debug_line) }
	304	.debug_frame 0 : { *(.debug_frame) }
	305	.debug_str 0 : { *(.debug_str) }
	306	.debug_loc 0 : { *(.debug_loc) }
	307	.debug_macinfo 0 : { *(.debug_macinfo) }
	308	.debug_weaknames 0 : { *(.debug_weaknames) }
	309	.debug_funcnames 0 : { *(.debug_funcnames) }
	310	.debug_typenames 0 : { *(.debug_typenames) }
	311	.debug_varnames 0 : { *(.debug_varnames) }
	312
	313	.xt.insn 0 :
	314	{
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	316	(.gnu.linkonce.x)
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	318
	319	.xt.lit 0 :
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023bf6f1 TH	324
	325	/* Sections to be discarded */
	326	DISCARDS
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5a0015d6	328	}