[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / xtensa / kernel / pci-dma.c

/*
 * arch/xtensa/kernel/pci-dma.c
 *
 * DMA coherent memory allocation.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * Copyright (C) 2002 - 2005 Tensilica Inc.
 *
 * Based on version for i386.
 *
 * Chris Zankel <chris@zankel.net>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <linux/gfp.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/cacheflush.h>

/*
 * Note: We assume that the full memory space is always mapped to 'kseg'
 *	 Otherwise we have to use page attributes (not implemented).
 */

void *
dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
{
	unsigned long ret;
	unsigned long uncached = 0;

	/* ignore region speicifiers */

	flag &= ~(__GFP_DMA | __GFP_HIGHMEM);

	if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
		flag |= GFP_DMA;
	ret = (unsigned long)__get_free_pages(flag, get_order(size));

	if (ret == 0)
		return NULL;

	/* We currently don't support coherent memory outside KSEG */

	if (ret < XCHAL_KSEG_CACHED_VADDR
	    || ret >= XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE)
		BUG();


	if (ret != 0) {
		memset((void*) ret, 0, size);
		uncached = ret+XCHAL_KSEG_BYPASS_VADDR-XCHAL_KSEG_CACHED_VADDR;
		*handle = virt_to_bus((void*)ret);
		__flush_invalidate_dcache_range(ret, size);
	}

	return (void*)uncached;
}
EXPORT_SYMBOL(dma_alloc_coherent);

void dma_free_coherent(struct device *hwdev, size_t size,
			 void *vaddr, dma_addr_t dma_handle)
{
	long addr=(long)vaddr+XCHAL_KSEG_CACHED_VADDR-XCHAL_KSEG_BYPASS_VADDR;

	if (addr < 0 || addr >= XCHAL_KSEG_SIZE)
		BUG();

	free_pages(addr, get_order(size));
}
EXPORT_SYMBOL(dma_free_coherent);


void consistent_sync(void *vaddr, size_t size, int direction)
{
	switch (direction) {
	case PCI_DMA_NONE:
		BUG();
	case PCI_DMA_FROMDEVICE:        /* invalidate only */
		__invalidate_dcache_range((unsigned long)vaddr,
				          (unsigned long)size);
		break;

	case PCI_DMA_TODEVICE:          /* writeback only */
	case PCI_DMA_BIDIRECTIONAL:     /* writeback and invalidate */
		__flush_invalidate_dcache_range((unsigned long)vaddr,
				    		(unsigned long)size);
		break;
	}
}
EXPORT_SYMBOL(consistent_sync);
Commit	Line	Data
5a0015d6	1	/*
58862699	2	* arch/xtensa/kernel/pci-dma.c
5a0015d6 CZ	3	*
	4	* DMA coherent memory allocation.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*
	11	* Copyright (C) 2002 - 2005 Tensilica Inc.
	12	*
	13	* Based on version for i386.
	14	*
	15	* Chris Zankel <chris@zankel.net>
	16	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	17	*/
	18
	19	#include <linux/types.h>
	20	#include <linux/mm.h>
	21	#include <linux/string.h>
	22	#include <linux/pci.h>
5a0e3ad6	23	#include <linux/gfp.h>
d3738f40	24	#include <linux/module.h>
5a0015d6 CZ	25	#include <asm/io.h>
	26	#include <asm/cacheflush.h>
	27
	28	/*
	29	* Note: We assume that the full memory space is always mapped to 'kseg'
	30	* Otherwise we have to use page attributes (not implemented).
	31	*/
	32
	33	void *
173d6681	34	dma_alloc_coherent(struct device dev,size_t size,dma_addr_t handle,gfp_t flag)
5a0015d6	35	{
173d6681 CZ	36	unsigned long ret;
173d6681 CZ	37	unsigned long uncached = 0;
5a0015d6 CZ	38
5a0015d6 CZ	39	/* ignore region speicifiers */
5a0015d6	40
173d6681	41	flag &= ~(__GFP_DMA \| __GFP_HIGHMEM);
5a0015d6	42
173d6681 CZ	43	if (dev == NULL \|\| (dev->coherent_dma_mask < 0xffffffff))
	44	flag \|= GFP_DMA;
	45	ret = (unsigned long)__get_free_pages(flag, get_order(size));
	46
	47	if (ret == 0)
	48	return NULL;
	49
	50	/* We currently don't support coherent memory outside KSEG */
	51
	52	if (ret < XCHAL_KSEG_CACHED_VADDR
	53	\|\| ret >= XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE)
	54	BUG();
	55
	56
	57	if (ret != 0) {
	58	memset((void*) ret, 0, size);
	59	uncached = ret+XCHAL_KSEG_BYPASS_VADDR-XCHAL_KSEG_CACHED_VADDR;
	60	handle = virt_to_bus((void)ret);
	61	__flush_invalidate_dcache_range(ret, size);
5a0015d6	62	}
173d6681 CZ	63
173d6681 CZ	64	return (void*)uncached;
5a0015d6	65	}
d3738f40	66	EXPORT_SYMBOL(dma_alloc_coherent);
5a0015d6 CZ	67
	68	void dma_free_coherent(struct device *hwdev, size_t size,
	69	void *vaddr, dma_addr_t dma_handle)
	70	{
173d6681 CZ	71	long addr=(long)vaddr+XCHAL_KSEG_CACHED_VADDR-XCHAL_KSEG_BYPASS_VADDR;
	72
	73	if (addr < 0 \|\| addr >= XCHAL_KSEG_SIZE)
	74	BUG();
	75
	76	free_pages(addr, get_order(size));
5a0015d6	77	}
d3738f40	78	EXPORT_SYMBOL(dma_free_coherent);
5a0015d6 CZ	79
	80
	81	void consistent_sync(void *vaddr, size_t size, int direction)
	82	{
	83	switch (direction) {
	84	case PCI_DMA_NONE:
	85	BUG();
	86	case PCI_DMA_FROMDEVICE: /* invalidate only */
	87	__invalidate_dcache_range((unsigned long)vaddr,
	88	(unsigned long)size);
	89	break;
	90
	91	case PCI_DMA_TODEVICE: /* writeback only */
	92	case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */
	93	__flush_invalidate_dcache_range((unsigned long)vaddr,
	94	(unsigned long)size);
	95	break;
	96	}
	97	}
d3738f40	98	EXPORT_SYMBOL(consistent_sync);