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[PATCH] x86_64: miscellaneous cleanup
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86_64 / kernel / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 *
9 * $Id$
10 */
11
12/*
13 * This file handles the architecture-dependent parts of initialization
14 */
15
16#include <linux/errno.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/ptrace.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/a.out.h>
26#include <linux/tty.h>
27#include <linux/ioport.h>
28#include <linux/delay.h>
29#include <linux/config.h>
30#include <linux/init.h>
31#include <linux/initrd.h>
32#include <linux/highmem.h>
33#include <linux/bootmem.h>
34#include <linux/module.h>
35#include <asm/processor.h>
36#include <linux/console.h>
37#include <linux/seq_file.h>
aac04b32 38#include <linux/crash_dump.h>
1da177e4
LT		 39#include <linux/root_dev.h>
40#include <linux/pci.h>
41#include <linux/acpi.h>
42#include <linux/kallsyms.h>
43#include <linux/edd.h>
bbfceef4 44#include <linux/mmzone.h>
5f5609df 45#include <linux/kexec.h>
95235ca2 46#include <linux/cpufreq.h>
e9928674 47#include <linux/dmi.h>
17a941d8 48#include <linux/dma-mapping.h>
681558fd 49#include <linux/ctype.h>
bbfceef4 50
1da177e4
LT		 51#include <asm/mtrr.h>
52#include <asm/uaccess.h>
53#include <asm/system.h>
54#include <asm/io.h>
55#include <asm/smp.h>
56#include <asm/msr.h>
57#include <asm/desc.h>
58#include <video/edid.h>
59#include <asm/e820.h>
60#include <asm/dma.h>
61#include <asm/mpspec.h>
62#include <asm/mmu_context.h>
63#include <asm/bootsetup.h>
64#include <asm/proto.h>
65#include <asm/setup.h>
66#include <asm/mach_apic.h>
67#include <asm/numa.h>
17a941d8 68#include <asm/swiotlb.h>
2bc0414e 69#include <asm/sections.h>
17a941d8 70#include <asm/gart-mapping.h>
1da177e4
LT		 71
72/*
73 * Machine setup..
74 */
75
6c231b7b 76struct cpuinfo_x86 boot_cpu_data __read_mostly;
1da177e4
LT		 77
78unsigned long mmu_cr4_features;
79
80int acpi_disabled;
81EXPORT_SYMBOL(acpi_disabled);
888ba6c6 82#ifdef CONFIG_ACPI
1da177e4
LT		 83extern int __initdata acpi_ht;
84extern acpi_interrupt_flags acpi_sci_flags;
85int __initdata acpi_force = 0;
86#endif
87
88int acpi_numa __initdata;
89
1da177e4
LT		 90/* Boot loader ID as an integer, for the benefit of proc_dointvec */
91int bootloader_type;
92
93unsigned long saved_video_mode;
94
1da177e4
LT		 95/*
96 * Setup options
97 */
1da177e4
LT		 98struct screen_info screen_info;
99struct sys_desc_table_struct {
100 unsigned short length;
101 unsigned char table[0];
102};
103
104struct edid_info edid_info;
105struct e820map e820;
106
107extern int root_mountflags;
1da177e4
LT		 108
109char command_line[COMMAND_LINE_SIZE];
110
111struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
130};
131
132#define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
134
135#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
136
137struct resource data_resource = {
138 .name = "Kernel data",
139 .start = 0,
140 .end = 0,
141 .flags = IORESOURCE_RAM,
142};
143struct resource code_resource = {
144 .name = "Kernel code",
145 .start = 0,
146 .end = 0,
147 .flags = IORESOURCE_RAM,
148};
149
150#define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
151
152static struct resource system_rom_resource = {
153 .name = "System ROM",
154 .start = 0xf0000,
155 .end = 0xfffff,
156 .flags = IORESOURCE_ROM,
157};
158
159static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
161 .start = 0xe0000,
162 .end = 0xeffff,
163 .flags = IORESOURCE_ROM,
164};
165
166static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
179};
180
181#define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
183
184static struct resource video_rom_resource = {
185 .name = "Video ROM",
186 .start = 0xc0000,
187 .end = 0xc7fff,
188 .flags = IORESOURCE_ROM,
189};
190
191static struct resource video_ram_resource = {
192 .name = "Video RAM area",
193 .start = 0xa0000,
194 .end = 0xbffff,
195 .flags = IORESOURCE_RAM,
196};
197
198#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
199
200static int __init romchecksum(unsigned char *rom, unsigned long length)
201{
202 unsigned char *p, sum = 0;
203
204 for (p = rom; p < rom + length; p++)
205 sum += *p;
206 return sum == 0;
207}
208
209static void __init probe_roms(void)
210{
211 unsigned long start, length, upper;
212 unsigned char *rom;
213 int i;
214
215 /* video rom */
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
220 continue;
221
222 video_rom_resource.start = start;
223
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
226
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
230
231 request_resource(&iomem_resource, &video_rom_resource);
232 break;
233 }
234
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
236 if (start < upper)
237 start = upper;
238
239 /* system rom */
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
242
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
250 }
251 }
252
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
257 continue;
258
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
261
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
264 continue;
265
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
269
270 start = adapter_rom_resources[i++].end & ~2047UL;
271 }
272}
273
681558fd
AK		 274/* Check for full argument with no trailing characters */
275static int fullarg(char *p, char *arg)
276{
277 int l = strlen(arg);
278 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
279}
280
1da177e4
LT		 281static __init void parse_cmdline_early (char ** cmdline_p)
282{
283 char c = ' ', *to = command_line, *from = COMMAND_LINE;
284 int len = 0;
69cda7b1 285 int userdef = 0;
1da177e4 286
1da177e4
LT		 287 for (;;) {
288 if (c != ' ')
289 goto next_char;
290
291#ifdef CONFIG_SMP
292 /*
293 * If the BIOS enumerates physical processors before logical,
294 * maxcpus=N at enumeration-time can be used to disable HT.
295 */
296 else if (!memcmp(from, "maxcpus=", 8)) {
297 extern unsigned int maxcpus;
298
299 maxcpus = simple_strtoul(from + 8, NULL, 0);
300 }
301#endif
888ba6c6 302#ifdef CONFIG_ACPI
1da177e4 303 /* "acpi=off" disables both ACPI table parsing and interpreter init */
681558fd 304 if (fullarg(from,"acpi=off"))
1da177e4
LT		 305 disable_acpi();
306
681558fd 307 if (fullarg(from, "acpi=force")) {
1da177e4
LT		 308 /* add later when we do DMI horrors: */
309 acpi_force = 1;
310 acpi_disabled = 0;
311 }
312
313 /* acpi=ht just means: do ACPI MADT parsing
314 at bootup, but don't enable the full ACPI interpreter */
681558fd 315 if (fullarg(from, "acpi=ht")) {
1da177e4
LT		 316 if (!acpi_force)
317 disable_acpi();
318 acpi_ht = 1;
319 }
681558fd 320 else if (fullarg(from, "pci=noacpi"))
1da177e4 321 acpi_disable_pci();
681558fd 322 else if (fullarg(from, "acpi=noirq"))
1da177e4
LT		 323 acpi_noirq_set();
324
681558fd 325 else if (fullarg(from, "acpi_sci=edge"))
1da177e4 326 acpi_sci_flags.trigger = 1;
681558fd 327 else if (fullarg(from, "acpi_sci=level"))
1da177e4 328 acpi_sci_flags.trigger = 3;
681558fd 329 else if (fullarg(from, "acpi_sci=high"))
1da177e4 330 acpi_sci_flags.polarity = 1;
681558fd 331 else if (fullarg(from, "acpi_sci=low"))
1da177e4
LT		 332 acpi_sci_flags.polarity = 3;
333
334 /* acpi=strict disables out-of-spec workarounds */
681558fd 335 else if (fullarg(from, "acpi=strict")) {
1da177e4
LT		 336 acpi_strict = 1;
337 }
22999244 338#ifdef CONFIG_X86_IO_APIC
681558fd 339 else if (fullarg(from, "acpi_skip_timer_override"))
22999244
AK		 340 acpi_skip_timer_override = 1;
341#endif
1da177e4
LT		 342#endif
343
681558fd 344 if (fullarg(from, "disable_timer_pin_1"))
66759a01 345 disable_timer_pin_1 = 1;
681558fd 346 if (fullarg(from, "enable_timer_pin_1"))
66759a01
CE		 347 disable_timer_pin_1 = -1;
348
681558fd 349 if (fullarg(from, "nolapic") || fullarg(from, "disableapic"))
1da177e4
LT		 350 disable_apic = 1;
351
681558fd 352 if (fullarg(from, "noapic"))
1da177e4
LT		 353 skip_ioapic_setup = 1;
354
681558fd 355 if (fullarg(from,"apic")) {
1da177e4
LT		 356 skip_ioapic_setup = 0;
357 ioapic_force = 1;
358 }
359
360 if (!memcmp(from, "mem=", 4))
361 parse_memopt(from+4, &from);
362
69cda7b1
AM		 363 if (!memcmp(from, "memmap=", 7)) {
364 /* exactmap option is for used defined memory */
365 if (!memcmp(from+7, "exactmap", 8)) {
366#ifdef CONFIG_CRASH_DUMP
367 /* If we are doing a crash dump, we
368 * still need to know the real mem
369 * size before original memory map is
370 * reset.
371 */
372 saved_max_pfn = e820_end_of_ram();
373#endif
374 from += 8+7;
375 end_pfn_map = 0;
376 e820.nr_map = 0;
377 userdef = 1;
378 }
379 else {
380 parse_memmapopt(from+7, &from);
381 userdef = 1;
382 }
383 }
384
2b97690f 385#ifdef CONFIG_NUMA
1da177e4
LT		 386 if (!memcmp(from, "numa=", 5))
387 numa_setup(from+5);
388#endif
389
1da177e4
LT		 390 if (!memcmp(from,"iommu=",6)) {
391 iommu_setup(from+6);
392 }
1da177e4 393
681558fd 394 if (fullarg(from,"oops=panic"))
1da177e4
LT		 395 panic_on_oops = 1;
396
397 if (!memcmp(from, "noexec=", 7))
398 nonx_setup(from + 7);
399
5f5609df
EB		 400#ifdef CONFIG_KEXEC
401 /* crashkernel=size@addr specifies the location to reserve for
402 * a crash kernel. By reserving this memory we guarantee
403 * that linux never set's it up as a DMA target.
404 * Useful for holding code to do something appropriate
405 * after a kernel panic.
406 */
407 else if (!memcmp(from, "crashkernel=", 12)) {
408 unsigned long size, base;
409 size = memparse(from+12, &from);
410 if (*from == '@') {
411 base = memparse(from+1, &from);
412 /* FIXME: Do I want a sanity check
413 * to validate the memory range?
414 */
415 crashk_res.start = base;
416 crashk_res.end = base + size - 1;
417 }
418 }
419#endif
420
aac04b32
VG		 421#ifdef CONFIG_PROC_VMCORE
422 /* elfcorehdr= specifies the location of elf core header
423 * stored by the crashed kernel. This option will be passed
424 * by kexec loader to the capture kernel.
425 */
426 else if(!memcmp(from, "elfcorehdr=", 11))
427 elfcorehdr_addr = memparse(from+11, &from);
428#endif
e2c03888 429
d5176123 430#ifdef CONFIG_HOTPLUG_CPU
e2c03888
AK		 431 else if (!memcmp(from, "additional_cpus=", 16))
432 setup_additional_cpus(from+16);
433#endif
434
1da177e4
LT		 435 next_char:
436 c = *(from++);
437 if (!c)
438 break;
439 if (COMMAND_LINE_SIZE <= ++len)
440 break;
441 *(to++) = c;
442 }
69cda7b1
AM		 443 if (userdef) {
444 printk(KERN_INFO "user-defined physical RAM map:\n");
445 e820_print_map("user");
446 }
1da177e4
LT		 447 *to = '\0';
448 *cmdline_p = command_line;
449}
450
2b97690f 451#ifndef CONFIG_NUMA
bbfceef4
MT		 452static void __init
453contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
1da177e4 454{
bbfceef4
MT		 455 unsigned long bootmap_size, bootmap;
456
bbfceef4
MT		 457 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
458 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
459 if (bootmap == -1L)
460 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
461 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
462 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
463 reserve_bootmem(bootmap, bootmap_size);
1da177e4
LT		 464}
465#endif
466
467/* Use inline assembly to define this because the nops are defined
468 as inline assembly strings in the include files and we cannot
469 get them easily into strings. */
470asm("\t.data\nk8nops: "
471 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
472 K8_NOP7 K8_NOP8);
473
474extern unsigned char k8nops[];
475static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
476 NULL,
477 k8nops,
478 k8nops + 1,
479 k8nops + 1 + 2,
480 k8nops + 1 + 2 + 3,
481 k8nops + 1 + 2 + 3 + 4,
482 k8nops + 1 + 2 + 3 + 4 + 5,
483 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
484 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
485};
486
7f6c5b04
AK		 487extern char __vsyscall_0;
488
1da177e4
LT		 489/* Replace instructions with better alternatives for this CPU type.
490
491 This runs before SMP is initialized to avoid SMP problems with
492 self modifying code. This implies that assymetric systems where
493 APs have less capabilities than the boot processor are not handled.
494 In this case boot with "noreplacement". */
495void apply_alternatives(void *start, void *end)
496{
497 struct alt_instr *a;
498 int diff, i, k;
499 for (a = start; (void *)a < end; a++) {
7f6c5b04
AK		 500 u8 *instr;
501
1da177e4
LT		 502 if (!boot_cpu_has(a->cpuid))
503 continue;
504
505 BUG_ON(a->replacementlen > a->instrlen);
7f6c5b04
AK		 506 instr = a->instr;
507 /* vsyscall code is not mapped yet. resolve it manually. */
508 if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END)
509 instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
510 __inline_memcpy(instr, a->replacement, a->replacementlen);
1da177e4
LT		 511 diff = a->instrlen - a->replacementlen;
512
513 /* Pad the rest with nops */
514 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
515 k = diff;
516 if (k > ASM_NOP_MAX)
517 k = ASM_NOP_MAX;
7f6c5b04 518 __inline_memcpy(instr + i, k8_nops[k], k);
1da177e4
LT		 519 }
520 }
521}
522
523static int no_replacement __initdata = 0;
524
525void __init alternative_instructions(void)
526{
527 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
528 if (no_replacement)
529 return;
530 apply_alternatives(__alt_instructions, __alt_instructions_end);
531}
532
533static int __init noreplacement_setup(char *s)
534{
535 no_replacement = 1;
536 return 0;
537}
538
539__setup("noreplacement", noreplacement_setup);
540
541#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
542struct edd edd;
543#ifdef CONFIG_EDD_MODULE
544EXPORT_SYMBOL(edd);
545#endif
546/**
547 * copy_edd() - Copy the BIOS EDD information
548 * from boot_params into a safe place.
549 *
550 */
551static inline void copy_edd(void)
552{
553 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
554 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
555 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
556 edd.edd_info_nr = EDD_NR;
557}
558#else
559static inline void copy_edd(void)
560{
561}
562#endif
563
564#define EBDA_ADDR_POINTER 0x40E
565static void __init reserve_ebda_region(void)
566{
567 unsigned int addr;
568 /**
569 * there is a real-mode segmented pointer pointing to the
570 * 4K EBDA area at 0x40E
571 */
572 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
573 addr <<= 4;
574 if (addr)
575 reserve_bootmem_generic(addr, PAGE_SIZE);
576}
577
578void __init setup_arch(char **cmdline_p)
579{
1da177e4
LT		 580 unsigned long kernel_end;
581
582 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
1da177e4
LT		 583 screen_info = SCREEN_INFO;
584 edid_info = EDID_INFO;
585 saved_video_mode = SAVED_VIDEO_MODE;
586 bootloader_type = LOADER_TYPE;
587
588#ifdef CONFIG_BLK_DEV_RAM
589 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
590 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
591 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
592#endif
593 setup_memory_region();
594 copy_edd();
595
596 if (!MOUNT_ROOT_RDONLY)
597 root_mountflags &= ~MS_RDONLY;
598 init_mm.start_code = (unsigned long) &_text;
599 init_mm.end_code = (unsigned long) &_etext;
600 init_mm.end_data = (unsigned long) &_edata;
601 init_mm.brk = (unsigned long) &_end;
602
603 code_resource.start = virt_to_phys(&_text);
604 code_resource.end = virt_to_phys(&_etext)-1;
605 data_resource.start = virt_to_phys(&_etext);
606 data_resource.end = virt_to_phys(&_edata)-1;
607
608 parse_cmdline_early(cmdline_p);
609
610 early_identify_cpu(&boot_cpu_data);
611
612 /*
613 * partially used pages are not usable - thus
614 * we are rounding upwards:
615 */
616 end_pfn = e820_end_of_ram();
1f50249e 617 num_physpages = end_pfn; /* for pfn_valid */
1da177e4
LT		 618
619 check_efer();
620
621 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
622
f6c2e333
SS		 623 zap_low_mappings(0);
624
888ba6c6 625#ifdef CONFIG_ACPI
1da177e4
LT		 626 /*
627 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
628 * Call this early for SRAT node setup.
629 */
630 acpi_boot_table_init();
631#endif
632
633#ifdef CONFIG_ACPI_NUMA
634 /*
635 * Parse SRAT to discover nodes.
636 */
637 acpi_numa_init();
638#endif
639
2b97690f 640#ifdef CONFIG_NUMA
1da177e4
LT		 641 numa_initmem_init(0, end_pfn);
642#else
bbfceef4 643 contig_initmem_init(0, end_pfn);
1da177e4
LT		 644#endif
645
646 /* Reserve direct mapping */
647 reserve_bootmem_generic(table_start << PAGE_SHIFT,
648 (table_end - table_start) << PAGE_SHIFT);
649
650 /* reserve kernel */
651 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
652 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
653
654 /*
655 * reserve physical page 0 - it's a special BIOS page on many boxes,
656 * enabling clean reboots, SMP operation, laptop functions.
657 */
658 reserve_bootmem_generic(0, PAGE_SIZE);
659
660 /* reserve ebda region */
661 reserve_ebda_region();
662
663#ifdef CONFIG_SMP
664 /*
665 * But first pinch a few for the stack/trampoline stuff
666 * FIXME: Don't need the extra page at 4K, but need to fix
667 * trampoline before removing it. (see the GDT stuff)
668 */
669 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
670
671 /* Reserve SMP trampoline */
672 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
673#endif
674
675#ifdef CONFIG_ACPI_SLEEP
676 /*
677 * Reserve low memory region for sleep support.
678 */
679 acpi_reserve_bootmem();
680#endif
681#ifdef CONFIG_X86_LOCAL_APIC
682 /*
683 * Find and reserve possible boot-time SMP configuration:
684 */
685 find_smp_config();
686#endif
687#ifdef CONFIG_BLK_DEV_INITRD
688 if (LOADER_TYPE && INITRD_START) {
689 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
690 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
691 initrd_start =
692 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
693 initrd_end = initrd_start+INITRD_SIZE;
694 }
695 else {
696 printk(KERN_ERR "initrd extends beyond end of memory "
697 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
698 (unsigned long)(INITRD_START + INITRD_SIZE),
699 (unsigned long)(end_pfn << PAGE_SHIFT));
700 initrd_start = 0;
701 }
702 }
703#endif
5f5609df
EB		 704#ifdef CONFIG_KEXEC
705 if (crashk_res.start != crashk_res.end) {
706 reserve_bootmem(crashk_res.start,
707 crashk_res.end - crashk_res.start + 1);
708 }
709#endif
0d317fb7 710
1da177e4
LT		 711 paging_init();
712
713 check_ioapic();
714
51f62e18
AR		 715 /*
716 * set this early, so we dont allocate cpu0
717 * if MADT list doesnt list BSP first
718 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
719 */
720 cpu_set(0, cpu_present_map);
888ba6c6 721#ifdef CONFIG_ACPI
1da177e4
LT		 722 /*
723 * Read APIC and some other early information from ACPI tables.
724 */
725 acpi_boot_init();
726#endif
727
05b3cbd8
RT		 728 init_cpu_to_node();
729
1da177e4
LT		 730#ifdef CONFIG_X86_LOCAL_APIC
731 /*
732 * get boot-time SMP configuration:
733 */
734 if (smp_found_config)
735 get_smp_config();
736 init_apic_mappings();
737#endif
738
739 /*
740 * Request address space for all standard RAM and ROM resources
741 * and also for regions reported as reserved by the e820.
742 */
743 probe_roms();
744 e820_reserve_resources();
745
746 request_resource(&iomem_resource, &video_ram_resource);
747
748 {
749 unsigned i;
750 /* request I/O space for devices used on all i[345]86 PCs */
751 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
752 request_resource(&ioport_resource, &standard_io_resources[i]);
753 }
754
a1e97782 755 e820_setup_gap();
1da177e4
LT		 756
757#ifdef CONFIG_GART_IOMMU
5b7b644c 758 iommu_hole_init();
1da177e4
LT		 759#endif
760
761#ifdef CONFIG_VT
762#if defined(CONFIG_VGA_CONSOLE)
763 conswitchp = &vga_con;
764#elif defined(CONFIG_DUMMY_CONSOLE)
765 conswitchp = &dummy_con;
766#endif
767#endif
768}
769
e6982c67 770static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
1da177e4
LT		 771{
772 unsigned int *v;
773
ebfcaa96 774 if (c->extended_cpuid_level < 0x80000004)
1da177e4
LT		 775 return 0;
776
777 v = (unsigned int *) c->x86_model_id;
778 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
779 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
780 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
781 c->x86_model_id[48] = 0;
782 return 1;
783}
784
785
e6982c67 786static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
1da177e4
LT		 787{
788 unsigned int n, dummy, eax, ebx, ecx, edx;
789
ebfcaa96 790 n = c->extended_cpuid_level;
1da177e4
LT		 791
792 if (n >= 0x80000005) {
793 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
794 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
795 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
796 c->x86_cache_size=(ecx>>24)+(edx>>24);
797 /* On K8 L1 TLB is inclusive, so don't count it */
798 c->x86_tlbsize = 0;
799 }
800
801 if (n >= 0x80000006) {
802 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
803 ecx = cpuid_ecx(0x80000006);
804 c->x86_cache_size = ecx >> 16;
805 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
806
807 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
808 c->x86_cache_size, ecx & 0xFF);
809 }
810
811 if (n >= 0x80000007)
812 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
813 if (n >= 0x80000008) {
814 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
815 c->x86_virt_bits = (eax >> 8) & 0xff;
816 c->x86_phys_bits = eax & 0xff;
817 }
818}
819
3f098c26
AK		 820#ifdef CONFIG_NUMA
821static int nearby_node(int apicid)
822{
823 int i;
824 for (i = apicid - 1; i >= 0; i--) {
825 int node = apicid_to_node[i];
826 if (node != NUMA_NO_NODE && node_online(node))
827 return node;
828 }
829 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
830 int node = apicid_to_node[i];
831 if (node != NUMA_NO_NODE && node_online(node))
832 return node;
833 }
834 return first_node(node_online_map); /* Shouldn't happen */
835}
836#endif
837
63518644
AK		 838/*
839 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
840 * Assumes number of cores is a power of two.
841 */
842static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
843{
844#ifdef CONFIG_SMP
2942283e 845 int cpu = smp_processor_id();
b41e2939 846 unsigned bits;
3f098c26
AK		 847#ifdef CONFIG_NUMA
848 int node = 0;
0b07e984 849 unsigned apicid = phys_proc_id[cpu];
3f098c26 850#endif
b41e2939
AK		 851
852 bits = 0;
94605eff 853 while ((1 << bits) < c->x86_max_cores)
b41e2939
AK		 854 bits++;
855
856 /* Low order bits define the core id (index of core in socket) */
857 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
858 /* Convert the APIC ID into the socket ID */
859 phys_proc_id[cpu] >>= bits;
63518644
AK		 860
861#ifdef CONFIG_NUMA
3f098c26
AK		 862 node = phys_proc_id[cpu];
863 if (apicid_to_node[apicid] != NUMA_NO_NODE)
864 node = apicid_to_node[apicid];
865 if (!node_online(node)) {
866 /* Two possibilities here:
867 - The CPU is missing memory and no node was created.
868 In that case try picking one from a nearby CPU
869 - The APIC IDs differ from the HyperTransport node IDs
870 which the K8 northbridge parsing fills in.
871 Assume they are all increased by a constant offset,
872 but in the same order as the HT nodeids.
873 If that doesn't result in a usable node fall back to the
874 path for the previous case. */
875 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
876 if (ht_nodeid >= 0 &&
877 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
878 node = apicid_to_node[ht_nodeid];
879 /* Pick a nearby node */
880 if (!node_online(node))
881 node = nearby_node(apicid);
882 }
69d81fcd 883 numa_set_node(cpu, node);
3f098c26 884
77d910f5
AK		 885 printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
886 cpu, apicid, c->x86_max_cores, node, cpu_core_id[cpu]);
63518644 887#endif
63518644
AK		 888#endif
889}
1da177e4
LT		 890
891static int __init init_amd(struct cpuinfo_x86 *c)
892{
893 int r;
7bcd3f34 894 unsigned level;
1da177e4 895
bc5e8fdf
LT		 896#ifdef CONFIG_SMP
897 unsigned long value;
898
7d318d77
AK		 899 /*
900 * Disable TLB flush filter by setting HWCR.FFDIS on K8
901 * bit 6 of msr C001_0015
902 *
903 * Errata 63 for SH-B3 steppings
904 * Errata 122 for all steppings (F+ have it disabled by default)
905 */
906 if (c->x86 == 15) {
907 rdmsrl(MSR_K8_HWCR, value);
908 value |= 1 << 6;
909 wrmsrl(MSR_K8_HWCR, value);
910 }
bc5e8fdf
LT		 911#endif
912
1da177e4
LT		 913 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
914 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
915 clear_bit(0*32+31, &c->x86_capability);
916
7bcd3f34
AK		 917 /* On C+ stepping K8 rep microcode works well for copy/memset */
918 level = cpuid_eax(1);
919 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
920 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
921
1da177e4
LT		 922 r = get_model_name(c);
923 if (!r) {
924 switch (c->x86) {
925 case 15:
926 /* Should distinguish Models here, but this is only
927 a fallback anyways. */
928 strcpy(c->x86_model_id, "Hammer");
929 break;
930 }
931 }
932 display_cacheinfo(c);
933
130951cc
AK		 934 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
935 if (c->x86_power & (1<<8))
936 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
937
ebfcaa96 938 if (c->extended_cpuid_level >= 0x80000008) {
94605eff
SS		 939 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
940 if (c->x86_max_cores & (c->x86_max_cores - 1))
941 c->x86_max_cores = 1;
1da177e4 942
63518644 943 amd_detect_cmp(c);
1da177e4
LT		 944 }
945
946 return r;
947}
948
e6982c67 949static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
1da177e4
LT		 950{
951#ifdef CONFIG_SMP
952 u32 eax, ebx, ecx, edx;
94605eff 953 int index_msb, core_bits;
1da177e4 954 int cpu = smp_processor_id();
94605eff
SS		 955
956 cpuid(1, &eax, &ebx, &ecx, &edx);
957
958 c->apicid = phys_pkg_id(0);
959
63518644 960 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
1da177e4
LT		 961 return;
962
1da177e4 963 smp_num_siblings = (ebx & 0xff0000) >> 16;
94605eff 964
1da177e4
LT		 965 if (smp_num_siblings == 1) {
966 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
94605eff
SS		 967 } else if (smp_num_siblings > 1 ) {
968
1da177e4
LT		 969 if (smp_num_siblings > NR_CPUS) {
970 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
971 smp_num_siblings = 1;
972 return;
973 }
94605eff
SS		 974
975 index_msb = get_count_order(smp_num_siblings);
1da177e4 976 phys_proc_id[cpu] = phys_pkg_id(index_msb);
94605eff 977
1da177e4
LT		 978 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
979 phys_proc_id[cpu]);
3dd9d514 980
94605eff 981 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
3dd9d514 982
94605eff
SS		 983 index_msb = get_count_order(smp_num_siblings) ;
984
985 core_bits = get_count_order(c->x86_max_cores);
3dd9d514 986
94605eff
SS		 987 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
988 ((1 << core_bits) - 1);
3dd9d514 989
94605eff 990 if (c->x86_max_cores > 1)
3dd9d514
AK		 991 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
992 cpu_core_id[cpu]);
1da177e4
LT		 993 }
994#endif
995}
996
3dd9d514
AK		 997/*
998 * find out the number of processor cores on the die
999 */
e6982c67 1000static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
3dd9d514
AK		 1001{
1002 unsigned int eax;
1003
1004 if (c->cpuid_level < 4)
1005 return 1;
1006
1007 __asm__("cpuid"
1008 : "=a" (eax)
1009 : "0" (4), "c" (0)
1010 : "bx", "dx");
1011
1012 if (eax & 0x1f)
1013 return ((eax >> 26) + 1);
1014 else
1015 return 1;
1016}
1017
df0cc26b
AK		 1018static void srat_detect_node(void)
1019{
1020#ifdef CONFIG_NUMA
ddea7be0 1021 unsigned node;
df0cc26b
AK		 1022 int cpu = smp_processor_id();
1023
1024 /* Don't do the funky fallback heuristics the AMD version employs
1025 for now. */
ddea7be0 1026 node = apicid_to_node[hard_smp_processor_id()];
df0cc26b
AK		 1027 if (node == NUMA_NO_NODE)
1028 node = 0;
69d81fcd 1029 numa_set_node(cpu, node);
df0cc26b
AK		 1030
1031 if (acpi_numa > 0)
1032 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1033#endif
1034}
1035
e6982c67 1036static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1da177e4
LT		 1037{
1038 /* Cache sizes */
1039 unsigned n;
1040
1041 init_intel_cacheinfo(c);
ebfcaa96 1042 n = c->extended_cpuid_level;
1da177e4
LT		 1043 if (n >= 0x80000008) {
1044 unsigned eax = cpuid_eax(0x80000008);
1045 c->x86_virt_bits = (eax >> 8) & 0xff;
1046 c->x86_phys_bits = eax & 0xff;
af9c142d
SL		 1047 /* CPUID workaround for Intel 0F34 CPU */
1048 if (c->x86_vendor == X86_VENDOR_INTEL &&
1049 c->x86 == 0xF && c->x86_model == 0x3 &&
1050 c->x86_mask == 0x4)
1051 c->x86_phys_bits = 36;
1da177e4
LT		 1052 }
1053
1054 if (c->x86 == 15)
1055 c->x86_cache_alignment = c->x86_clflush_size * 2;
39b3a791
AK		 1056 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1057 (c->x86 == 0x6 && c->x86_model >= 0x0e))
c29601e9 1058 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
c818a181 1059 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
94605eff 1060 c->x86_max_cores = intel_num_cpu_cores(c);
df0cc26b
AK		 1061
1062 srat_detect_node();
1da177e4
LT		 1063}
1064
672289e9 1065static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1da177e4
LT		 1066{
1067 char *v = c->x86_vendor_id;
1068
1069 if (!strcmp(v, "AuthenticAMD"))
1070 c->x86_vendor = X86_VENDOR_AMD;
1071 else if (!strcmp(v, "GenuineIntel"))
1072 c->x86_vendor = X86_VENDOR_INTEL;
1073 else
1074 c->x86_vendor = X86_VENDOR_UNKNOWN;
1075}
1076
1077struct cpu_model_info {
1078 int vendor;
1079 int family;
1080 char *model_names[16];
1081};
1082
1083/* Do some early cpuid on the boot CPU to get some parameter that are
1084 needed before check_bugs. Everything advanced is in identify_cpu
1085 below. */
e6982c67 1086void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1087{
1088 u32 tfms;
1089
1090 c->loops_per_jiffy = loops_per_jiffy;
1091 c->x86_cache_size = -1;
1092 c->x86_vendor = X86_VENDOR_UNKNOWN;
1093 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1094 c->x86_vendor_id[0] = '\0'; /* Unset */
1095 c->x86_model_id[0] = '\0'; /* Unset */
1096 c->x86_clflush_size = 64;
1097 c->x86_cache_alignment = c->x86_clflush_size;
94605eff 1098 c->x86_max_cores = 1;
ebfcaa96 1099 c->extended_cpuid_level = 0;
1da177e4
LT		 1100 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1101
1102 /* Get vendor name */
1103 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1104 (unsigned int *)&c->x86_vendor_id[0],
1105 (unsigned int *)&c->x86_vendor_id[8],
1106 (unsigned int *)&c->x86_vendor_id[4]);
1107
1108 get_cpu_vendor(c);
1109
1110 /* Initialize the standard set of capabilities */
1111 /* Note that the vendor-specific code below might override */
1112
1113 /* Intel-defined flags: level 0x00000001 */
1114 if (c->cpuid_level >= 0x00000001) {
1115 __u32 misc;
1116 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1117 &c->x86_capability[0]);
1118 c->x86 = (tfms >> 8) & 0xf;
1119 c->x86_model = (tfms >> 4) & 0xf;
1120 c->x86_mask = tfms & 0xf;
f5f786d0 1121 if (c->x86 == 0xf)
1da177e4 1122 c->x86 += (tfms >> 20) & 0xff;
f5f786d0 1123 if (c->x86 >= 0x6)
1da177e4 1124 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1da177e4
LT		 1125 if (c->x86_capability[0] & (1<<19))
1126 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1da177e4
LT		 1127 } else {
1128 /* Have CPUID level 0 only - unheard of */
1129 c->x86 = 4;
1130 }
a158608b
AK		 1131
1132#ifdef CONFIG_SMP
b41e2939 1133 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
a158608b 1134#endif
1da177e4
LT		 1135}
1136
1137/*
1138 * This does the hard work of actually picking apart the CPU stuff...
1139 */
e6982c67 1140void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1141{
1142 int i;
1143 u32 xlvl;
1144
1145 early_identify_cpu(c);
1146
1147 /* AMD-defined flags: level 0x80000001 */
1148 xlvl = cpuid_eax(0x80000000);
ebfcaa96 1149 c->extended_cpuid_level = xlvl;
1da177e4
LT		 1150 if ((xlvl & 0xffff0000) == 0x80000000) {
1151 if (xlvl >= 0x80000001) {
1152 c->x86_capability[1] = cpuid_edx(0x80000001);
5b7abc6f 1153 c->x86_capability[6] = cpuid_ecx(0x80000001);
1da177e4
LT		 1154 }
1155 if (xlvl >= 0x80000004)
1156 get_model_name(c); /* Default name */
1157 }
1158
1159 /* Transmeta-defined flags: level 0x80860001 */
1160 xlvl = cpuid_eax(0x80860000);
1161 if ((xlvl & 0xffff0000) == 0x80860000) {
1162 /* Don't set x86_cpuid_level here for now to not confuse. */
1163 if (xlvl >= 0x80860001)
1164 c->x86_capability[2] = cpuid_edx(0x80860001);
1165 }
1166
1167 /*
1168 * Vendor-specific initialization. In this section we
1169 * canonicalize the feature flags, meaning if there are
1170 * features a certain CPU supports which CPUID doesn't
1171 * tell us, CPUID claiming incorrect flags, or other bugs,
1172 * we handle them here.
1173 *
1174 * At the end of this section, c->x86_capability better
1175 * indicate the features this CPU genuinely supports!
1176 */
1177 switch (c->x86_vendor) {
1178 case X86_VENDOR_AMD:
1179 init_amd(c);
1180 break;
1181
1182 case X86_VENDOR_INTEL:
1183 init_intel(c);
1184 break;
1185
1186 case X86_VENDOR_UNKNOWN:
1187 default:
1188 display_cacheinfo(c);
1189 break;
1190 }
1191
1192 select_idle_routine(c);
1193 detect_ht(c);
1da177e4
LT		 1194
1195 /*
1196 * On SMP, boot_cpu_data holds the common feature set between
1197 * all CPUs; so make sure that we indicate which features are
1198 * common between the CPUs. The first time this routine gets
1199 * executed, c == &boot_cpu_data.
1200 */
1201 if (c != &boot_cpu_data) {
1202 /* AND the already accumulated flags with these */
1203 for (i = 0 ; i < NCAPINTS ; i++)
1204 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1205 }
1206
1207#ifdef CONFIG_X86_MCE
1208 mcheck_init(c);
1209#endif
3b520b23
SL		 1210 if (c == &boot_cpu_data)
1211 mtrr_bp_init();
1212 else
1213 mtrr_ap_init();
1da177e4 1214#ifdef CONFIG_NUMA
3019e8eb 1215 numa_add_cpu(smp_processor_id());
1da177e4
LT		 1216#endif
1217}
1218
1219
e6982c67 1220void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1da177e4
LT		 1221{
1222 if (c->x86_model_id[0])
1223 printk("%s", c->x86_model_id);
1224
1225 if (c->x86_mask || c->cpuid_level >= 0)
1226 printk(" stepping %02x\n", c->x86_mask);
1227 else
1228 printk("\n");
1229}
1230
1231/*
1232 * Get CPU information for use by the procfs.
1233 */
1234
1235static int show_cpuinfo(struct seq_file *m, void *v)
1236{
1237 struct cpuinfo_x86 *c = v;
1238
1239 /*
1240 * These flag bits must match the definitions in <asm/cpufeature.h>.
1241 * NULL means this bit is undefined or reserved; either way it doesn't
1242 * have meaning as far as Linux is concerned. Note that it's important
1243 * to realize there is a difference between this table and CPUID -- if
1244 * applications want to get the raw CPUID data, they should access
1245 * /dev/cpu/<cpu_nr>/cpuid instead.
1246 */
1247 static char *x86_cap_flags[] = {
1248 /* Intel-defined */
1249 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1250 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1251 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1252 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1253
1254 /* AMD-defined */
3c3b73b6 1255 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1256 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1257 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
3f98bc49 1258 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1da177e4
LT		 1259
1260 /* Transmeta-defined */
1261 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1262 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1263 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1264 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1265
1266 /* Other (Linux-defined) */
622dcaf9 1267 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
c29601e9 1268 "constant_tsc", NULL, NULL,
1da177e4
LT		 1269 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1270 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1271 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1272
1273 /* Intel-defined (#2) */
daedb82d 1274 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1da177e4
LT		 1275 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1276 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1277 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1278
5b7abc6f
PA		 1279 /* VIA/Cyrix/Centaur-defined */
1280 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1281 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1282 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1283 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1284
1da177e4 1285 /* AMD-defined (#2) */
3f98bc49 1286 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1da177e4
LT		 1287 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1288 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
5b7abc6f 1289 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1290 };
1291 static char *x86_power_flags[] = {
1292 "ts", /* temperature sensor */
1293 "fid", /* frequency id control */
1294 "vid", /* voltage id control */
1295 "ttp", /* thermal trip */
1296 "tm",
3f98bc49
AK		 1297 "stc",
1298 NULL,
39b3a791 1299 /* nothing */ /* constant_tsc - moved to flags */
1da177e4
LT		 1300 };
1301
1302
1303#ifdef CONFIG_SMP
1304 if (!cpu_online(c-cpu_data))
1305 return 0;
1306#endif
1307
1308 seq_printf(m,"processor\t: %u\n"
1309 "vendor_id\t: %s\n"
1310 "cpu family\t: %d\n"
1311 "model\t\t: %d\n"
1312 "model name\t: %s\n",
1313 (unsigned)(c-cpu_data),
1314 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1315 c->x86,
1316 (int)c->x86_model,
1317 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1318
1319 if (c->x86_mask || c->cpuid_level >= 0)
1320 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1321 else
1322 seq_printf(m, "stepping\t: unknown\n");
1323
1324 if (cpu_has(c,X86_FEATURE_TSC)) {
95235ca2
VP		 1325 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1326 if (!freq)
1327 freq = cpu_khz;
1da177e4 1328 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
95235ca2 1329 freq / 1000, (freq % 1000));
1da177e4
LT		 1330 }
1331
1332 /* Cache size */
1333 if (c->x86_cache_size >= 0)
1334 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1335
1336#ifdef CONFIG_SMP
94605eff 1337 if (smp_num_siblings * c->x86_max_cores > 1) {
db468681
AK		 1338 int cpu = c - cpu_data;
1339 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
94605eff 1340 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
d31ddaa1 1341 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
94605eff 1342 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
db468681 1343 }
1da177e4
LT		 1344#endif
1345
1346 seq_printf(m,
1347 "fpu\t\t: yes\n"
1348 "fpu_exception\t: yes\n"
1349 "cpuid level\t: %d\n"
1350 "wp\t\t: yes\n"
1351 "flags\t\t:",
1352 c->cpuid_level);
1353
1354 {
1355 int i;
1356 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
3d1712c9 1357 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1da177e4
LT		 1358 seq_printf(m, " %s", x86_cap_flags[i]);
1359 }
1360
1361 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1362 c->loops_per_jiffy/(500000/HZ),
1363 (c->loops_per_jiffy/(5000/HZ)) % 100);
1364
1365 if (c->x86_tlbsize > 0)
1366 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1367 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1368 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1369
1370 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1371 c->x86_phys_bits, c->x86_virt_bits);
1372
1373 seq_printf(m, "power management:");
1374 {
1375 unsigned i;
1376 for (i = 0; i < 32; i++)
1377 if (c->x86_power & (1 << i)) {
3f98bc49
AK		 1378 if (i < ARRAY_SIZE(x86_power_flags) &&
1379 x86_power_flags[i])
1380 seq_printf(m, "%s%s",
1381 x86_power_flags[i][0]?" ":"",
1382 x86_power_flags[i]);
1da177e4
LT		 1383 else
1384 seq_printf(m, " [%d]", i);
1385 }
1386 }
1da177e4 1387
d31ddaa1 1388 seq_printf(m, "\n\n");
1da177e4
LT		 1389
1390 return 0;
1391}
1392
1393static void *c_start(struct seq_file *m, loff_t *pos)
1394{
1395 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1396}
1397
1398static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1399{
1400 ++*pos;
1401 return c_start(m, pos);
1402}
1403
1404static void c_stop(struct seq_file *m, void *v)
1405{
1406}
1407
1408struct seq_operations cpuinfo_op = {
1409 .start =c_start,
1410 .next = c_next,
1411 .stop = c_stop,
1412 .show = show_cpuinfo,
1413};
e9928674
AK		 1414
1415static int __init run_dmi_scan(void)
1416{
1417 dmi_scan_machine();
1418 return 0;
1419}
1420core_initcall(run_dmi_scan);
1421
kernel source for telekom puls (alcatel/mediatek)