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[PATCH] kexec: x86_64 kexec implementation
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86_64 / kernel / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 *
9 * $Id$
10 */
11
12/*
13 * This file handles the architecture-dependent parts of initialization
14 */
15
16#include <linux/errno.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/ptrace.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/a.out.h>
26#include <linux/tty.h>
27#include <linux/ioport.h>
28#include <linux/delay.h>
29#include <linux/config.h>
30#include <linux/init.h>
31#include <linux/initrd.h>
32#include <linux/highmem.h>
33#include <linux/bootmem.h>
34#include <linux/module.h>
35#include <asm/processor.h>
36#include <linux/console.h>
37#include <linux/seq_file.h>
38#include <linux/root_dev.h>
39#include <linux/pci.h>
40#include <linux/acpi.h>
41#include <linux/kallsyms.h>
42#include <linux/edd.h>
bbfceef4
MT		 43#include <linux/mmzone.h>
44
1da177e4
LT		 45#include <asm/mtrr.h>
46#include <asm/uaccess.h>
47#include <asm/system.h>
48#include <asm/io.h>
49#include <asm/smp.h>
50#include <asm/msr.h>
51#include <asm/desc.h>
52#include <video/edid.h>
53#include <asm/e820.h>
54#include <asm/dma.h>
55#include <asm/mpspec.h>
56#include <asm/mmu_context.h>
57#include <asm/bootsetup.h>
58#include <asm/proto.h>
59#include <asm/setup.h>
60#include <asm/mach_apic.h>
61#include <asm/numa.h>
62
63/*
64 * Machine setup..
65 */
66
67struct cpuinfo_x86 boot_cpu_data;
68
69unsigned long mmu_cr4_features;
70
71int acpi_disabled;
72EXPORT_SYMBOL(acpi_disabled);
73#ifdef CONFIG_ACPI_BOOT
74extern int __initdata acpi_ht;
75extern acpi_interrupt_flags acpi_sci_flags;
76int __initdata acpi_force = 0;
77#endif
78
79int acpi_numa __initdata;
80
1da177e4
LT		 81/* Boot loader ID as an integer, for the benefit of proc_dointvec */
82int bootloader_type;
83
84unsigned long saved_video_mode;
85
86#ifdef CONFIG_SWIOTLB
87int swiotlb;
88EXPORT_SYMBOL(swiotlb);
89#endif
90
91/*
92 * Setup options
93 */
94struct drive_info_struct { char dummy[32]; } drive_info;
95struct screen_info screen_info;
96struct sys_desc_table_struct {
97 unsigned short length;
98 unsigned char table[0];
99};
100
101struct edid_info edid_info;
102struct e820map e820;
103
104extern int root_mountflags;
105extern char _text, _etext, _edata, _end;
106
107char command_line[COMMAND_LINE_SIZE];
108
109struct resource standard_io_resources[] = {
110 { .name = "dma1", .start = 0x00, .end = 0x1f,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "pic1", .start = 0x20, .end = 0x21,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "timer0", .start = 0x40, .end = 0x43,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer1", .start = 0x50, .end = 0x53,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "keyboard", .start = 0x60, .end = 0x6f,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "pic2", .start = 0xa0, .end = 0xa1,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "dma2", .start = 0xc0, .end = 0xdf,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "fpu", .start = 0xf0, .end = 0xff,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
128};
129
130#define STANDARD_IO_RESOURCES \
131 (sizeof standard_io_resources / sizeof standard_io_resources[0])
132
133#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
134
135struct resource data_resource = {
136 .name = "Kernel data",
137 .start = 0,
138 .end = 0,
139 .flags = IORESOURCE_RAM,
140};
141struct resource code_resource = {
142 .name = "Kernel code",
143 .start = 0,
144 .end = 0,
145 .flags = IORESOURCE_RAM,
146};
147
148#define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
149
150static struct resource system_rom_resource = {
151 .name = "System ROM",
152 .start = 0xf0000,
153 .end = 0xfffff,
154 .flags = IORESOURCE_ROM,
155};
156
157static struct resource extension_rom_resource = {
158 .name = "Extension ROM",
159 .start = 0xe0000,
160 .end = 0xeffff,
161 .flags = IORESOURCE_ROM,
162};
163
164static struct resource adapter_rom_resources[] = {
165 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
166 .flags = IORESOURCE_ROM },
167 { .name = "Adapter ROM", .start = 0, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM }
177};
178
179#define ADAPTER_ROM_RESOURCES \
180 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
181
182static struct resource video_rom_resource = {
183 .name = "Video ROM",
184 .start = 0xc0000,
185 .end = 0xc7fff,
186 .flags = IORESOURCE_ROM,
187};
188
189static struct resource video_ram_resource = {
190 .name = "Video RAM area",
191 .start = 0xa0000,
192 .end = 0xbffff,
193 .flags = IORESOURCE_RAM,
194};
195
196#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
197
198static int __init romchecksum(unsigned char *rom, unsigned long length)
199{
200 unsigned char *p, sum = 0;
201
202 for (p = rom; p < rom + length; p++)
203 sum += *p;
204 return sum == 0;
205}
206
207static void __init probe_roms(void)
208{
209 unsigned long start, length, upper;
210 unsigned char *rom;
211 int i;
212
213 /* video rom */
214 upper = adapter_rom_resources[0].start;
215 for (start = video_rom_resource.start; start < upper; start += 2048) {
216 rom = isa_bus_to_virt(start);
217 if (!romsignature(rom))
218 continue;
219
220 video_rom_resource.start = start;
221
222 /* 0 < length <= 0x7f * 512, historically */
223 length = rom[2] * 512;
224
225 /* if checksum okay, trust length byte */
226 if (length && romchecksum(rom, length))
227 video_rom_resource.end = start + length - 1;
228
229 request_resource(&iomem_resource, &video_rom_resource);
230 break;
231 }
232
233 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
234 if (start < upper)
235 start = upper;
236
237 /* system rom */
238 request_resource(&iomem_resource, &system_rom_resource);
239 upper = system_rom_resource.start;
240
241 /* check for extension rom (ignore length byte!) */
242 rom = isa_bus_to_virt(extension_rom_resource.start);
243 if (romsignature(rom)) {
244 length = extension_rom_resource.end - extension_rom_resource.start + 1;
245 if (romchecksum(rom, length)) {
246 request_resource(&iomem_resource, &extension_rom_resource);
247 upper = extension_rom_resource.start;
248 }
249 }
250
251 /* check for adapter roms on 2k boundaries */
252 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
253 rom = isa_bus_to_virt(start);
254 if (!romsignature(rom))
255 continue;
256
257 /* 0 < length <= 0x7f * 512, historically */
258 length = rom[2] * 512;
259
260 /* but accept any length that fits if checksum okay */
261 if (!length || start + length > upper || !romchecksum(rom, length))
262 continue;
263
264 adapter_rom_resources[i].start = start;
265 adapter_rom_resources[i].end = start + length - 1;
266 request_resource(&iomem_resource, &adapter_rom_resources[i]);
267
268 start = adapter_rom_resources[i++].end & ~2047UL;
269 }
270}
271
272static __init void parse_cmdline_early (char ** cmdline_p)
273{
274 char c = ' ', *to = command_line, *from = COMMAND_LINE;
275 int len = 0;
276
277 /* Save unparsed command line copy for /proc/cmdline */
278 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
279 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
280
281 for (;;) {
282 if (c != ' ')
283 goto next_char;
284
285#ifdef CONFIG_SMP
286 /*
287 * If the BIOS enumerates physical processors before logical,
288 * maxcpus=N at enumeration-time can be used to disable HT.
289 */
290 else if (!memcmp(from, "maxcpus=", 8)) {
291 extern unsigned int maxcpus;
292
293 maxcpus = simple_strtoul(from + 8, NULL, 0);
294 }
295#endif
296#ifdef CONFIG_ACPI_BOOT
297 /* "acpi=off" disables both ACPI table parsing and interpreter init */
298 if (!memcmp(from, "acpi=off", 8))
299 disable_acpi();
300
301 if (!memcmp(from, "acpi=force", 10)) {
302 /* add later when we do DMI horrors: */
303 acpi_force = 1;
304 acpi_disabled = 0;
305 }
306
307 /* acpi=ht just means: do ACPI MADT parsing
308 at bootup, but don't enable the full ACPI interpreter */
309 if (!memcmp(from, "acpi=ht", 7)) {
310 if (!acpi_force)
311 disable_acpi();
312 acpi_ht = 1;
313 }
314 else if (!memcmp(from, "pci=noacpi", 10))
315 acpi_disable_pci();
316 else if (!memcmp(from, "acpi=noirq", 10))
317 acpi_noirq_set();
318
319 else if (!memcmp(from, "acpi_sci=edge", 13))
320 acpi_sci_flags.trigger = 1;
321 else if (!memcmp(from, "acpi_sci=level", 14))
322 acpi_sci_flags.trigger = 3;
323 else if (!memcmp(from, "acpi_sci=high", 13))
324 acpi_sci_flags.polarity = 1;
325 else if (!memcmp(from, "acpi_sci=low", 12))
326 acpi_sci_flags.polarity = 3;
327
328 /* acpi=strict disables out-of-spec workarounds */
329 else if (!memcmp(from, "acpi=strict", 11)) {
330 acpi_strict = 1;
331 }
22999244
AK		 332#ifdef CONFIG_X86_IO_APIC
333 else if (!memcmp(from, "acpi_skip_timer_override", 24))
334 acpi_skip_timer_override = 1;
335#endif
1da177e4
LT		 336#endif
337
338 if (!memcmp(from, "nolapic", 7) ||
339 !memcmp(from, "disableapic", 11))
340 disable_apic = 1;
341
342 if (!memcmp(from, "noapic", 6))
343 skip_ioapic_setup = 1;
344
345 if (!memcmp(from, "apic", 4)) {
346 skip_ioapic_setup = 0;
347 ioapic_force = 1;
348 }
349
350 if (!memcmp(from, "mem=", 4))
351 parse_memopt(from+4, &from);
352
2b97690f 353#ifdef CONFIG_NUMA
1da177e4
LT		 354 if (!memcmp(from, "numa=", 5))
355 numa_setup(from+5);
356#endif
357
358#ifdef CONFIG_GART_IOMMU
359 if (!memcmp(from,"iommu=",6)) {
360 iommu_setup(from+6);
361 }
362#endif
363
364 if (!memcmp(from,"oops=panic", 10))
365 panic_on_oops = 1;
366
367 if (!memcmp(from, "noexec=", 7))
368 nonx_setup(from + 7);
369
370 next_char:
371 c = *(from++);
372 if (!c)
373 break;
374 if (COMMAND_LINE_SIZE <= ++len)
375 break;
376 *(to++) = c;
377 }
378 *to = '\0';
379 *cmdline_p = command_line;
380}
381
2b97690f 382#ifndef CONFIG_NUMA
bbfceef4
MT		 383static void __init
384contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
1da177e4 385{
bbfceef4
MT		 386 unsigned long bootmap_size, bootmap;
387
388 memory_present(0, start_pfn, end_pfn);
389 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
390 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
391 if (bootmap == -1L)
392 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
393 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
394 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
395 reserve_bootmem(bootmap, bootmap_size);
1da177e4
LT		 396}
397#endif
398
399/* Use inline assembly to define this because the nops are defined
400 as inline assembly strings in the include files and we cannot
401 get them easily into strings. */
402asm("\t.data\nk8nops: "
403 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
404 K8_NOP7 K8_NOP8);
405
406extern unsigned char k8nops[];
407static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
408 NULL,
409 k8nops,
410 k8nops + 1,
411 k8nops + 1 + 2,
412 k8nops + 1 + 2 + 3,
413 k8nops + 1 + 2 + 3 + 4,
414 k8nops + 1 + 2 + 3 + 4 + 5,
415 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
416 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
417};
418
419/* Replace instructions with better alternatives for this CPU type.
420
421 This runs before SMP is initialized to avoid SMP problems with
422 self modifying code. This implies that assymetric systems where
423 APs have less capabilities than the boot processor are not handled.
424 In this case boot with "noreplacement". */
425void apply_alternatives(void *start, void *end)
426{
427 struct alt_instr *a;
428 int diff, i, k;
429 for (a = start; (void *)a < end; a++) {
430 if (!boot_cpu_has(a->cpuid))
431 continue;
432
433 BUG_ON(a->replacementlen > a->instrlen);
434 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
435 diff = a->instrlen - a->replacementlen;
436
437 /* Pad the rest with nops */
438 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
439 k = diff;
440 if (k > ASM_NOP_MAX)
441 k = ASM_NOP_MAX;
442 __inline_memcpy(a->instr + i, k8_nops[k], k);
443 }
444 }
445}
446
447static int no_replacement __initdata = 0;
448
449void __init alternative_instructions(void)
450{
451 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
452 if (no_replacement)
453 return;
454 apply_alternatives(__alt_instructions, __alt_instructions_end);
455}
456
457static int __init noreplacement_setup(char *s)
458{
459 no_replacement = 1;
460 return 0;
461}
462
463__setup("noreplacement", noreplacement_setup);
464
465#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
466struct edd edd;
467#ifdef CONFIG_EDD_MODULE
468EXPORT_SYMBOL(edd);
469#endif
470/**
471 * copy_edd() - Copy the BIOS EDD information
472 * from boot_params into a safe place.
473 *
474 */
475static inline void copy_edd(void)
476{
477 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
478 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
479 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
480 edd.edd_info_nr = EDD_NR;
481}
482#else
483static inline void copy_edd(void)
484{
485}
486#endif
487
488#define EBDA_ADDR_POINTER 0x40E
489static void __init reserve_ebda_region(void)
490{
491 unsigned int addr;
492 /**
493 * there is a real-mode segmented pointer pointing to the
494 * 4K EBDA area at 0x40E
495 */
496 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
497 addr <<= 4;
498 if (addr)
499 reserve_bootmem_generic(addr, PAGE_SIZE);
500}
501
502void __init setup_arch(char **cmdline_p)
503{
1da177e4
LT		 504 unsigned long kernel_end;
505
506 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
507 drive_info = DRIVE_INFO;
508 screen_info = SCREEN_INFO;
509 edid_info = EDID_INFO;
510 saved_video_mode = SAVED_VIDEO_MODE;
511 bootloader_type = LOADER_TYPE;
512
513#ifdef CONFIG_BLK_DEV_RAM
514 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
515 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
516 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
517#endif
518 setup_memory_region();
519 copy_edd();
520
521 if (!MOUNT_ROOT_RDONLY)
522 root_mountflags &= ~MS_RDONLY;
523 init_mm.start_code = (unsigned long) &_text;
524 init_mm.end_code = (unsigned long) &_etext;
525 init_mm.end_data = (unsigned long) &_edata;
526 init_mm.brk = (unsigned long) &_end;
527
528 code_resource.start = virt_to_phys(&_text);
529 code_resource.end = virt_to_phys(&_etext)-1;
530 data_resource.start = virt_to_phys(&_etext);
531 data_resource.end = virt_to_phys(&_edata)-1;
532
533 parse_cmdline_early(cmdline_p);
534
535 early_identify_cpu(&boot_cpu_data);
536
537 /*
538 * partially used pages are not usable - thus
539 * we are rounding upwards:
540 */
541 end_pfn = e820_end_of_ram();
542
543 check_efer();
544
545 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
546
547#ifdef CONFIG_ACPI_BOOT
548 /*
549 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
550 * Call this early for SRAT node setup.
551 */
552 acpi_boot_table_init();
553#endif
554
555#ifdef CONFIG_ACPI_NUMA
556 /*
557 * Parse SRAT to discover nodes.
558 */
559 acpi_numa_init();
560#endif
561
2b97690f 562#ifdef CONFIG_NUMA
1da177e4
LT		 563 numa_initmem_init(0, end_pfn);
564#else
bbfceef4 565 contig_initmem_init(0, end_pfn);
1da177e4
LT		 566#endif
567
568 /* Reserve direct mapping */
569 reserve_bootmem_generic(table_start << PAGE_SHIFT,
570 (table_end - table_start) << PAGE_SHIFT);
571
572 /* reserve kernel */
573 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
574 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
575
576 /*
577 * reserve physical page 0 - it's a special BIOS page on many boxes,
578 * enabling clean reboots, SMP operation, laptop functions.
579 */
580 reserve_bootmem_generic(0, PAGE_SIZE);
581
582 /* reserve ebda region */
583 reserve_ebda_region();
584
585#ifdef CONFIG_SMP
586 /*
587 * But first pinch a few for the stack/trampoline stuff
588 * FIXME: Don't need the extra page at 4K, but need to fix
589 * trampoline before removing it. (see the GDT stuff)
590 */
591 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
592
593 /* Reserve SMP trampoline */
594 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
595#endif
596
597#ifdef CONFIG_ACPI_SLEEP
598 /*
599 * Reserve low memory region for sleep support.
600 */
601 acpi_reserve_bootmem();
602#endif
603#ifdef CONFIG_X86_LOCAL_APIC
604 /*
605 * Find and reserve possible boot-time SMP configuration:
606 */
607 find_smp_config();
608#endif
609#ifdef CONFIG_BLK_DEV_INITRD
610 if (LOADER_TYPE && INITRD_START) {
611 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
612 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
613 initrd_start =
614 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
615 initrd_end = initrd_start+INITRD_SIZE;
616 }
617 else {
618 printk(KERN_ERR "initrd extends beyond end of memory "
619 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
620 (unsigned long)(INITRD_START + INITRD_SIZE),
621 (unsigned long)(end_pfn << PAGE_SHIFT));
622 initrd_start = 0;
623 }
624 }
625#endif
bbfceef4
MT		 626
627 sparse_init();
1da177e4
LT		 628 paging_init();
629
630 check_ioapic();
631
632#ifdef CONFIG_ACPI_BOOT
633 /*
634 * Read APIC and some other early information from ACPI tables.
635 */
636 acpi_boot_init();
637#endif
638
639#ifdef CONFIG_X86_LOCAL_APIC
640 /*
641 * get boot-time SMP configuration:
642 */
643 if (smp_found_config)
644 get_smp_config();
645 init_apic_mappings();
646#endif
647
648 /*
649 * Request address space for all standard RAM and ROM resources
650 * and also for regions reported as reserved by the e820.
651 */
652 probe_roms();
653 e820_reserve_resources();
654
655 request_resource(&iomem_resource, &video_ram_resource);
656
657 {
658 unsigned i;
659 /* request I/O space for devices used on all i[345]86 PCs */
660 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
661 request_resource(&ioport_resource, &standard_io_resources[i]);
662 }
663
a1e97782 664 e820_setup_gap();
1da177e4
LT		 665
666#ifdef CONFIG_GART_IOMMU
667 iommu_hole_init();
668#endif
669
670#ifdef CONFIG_VT
671#if defined(CONFIG_VGA_CONSOLE)
672 conswitchp = &vga_con;
673#elif defined(CONFIG_DUMMY_CONSOLE)
674 conswitchp = &dummy_con;
675#endif
676#endif
677}
678
e6982c67 679static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
1da177e4
LT		 680{
681 unsigned int *v;
682
ebfcaa96 683 if (c->extended_cpuid_level < 0x80000004)
1da177e4
LT		 684 return 0;
685
686 v = (unsigned int *) c->x86_model_id;
687 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
688 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
689 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
690 c->x86_model_id[48] = 0;
691 return 1;
692}
693
694
e6982c67 695static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
1da177e4
LT		 696{
697 unsigned int n, dummy, eax, ebx, ecx, edx;
698
ebfcaa96 699 n = c->extended_cpuid_level;
1da177e4
LT		 700
701 if (n >= 0x80000005) {
702 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
703 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
704 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
705 c->x86_cache_size=(ecx>>24)+(edx>>24);
706 /* On K8 L1 TLB is inclusive, so don't count it */
707 c->x86_tlbsize = 0;
708 }
709
710 if (n >= 0x80000006) {
711 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
712 ecx = cpuid_ecx(0x80000006);
713 c->x86_cache_size = ecx >> 16;
714 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
715
716 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
717 c->x86_cache_size, ecx & 0xFF);
718 }
719
720 if (n >= 0x80000007)
721 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
722 if (n >= 0x80000008) {
723 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
724 c->x86_virt_bits = (eax >> 8) & 0xff;
725 c->x86_phys_bits = eax & 0xff;
726 }
727}
728
63518644
AK		 729/*
730 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
731 * Assumes number of cores is a power of two.
732 */
733static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
734{
735#ifdef CONFIG_SMP
2942283e 736 int cpu = smp_processor_id();
63518644 737 int node = 0;
b41e2939 738 unsigned bits;
63518644
AK		 739 if (c->x86_num_cores == 1)
740 return;
b41e2939
AK		 741
742 bits = 0;
743 while ((1 << bits) < c->x86_num_cores)
744 bits++;
745
746 /* Low order bits define the core id (index of core in socket) */
747 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
748 /* Convert the APIC ID into the socket ID */
749 phys_proc_id[cpu] >>= bits;
63518644
AK		 750
751#ifdef CONFIG_NUMA
752 /* When an ACPI SRAT table is available use the mappings from SRAT
753 instead. */
754 if (acpi_numa <= 0) {
b41e2939 755 node = phys_proc_id[cpu];
63518644
AK		 756 if (!node_online(node))
757 node = first_node(node_online_map);
758 cpu_to_node[cpu] = node;
759 } else {
760 node = cpu_to_node[cpu];
761 }
762#endif
a158608b 763
63518644
AK		 764 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
765 cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
766#endif
767}
1da177e4
LT		 768
769static int __init init_amd(struct cpuinfo_x86 *c)
770{
771 int r;
772 int level;
1da177e4
LT		 773
774 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
775 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
776 clear_bit(0*32+31, &c->x86_capability);
777
778 /* C-stepping K8? */
779 level = cpuid_eax(1);
780 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
781 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
782
783 r = get_model_name(c);
784 if (!r) {
785 switch (c->x86) {
786 case 15:
787 /* Should distinguish Models here, but this is only
788 a fallback anyways. */
789 strcpy(c->x86_model_id, "Hammer");
790 break;
791 }
792 }
793 display_cacheinfo(c);
794
ebfcaa96 795 if (c->extended_cpuid_level >= 0x80000008) {
1da177e4
LT		 796 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
797 if (c->x86_num_cores & (c->x86_num_cores - 1))
798 c->x86_num_cores = 1;
799
63518644 800 amd_detect_cmp(c);
1da177e4
LT		 801 }
802
803 return r;
804}
805
e6982c67 806static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
1da177e4
LT		 807{
808#ifdef CONFIG_SMP
809 u32 eax, ebx, ecx, edx;
3dd9d514 810 int index_msb, tmp;
1da177e4
LT		 811 int cpu = smp_processor_id();
812
63518644 813 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
1da177e4
LT		 814 return;
815
816 cpuid(1, &eax, &ebx, &ecx, &edx);
817 smp_num_siblings = (ebx & 0xff0000) >> 16;
818
819 if (smp_num_siblings == 1) {
820 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
821 } else if (smp_num_siblings > 1) {
1da177e4
LT		 822 index_msb = 31;
823 /*
824 * At this point we only support two siblings per
825 * processor package.
826 */
827 if (smp_num_siblings > NR_CPUS) {
828 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
829 smp_num_siblings = 1;
830 return;
831 }
832 tmp = smp_num_siblings;
1da177e4
LT		 833 while ((tmp & 0x80000000 ) == 0) {
834 tmp <<=1 ;
835 index_msb--;
836 }
3dd9d514 837 if (smp_num_siblings & (smp_num_siblings - 1))
1da177e4
LT		 838 index_msb++;
839 phys_proc_id[cpu] = phys_pkg_id(index_msb);
840
841 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
842 phys_proc_id[cpu]);
3dd9d514
AK		 843
844 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
845
846 tmp = smp_num_siblings;
847 index_msb = 31;
848 while ((tmp & 0x80000000) == 0) {
849 tmp <<=1 ;
850 index_msb--;
851 }
852 if (smp_num_siblings & (smp_num_siblings - 1))
853 index_msb++;
854
855 cpu_core_id[cpu] = phys_pkg_id(index_msb);
856
857 if (c->x86_num_cores > 1)
858 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
859 cpu_core_id[cpu]);
1da177e4
LT		 860 }
861#endif
862}
863
3dd9d514
AK		 864/*
865 * find out the number of processor cores on the die
866 */
e6982c67 867static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
3dd9d514
AK		 868{
869 unsigned int eax;
870
871 if (c->cpuid_level < 4)
872 return 1;
873
874 __asm__("cpuid"
875 : "=a" (eax)
876 : "0" (4), "c" (0)
877 : "bx", "dx");
878
879 if (eax & 0x1f)
880 return ((eax >> 26) + 1);
881 else
882 return 1;
883}
884
e6982c67 885static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1da177e4
LT		 886{
887 /* Cache sizes */
888 unsigned n;
889
890 init_intel_cacheinfo(c);
ebfcaa96 891 n = c->extended_cpuid_level;
1da177e4
LT		 892 if (n >= 0x80000008) {
893 unsigned eax = cpuid_eax(0x80000008);
894 c->x86_virt_bits = (eax >> 8) & 0xff;
895 c->x86_phys_bits = eax & 0xff;
896 }
897
898 if (c->x86 == 15)
899 c->x86_cache_alignment = c->x86_clflush_size * 2;
c29601e9
AK		 900 if (c->x86 >= 15)
901 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
3dd9d514 902 c->x86_num_cores = intel_num_cpu_cores(c);
1da177e4
LT		 903}
904
e6982c67 905void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1da177e4
LT		 906{
907 char *v = c->x86_vendor_id;
908
909 if (!strcmp(v, "AuthenticAMD"))
910 c->x86_vendor = X86_VENDOR_AMD;
911 else if (!strcmp(v, "GenuineIntel"))
912 c->x86_vendor = X86_VENDOR_INTEL;
913 else
914 c->x86_vendor = X86_VENDOR_UNKNOWN;
915}
916
917struct cpu_model_info {
918 int vendor;
919 int family;
920 char *model_names[16];
921};
922
923/* Do some early cpuid on the boot CPU to get some parameter that are
924 needed before check_bugs. Everything advanced is in identify_cpu
925 below. */
e6982c67 926void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 927{
928 u32 tfms;
929
930 c->loops_per_jiffy = loops_per_jiffy;
931 c->x86_cache_size = -1;
932 c->x86_vendor = X86_VENDOR_UNKNOWN;
933 c->x86_model = c->x86_mask = 0; /* So far unknown... */
934 c->x86_vendor_id[0] = '\0'; /* Unset */
935 c->x86_model_id[0] = '\0'; /* Unset */
936 c->x86_clflush_size = 64;
937 c->x86_cache_alignment = c->x86_clflush_size;
938 c->x86_num_cores = 1;
ebfcaa96 939 c->extended_cpuid_level = 0;
1da177e4
LT		 940 memset(&c->x86_capability, 0, sizeof c->x86_capability);
941
942 /* Get vendor name */
943 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
944 (unsigned int *)&c->x86_vendor_id[0],
945 (unsigned int *)&c->x86_vendor_id[8],
946 (unsigned int *)&c->x86_vendor_id[4]);
947
948 get_cpu_vendor(c);
949
950 /* Initialize the standard set of capabilities */
951 /* Note that the vendor-specific code below might override */
952
953 /* Intel-defined flags: level 0x00000001 */
954 if (c->cpuid_level >= 0x00000001) {
955 __u32 misc;
956 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
957 &c->x86_capability[0]);
958 c->x86 = (tfms >> 8) & 0xf;
959 c->x86_model = (tfms >> 4) & 0xf;
960 c->x86_mask = tfms & 0xf;
961 if (c->x86 == 0xf) {
962 c->x86 += (tfms >> 20) & 0xff;
963 c->x86_model += ((tfms >> 16) & 0xF) << 4;
964 }
965 if (c->x86_capability[0] & (1<<19))
966 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1da177e4
LT		 967 } else {
968 /* Have CPUID level 0 only - unheard of */
969 c->x86 = 4;
970 }
a158608b
AK		 971
972#ifdef CONFIG_SMP
b41e2939 973 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
a158608b 974#endif
1da177e4
LT		 975}
976
977/*
978 * This does the hard work of actually picking apart the CPU stuff...
979 */
e6982c67 980void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 981{
982 int i;
983 u32 xlvl;
984
985 early_identify_cpu(c);
986
987 /* AMD-defined flags: level 0x80000001 */
988 xlvl = cpuid_eax(0x80000000);
ebfcaa96 989 c->extended_cpuid_level = xlvl;
1da177e4
LT		 990 if ((xlvl & 0xffff0000) == 0x80000000) {
991 if (xlvl >= 0x80000001) {
992 c->x86_capability[1] = cpuid_edx(0x80000001);
5b7abc6f 993 c->x86_capability[6] = cpuid_ecx(0x80000001);
1da177e4
LT		 994 }
995 if (xlvl >= 0x80000004)
996 get_model_name(c); /* Default name */
997 }
998
999 /* Transmeta-defined flags: level 0x80860001 */
1000 xlvl = cpuid_eax(0x80860000);
1001 if ((xlvl & 0xffff0000) == 0x80860000) {
1002 /* Don't set x86_cpuid_level here for now to not confuse. */
1003 if (xlvl >= 0x80860001)
1004 c->x86_capability[2] = cpuid_edx(0x80860001);
1005 }
1006
1007 /*
1008 * Vendor-specific initialization. In this section we
1009 * canonicalize the feature flags, meaning if there are
1010 * features a certain CPU supports which CPUID doesn't
1011 * tell us, CPUID claiming incorrect flags, or other bugs,
1012 * we handle them here.
1013 *
1014 * At the end of this section, c->x86_capability better
1015 * indicate the features this CPU genuinely supports!
1016 */
1017 switch (c->x86_vendor) {
1018 case X86_VENDOR_AMD:
1019 init_amd(c);
1020 break;
1021
1022 case X86_VENDOR_INTEL:
1023 init_intel(c);
1024 break;
1025
1026 case X86_VENDOR_UNKNOWN:
1027 default:
1028 display_cacheinfo(c);
1029 break;
1030 }
1031
1032 select_idle_routine(c);
1033 detect_ht(c);
1da177e4
LT		 1034
1035 /*
1036 * On SMP, boot_cpu_data holds the common feature set between
1037 * all CPUs; so make sure that we indicate which features are
1038 * common between the CPUs. The first time this routine gets
1039 * executed, c == &boot_cpu_data.
1040 */
1041 if (c != &boot_cpu_data) {
1042 /* AND the already accumulated flags with these */
1043 for (i = 0 ; i < NCAPINTS ; i++)
1044 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1045 }
1046
1047#ifdef CONFIG_X86_MCE
1048 mcheck_init(c);
1049#endif
1050#ifdef CONFIG_NUMA
1051 if (c != &boot_cpu_data)
1052 numa_add_cpu(c - cpu_data);
1053#endif
1054}
1055
1056
e6982c67 1057void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1da177e4
LT		 1058{
1059 if (c->x86_model_id[0])
1060 printk("%s", c->x86_model_id);
1061
1062 if (c->x86_mask || c->cpuid_level >= 0)
1063 printk(" stepping %02x\n", c->x86_mask);
1064 else
1065 printk("\n");
1066}
1067
1068/*
1069 * Get CPU information for use by the procfs.
1070 */
1071
1072static int show_cpuinfo(struct seq_file *m, void *v)
1073{
1074 struct cpuinfo_x86 *c = v;
1075
1076 /*
1077 * These flag bits must match the definitions in <asm/cpufeature.h>.
1078 * NULL means this bit is undefined or reserved; either way it doesn't
1079 * have meaning as far as Linux is concerned. Note that it's important
1080 * to realize there is a difference between this table and CPUID -- if
1081 * applications want to get the raw CPUID data, they should access
1082 * /dev/cpu/<cpu_nr>/cpuid instead.
1083 */
1084 static char *x86_cap_flags[] = {
1085 /* Intel-defined */
1086 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1087 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1088 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1089 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1090
1091 /* AMD-defined */
3c3b73b6 1092 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1093 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1094 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1095 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1096
1097 /* Transmeta-defined */
1098 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1099 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1100 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1101 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1102
1103 /* Other (Linux-defined) */
622dcaf9 1104 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
c29601e9 1105 "constant_tsc", NULL, NULL,
1da177e4
LT		 1106 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1107 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1108 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1109
1110 /* Intel-defined (#2) */
1111 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1112 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1113 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1114 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1115
5b7abc6f
PA		 1116 /* VIA/Cyrix/Centaur-defined */
1117 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1118 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1119 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1120 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1121
1da177e4
LT		 1122 /* AMD-defined (#2) */
1123 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1124 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1125 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
5b7abc6f 1126 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1127 };
1128 static char *x86_power_flags[] = {
1129 "ts", /* temperature sensor */
1130 "fid", /* frequency id control */
1131 "vid", /* voltage id control */
1132 "ttp", /* thermal trip */
1133 "tm",
1134 "stc"
1135 };
1136
1137
1138#ifdef CONFIG_SMP
1139 if (!cpu_online(c-cpu_data))
1140 return 0;
1141#endif
1142
1143 seq_printf(m,"processor\t: %u\n"
1144 "vendor_id\t: %s\n"
1145 "cpu family\t: %d\n"
1146 "model\t\t: %d\n"
1147 "model name\t: %s\n",
1148 (unsigned)(c-cpu_data),
1149 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1150 c->x86,
1151 (int)c->x86_model,
1152 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1153
1154 if (c->x86_mask || c->cpuid_level >= 0)
1155 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1156 else
1157 seq_printf(m, "stepping\t: unknown\n");
1158
1159 if (cpu_has(c,X86_FEATURE_TSC)) {
1160 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1161 cpu_khz / 1000, (cpu_khz % 1000));
1162 }
1163
1164 /* Cache size */
1165 if (c->x86_cache_size >= 0)
1166 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1167
1168#ifdef CONFIG_SMP
db468681
AK		 1169 if (smp_num_siblings * c->x86_num_cores > 1) {
1170 int cpu = c - cpu_data;
1171 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1172 seq_printf(m, "siblings\t: %d\n",
1173 c->x86_num_cores * smp_num_siblings);
d31ddaa1
SS		 1174 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1175 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
db468681 1176 }
1da177e4
LT		 1177#endif
1178
1179 seq_printf(m,
1180 "fpu\t\t: yes\n"
1181 "fpu_exception\t: yes\n"
1182 "cpuid level\t: %d\n"
1183 "wp\t\t: yes\n"
1184 "flags\t\t:",
1185 c->cpuid_level);
1186
1187 {
1188 int i;
1189 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1190 if ( test_bit(i, &c->x86_capability) &&
1191 x86_cap_flags[i] != NULL )
1192 seq_printf(m, " %s", x86_cap_flags[i]);
1193 }
1194
1195 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1196 c->loops_per_jiffy/(500000/HZ),
1197 (c->loops_per_jiffy/(5000/HZ)) % 100);
1198
1199 if (c->x86_tlbsize > 0)
1200 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1201 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1202 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1203
1204 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1205 c->x86_phys_bits, c->x86_virt_bits);
1206
1207 seq_printf(m, "power management:");
1208 {
1209 unsigned i;
1210 for (i = 0; i < 32; i++)
1211 if (c->x86_power & (1 << i)) {
1212 if (i < ARRAY_SIZE(x86_power_flags))
1213 seq_printf(m, " %s", x86_power_flags[i]);
1214 else
1215 seq_printf(m, " [%d]", i);
1216 }
1217 }
1da177e4 1218
d31ddaa1 1219 seq_printf(m, "\n\n");
1da177e4
LT		 1220
1221 return 0;
1222}
1223
1224static void *c_start(struct seq_file *m, loff_t *pos)
1225{
1226 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1227}
1228
1229static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1230{
1231 ++*pos;
1232 return c_start(m, pos);
1233}
1234
1235static void c_stop(struct seq_file *m, void *v)
1236{
1237}
1238
1239struct seq_operations cpuinfo_op = {
1240 .start =c_start,
1241 .next = c_next,
1242 .stop = c_stop,
1243 .show = show_cpuinfo,
1244};
kernel source for telekom puls (alcatel/mediatek)